JP2007330072A - Synchronization control method for uninterruptible power source system - Google Patents

Synchronization control method for uninterruptible power source system Download PDF

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JP2007330072A
JP2007330072A JP2006161004A JP2006161004A JP2007330072A JP 2007330072 A JP2007330072 A JP 2007330072A JP 2006161004 A JP2006161004 A JP 2006161004A JP 2006161004 A JP2006161004 A JP 2006161004A JP 2007330072 A JP2007330072 A JP 2007330072A
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uninterruptible power
power source
power supply
output
frequency
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JP4593525B2 (en
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Touma Yamamoto
融真 山本
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Toshiba Mitsubishi Electric Industrial Systems Corp
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Abstract

<P>PROBLEM TO BE SOLVED: To provide a synchronization control method for an uninterruptible power source system which can self-propel with a stable output frequency of an inverter, even if the control signal is lost by constituting a synchronizing control loop for transmitting the control signal to a plurality of uninterruptible power source systems operated in parallel from an output switching board, so that the output of the inverter performs a synchronizing operation of a commercial power source or the like to be synchronized. <P>SOLUTION: The uninterruptible power source system comprises a plurality of the uninterruptible power source systems 1, 2 operated in parallel, and the output switching board 3 for switching the parallel operation output of the plurality of interruptible power source systems and a bypass power source. The output switching board outputs a first and a second frequencies corresponding to the phase difference between the bypass power source and the parallel bus lines of the plurality of uninterruptible power source systems, the plurality of uninterruptible power source systems receive the two frequencies respectively, the first frequency is added to the reference oscillator in the uninterruptible power source system, and the second frequency is deducted from the reference oscillator to obtain the output reference frequency of the inverter. <P>COPYRIGHT: (C)2008,JPO&INPIT

Description

この発明は、複数台の無停電電源装置を並列運転する場合の同期制御方法に関するものである。   The present invention relates to a synchronous control method when a plurality of uninterruptible power supplies are operated in parallel.

従来の無停電電源装置の同期制御方法は、出力切換盤から並列運転している複数の無停電電源装置へ、同期制御信号を発信し、同期制御信号がそれぞれの無停電電源装置の位相同期制御回路へ入力されている(例えば、特許文献1参照)。   The conventional method for synchronous control of uninterruptible power supplies is to send a synchronous control signal to a plurality of uninterruptible power supplies operating in parallel from the output switching panel, and the synchronous control signal is phase-synchronized control of each uninterruptible power supply. It is input to the circuit (for example, see Patent Document 1).

特開2004−357387号公報(第4頁、図1)Japanese Patent Laying-Open No. 2004-357387 (page 4, FIG. 1)

従来の無停電電源装置の同期制御方法は、出力切換盤から並列運転している複数の無停電電源装置へ、同期制御信号を発信し、その同期制御信号とインバータの出力が同期するように構成されているので、出力切換盤から発信している信号が、出力切換盤側の発信部故障などにより喪失した場合は、同期制御信号とインバータの出力は当然同期する事ができないが、それに加えて、インバータの出力周波数基準が不定になるという問題点があった。   The conventional uninterruptible power supply synchronous control method is configured so that a synchronous control signal is transmitted from an output switching panel to a plurality of uninterruptible power supply units operating in parallel, and the synchronous control signal and the inverter output are synchronized. Therefore, if the signal transmitted from the output switching board is lost due to a failure of the transmitting section on the output switching board side, the output of the synchronous control signal and the inverter cannot be synchronized, of course, There is a problem that the output frequency reference of the inverter becomes unstable.

この発明は上記のような課題を解決するためになされたものであり、出力切換盤から並列運転している複数の無停電電源装置へ、インバータの出力が商用電源等の同期対象に同期運転を行うよう制御信号を発信させる同期制御ループを構成し、この制御信号が喪失した場合でも、インバータの出力周波数は安定に自走することができる無停電電源装置の同期制御方法を得ることを目的とする。   The present invention has been made to solve the above-described problems, and from the output switching panel to the plurality of uninterruptible power supplies operating in parallel, the output of the inverter is synchronously operated on a synchronization target such as a commercial power supply. The purpose of the present invention is to provide a synchronous control method for an uninterruptible power supply capable of stably running the output frequency of an inverter even if this control signal is lost by configuring a synchronous control loop that transmits a control signal. To do.

この発明に係る無停電電源装置の同期制御方法においては、並列運転される複数台の無停電電源装置と、複数台の無停電電源装置の並列運転出力とバイパス電源とを切換える出力切換盤とから構成されるものにおいて、出力切換盤によりバイパス電源と複数台の無停電電源装置の並列母線との位相差に応じた第1及び第2の周波数を出力し、複数台の無停電電源装置に2つの周波数がそれぞれ入力され、第1の周波数は無停電電源装置の基準発振器に対し周波数加算され、第2の周波数は基準発振器に対し周波数減算され、インバータの出力基準周波数を得るものである。   In the synchronous control method of the uninterruptible power supply according to the present invention, from a plurality of uninterruptible power supplies that are operated in parallel, and an output switching board that switches between parallel operation output and bypass power supply of the plurality of uninterruptible power supplies. In the configuration, the output switching board outputs the first and second frequencies corresponding to the phase difference between the bypass power supply and the parallel buses of the plurality of uninterruptible power supply units, and outputs 2 to the plurality of uninterruptible power supply units. Two frequencies are input, the first frequency is added to the reference oscillator of the uninterruptible power supply, and the second frequency is subtracted from the reference oscillator to obtain the output reference frequency of the inverter.

この発明によれば、出力切換盤から並列運転している複数の無停電電源装置へ、インバータの出力である並列母線がバイパス電源商用電源と同期運転を行うことができるのは勿論のこと、出力切換盤の故障等により、出力切換盤と複数の無停電電源装置間の制御信号f1、f2が喪失した場合でも、インバータはそれぞれ基準発振器の周波数で動作することができ、安定した出力周波数にて自走運転することができるという効果がある。   According to the present invention, the parallel bus, which is the output of the inverter, can be operated synchronously with the bypass power source commercial power source to the plurality of uninterruptible power supply devices that are operating in parallel from the output switching board. Even if the control signals f1 and f2 between the output switching board and the plurality of uninterruptible power supply units are lost due to a failure of the switching board, the inverter can operate at the frequency of the reference oscillator, respectively, and at a stable output frequency. It has the effect of being able to drive on its own.

実施の形態1.
以下、この発明の実施の形態1を図1、2、3に基づいて説明する。図1はこの発明の対象となる無停電電源装置の並列運転構成を示したシステム構成図である。図において、1は第1の無停電電源装置、2は第2の無停電電源装置である。101はバイパス電源に介装されたMCCB、102は入力電源と第1の無停電電源装置1の間に介装されたMCCB、103入力電源と第2の無停電電源装置2の間に介装されたMCCB、11、14、16は第1の無停電電源装置1の構成要素である開閉器、12は第1の無停電電源装置1の構成要素である交流電力を直流電力に変換するコンバータ、13は第1の無停電電源装置1の構成要素であるバッテリ、15は第1の無停電電源装置1の構成要素である直流電力を交流電力に変換するインバータである。21、24、26は第2の無停電電源装置2の構成要素である開閉器、22は第2の無停電電源装置2の構成要素である交流電力を直流電力に変換するコンバータ、23は第2の無停電電源装置2の構成要素であるバッテリ、25は第2の無停電電源装置2の構成要素である直流電力を交流電力に変換するインバータである。3は出力切換盤であり、バイパス電源と、第1の無停電電源装置1及び第2の無停電電源装置2の並列母線とに接続されている。31、32は出力切換盤3の構成要素である開閉器であり、開閉器31は第1の無停電電源装置1及び第2の無停電電源装置2の並列母線に接続されている。また開閉器32はバイパス電源に接続されている。33、34は出力切換盤3の構成要素であるサイリスタであり、開閉器32に対して逆並列に並列接続することにより、半導体交流スイッチを構成している。
Embodiment 1 FIG.
Embodiment 1 of the present invention will be described below with reference to FIGS. FIG. 1 is a system configuration diagram showing a parallel operation configuration of an uninterruptible power supply apparatus that is an object of the present invention. In the figure, 1 is a first uninterruptible power supply, and 2 is a second uninterruptible power supply. Reference numeral 101 denotes an MCCB interposed in the bypass power source, reference numeral 102 denotes an MCCB interposed between the input power source and the first uninterruptible power supply 1, and reference numeral 103 between the input power source and the second uninterruptible power source 2. MCCB 11, 14, 16 are switches that are components of the first uninterruptible power supply 1, and 12 is a converter that converts AC power that is a component of the first uninterruptible power supply 1 into DC power. , 13 is a battery which is a component of the first uninterruptible power supply 1, and 15 is an inverter which converts DC power which is a component of the first uninterruptible power supply 1 into AC power. 21, 24, 26 are switches that are components of the second uninterruptible power supply 2, 22 is a converter that converts AC power that is a component of the second uninterruptible power supply 2, and 23 is a first Reference numeral 25 denotes a battery which is a component of the uninterruptible power supply 2, and reference numeral 25 denotes an inverter which converts DC power which is a component of the second uninterruptible power supply 2 into AC power. Reference numeral 3 denotes an output switching board, which is connected to the bypass power supply and the parallel buses of the first uninterruptible power supply 1 and the second uninterruptible power supply 2. 31 and 32 are switches that are components of the output switching board 3, and the switch 31 is connected to the parallel buses of the first uninterruptible power supply 1 and the second uninterruptible power supply 2. The switch 32 is connected to a bypass power source. Reference numerals 33 and 34 denote thyristors which are components of the output switching board 3 and are connected in parallel in reverse parallel to the switch 32 to constitute a semiconductor AC switch.

図2は、出力切換盤3の同期制御回路に関する制御回路を示した構成図である。3001はバイパス電源と第1の無停電電源装置1及び第2の無停電電源装置2の並列母線との位相差を検出する位相差検出回路、3002は位相差信号を増幅する増幅回路、3003は符号反転回路、3004、3005は入力信号の正側のみを通過させ負側はゼロを出力する制限回路、3006、3007は、入力信号に比例した周波数を出力する発振回路である。   FIG. 2 is a configuration diagram showing a control circuit related to the synchronization control circuit of the output switching board 3. Reference numeral 3001 denotes a phase difference detection circuit that detects a phase difference between the bypass power supply and the parallel buses of the first uninterruptible power supply 1 and the second uninterruptible power supply 2, 3002 an amplification circuit that amplifies the phase difference signal, and 3003 Sign inverting circuits 3004 and 3005 are limiting circuits that pass only the positive side of the input signal and output zero on the negative side, and 3006 and 3007 are oscillation circuits that output a frequency proportional to the input signal.

図3は、第1の無停電電源装置1の同期制御回路に関する制御回路を示した構成図であり、図示しないが第2の無停電電源装置2も同様の構成である。1001は基準発振器、1002、1003は周波数の加算及び減算を行う周波数加減算器、1004は周波数カウンタであり、入力のクロック周波数を分周し、カウンタ値を位相信号としてインバータ制御回路1005に与えている。なお、図3中、15はインバータである。   FIG. 3 is a configuration diagram showing a control circuit related to the synchronous control circuit of the first uninterruptible power supply 1, and the second uninterruptible power supply 2 has the same configuration although not shown. Reference numeral 1001 denotes a reference oscillator, reference numerals 1002 and 1003 denote frequency adders / subtractors for adding and subtracting frequencies, and reference numeral 1004 denotes a frequency counter, which divides the input clock frequency and applies the counter value to the inverter control circuit 1005 as a phase signal. . In FIG. 3, 15 is an inverter.

次に、図1により、動作を説明する。通常、第1の無停電電源装置1と第2の無停電電源装置2はインバータ15、25が並列運転しており、出力切換盤3の開閉器31がオン、開閉器32がオフ、サイリスタ33、34がオフにて、インバータ15、25の出力が負荷へ給電される。故障または過負荷等が発生し、インバータ15、25では負荷に給電できない場合、サイリスタ33、34がオン、開閉器32がオン、開閉器31がオンとなり、バイパス電源から負荷へ給電される。この給電切換時に負荷へショックを与えぬよう、負荷母線とバイパス電源を同期運転させることが必要となる。バイパス電源と負荷母線は、出力切換盤3の中に存在するので、出力切換盤3と第1の無停電電源装置1、第2の無停電電源装置2が協調して同期制御を実施する必要がある。   Next, the operation will be described with reference to FIG. Usually, in the first uninterruptible power supply 1 and the second uninterruptible power supply 2, inverters 15 and 25 are operated in parallel, the switch 31 of the output switching board 3 is on, the switch 32 is off, and the thyristor 33. , 34 are off, and the outputs of the inverters 15, 25 are fed to the load. When a failure or an overload occurs and the inverters 15 and 25 cannot supply power to the load, the thyristors 33 and 34 are turned on, the switch 32 is turned on, the switch 31 is turned on, and power is supplied from the bypass power source to the load. It is necessary to synchronize the load bus and the bypass power supply so as not to give a shock to the load when the power supply is switched. Since the bypass power supply and the load bus are present in the output switching board 3, the output switching board 3, the first uninterruptible power supply 1 and the second uninterruptible power supply 2 need to perform synchronous control in cooperation. There is.

この実施の形態1の同期制御方法を図2、図3により、説明する。まず、バイパス電源電圧と並列母線電圧から位相差検出回路3001により位相差を求める。この位相差を比例積分等の増幅回路3002にて増幅する。通常の位相同期制御回路では、これを電圧制御発振器に入力し、位相カウンタを用いることにより、同期制御ループを形成することが出来るが、ここでは、出力切換盤3と複数台の無停電電源装置1、2にて同期制御ループを形成しなければならない為、以下のように構成している。   The synchronization control method of the first embodiment will be described with reference to FIGS. First, the phase difference is obtained by the phase difference detection circuit 3001 from the bypass power supply voltage and the parallel bus voltage. This phase difference is amplified by an amplification circuit 3002 such as proportional integration. In a normal phase synchronization control circuit, this can be input to a voltage controlled oscillator and a phase control can be used to form a synchronization control loop. Here, the output switching board 3 and a plurality of uninterruptible power supply devices Since a synchronous control loop must be formed at 1 and 2, the following configuration is provided.

増幅回路3002の出力が正の場合は、制限回路3004と発振回路3006を介して周波数f1を複数の無停電電源装置1、2にそれぞれ発信する。また、増幅回路3002の出力が負の場合は、符号反転回路3003の出力が正となり、制限回路3005と発振回路3007を介した周波数f2が複数の無停電電源装置にそれぞれ発信される。仮に、増幅回路3002の出力がゼロであれば、f1、f2とも信号が出力されない。   When the output of the amplifier circuit 3002 is positive, the frequency f1 is transmitted to the plurality of uninterruptible power supply units 1 and 2 via the limiting circuit 3004 and the oscillation circuit 3006, respectively. When the output of the amplifier circuit 3002 is negative, the output of the sign inverting circuit 3003 is positive, and the frequency f2 via the limiting circuit 3005 and the oscillation circuit 3007 is transmitted to each of the plurality of uninterruptible power supplies. If the output of the amplifier circuit 3002 is zero, neither f1 nor f2 is output.

一方、無停電電源装置側は、図3のように制御回路が構成されている。図3では、第1の無停電電源装置1の場合を示しているが、並列運転を行う第2の無停電電源装置2も同様に構成されている。基準発振器1001は安定した周波数f0を発振している。1002、1003は周波数加減算器であり、(f0+f1−f2)の周波数をカウンタ1004の入力としている。仮に、f1=f2=ゼロHzの場合は、カウンタ1004の入力がf0となる。このf0がカウンタにて分周され、インバータ制御回路1005に位相信号θが与えられ、基本周波数50または60Hzにてインバータが電圧を発生する。バイパス電源の周波数に応じて50または60Hzの基本周波数を低くしなければならない場合は、増幅回路3002が負の値を出力し、f1がゼロHz、f2のみが周波数を出力し、f0−f2がカウンタ1004に入力される。逆に、バイパス電源の周波数に応じて50または60Hzの基本周波数を高くしなければならない場合は、増幅回路3002が正の値を出力し、f1が周波数を出力し、f2がゼロHzとなり、f0+f1がカウンタ1004に入力される。   On the other hand, on the uninterruptible power supply side, a control circuit is configured as shown in FIG. Although FIG. 3 shows the case of the first uninterruptible power supply 1, the second uninterruptible power supply 2 that performs parallel operation is configured in the same manner. The reference oscillator 1001 oscillates at a stable frequency f0. Reference numerals 1002 and 1003 denote frequency adder / subtracters, and the frequency of (f0 + f1−f2) is input to the counter 1004. If f1 = f2 = zero Hz, the input of the counter 1004 is f0. This f0 is frequency-divided by the counter, the phase signal θ is given to the inverter control circuit 1005, and the inverter generates a voltage at the basic frequency 50 or 60 Hz. When the basic frequency of 50 or 60 Hz must be lowered according to the frequency of the bypass power supply, the amplifier circuit 3002 outputs a negative value, f1 is zero Hz, only f2 outputs the frequency, and f0-f2 is Input to the counter 1004. Conversely, when the basic frequency of 50 or 60 Hz has to be increased depending on the frequency of the bypass power supply, the amplifier circuit 3002 outputs a positive value, f1 outputs the frequency, f2 becomes zero Hz, and f0 + f1 Is input to the counter 1004.

以上のように、構成されているので、出力切換盤から並列運転している複数の無停電電源装置へ、インバータの出力である並列母線がバイパス電源商用電源と同期運転を行うことができるのは勿論のこと、出力切換盤の故障等により、出力切換盤と複数の無停電電源装置間の制御信号f1、f2が喪失した場合でも、インバータはそれぞれ基準発振器の周波数で動作することができ、安定した出力周波数にて自走運転することができるという効果がある。   Since it is configured as described above, the parallel bus that is the output of the inverter can perform synchronous operation with the bypass power supply commercial power source to the plurality of uninterruptible power supply devices that are operating in parallel from the output switching board. Of course, even if the control signals f1 and f2 between the output switching board and the plurality of uninterruptible power supply devices are lost due to a failure of the output switching board, the inverter can operate at the frequency of the reference oscillator, respectively. The self-running operation can be performed at the output frequency.

この発明の実施の形態1における無停電電源装置の並列運転構成を示したシステム構成図である。1 is a system configuration diagram showing a parallel operation configuration of an uninterruptible power supply according to Embodiment 1 of the present invention. この発明の実施の形態1における無停電電源装置の出力切換盤の同期制御回路に関する制御回路を示す構成図である。It is a block diagram which shows the control circuit regarding the synchronous control circuit of the output switching board of the uninterruptible power supply in Embodiment 1 of this invention. この発明の実施の形態1における無停電電源装置の同期制御回路に関する制御回路を示す構成図である。It is a block diagram which shows the control circuit regarding the synchronous control circuit of the uninterruptible power supply in Embodiment 1 of this invention.

符号の説明Explanation of symbols

1 第1の無停電電源装置
2 第2の無停電電源装置
3 出力切換盤
11、14、16、21、24、26 開閉器
12、22 コンバータ
1、23 バッテリ
15、25 インバータ
31、32 開閉器
33、34 サイリスタ
101、102、103 MCCB
1001 基準発信器
1002、1003 周波数加減算器
1004 周波数カウンタ
1005 インバータ制御回路
3001 位相差検出回路
3002 増幅回路
3003 符号反転回路
3004、3005 制限回路
3006、3007 発信回路
DESCRIPTION OF SYMBOLS 1 1st uninterruptible power supply 2 2nd uninterruptible power supply 3 Output switching board 11, 14, 16, 21, 24, 26 Switch 12, 22 Converter 1, 23 Battery 15, 25 Inverter 31, 32 Switch 33, 34 Thyristors 101, 102, 103 MCCB
1001 Reference transmitters 1002 and 1003 Frequency adder / subtractor 1004 Frequency counter 1005 Inverter control circuit 3001 Phase difference detection circuit 3002 Amplifier circuit 3003 Sign inversion circuit 3004 and 3005 Limit circuit 3006 and 3007 Transmitter circuit

Claims (1)

並列運転される複数台の無停電電源装置と、前記複数台の無停電電源装置の並列運転出力とバイパス電源とを切換える出力切換盤とから構成される無停電電源装置の同期制御方法において、
前記出力切換盤により前記バイパス電源と前記複数台の無停電電源装置の並列母線との位相差に応じた第1及び第2の周波数を出力し、複数台の無停電電源装置に前記2つの周波数がそれぞれ入力され、第1の周波数は無停電電源装置の基準発振器に対し周波数加算され、第2の周波数は前記基準発振器に対し周波数減算され、インバータの出力基準周波数を得ることを特徴とする無停電電源装置の同期制御方法。
In the synchronous control method of an uninterruptible power supply comprising a plurality of uninterruptible power supplies that are operated in parallel, and an output switching board that switches between a parallel operation output of the plurality of uninterruptible power supplies and a bypass power supply,
The output switching board outputs first and second frequencies corresponding to the phase difference between the bypass power supply and the parallel buses of the plurality of uninterruptible power supply units, and the two frequencies are output to the plurality of uninterruptible power supply units. The first frequency is added to the reference oscillator of the uninterruptible power supply, and the second frequency is subtracted from the reference oscillator to obtain the output reference frequency of the inverter. A method for synchronous control of a power failure power supply.
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