JP2014023175A - Grid-connection device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a grid-connection device that synchronizes a grid voltage and the carrier of a power conversion device at high speed, prevents the occurrence of noise and higher harmonics due to a variation of a carrier frequency, and improves the stability of control.SOLUTION: A grid-connection device includes: third harmonic waveform data generating means 32 for generating third harmonic waveform data Sby using a positive phase of a three-phase grid voltage as a reference waveform; a third harmonic table 33 for generating third harmonic waveform data Ssynchronized with a carrier frequency; a coordinate converter 25 for detecting the phase difference ΔΦ between the third harmonic waveform data Sgenerated by the third harmonic waveform data generating means 32 and the third harmonic waveform data Sgenerated by the third harmonic table 33; a synchronization controller 26 for adjusting the carrier frequency so that the phase difference ΔΦ is zero; and a carrier-frequency generating circuit 27. This configuration synchronizes the grid voltage with the carrier of the power conversion device at high speed when a power conversion device is reset and is connected to the grid at the time of restoration of power.

Description

  The present invention relates to a grid interconnection device applied to a distributed power supply system such as a solar power generation system, a wind power generation system, or a power leveling system, and more particularly, to recover after an abnormality such as a power failure occurs in an AC power supply system. The present invention relates to a technique for restarting a power conversion device that constitutes a distributed power supply system by connecting it to a power supply system during power transmission.

In recent years, a large number of distributed power systems such as a solar power generation system and a wind power generation system have been introduced, and the stable operation thereof has become an issue.
In this type of distributed power supply system, protection and control functions are obligated as functions for linking to the AC power supply system, and these functions are used in the distributed power supply system when an abnormality such as a power failure occurs. It is assumed that the operation is once stopped and then restarted.

  For this reason, there is a concern that, due to the above-described protection function, when a large number of distributed power supply systems stop operating at the same time due to an abnormality in the AC power supply system and drop off from the system, the system frequency is lowered and the voltage level is changed. Therefore, when a system abnormality such as a momentary voltage drop occurs, it is desired that the distributed power supply system continue to operate to ensure the stability of the system, and the system is blacked out and the system voltage is zero. When the distributed power supply system is restarted from the above, it is required that the time required for the restart is as short as possible.

In general, power converters such as grid-connected inverters are PWM (pulse width modulation) controlled by a carrier frequency several hundred times that of the system voltage, suppressing harmonic current flowing in the system and stabilizing the control. In order to achieve this, it is necessary to link the carrier frequency in synchronization with the system voltage.
Here, FIG. 3 is a block diagram showing a conventional grid interconnection device, where the grid interconnection inverter 9 is cut off on the line 5 of the AC power supply system having the AC power supply 1, the circuit breakers 2, 3 and the load 4. It is connected via a device 6, a filter capacitor 7 and an AC reactor 8. The grid interconnection inverter 9 converts the grid voltage into a DC voltage, further converts it into an AC voltage having a predetermined magnitude and frequency, and supplies it to a load (not shown).

  A positive phase arithmetic circuit 23 and a gate signal generation circuit 28 are connected to the line 5 via a voltage detector 21 and a waveform shaping circuit 22. The waveform shaping circuit 22 removes voltage ripples and harmonic components contained in the system voltage waveform of the line 5 to perform waveform shaping, and adjusts the phase so that the phase of the shaped waveform matches the phase of the system voltage waveform. Plays the function to adjust.

The positive phase calculation circuit 23 calculates a positive phase component from the three-phase output waveform of the waveform shaping circuit 22, and the moving average circuit 24 further calculates a moving average value obtained by delaying the phase of the output waveform of the positive phase calculation circuit 23 by 90 degrees. By calculating, a cosine wave cos ω ₁ t and a sine wave sin ω ₁ t (these are collectively referred to as sine wave data S ₁ ) are calculated from the system voltage.
On the other hand, is outputted from the carrier frequency generator 27, based on the data select signal synchronized with the carrier for PWM control, the grid interconnection device inside the sine wave table 29 cosine wave cos .omega _{2 t} and sine wave sinω stored in ₂ t detects the phase difference ΔΦ of (these are collectively sine wave data S ₂ to be) the sine wave data S coordinate converter both sine wave input to the 25 data S ₁ with _1, S _2, the phase difference The synchronous adjuster 26 is operated so that ΔΦ becomes zero. Based on the output of the synchronization regulator 26, a carrier frequency generation circuit 27 generates a carrier S ₃ having a predetermined frequency synchronized with the system voltage S ₀ . S ₄ is a gate signal (PWM pulse) generated by the gate signal generation circuit 28 based on the system voltage S ₀ and the carrier S ₃ .

Here, a method of detecting the phase difference ΔΦ between the two sine wave data S ₁ and S ₂ by the coordinate converter 25 is described in, for example, Patent Document 1 and Patent Document 2.
That is, when the dq coordinate transformation is performed on the normalized phase voltage signals v _α and v _β that are orthogonal to each other, the voltage signal v _q on the q axis = −cos (θ) · sin (θ ′) + sin If (θ) · cos (θ ′) = sin (θ−θ ′), and | θ−θ ′ | = | Δθ | (Δθ is a phase difference), sin (θ−θ ′) ≈Δθ Therefore, obtaining the q-axis voltage v _q by coordinate transformation calculation is equivalent to obtaining the phase difference Δθ between θ and θ ′.
Based on the above principle, the phase difference ΔΦ between the sine wave data S ₁ (cos ω ₁ t and sin ω ₁ t) and the sine wave data S ₂ (cos ω ₂ t and sin ω ₂ t) can be obtained.

FIG. 4 conceptually shows the synchronization method according to the prior art of FIG. 3, and conventionally, the system voltage S ₀ (sine wave data S ₁ ) having a maximum phase difference of 180 degrees with respect to the sine wave data S ₂ . The method of synchronizing the carrier frequency was used.

  Patent Document 3 discloses a power conversion device such as a forward converter linked to a system, which performs PLL (phase locked loop) control in order to synchronize an internal phase reference with the phase of an AC input voltage. In the converter, at the time of power recovery after a power failure of the system, if the phase difference Δθ between the phase of the AC input voltage and the internal phase reference becomes a predetermined value or more, the PLL operation is switched by switching the control gain of the PLL control circuit. The prior art has been disclosed in which the power conversion device is restarted promptly by speeding up the setting.

FIG. 5 is a block diagram showing control means of the power conversion device described in Patent Document 3. As shown in FIG.
In the control unit 60, and converts the effective voltage (d-axis voltage) _{v d} and reactive voltage (q-axis voltage) _{v q} by the two-axis converter 62 a system voltage that is output from the A / D conversion circuit 61, PLL control Input to the circuit 63. The PLL control circuit 63 performs closed loop control so that the phases of v _d and v _q coincide with the internal phase angle θ, and outputs the internal phase angle θ to the switching control circuit 66. Based on the output voltage reference from the output voltage control circuit 67 and the internal phase angle θ, the switching control circuit 66 generates PWM pulses of switching elements that constitute a power converter (not shown) such as a forward converter. Generate.
The effective voltage v _d output from the biaxial conversion circuit 62 is input to the comparator 64 with hysteresis, and the effective voltage v _d (≈phase difference Δθ between the phase of the AC input voltage and the internal phase angle θ) is a predetermined value. In this case, an AC input phase abnormality detection signal is output, and the control gain 1 of the control gain switching circuit 65 is switched to a control gain 2 having a faster response than the abnormality detection signal.

In the above configuration, when the AC input voltage is normal and the power converter is operating normally, the phase difference Δθ changes within an allowable range due to disturbance of the power supply system. Therefore, normally, the response of the PLL control is lowered by the control gain 1 so as not to follow the change of the phase difference Δθ.
However, when the AC power supply is interrupted and then restored, the internal phase angle θ does not match the power supply phase until the PLL control is settled. Therefore, when the phase difference Δθ (≈v _d ) becomes equal to or greater than a predetermined value, the control gain 1 is switched to the high response control gain 2 to quickly settle the PLL control after power recovery.

Japanese Patent No. 4876976 (paragraphs [0003] to [0005] etc.) JP 2011-229361 A (paragraphs [0086], [0087], etc.) Japanese Patent Laying-Open No. 2005-261055 (paragraphs [0010] to [0021], FIG. 1, FIG. 2, etc.)

According to the prior art of FIGS. 3 and 4 described above, in a distributed power system, when a power failure occurs and the system voltage inverter is restarted from a state where the system voltage is zero after the power recovery, a sine wave since the maximum phase difference between the data S ₂ and the system voltage S ₀ is 180 degrees, it takes time for the operation to synchronize the carrier frequency in the system voltage S _0, until synchronization is established, the carrier frequency There were problems such as fluctuations that generated noise and the suppression of harmonic currents did not work sufficiently.
Further, in the prior art of Patent Document 3 shown in FIG. 5, when switching to a high response control gain 2 in accordance with the recovery of the AC power supply, the control may become unstable, which is the main circuit. It also caused overvoltage and overcurrent.

  Therefore, the problem to be solved by the present invention is that when the power converter is restarted and connected when the system is restored, the system voltage and the carrier of the power converter are synchronized at high speed, and noise and An object of the present invention is to provide a grid interconnection device that suppresses the generation of harmonics and improves the stability of control.

In order to solve the above-mentioned problem, the invention according to claim 1 is a grid interconnection device for linking a power conversion device that is PWM-controlled using a carrier synchronized with a three-phase AC grid voltage to the grid.
Third harmonic waveform generation means for generating third harmonic waveform data using the positive phase component of the system voltage as a reference waveform;
A third harmonic table for generating third harmonic waveform data synchronized with the frequency of the carrier;
Phase difference detection means for detecting a phase difference between the third harmonic waveform data generated by the third harmonic waveform generation means and the third harmonic waveform data generated by the third harmonic table;
And means for adjusting the frequency of the carrier so that the phase difference detected by the phase difference detection means becomes zero.

According to the present invention, the maximum phase difference between the system voltage and the third harmonic data in the third harmonic table with respect to the maximum phase difference of 180 degrees between the system voltage and the sine wave data in the sine wave table in the prior art. The phase difference is 60 degrees. That is, the tracking range with respect to the system voltage can be greatly reduced, so that the control responsiveness is improved, and the carrier frequency can be synchronized with the system voltage in tens of times compared with the conventional synchronization time. .
As a result, when power is restored from a system voltage zero state, the carrier of the power converter can be quickly synchronized with the system voltage to suppress noise and harmonic current, and the power converter can be controlled stably. .

It is a block diagram which shows embodiment of this invention. FIG. 3 is a conceptual diagram of a synchronization method according to an embodiment of the present invention. It is a block diagram which shows a prior art. It is a conceptual diagram of the synchronization method by the prior art of FIG. It is a block diagram of the prior art described in patent document 3. FIG.

Hereinafter, embodiments of the present invention will be described with reference to the drawings. FIG. 1 is a configuration diagram of a grid interconnection device according to this embodiment, and the same components as those in FIG. 3 are denoted by the same reference numerals.
In Figure 1, the three-phase output waveform of the waveform shaping circuit 22 is input to the positive phase calculation circuit 23, the positive phase component of the system voltage S ₀ is calculated. The positive phase component is converted into the third harmonic cos 3ω ₁ t by the third harmonic waveform generation circuit 31 and also the third harmonic sin 3ω ₁ via the moving average circuit 24 and the third harmonic waveform generation circuit 32. converted to t. These third harmonic cos 3ω ₁ t and sin 3ω ₁ t are collectively referred to as third harmonic data S ₃₁ .
Further, based on the data select signal from the carrier frequency generation circuit 27, the third harmonics cos3ω ₂ t, sin3ω ₂ t (collectively the third harmonics) stored in the third harmonic table 33 inside the grid interconnection device. Wave data S ₃₂ ) is input to the coordinate converter 25.

The coordinate converter 25, a third harmonic _{cos3ω 1 t, sin3ω 1 t,} cos3ω 2 t, based on sin3ω ₂ t, detects the phase difference ΔΦ of the third harmonic data _{S 31, S 32.}
As described in FIG. 3, this phase difference ΔΦ is
−cos (θ) · sin (θ ′) + sin (θ) · cos (θ ′) ≈Δθ
From this relationship, if θ = 3ω ₁ t and θ ′ = 3ω ₂ t,
ΔΦ≈−cos (3ω ₁ t) · sin (3ω ₂ t) + sin (3ω ₁ t) · cos (3ω ₂ t)
It can ask for.

The synchronization regulator 26 operates so that the phase difference ΔΦ becomes zero, and the carrier frequency generation circuit 27 generates a carrier S ₃ having a predetermined frequency synchronized with the system voltage S ₀ from the output of the synchronization regulator 26. S ₄ is a gate signal (PWM pulse) generated by the gate signal generation circuit 28 based on the carrier S ₃ and the system voltage S _0, and the semiconductor switching of the system interconnection inverter 9 is performed by the gate signal S _4. The element is driven.

FIG. 2 conceptually illustrates a synchronization method according to the embodiment of FIG.
In the present embodiment, as shown in FIG. 2, the system voltage S _0, the third harmonic wave generating circuits 31 and 32 in FIG. 1 generates the third harmonic data S _31, at the same time, the third harmonic table 33 generates a third harmonic data S ₃₂ synchronized with the carrier frequency. These third harmonic data S _31, S ₃₂ to control synchronized by the coordinate converter 25 and the sync controller 26, it is possible to synchronize the carrier frequency in the system voltage S ₀ as a result.
According to this embodiment, the maximum phase difference between the system voltage S ₀ and the third harmonic data S ₃₂ is 60 degrees, and between the system voltage S ₀ and the sine wave data S ₂ in FIG. 4 of the prior art. The phase tracking range is smaller than the maximum phase difference of 180 degrees. For this reason, the time required for the phase-synchronized control is reduced, and after the system is restored, the carrier of the grid interconnection inverter 9 can be synchronized with the grid voltage at a high speed and restarted in a short time from the system voltage zero state. it can.

  INDUSTRIAL APPLICABILITY The present invention can be used for a system that links not only an inverter but also various power conversion devices including a converter to an AC power supply system.

1: AC power supply 2, 3, 6: Circuit breaker 4: Load 5: Line 7: Filter capacitor 8: AC reactor 9: Grid-connected inverter 21: Voltage detector 22: Waveform shaping circuit 23: Positive phase calculation circuit 24: Moving average circuit 25: Coordinate converter 26: Synchronization controller 27: Carrier frequency generation circuit 28: Gate signal generation circuit 31, 32: Third harmonic waveform generation circuit 33: Third harmonic table

Claims (1)

In a system interconnection device for linking a power converter that is PWM controlled using a carrier synchronized with the voltage of a three-phase AC power supply system to the power supply system,
Third harmonic waveform generation means for generating third harmonic waveform data using the positive phase component of the three-phase system voltage as a reference waveform;
A third harmonic table for generating third harmonic waveform data synchronized with the frequency of the carrier;
Phase difference detection means for detecting a phase difference between the third harmonic waveform data generated by the third harmonic waveform generation means and the third harmonic waveform data generated by the third harmonic table;
Means for adjusting the frequency of the carrier so that the phase difference detected by the phase difference detection means becomes zero;
A grid interconnection device characterized by comprising:

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