JP2007324362A - Ceramic circuit substrate and method for manufacturing therefor - Google Patents

Ceramic circuit substrate and method for manufacturing therefor Download PDF

Info

Publication number
JP2007324362A
JP2007324362A JP2006152737A JP2006152737A JP2007324362A JP 2007324362 A JP2007324362 A JP 2007324362A JP 2006152737 A JP2006152737 A JP 2006152737A JP 2006152737 A JP2006152737 A JP 2006152737A JP 2007324362 A JP2007324362 A JP 2007324362A
Authority
JP
Japan
Prior art keywords
conductor
circuit board
insulating layer
ceramic circuit
sintered
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP2006152737A
Other languages
Japanese (ja)
Inventor
Hideji Nakazawa
秀司 中澤
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Kyocera Corp
Original Assignee
Kyocera Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Kyocera Corp filed Critical Kyocera Corp
Priority to JP2006152737A priority Critical patent/JP2007324362A/en
Publication of JP2007324362A publication Critical patent/JP2007324362A/en
Pending legal-status Critical Current

Links

Landscapes

  • Printing Elements For Providing Electric Connections Between Printed Circuits (AREA)

Abstract

<P>PROBLEM TO BE SOLVED: To provide a ceramic circuit substrate and its method for manufacturing which has low transmission loss for high-frequency signals by lowering the loss of a conductor. <P>SOLUTION: A through-conductor 11 includes a sintered conductor 12 which is made by sintering a conductor, an air gap 13 is formed in the interface of a part of the sintered conductor 12 and an insulating layer 3, and a part of the sintered conductor portion 12 is arranged along the direction in which the current of the through conductor 11 flows. <P>COPYRIGHT: (C)2008,JPO&INPIT

Description

本発明は、セラミック回路基板およびその製造方法に関し、特に、高周波信号を使用する多層配線基板、半導体素子収納用パッケージ、モジュール基板および高周波部品などに好適に適用されるセラミック回路基板およびその製造方法に関するものである。   The present invention relates to a ceramic circuit board and a manufacturing method thereof, and more particularly, to a ceramic circuit board suitably applied to a multilayer wiring board using a high-frequency signal, a package for housing semiconductor elements, a module board, a high-frequency component, and the like, and a manufacturing method thereof. Is.

携帯電話をはじめとする移動体通信などの発達および普及に伴い、通信機器や電子機器などの小形化、高機能化、低電力化などが進められ、AuやAg、Cu、Pd、Ptなどの低融点、低抵抗の導体材料と、ガラスセラミックスなどの低温焼成セラミックスとにより、共振器、コンデンサ、コイルおよびフィルタなどの素子が形成されたモジュール用の配線基板として、セラミック回路基板が用いられてきている。   Along with the development and popularization of mobile communications such as mobile phones, miniaturization, high functionality, low power, etc. of communication devices and electronic devices have been promoted, such as Au, Ag, Cu, Pd, Pt, etc. Ceramic circuit boards have been used as wiring boards for modules in which elements such as resonators, capacitors, coils and filters are formed by low melting point, low resistance conductive materials and low-temperature fired ceramics such as glass ceramics. Yes.

このような回路基板において、高周波信号を用いる場合が多くなってきているので、導体の低抵抗化とともに、低損失化が強く求められている。1050℃程度以下で焼成可能なガラスセラミック回路基板はAu、AgおよびCuなどの低融点金属を主成分とする配線導体が使用できるため比較的低損失であるが、さらなる低損失化を図るため、配線導体の改善が求められている。すなわち、基板を通る高周波信号の電流は、表皮効果によって導体と絶縁体との界面付近に集中し、導体界面付近の導電率が損失に影響を及ぼすため、導体界面付近での損失を抑制する必要があった。ここで高周波信号の表皮深さδは、周波数f、透磁率μおよび導電率σを用いて次式のように表される。
δ=(π・fμσ)−1/2
In such circuit boards, the use of high-frequency signals is increasing, so there is a strong demand for lower loss as well as lower resistance of conductors. A glass ceramic circuit board that can be fired at about 1050 ° C. or less has a relatively low loss because a wiring conductor mainly composed of a low melting point metal such as Au, Ag, and Cu can be used, but in order to further reduce the loss, There is a need for improved wiring conductors. In other words, the current of the high-frequency signal passing through the substrate is concentrated near the interface between the conductor and the insulator due to the skin effect, and the conductivity near the conductor interface affects the loss, so it is necessary to suppress the loss near the conductor interface. was there. Here, the skin depth δ of the high-frequency signal is expressed as follows using the frequency f, the magnetic permeability μ, and the conductivity σ.
δ = (π · fμσ) −1/2

従来、配線導体で形成したストリップライン共振線路の断面形状をH型にすることによって、ストリップライン共振線路の両端エッジ部分における表皮効果による磁場の集中を緩和して、配線導体の低損失化を図る技術が提案されている(たとえば、特許文献1参照)。   Conventionally, by making the cross-sectional shape of the stripline resonant line formed of the wiring conductor H-shaped, the concentration of the magnetic field due to the skin effect at the edge portions of both ends of the stripline resonant line is alleviated and the loss of the wiring conductor is reduced. A technique has been proposed (see, for example, Patent Document 1).

導体パターンの両端エッジ部に肉厚の厚い部分を設けることによって、導体パターンのエッジ部に磁界や電界の集中を起き難くして、高周波領域での電気特性を改善する技術が提案されている(たとえば、特許文献2参照)。また配線導体の断面形状のコーナー部に電界が集中して伝送ロスが発生し、導電率が低下するため、配線導体の断面形状を逆台形形状とし、逆台形の上部両端の鋭角なコーナー部に丸みをつけて、高周波信号を伝送した場合の表面抵抗を小さくすることが提案されている(たとえば、特許文献3参照)。   A technique has been proposed for improving the electrical characteristics in the high-frequency region by providing thick portions at both ends of the conductor pattern, thereby making it difficult for magnetic field and electric field to concentrate on the edge of the conductor pattern ( For example, see Patent Document 2). Also, the electric field concentrates on the corners of the cross-sectional shape of the wiring conductor, causing transmission loss and lowering the conductivity. Therefore, the cross-sectional shape of the wiring conductor is changed to an inverted trapezoidal shape, with sharp corners at the upper ends of the inverted trapezoid. It has been proposed to reduce the surface resistance when a high frequency signal is transmitted by rounding (see, for example, Patent Document 3).

前述のようなライン形状の導体は、複数の絶縁層にわたって折り曲げられて配置される。各々の絶縁層上に形成されたライン形状の導体は、絶縁層を貫通する貫通導体によって接続され、セラミック回路基板の小形化が図られている。   The line-shaped conductor as described above is bent and arranged over a plurality of insulating layers. The line-shaped conductors formed on the respective insulating layers are connected by through conductors penetrating the insulating layers, thereby reducing the size of the ceramic circuit board.

特開平10−126121号公報、段落[0034]〜[0039]、図13JP-A-10-126121, paragraphs [0034] to [0039], FIG. 特開2001−60516号公報、段落[0013]、[0018]、図2、図4Japanese Patent Laid-Open No. 2001-60516, paragraphs [0013] and [0018], FIG. 2 and FIG. 特開2003−174261号公報、図1(b)Japanese Patent Laid-Open No. 2003-174261, FIG. 1 (b)

しかしながら、前述の公報記載の従来技術は全て電流の流れる方向に垂直な断面の外周の形状を変えて、外周近くに流れる電流の損失を少なくするものであり、導体の内部に電流を流すことはできないため、導体を低損失化できないという問題があった。   However, all of the prior art described in the above-mentioned publications change the shape of the outer periphery of the cross section perpendicular to the direction of current flow to reduce the loss of current flowing near the outer periphery. As a result, there is a problem that the conductor cannot be reduced in loss.

本発明の目的は、導体を低損失化することにより、高周波信号の伝送ロスが小さいセラミック回路基板およびその製造方法を提供することにある。   An object of the present invention is to provide a ceramic circuit board with a small transmission loss of a high-frequency signal by reducing the loss of a conductor and a method for manufacturing the same.

本発明は、セラミックスから成る絶縁層と、該絶縁層に配設された貫通導体とを具備するセラミック回路基板であって、
前記貫通導体は、導体部が焼結されて成る焼結導体部を含み、
該焼結導体部の一部と前記絶縁層との界面には、空隙が形成されていることを特徴とするセラミック回路基板である。
The present invention is a ceramic circuit board comprising an insulating layer made of ceramics, and a through conductor disposed in the insulating layer,
The through conductor includes a sintered conductor portion formed by sintering a conductor portion,
The ceramic circuit board is characterized in that a gap is formed at an interface between a part of the sintered conductor portion and the insulating layer.

また本発明は、セラミックスから成る絶縁層と、該絶縁層に配設された貫通導体とを具備するセラミック回路基板であって、
前記貫通導体は、導体部が焼結されて成る焼結導体部と、非導体部とを含み、
該非導体部の一部が前記絶縁層の界面に臨んでいることを特徴とするセラミック回路基板である。
Further, the present invention is a ceramic circuit board comprising an insulating layer made of ceramics and a through conductor disposed in the insulating layer,
The through conductor includes a sintered conductor part formed by sintering a conductor part, and a non-conductor part,
A part of the non-conductor portion faces the interface of the insulating layer.

また本発明は、前記非導体部の一部は、当該貫通導体の電流の流れる方向に沿って配設されていることを特徴とする。   Further, the invention is characterized in that a part of the non-conductor portion is disposed along a current flowing direction of the through conductor.

また本発明は、前記焼結導体部および前記非導体部は、互いに結合する三次元網目構造によって実現されることを特徴とする。   Further, the present invention is characterized in that the sintered conductor portion and the non-conductor portion are realized by a three-dimensional network structure that is coupled to each other.

また本発明は、前記非導体部は、前記貫通導体全体の10体積%以上80体積%以下に規定されることを特徴とする。   In the invention, it is preferable that the non-conductor portion is defined as 10% by volume or more and 80% by volume or less of the entire through conductor.

また本発明は、前記焼結導体部は、該焼結導体部を基板厚み方向に垂直な仮想平面で切断して見た平均厚みが、当該貫通導体を流れる高周波信号の表皮深さの6倍以上に規定されることを特徴とする。   According to the present invention, the sintered conductor portion has an average thickness obtained by cutting the sintered conductor portion along a virtual plane perpendicular to the substrate thickness direction, which is six times the skin depth of the high-frequency signal flowing through the through conductor. It is characterized by being defined above.

また本発明は、セラミックスから成る絶縁層と、該絶縁層に配設された貫通導体とを具備するセラミック回路基板の製造方法であって、
セラミックグリーンシートを作製する工程と、
前記貫通導体の前駆体と、架橋反応により結合させる樹脂から成る樹脂片とを含む導体ペーストを作製する工程と、
前記セラミックグリーンシートに形成される貫通孔に、前記導体ペーストを充填する工程と、
前記セラミックグリーンシートおよび前記導体ペーストを焼成する工程と、
を有することを特徴とするセラミック回路基板の製造方法である。
The present invention is also a method for manufacturing a ceramic circuit board comprising an insulating layer made of ceramics and a through conductor disposed in the insulating layer,
Producing a ceramic green sheet;
Producing a conductor paste including a precursor of the through conductor and a resin piece made of a resin to be bonded by a crosslinking reaction;
Filling the conductive paste into a through-hole formed in the ceramic green sheet;
Firing the ceramic green sheet and the conductor paste;
A method for producing a ceramic circuit board, comprising:

本発明によれば、貫通導体は、導体部が焼結されて成る焼結導体部を含み、焼結導体部の一部と絶縁層との界面には、空隙が形成されているので、次のような効果を奏する。貫通導体の表面積が大きくなり、貫通導体と絶縁層との界面における磁界の集中が緩和される。換言すれば、貫通導体の内部に極力電流を流すことが可能となる。したがって貫通導体の低損失化を図り、高周波信号などの伝送ロスを極力小さくすることができる。   According to the present invention, the through conductor includes a sintered conductor portion formed by sintering the conductor portion, and a gap is formed at the interface between a part of the sintered conductor portion and the insulating layer. There are effects like this. The surface area of the through conductor is increased, and the concentration of the magnetic field at the interface between the through conductor and the insulating layer is reduced. In other words, it is possible to flow current as much as possible inside the through conductor. Therefore, it is possible to reduce the loss of the through conductor and to minimize the transmission loss of a high-frequency signal or the like.

また本発明によれば、非導体部の一部が絶縁層の界面に臨んでいるので、貫通導体の表面積が大きくなり、貫通導体と絶縁層との界面における磁界の集中が緩和される。その他請求項1の発明と同様の効果を奏する。   According to the present invention, since a part of the non-conductor portion faces the interface of the insulating layer, the surface area of the through conductor is increased, and the concentration of the magnetic field at the interface between the through conductor and the insulating layer is reduced. Other effects similar to those of the first aspect of the invention are achieved.

また本発明によれば、非導体部の一部は、当該貫通導体の電流の流れる方向に沿って配設されているので、特に線路長が長くなることによる伝送ロスを抑制することができる。したがって導体の高周波信号の伝送損失を一層低く抑えることができる。   In addition, according to the present invention, a part of the non-conductor portion is disposed along the direction in which the current flows through the through conductor. Therefore, it is possible to suppress transmission loss due to particularly a long line length. Therefore, the transmission loss of the high frequency signal of the conductor can be further reduced.

また本発明によれば、焼結導体部および非導体部を、三次元網目構造によって実現することができる。   Moreover, according to this invention, a sintered conductor part and a nonconductor part are realizable by a three-dimensional network structure.

また本発明によれば、非導体部を、貫通導体全体の10体積%以上80体積%以下に規定することで、高周波信号などの伝送ロスを抑制するとともに、直流信号の抵抗もより小さくすることができる。非導体部の体積比率が貫通導体全体の10体積%未満になると、貫通導体の表面積が小さくなり過ぎ、高周波信号の伝送ロスの低減効果が得られない。非導体部の体積比率が貫通導体全体の80体積%を超えると焼結導体部の体積が相対的に小さくなり過ぎ、直流抵抗が増大してしまう。   In addition, according to the present invention, the non-conductor portion is defined to be 10% by volume or more and 80% by volume or less of the entire through conductor, thereby suppressing transmission loss of high-frequency signals and reducing the resistance of DC signals. Can do. When the volume ratio of the non-conductor portion is less than 10% by volume of the entire through conductor, the surface area of the through conductor becomes too small, and the effect of reducing the transmission loss of high-frequency signals cannot be obtained. If the volume ratio of the non-conductor portion exceeds 80% by volume of the entire through conductor, the volume of the sintered conductor portion becomes relatively small and the direct current resistance increases.

また本発明によれば、焼結導体部の平均厚みが、当該貫通導体を流れる高周波信号の表皮深さの6倍以上に規定されるので、次のような効果を奏する。電磁波に対して十分な断面積を確保することができ、かつ電磁波の局所的な集中を避けることができる。   Further, according to the present invention, since the average thickness of the sintered conductor portion is defined to be six times or more the skin depth of the high-frequency signal flowing through the through conductor, the following effects can be obtained. A sufficient cross-sectional area can be ensured with respect to the electromagnetic wave, and local concentration of the electromagnetic wave can be avoided.

また本発明によれば、特に、架橋反応により結合させる樹脂から成る樹脂片を含む導体ペーストを作製することで、樹脂同士の凝集を抑制し、三次元網目構造となる貫通導体を得ることが可能となる。したがって、貫通導体の表面積が大きくなり、貫通導体と絶縁層との界面における磁界の集中が緩和される。それ故、貫通導体の低損失化を図り、高周波信号などの伝送ロスを極力小さくすることができる。   Further, according to the present invention, it is possible to obtain a through conductor having a three-dimensional network structure by suppressing the aggregation of the resins by producing a conductor paste including a resin piece made of a resin to be bonded by a crosslinking reaction. It becomes. Therefore, the surface area of the through conductor is increased, and the concentration of the magnetic field at the interface between the through conductor and the insulating layer is reduced. Therefore, it is possible to reduce the loss of the through conductor and to minimize the transmission loss of a high-frequency signal or the like.

図1は、本発明の実施形態に係るセラミック回路基板1を基板厚み方向の仮想平面で切断して見た断面図である。本実施形態に係るセラミック回路基板1は、高周波信号を使用する多層配線基板、半導体素子収納用パッケージ、モジュール基板および高周波部品などの少なくともいずれか1つに適用される。ただしこれらのもの以外にも本実施形態に係るセラミック回路基板を適用し得る。以下の説明は、セラミック回路基板の製造方法の説明をも含む。   FIG. 1 is a cross-sectional view of a ceramic circuit board 1 according to an embodiment of the present invention, cut along a virtual plane in the board thickness direction. The ceramic circuit board 1 according to the present embodiment is applied to at least one of a multilayer wiring board using a high-frequency signal, a package for housing a semiconductor element, a module board, a high-frequency component, and the like. However, the ceramic circuit board according to the present embodiment can be applied in addition to these. The following description also includes a description of a method for manufacturing a ceramic circuit board.

セラミック回路基板1は、たとえば7層の絶縁層2〜8が基板厚み方向に積層されて構成される。最上層および最下層の絶縁層2、8の表面部2a,8aには、表面導体9がそれぞれ形成されている。前記基板厚み方向に隣接する絶縁層間には、内部導体10が形成されている。これら絶縁層2〜8には、内部導体10と基板厚み方向の内部導体10とを電気的にかつ機械的に接続するため、また表面導体9と内部導体10とを電気的にかつ機械的に接続するための貫通導体11が形成されている。   The ceramic circuit board 1 is configured by, for example, seven insulating layers 2 to 8 stacked in the thickness direction of the board. Surface conductors 9 are formed on the surface portions 2a and 8a of the uppermost and lowermost insulating layers 2 and 8, respectively. An internal conductor 10 is formed between insulating layers adjacent to each other in the substrate thickness direction. These insulating layers 2 to 8 are electrically and mechanically connected to the inner conductor 10 and the inner conductor 10 in the substrate thickness direction, and electrically and mechanically to the surface conductor 9 and the inner conductor 10. A through conductor 11 for connection is formed.

図2は、貫通導体11を表す図であり、図2(a)は貫通導体11の要部拡大図、図2(b)は図2(a)をA−A線で切断して見た断面図である。貫通導体11は、導体部が焼結されて成る焼結導体部12を含み、当該貫通導体11が設けられる絶縁層3と、前記焼結導体部12の一部との界面には、複数の空隙13が形成されている。界面におけるこれら空隙13は周方向適当間隔おきに形成され、各空隙13は、貫通導体11の電流の流れる方向(貫通導体11のいわゆる軸線方向)に沿って形成されている。焼結導体部12の内部にも、複数の空隙13が形成されている。このような複数の空隙13によって、貫通導体11は互いに結合する三次元網目構造になっている。   FIG. 2 is a view showing the through conductor 11, FIG. 2A is an enlarged view of a main part of the through conductor 11, and FIG. 2B is a cross-sectional view taken along line AA in FIG. 2A. It is sectional drawing. The through conductor 11 includes a sintered conductor portion 12 in which the conductor portion is sintered, and a plurality of interfaces are formed at the interface between the insulating layer 3 on which the through conductor 11 is provided and a part of the sintered conductor portion 12. A gap 13 is formed. The gaps 13 at the interface are formed at appropriate intervals in the circumferential direction, and the gaps 13 are formed along the direction in which the current flows through the through conductor 11 (the so-called axial direction of the through conductor 11). A plurality of voids 13 are also formed inside the sintered conductor portion 12. Through the plurality of gaps 13, the through conductors 11 have a three-dimensional network structure coupled to each other.

ところで、従来のセラミック回路基板で十分な導電率が得られなかったのは、貫通導体の断面積が大きいにもかかわらず、貫通導体と絶縁層との界面が粗く、貫通導体内部に孤立したボイドを含んでいたからである。すなわち従来の貫通導体は、絶縁層との熱膨張率差による、焼成工程での界面の剥離を抑制するため、絶縁層との接着強度を強くしなければならない。結果的に、貫通導体と絶縁層との界面にアンカー状の接着部が形成され、界面の粗さが粗くなっていた。   By the way, sufficient conductivity could not be obtained with the conventional ceramic circuit board because the interface between the through conductor and the insulating layer was rough despite the large cross-sectional area of the through conductor, and the isolated void inside the through conductor. It was because it included. That is, the conventional through conductor has to increase the adhesive strength with the insulating layer in order to suppress the peeling of the interface in the firing process due to the difference in thermal expansion coefficient with the insulating layer. As a result, an anchor-like adhesive portion was formed at the interface between the through conductor and the insulating layer, and the roughness of the interface was rough.

また貫通導体および絶縁層の、焼成における収縮挙動差および焼成収縮率差による歪を緩和するため、貫通導体内部に孤立したボイドが生じていた。このように、界面すなわち貫通導体の表面の粗さが大きく、貫通導体内部に孤立したボイドがあると、表皮効果により高周波信号の電流が導体表面付近、あるいは導体と絶縁層との界面付近に集中して流れる際に、線路長が長くなり、またボイドにより表面付近の導体厚みが薄くなり、高周波信号の伝送における損失が大きくなる。   Moreover, in order to relieve the distortion due to the difference in shrinkage behavior and the difference in firing shrinkage rate between the through conductor and the insulating layer, an isolated void was generated inside the through conductor. In this way, if the interface, that is, the surface of the through conductor is rough and there are isolated voids inside the through conductor, high-frequency signal current is concentrated near the conductor surface or near the interface between the conductor and the insulating layer due to the skin effect. As a result, the line length becomes longer and the thickness of the conductor near the surface becomes thinner due to voids, which increases the loss in high-frequency signal transmission.

本実施形態では、絶縁層2〜8と焼結導体部12の一部との界面に空隙13が形成され、該空隙13は貫通導体11の軸線方向(矢符L1で表記する)に沿って形成されている。換言すれば、絶縁層2〜8に形成される貫通孔に設けられる貫通導体11のうち、空隙13以外の部分が焼結導体部12であり、その表面12aが平滑であるため、高周波の伝送における導体損失を低く抑えることができる。前記界面に形成される空隙13は、前記軸線方向に所定小距離延びていればよく、柱状、三次元網目状などどのような構造であってもよい。   In the present embodiment, a gap 13 is formed at the interface between the insulating layers 2 to 8 and a part of the sintered conductor portion 12, and the gap 13 extends along the axial direction of the through conductor 11 (indicated by an arrow L1). Is formed. In other words, among the through conductors 11 provided in the through holes formed in the insulating layers 2 to 8, the portion other than the air gap 13 is the sintered conductor portion 12, and the surface 12 a is smooth. The conductor loss in can be kept low. The gap 13 formed at the interface only needs to extend a predetermined small distance in the axial direction, and may have any structure such as a columnar shape or a three-dimensional mesh shape.

焼結導体部の表面12aが平滑であるには、焼結導体部12の焼結が進行した状態であることが好ましい。このような平滑な表面12aが形成される焼結導体部12を含み、各絶縁層と焼結導体部12の一部との界面に空隙13が形成されているので、従来技術のようなアンカー状の接着部を不要としたうえで、界面の剥離を抑制し得る。換言すれば、焼結導体部12の表面12aを極力平滑化することが可能となるので、焼結導体部12と各絶縁層との界面付近に高周波信号の電流が集中して流れる際に、線路長を極力短くでき、高周波信号の伝送における損失を小さくすることができる。   In order for the surface 12a of the sintered conductor portion to be smooth, the sintered conductor portion 12 is preferably in a state where the sintering has proceeded. Since the air gap 13 is formed at the interface between each insulating layer and a part of the sintered conductor portion 12 including the sintered conductor portion 12 on which such a smooth surface 12a is formed, an anchor as in the prior art It is possible to suppress the peeling of the interface while eliminating the need for an adhesive portion. In other words, since the surface 12a of the sintered conductor portion 12 can be smoothed as much as possible, when a high-frequency signal current flows in the vicinity of the interface between the sintered conductor portion 12 and each insulating layer, The line length can be shortened as much as possible, and the loss in the transmission of high-frequency signals can be reduced.

図2(b)に示すように、前記軸線方向に垂直な方向に隣接する空隙13,13を隔てる焼結導体部12の厚みは、貫通導体11を通る高周波信号の表皮深さの6倍以上であることが好ましい。前記表皮深さδは、周波数f、透磁率μおよび導電率σを用いて次式のように表される。
δ=(π・fμσ)−1/2
As shown in FIG. 2 (b), the thickness of the sintered conductor portion 12 separating the gaps 13 and 13 adjacent to each other in the direction perpendicular to the axial direction is 6 times or more the skin depth of the high-frequency signal passing through the through conductor 11. It is preferable that The skin depth δ is expressed by the following equation using the frequency f, the magnetic permeability μ, and the conductivity σ.
δ = (π · fμσ) −1/2

前記焼結導体部12の厚みを貫通導体11を通る高周波信号の表皮深さδの3倍以上にすることにより、電磁波に対して十分な断面積を確保することができ、かつ、電磁波の局所的な集中を避けることができる。焼結導体部12の厚みが厚い場合でも実質的に電流が流れるのは、導体の表面から3δ以内の部分であり、この部分に電流の95%以上が流れる。そして導体が純銀であれば、3δは、5MHzの場合90μm程度、500MHzの場合9μm程度、2GHzの場合4.5μm程度である。これに対して、表面導体9や内部導体10の寸法は、幅50μm以上1mm以下、厚さ5μm以上30μm以下程度であり、貫通導体11の寸法は、直径50μm以上300μm以下程度である。   By setting the thickness of the sintered conductor portion 12 to three times or more of the skin depth δ of the high-frequency signal passing through the through conductor 11, a sufficient cross-sectional area for the electromagnetic wave can be secured, and the local area of the electromagnetic wave can be secured. Can avoid general concentration. Even when the sintered conductor portion 12 is thick, the current substantially flows in a portion within 3δ from the surface of the conductor, and 95% or more of the current flows in this portion. If the conductor is pure silver, 3δ is about 90 μm at 5 MHz, about 9 μm at 500 MHz, and about 4.5 μm at 2 GHz. On the other hand, the dimensions of the surface conductor 9 and the internal conductor 10 are about 50 μm to 1 mm in width and about 5 μm to 30 μm in thickness, and the dimension of the through conductor 11 is about 50 μm to 300 μm in diameter.

前記貫通導体11における空隙13の体積比率は、10体積%以上80体積%以下であることが好ましい。これにより、高周波信号の損失を抑制するとともに、直流信号の抵抗も小さくできる。空隙13の体積比率が貫通導体全体の10体積%未満になると、貫通導体11の表面積が小さくなり過ぎ、高周波信号の損失の低減効果が得られない。一方、空隙13の体積比率が貫通導体全体の80体積%を超えると、焼結導体部12の貫通導体全体に占める体積が小さくなり過ぎ、直流抵抗が増大してしまう。空隙13中には、空気その他気体が介在するが真空であってもよい。このような空隙13によって、貫通導体11を微細な構造にできるので、好ましい。   The volume ratio of the gap 13 in the through conductor 11 is preferably 10% by volume to 80% by volume. Thereby, the loss of the high-frequency signal can be suppressed and the resistance of the DC signal can be reduced. When the volume ratio of the gap 13 is less than 10% by volume of the entire through conductor, the surface area of the through conductor 11 becomes too small, and the effect of reducing the loss of high frequency signals cannot be obtained. On the other hand, when the volume ratio of the gap 13 exceeds 80% by volume of the entire through conductor, the volume of the sintered conductor portion 12 in the entire through conductor becomes too small, and the direct current resistance increases. Air or other gas is present in the gap 13, but it may be vacuum. Such a gap 13 is preferable because the through conductor 11 can have a fine structure.

本実施形態では貫通導体11に空隙13を形成しているが、焼結導体部12と非導体部13Aとを含む貫通導体にすることも可能である。非導体部13Aを、導体周囲の絶縁層2〜8と同程度の誘電率とすれば、電流が分散して流れるので、従来技術のものより高周波信号の伝送ロスが小さくなる。さらに、導体の近くにグランドとなる導体が形成されている場合には、導体の周囲のグランドに面する部分に電流が集中するため、それと相殺するように非導体部13Aの誘電率を導体周囲の絶縁層2〜8の誘電率より高くしてもよい。   In the present embodiment, the gap 13 is formed in the through conductor 11, but a through conductor including the sintered conductor portion 12 and the nonconductor portion 13 </ b> A may be used. If the non-conductor portion 13A has a dielectric constant comparable to that of the insulating layers 2 to 8 around the conductor, the current flows in a distributed manner, so that the transmission loss of high-frequency signals is smaller than that of the prior art. Furthermore, when a conductor serving as a ground is formed near the conductor, the current concentrates on a portion facing the ground around the conductor, so that the dielectric constant of the non-conductor portion 13A is set so as to cancel out the current. The dielectric constant of the insulating layers 2 to 8 may be higher.

図3〜図5は、本実施形態に係るセラミック回路基板の断面図である。図6は、本発明の実施形態に係るセラミック回路基板1の製造方法を段階的に表すフローチャートである。   3 to 5 are cross-sectional views of the ceramic circuit board according to the present embodiment. FIG. 6 is a flowchart showing stepwise the method for manufacturing the ceramic circuit board 1 according to the embodiment of the present invention.

セラミック回路基板1の製造方法を具体的に説明する。図6に示すように、本実施形態に係るセラミック回路基板1の製造方法は、主に、セラミックグリーンシート作製工程(ステップa1)と、樹脂片添加工程(ステップa2)と、導体ペースト充填工程(ステップa3)と、焼成工程(ステップa4)と、を有する。先ずステップa1において、ガラスおよびセラミックフィラーから成るセラミックグリーンシート(単に「グリーンシート」と称す)を作製する。グリーンシートは、所定のガラスおよびセラミック粉末組成物と、焼成途中で容易に揮発する揮発性有機バインダーと、有機溶媒および必要に応じて可塑剤とを混合し、スラリー化する。このスラリーを用いて、リップコーター法やドクターブレード法などによってテープ成形を行い、所定寸法に切断してグリーンシートを作製する。   A method for manufacturing the ceramic circuit board 1 will be specifically described. As shown in FIG. 6, the manufacturing method of the ceramic circuit board 1 according to the present embodiment mainly includes a ceramic green sheet manufacturing process (step a1), a resin piece adding process (step a2), and a conductor paste filling process ( Step a3) and a firing step (Step a4). First, in step a1, a ceramic green sheet (simply referred to as “green sheet”) made of glass and a ceramic filler is prepared. The green sheet is made into a slurry by mixing a predetermined glass and ceramic powder composition, a volatile organic binder that easily volatilizes during firing, an organic solvent and, if necessary, a plasticizer. Using this slurry, a tape is formed by a lip coater method, a doctor blade method, or the like, and cut into a predetermined size to produce a green sheet.

次に、ステップa2に移行して、貫通導体となる導体ペーストを作製する。導体ペーストとして、金粉末、銀粉末、銅粉末、アルミニウム粉末のいずれかに対して、有機バインダー、有機溶剤、必要に応じて、有機物や無機物の添加剤を加えて、図示外の3本ロールで混練したものを用いる。導体粉末の形状は不問であるが、貫通導体内部に空隙または非導体部を形成するためには、比較的Tap密度が低いものが好適であり、たとえば3g/cm以下のものである。 Next, it transfers to step a2 and the conductor paste used as a penetration conductor is produced. As a conductive paste, add an organic binder, an organic solvent, and, if necessary, an organic or inorganic additive to any one of gold powder, silver powder, copper powder, and aluminum powder. A kneaded product is used. The shape of the conductor powder is not limited, but in order to form voids or non-conductor portions inside the through conductor, those having a relatively low Tap density are suitable, for example, 3 g / cm 3 or less.

貫通導体11に空隙13を形成するため、前記導体ペーストに、たとえばアクリルなどの樹脂から成る樹脂ビーズ(樹脂片に相当)を添加する。樹脂ビーズの形状は球形に限らず、楕円形状やロッド形状であってもよい。樹脂ビーズの添加量、大きさおよび形状を変化させることにより、貫通導体11における空隙13の体積比率を変えることができる。換言すれば、樹脂ビーズの添加量、大きさおよび形状に基づいて、空隙13の体積比率を制御することで、高周波信号の損失を抑制することができるとともに、直流信号の抵抗も極力小さくすることができる。このように高周波信号の損失を容易にかつ確実に抑制することができるとともに、直流信号の抵抗も容易にかつ確実に小さくし得る。   In order to form the gap 13 in the through conductor 11, resin beads (corresponding to a resin piece) made of a resin such as acrylic are added to the conductor paste. The shape of the resin beads is not limited to a spherical shape, and may be an elliptical shape or a rod shape. By changing the addition amount, size, and shape of the resin beads, the volume ratio of the gap 13 in the through conductor 11 can be changed. In other words, by controlling the volume ratio of the air gap 13 based on the addition amount, size, and shape of the resin beads, it is possible to suppress the loss of the high frequency signal and to reduce the resistance of the DC signal as much as possible. Can do. As described above, the loss of the high-frequency signal can be easily and reliably suppressed, and the resistance of the DC signal can be easily and reliably reduced.

樹脂ビーズの例として、アクリル樹脂の主鎖を架橋反応により結合させている架橋タイプのアクリル樹脂で、球形でありその平均粒径が1μm程度のものが好適である。架橋タイプのアクリル樹脂を適用することで、導体ペーストの溶剤で形状が崩れることを防止し、樹脂の分散を良くする。よって、樹脂同士が凝集することに起因して、貫通導体11の空隙13がつながらなくなる等の不具合を未然に解消することができる。樹脂ビーズの粒径は、分散の観点から導体粉末と同等以下であることが好ましく、たとえば1μm以上3μm以下程度が好適である。アクリル樹脂から成る樹脂ビーズの形状、大きさおよび組み合わせの少なくともいずれか一つを変えることにより、三次元網目構造などの空隙を作製することができる。   As an example of the resin beads, a cross-linked acrylic resin in which the main chain of the acrylic resin is bonded by a cross-linking reaction, which is spherical and has an average particle diameter of about 1 μm is preferable. By applying a cross-linked acrylic resin, the shape of the conductor paste is prevented from losing its shape and the resin is dispersed better. Therefore, problems such as the gap 13 of the through conductor 11 being lost due to the aggregation of the resins can be solved in advance. The particle diameter of the resin beads is preferably equal to or less than that of the conductor powder from the viewpoint of dispersion, and for example, about 1 μm to 3 μm is preferable. By changing at least one of the shape, size, and combination of resin beads made of acrylic resin, a void such as a three-dimensional network structure can be produced.

貫通導体11に、非導体部13Aとして誘電体を形成するには、樹脂ビーズの代わりに、後述する焼成工程において軟化流動するガラス片を添加する。   In order to form a dielectric as the non-conductor portion 13A in the through conductor 11, a glass piece that softens and flows in a firing step described later is added instead of the resin beads.

このガラス片の添加量、大きさおよび形状を変化させることにより、貫通導体における非導体部の体積比率を変えることができる。非導体部の体積比率を変えることで、高周波信号の損失を容易にかつ確実に抑制することができるとともに、直流信号の抵抗も極力小さくすることができる。   By changing the addition amount, size, and shape of the glass piece, the volume ratio of the non-conductor portion in the through conductor can be changed. By changing the volume ratio of the non-conductor portion, it is possible to easily and surely suppress the loss of the high-frequency signal and to reduce the resistance of the DC signal as much as possible.

前述の軟化流動する温度は、導体粉末の焼結開始後がよい。これによって、ガラス片が貫通導体11外に不所望に出てしまうことを未然に防止することができる。逆に、導体粉末の焼結開始前では、ガラス片が貫通導体11外に出てしまうおそれがある。本実施形態に係るガラス片は、貫通導体11の焼結導体部表面の粗さを小さくするため、導体との親和性が低いものがよい。たとえば、化学的に導体との濡れの悪いガラスは導体との親和性の悪いガラスである。また、ガラス転移点が導体粉末の焼結開始温度より低いガラスであるとともに、非結晶性のガラスであるか、導体粉末の焼結終了温度よりの結晶化温度の高い結晶性ガラスであるか、あるいは、導体粉末の焼結終了温度までに析出する結晶か70体積%以下である結晶性ガラスも導体と親和性の悪いガラスである。このような導体との親和性が低いガラス片を適用することで、貫通導体11の焼結導体部表面の粗さを小さくすることができ、それ故、高周波の伝送における導体損失を低く抑えることができる。   The softening and flowing temperature is preferably after the start of the sintering of the conductor powder. Thereby, it is possible to prevent the glass piece from undesirably coming out of the through conductor 11. On the contrary, the glass piece may come out of the through conductor 11 before the sintering of the conductor powder is started. The glass piece according to the present embodiment preferably has a low affinity with the conductor in order to reduce the roughness of the surface of the sintered conductor portion of the through conductor 11. For example, chemically wet glass with a conductor is glass with poor affinity for the conductor. In addition, the glass transition point is a glass lower than the sintering start temperature of the conductor powder, and is an amorphous glass or a crystalline glass having a high crystallization temperature from the sintering end temperature of the conductor powder, Or the crystal | crystallization which precipitates by the completion | finish temperature of sintering of conductor powder, or the crystalline glass which is 70 volume% or less is also glass with a bad affinity with a conductor. By applying such a glass piece having a low affinity with the conductor, the roughness of the surface of the sintered conductor portion of the through conductor 11 can be reduced, and therefore the conductor loss in high-frequency transmission can be kept low. Can do.

次に、ステップa3の導体ペースト充填工程に移行する。先ず前記グリーンシートにパンチングやレーザーなどによって貫通孔を形成する。一つの貫通孔の形成段階において、パンチングを複数回実施する、あるいは、レーザーをスキャンさせることにより、貫通孔の平面視形状を円形だけでなく、歯車形状や花びら形状など、貫通孔の外周長さが円形のものより長くなるようにしてもよい。前記「平面視」とは、貫通孔を軸線方向に見ることと同義である。   Next, the process proceeds to the conductor paste filling step of step a3. First, a through hole is formed in the green sheet by punching or laser. In the formation stage of one through hole, the perimeter of the through hole is not only circular but also the shape of the through hole, such as gear shape and petal shape, by punching multiple times or scanning the laser May be longer than a circular one. The “plan view” is synonymous with viewing the through hole in the axial direction.

このように形成した貫通孔内に、前記導体ペーストを充填する。該導体ペーストの充填には、貫通導体形成位置に一致する箇所に穿孔されたメタルマスク、あるいは、エマルジョンメッシュスクリーンマスクを用いて、スクリーン印刷する方法を用いる。このとき、マスクを通してペーストを押し出す方法として、ポリウレタン製などの板状(あるいは剣状)のスキージを用いる方法、ペースト押し出し式のスキージヘッドを用いて、ペーストを貫通孔に加圧注入する方法などを用いる。必要に応じて、グリーンシートの表面より突出した導体ペーストをプレスして、貫通孔に押し込む。さらに、表面導体層や内部導体層を導体ペーストを用いてスクリーン印刷法などによって被着形成する。このようにして得られた各グリーンシートまたは絶縁体ペーストを予め定める積層順序に応じて、基板厚み方向に積層して積層成形体を形成する。その後、ステップa4の焼成工程に移行する。該焼成工程では、積層形成体単独で焼成する他に、加圧などにより、積層成形体を面方向に拘束して焼成してもよい。   The through-hole formed in this way is filled with the conductor paste. For the filling of the conductor paste, a screen printing method using a metal mask or an emulsion mesh screen mask drilled at a position corresponding to the through conductor forming position is used. At this time, as a method of extruding the paste through the mask, a method using a plate-like (or sword-like) squeegee made of polyurethane, a method of pressurizing and injecting the paste into the through-hole using a paste extruding squeegee head, etc. Use. If necessary, the conductor paste protruding from the surface of the green sheet is pressed and pushed into the through hole. Furthermore, the surface conductor layer and the inner conductor layer are deposited by screen printing using a conductor paste. Each green sheet or insulator paste thus obtained is laminated in the substrate thickness direction in accordance with a predetermined lamination order to form a laminated molded body. Thereafter, the process proceeds to the firing step of step a4. In the firing step, in addition to firing the laminated body alone, the laminated molded body may be fired while being constrained in the surface direction by pressure or the like.

以上説明したセラミック回路基板およびその製造方法によれば、焼結導体部12の一部と絶縁層2〜8との界面には、空隙13が形成されているので、次の効果を奏する。貫通導体11の表面積が大きくなり、貫通導体11と絶縁層2〜8との界面における磁界の集中が緩和される。換言すれば、貫通導体11の内部に極力電流を流すことが可能となる。したがって貫通導体11の低損失化を図り、高周波信号などの伝送ロスを極力小さくすることができる。   According to the ceramic circuit board and the manufacturing method thereof described above, since the gap 13 is formed at the interface between a part of the sintered conductor portion 12 and the insulating layers 2 to 8, the following effects can be obtained. The surface area of the through conductor 11 is increased, and the concentration of the magnetic field at the interface between the through conductor 11 and the insulating layers 2 to 8 is alleviated. In other words, a current can flow as much as possible inside the through conductor 11. Accordingly, the loss of the through conductor 11 can be reduced, and the transmission loss of a high frequency signal or the like can be minimized.

貫通導体11に、非導体部13Aとして誘電体を形成した場合には、該非導体部13Aの一部が絶縁層2〜8の界面に臨むので、貫通導体11の表面積が大きくなり、貫通導体11と絶縁層2〜8との界面における磁界の集中が緩和される。その他空隙13の場合と同様の効果を奏する。空隙13または非導体部13Aの一部は、貫通導体11の電流の流れる方向に沿って配設されているので、特に線路長が長くなることによる伝送ロスを抑制することができる。したがって導体の高周波信号の伝送ロスを一層低く抑えることができる。   When a dielectric is formed on the through conductor 11 as the non-conductor portion 13A, a part of the non-conductor portion 13A faces the interface between the insulating layers 2 to 8, so that the surface area of the through conductor 11 increases, and the through conductor 11 And the concentration of the magnetic field at the interface between the insulating layers 2 to 8 is alleviated. Other effects similar to those in the case of the gap 13 are obtained. Since a part of the gap 13 or the non-conductor portion 13A is arranged along the direction in which the current flows through the through conductor 11, it is possible to suppress transmission loss particularly due to an increase in the line length. Therefore, the transmission loss of the high frequency signal of the conductor can be further reduced.

図3は、本実施形態に係るセラミック回路基板31の断面図である。
セラミック回路基板31は、たとえば15層の絶縁層31a〜31oが基板厚み方向に積層されて構成される。最上層および最下層の絶縁層31a、31hの表面部には、表面導体32がそれぞれ形成されている。前記基板厚み方向に隣接する絶縁層間には、内部導体33が形成されている。これら絶縁層31a〜31oには、内部導体33と基板厚み方向の内部導体33とを電気的にかつ機械的に接続するため、また表面導体32と内部導体33とを電気的にかつ機械的に接続するための貫通導体34が形成されている。また、セラミック回路基板31には、キャビティ35が形成されている。
FIG. 3 is a cross-sectional view of the ceramic circuit board 31 according to the present embodiment.
The ceramic circuit board 31 is configured, for example, by laminating 15 insulating layers 31a to 31o in the thickness direction of the board. Surface conductors 32 are formed on the surface portions of the uppermost and lowermost insulating layers 31a and 31h, respectively. An internal conductor 33 is formed between insulating layers adjacent to each other in the substrate thickness direction. The insulating layers 31a to 31o are electrically and mechanically connected to the inner conductor 33 and the inner conductor 33 in the substrate thickness direction, and are electrically and mechanically connected to the surface conductor 32 and the inner conductor 33. A through conductor 34 for connection is formed. In addition, a cavity 35 is formed in the ceramic circuit board 31.

絶縁層31a〜31hは第1の絶縁層であり、絶縁層31i〜31oは第1の絶縁層31a〜31hとは組成の異なる第2の絶縁層である。第1の絶縁層と第2の絶縁層とでは焼成の際に収縮する温度が異なり、第1の絶縁層31a〜31hおよび第2の絶縁層31i〜31oは、いずれか一方の絶縁層の焼成収縮が開始する温度までに他方の絶縁層の焼成収縮がほぼ終了する組成となっている。ここでいう焼成収縮がほぼ終了しているとは、最終焼成体積収縮量の97%以上、特に98%以上、さらには99%以上の収縮が終了しているということである。   The insulating layers 31a to 31h are first insulating layers, and the insulating layers 31i to 31o are second insulating layers having a composition different from that of the first insulating layers 31a to 31h. The first insulating layer and the second insulating layer have different shrinkage temperatures during firing, and any one of the first insulating layers 31a to 31h and the second insulating layers 31i to 31o is fired. The composition is such that the firing shrinkage of the other insulating layer is almost completed by the temperature at which the shrinkage starts. The term “shrinkage shrinkage almost completed” means that the shrinkage of 97% or more, particularly 98% or more, further 99% or more of the final firing volume shrinkage is finished.

上述のように第1の絶縁層31a〜31hが焼成収縮する温度域と第2の絶縁層31i〜31oが焼成収縮する温度域とは異なっている。これにより、第1の絶縁層31a〜31hが収縮するときには、第2の絶縁層31i〜31oが収縮しないため、第1の絶縁層31a〜31hは、X−Y方向(基板の主面と平行な方向)の収縮が抑制されて、主にZ方向(基板の厚み方向)に収縮する。また、第2の絶縁層31i〜31oが収縮するときには、第1の絶縁層31a〜31hは収縮しないため、第2の絶縁層31i〜31oは、X−Y方向の収縮が抑制されて、主にZ方向に収縮する。すなわち、第1の絶縁層31a〜31hと第2の絶縁層31i〜31oとは互いのX−Y方向の収縮を抑制しあうことが可能であり、セラミック回路基板31はX−Y方向の収縮量のばらつきを抑制でき、X−Y方向の収縮量を0に近づけることができる。   As described above, the temperature range in which the first insulating layers 31a to 31h are baked and contracted is different from the temperature range in which the second insulating layers 31i to 31o are baked and contracted. Accordingly, when the first insulating layers 31a to 31h contract, the second insulating layers 31i to 31o do not contract. Therefore, the first insulating layers 31a to 31h are in the XY direction (parallel to the main surface of the substrate). ) In the Z direction (the thickness direction of the substrate). In addition, when the second insulating layers 31i to 31o contract, the first insulating layers 31a to 31h do not contract. Therefore, the second insulating layers 31i to 31o are prevented from contracting in the XY direction. Contracts in the Z direction. That is, the first insulating layers 31a to 31h and the second insulating layers 31i to 31o can suppress the contraction in the XY direction, and the ceramic circuit board 31 contracts in the XY direction. The variation in the amount can be suppressed, and the amount of contraction in the XY direction can be made close to zero.

このようにX−Y方向の収縮を抑制したセラミック回路基板はX−Y方向の寸法精度が向上するものの、貫通導体の収縮はX−Y方向に抑制されにくいため、Z方向の収縮率が絶縁層と合わなくなり、貫通導体がセラミック回路基板の表面から突起したり、陥没したりした。   Although the ceramic circuit board that suppresses the shrinkage in the XY direction as described above improves the dimensional accuracy in the XY direction, the shrinkage of the through conductor is difficult to be restrained in the XY direction. The through conductors protruded from the surface of the ceramic circuit board or were depressed.

本発明の実施形態に係るセラミック回路基板31では、セラミック回路基板31の焼成工程で、貫通導体34が焼結した後であっても、貫通導体34には空隙が形成されているため、主にZ方向に収縮する絶縁層の焼成収縮に追従して貫通導体34が変形しやすく、貫通導体34が突起あるいは陥没することを抑制することができる。突起あるいは陥没をより抑制するには、第1の絶縁層31a〜31hおよび第2の絶縁層31i〜31oの焼結収縮の終了よりも高温では、貫通導体34が焼成収縮しないことが好ましく、焼成収縮する温度が高い方の絶縁層の焼成収縮開始温度よりの貫通導体34の焼成収縮が終了する温度が低い方がより好ましく、焼成収縮する温度が低い方の絶縁層の焼成収縮開始温度よりの貫通導体34の焼成収縮が終了する温度が低い方がさらに好ましい。   In the ceramic circuit board 31 according to the embodiment of the present invention, a gap is formed in the through conductor 34 even after the through conductor 34 is sintered in the firing step of the ceramic circuit board 31. Following the firing shrinkage of the insulating layer shrinking in the Z direction, the penetrating conductor 34 is easily deformed, and the penetrating conductor 34 can be prevented from protruding or sinking. In order to further suppress protrusions or depressions, it is preferable that the through conductors 34 are not baked and shrunk at a temperature higher than the end of sintering shrinkage of the first insulating layers 31a to 31h and the second insulating layers 31i to 31o. It is more preferable that the temperature at which the firing shrinkage of the through conductor 34 is completed is lower than the firing shrinkage start temperature of the insulating layer having the higher shrinkage temperature, and the firing shrinkage start temperature of the insulating layer having the lower firing shrinkage temperature is lower. It is more preferable that the temperature at which the firing shrinkage of the through conductor 34 is completed is lower.

第1の絶縁層31a〜31hおよび第2の絶縁層31i〜31oはいずれも、表面導体32、内部導体33および貫通導体34としてAu、AgおよびCuなどの低融点金属を主成分とする導体を使用するために、1050℃程度以下で焼成可能なガラスセラミックスであることが好ましい。第1の絶縁層がガラスセラミックスであるとは、第1の絶縁層の原料が、第1のガラスおよび第1のセラミックスからなるものであるか、第1のガラスからなるものであるということである。第2の絶縁層がガラスセラミックスであるとは、第2の絶縁層の原料が、第2のガラスおよび第2のセラミックスからなるものであるか、第2のガラスからなるものであるということである。   Each of the first insulating layers 31a to 31h and the second insulating layers 31i to 31o is a surface conductor 32, an inner conductor 33, and a through conductor 34 made of a conductor mainly composed of a low melting point metal such as Au, Ag and Cu. In order to use it, it is preferable that it is a glass ceramic which can be baked at about 1050 degreeC or less. The first insulating layer is made of glass ceramics because the raw material of the first insulating layer is made of the first glass and the first ceramic, or made of the first glass. is there. The second insulating layer is made of glass ceramics because the raw material of the second insulating layer is made of the second glass and the second ceramic, or made of the second glass. is there.

より効果的にX−Y方向の収縮を抑制するには、第1のガラスの軟化温度が、第2のガラスの軟化温度より、特に10℃以上、さらには40℃以上、好適には90℃以上低いことが好ましい。また、焼成収縮する温度の低い方の絶縁層の原料のガラスは、焼成収縮する温度の高い方の絶縁層の原料のガラスの軟化点よりも結晶化温度の低い結晶性ガラスであると、焼成収縮する温度の低い絶縁層のガラスが結晶化して、その絶縁層が強固になってから焼成収縮する温度の高い方の絶縁層が収縮するため、より効果的にX−Y方向の収縮を抑制できる。   In order to suppress shrinkage in the XY direction more effectively, the softening temperature of the first glass is 10 ° C. or more, more preferably 40 ° C. or more, and preferably 90 ° C. than the softening temperature of the second glass. It is preferable that the value is lower. In addition, the material glass of the insulating layer having a lower firing shrinkage temperature is a crystalline glass having a crystallization temperature lower than the softening point of the glass of the insulating layer material having a higher firing shrinkage temperature. Since the glass of the insulating layer having a low shrinkage temperature is crystallized, and the insulating layer having a higher temperature at which the baking shrinks after the insulating layer becomes strong, the shrinkage in the XY direction is more effectively suppressed. it can.

キャビティ35が変形するのを抑制するには、セラミック回路基板31のキャビティ35のある面の最外層に絶縁層31aが焼成収縮する温度の低い絶縁層であることが好ましく、絶縁層31aは、その層に積層されている第2の絶縁層31iよりも厚みが薄いことが好ましい。   In order to suppress the deformation of the cavity 35, it is preferable that the insulating layer 31 a is an insulating layer having a low temperature at which the insulating layer 31 a is baked and shrunk on the outermost layer on the surface of the ceramic circuit board 31, and the insulating layer 31 a It is preferable that the thickness is thinner than the second insulating layer 31i stacked on the layer.

なお、図3には内部導体33と内部導体33との間あるいは表面導体32と内部導体33との間に第1の絶縁層および第2の絶縁層の両方がある例を示したが、第1の絶縁層および第2の絶縁層の構成としてはこれに限らない。例えば、図3の内部導体33と内部導体33との間あるいは表面導体32と内部導体33との間の絶縁層うちの一部の第1の絶縁層および第2の絶縁層のどちらか一方にしてもよく、図1の絶縁層2および8を第1の絶縁層とし、絶縁層3〜7を第2の絶縁層としてもよい。   FIG. 3 shows an example in which both the first insulating layer and the second insulating layer are provided between the inner conductor 33 and the inner conductor 33 or between the surface conductor 32 and the inner conductor 33. The configuration of the first insulating layer and the second insulating layer is not limited to this. For example, a part of the insulating layer between the inner conductor 33 and the inner conductor 33 in FIG. 3 or between the surface conductor 32 and the inner conductor 33 is one of the first insulating layer and the second insulating layer. 1 may be used as the first insulating layer, and the insulating layers 3 to 7 may be used as the second insulating layer.

先ず、組成が24.9質量%のMgO、2.7質量%のAl2、45.0質量%のSiO、0.1質量%のCuO、27.3質量%のCaOからなる平均粒径が2μmのガラス粉末60質量%と、平均粒径が約1μmのAl2粉末40質量%とからなるセラミック材料を準備した。このセラミック材料に、アクリル有機バインダー、可塑剤および有機溶剤を添加してなるスラリーを、ドクターブレード法により薄層化し、基板用のグリーンシートを作製した。 First, an average composition comprising 24.9% by mass of MgO, 2.7% by mass of Al 2 O 3 , 45.0% by mass of SiO 2 , 0.1% by mass of CuO, and 27.3% by mass of CaO. A ceramic material consisting of 60% by mass of glass powder having a particle size of 2 μm and 40% by mass of Al 2 O 3 powder having an average particle size of about 1 μm was prepared. A slurry obtained by adding an acrylic organic binder, a plasticizer, and an organic solvent to this ceramic material was thinned by a doctor blade method to produce a green sheet for a substrate.

次に、銀粉末に、酸化ルテニウム、ロジウムを微量添加し、さらに、銀粉末100質量部に対して直径3μmのアクリルビーズを5質量部および有機ビヒクル15質量部を添加し、これらを攪拌した後、銀粉末および有機バインダーの凝集体がなくなるまで3本ロールミルで混合し、導体ペーストを作製した。ここで、有機ビヒクルとしては、有機バインダーとしてエチルセルロースを5質量部と、有機溶剤としてα−テルピネオールを95質量部とから構成したものを使用した。ここで使用したAg粉末は、比表面積が0.3m/g以下で、熱処理により1次粒子が数個分ネック結合したものであり、Tap密度2g/cm以下である。 Next, a small amount of ruthenium oxide and rhodium are added to the silver powder, and 5 parts by mass of acrylic beads having a diameter of 3 μm and 15 parts by mass of the organic vehicle are added to 100 parts by mass of the silver powder, and these are stirred. Then, the mixture was mixed with a three-roll mill until the aggregates of silver powder and organic binder disappeared to produce a conductor paste. Here, as an organic vehicle, what comprised 5 mass parts of ethyl cellulose as an organic binder, and 95 mass parts of (alpha)-terpineol as an organic solvent was used. The Ag powder used here has a specific surface area of 0.3 m 2 / g or less, a number of primary particles necked by heat treatment, and a Tap density of 2 g / cm 3 or less.

次に、上記のグリーンシートに、貫通導体を充填するための直径200μmの貫通孔をレーザーによって形成し、上記の導体ペーストをこの貫通孔に充填した。次に、貫通孔に導体ペーストを充填したグリーンシートを平板金型でプレスし、導体ペーストの、グリーンシートから突出した部分を、貫通孔内に押し込んだ。   Next, a through hole having a diameter of 200 μm for filling the through conductor was formed in the green sheet by a laser, and the through hole was filled with the conductive paste. Next, the green sheet in which the through hole was filled with the conductive paste was pressed with a flat plate mold, and the portion of the conductive paste protruding from the green sheet was pushed into the through hole.

上記のグリーンシート表面に、λ/4共振器の信号導体となる導体パターンをスクリーン印刷により形成した。λ/4共振器の具体的な構造は、内部導体42および貫通導体43によりλ/4の長さ信号導体が形成され、貫通導体43の一端が接地導体44に接続されている(図4参照)。また同様にして、図5に示すように、別途、λ/2の長さのライン導体52の一端と接地導体53により構成されたλ/2共振器を作製すべく、導体パターンを印刷した。その後、これらのグリーンシートを位置合わせした後、積層し、加圧して積層体を作製し、これを大気中400℃で脱バインダー処理し、さらに、大気中910℃で焼成して配線基板を作製した。上記のようにして、共振器を形成している貫通導体の長さを変えたサンプルを作製した。   A conductor pattern to be a signal conductor of the λ / 4 resonator was formed on the surface of the green sheet by screen printing. In a specific structure of the λ / 4 resonator, a signal conductor having a length of λ / 4 is formed by the internal conductor 42 and the through conductor 43, and one end of the through conductor 43 is connected to the ground conductor 44 (see FIG. 4). ). Similarly, as shown in FIG. 5, a conductor pattern was separately printed to produce a λ / 2 resonator composed of one end of a line conductor 52 having a length of λ / 2 and a ground conductor 53. Then, after aligning these green sheets, they are laminated and pressed to produce a laminate, which is debindered at 400 ° C. in the atmosphere, and further baked at 910 ° C. in the atmosphere to produce a wiring board. did. As described above, samples in which the lengths of the through conductors forming the resonator were changed were produced.

アクリルビーズの添加量を変えることにより、空隙の体積%の異なるサンプルを作製した。また、アクリルビーズの代わりに、組成が18.3質量%のBaOと、37.1質量%のBと、32.6質量%のSiOと、2.5質量%のSnOと、9.5質量%CaOとからなるガラスを添加して、非導体部として誘電体が形成されたサンプルを作製した。 By changing the addition amount of the acrylic beads, samples having different void volume% were prepared. Further, instead of acrylic beads, the composition is 18.3% by mass of BaO, 37.1% by mass of B 2 O 3 , 32.6% by mass of SiO 2 , 2.5% by mass of SnO 2 , , 9.5 mass% CaO glass was added to prepare a sample in which a dielectric was formed as a non-conductor portion.

焼成後の各回路基板の2GHzにおける共振特性を測定し、それらからViaの伝送ロスを計算した。具体的には、λ/4共振器の無負荷Q(Qu)から導電率を計算し、それをライン導体とVia導体の足し合わせの導電率とし、同様にして、λ/2共振器からライン導体単独の導電率を求め、λ/4共振器から求めた導電率と、λ/2共振器から求めた導電率の差分から、貫通導体の損失を算出した。   The resonance characteristics at 2 GHz of each circuit board after firing were measured, and the transmission loss of Via was calculated from them. Specifically, the electrical conductivity is calculated from the unloaded Q (Qu) of the λ / 4 resonator, and is used as the combined conductivity of the line conductor and the Via conductor. Similarly, from the λ / 2 resonator to the line The conductivity of the conductor alone was obtained, and the loss of the through conductor was calculated from the difference between the conductivity obtained from the λ / 4 resonator and the conductivity obtained from the λ / 2 resonator.

図7は、貫通導体11と絶縁層3との界面付近の破断面の走査型電子顕微鏡像である。また、貫通導体をミクロトームで切断し、縦断面における空隙または非導体部の面積%を、500倍の走査型電子顕微鏡像の50μm×50μmの範囲を画像解析装置(ルーゼックス)により測定し、その結果を貫通導体の非導体部の体積%とした。また、上記と同様に、貫通導体をミクロトームで3箇所切断し、縦断面を走査型電子顕微鏡で観察することにより、空隙または非導体部が軸線方向につながっていることを確認した。縦断面からの判断が難しい場合には、二次イオン質量分析装置により、導体焼結部を削り取って確認した。また、貫通導体をミクロトームで10箇所切断し、倍率1000倍の走査型電子顕微鏡像から、横断面における焼結導体部の厚みを測定した。具体的には、1つの切断面において、導体部の最小厚みを定規で測定して写真の倍率から実際の寸法を算出したものを、その断面における焼結導体部の厚みとし、10断面の測定値の平均をその貫通導体の焼結導体部の厚みとした。   FIG. 7 is a scanning electron microscope image of a fractured surface near the interface between the through conductor 11 and the insulating layer 3. In addition, the through conductor was cut with a microtome, and the area% of the void or non-conductor portion in the longitudinal section was measured with an image analysis apparatus (Luzex) in a 50 × 50 μm range of a 500 × scanning electron microscope image. Was the volume% of the non-conductor portion of the through conductor. Further, similarly to the above, the through conductor was cut at three places with a microtome, and the longitudinal section was observed with a scanning electron microscope, thereby confirming that the gap or the non-conductor portion was connected in the axial direction. When it was difficult to judge from the longitudinal cross section, the conductor sintered portion was scraped off and confirmed by a secondary ion mass spectrometer. In addition, the through conductor was cut at 10 locations with a microtome, and the thickness of the sintered conductor portion in the cross section was measured from a scanning electron microscope image at a magnification of 1000 times. Specifically, on one cut surface, the minimum thickness of the conductor part is measured with a ruler, and the actual dimension calculated from the magnification of the photograph is taken as the thickness of the sintered conductor part in the cross section, and measurement of 10 cross sections The average of the values was defined as the thickness of the sintered conductor portion of the through conductor.

また、貫通導体の直流抵抗をmΩメーターで測定し、断面から求めた直径と長さとから体積抵抗率を算出した。各条件の特性評価結果を表1に示す。   Further, the direct current resistance of the through conductor was measured with an mΩ meter, and the volume resistivity was calculated from the diameter and length obtained from the cross section. Table 1 shows the result of characteristic evaluation under each condition.

本発明の試料は、貫通導体と絶縁層の界面につながる空隙または非導体部の体積比率が10体積%以上80体積%以下のとき、従来の貫通導体と比較して、0.1dB/cm以上0.4dB/cm以下、伝送ロスが少なくなることが判った。非導体部が誘電体である試料No.7は、貫通導体に空隙が形成される試料No.4と比較して、伝送ロスが少なくなることが判った。   In the sample of the present invention, when the volume ratio of the gap or non-conductor portion connected to the interface between the through conductor and the insulating layer is 10% by volume or more and 80% by volume or less, 0.1 dB / cm or more as compared with the conventional through conductor It was found that the transmission loss was less than 0.4 dB / cm. Sample No. in which the nonconductor portion is a dielectric. Sample No. 7 in which a gap is formed in the through conductor. Compared to 4, it was found that transmission loss was reduced.

本発明の実施形態に係るセラミック回路基板1を基板厚み方向の仮想平面で切断して見た断面図である。It is sectional drawing which cut | disconnected and saw the ceramic circuit board 1 which concerns on embodiment of this invention with the virtual plane of the board | substrate thickness direction. 貫通導体11を表す図であり、図2(a)は貫通導体11の要部拡大図、図2(b)は図2(a)をA−A線で切断して見た断面図である。FIGS. 2A and 2B are diagrams illustrating the through conductor 11, FIG. 2A is an enlarged view of a main part of the through conductor 11, and FIG. 2B is a cross-sectional view of FIG. 2A taken along line AA. . 本実施形態に係るセラミック回路基板31の断面図である。It is sectional drawing of the ceramic circuit board 31 which concerns on this embodiment. 本実施形態に係るセラミック回路基板の断面図である。It is sectional drawing of the ceramic circuit board which concerns on this embodiment. 本実施形態に係るセラミック回路基板の断面図である。It is sectional drawing of the ceramic circuit board which concerns on this embodiment. 本発明の実施形態に係るセラミック回路基板1の製造方法を段階的に表すフローチャートである。It is a flowchart showing the manufacturing method of the ceramic circuit board 1 which concerns on embodiment of this invention in steps. 貫通導体11と絶縁層3との界面付近の破断面の走査型電子顕微鏡像である。3 is a scanning electron microscope image of a fracture surface near the interface between a through conductor 11 and an insulating layer 3.

符号の説明Explanation of symbols

1 セラミック回路基板
2〜8 絶縁層
9 表面導体
10 内部導体
11 貫通導体
13 空隙
13A 非導体部
41 セラミック回路基板(λ/4共振器)
41a〜f 絶縁層
42 内部導体(λ/4長の信号導体)
42 貫通導体(λ/4長の信号導体)
44 内部導体(接地導体)
51 セラミック回路基板(λ/2共振器)
51a〜f 絶縁層
52 内部導体(λ/2長の信号導体)
53 内部導体(接地導体)
DESCRIPTION OF SYMBOLS 1 Ceramic circuit board 2-8 Insulation layer 9 Surface conductor 10 Inner conductor 11 Through conductor 13 Space | gap 13A Nonconductor part 41 Ceramic circuit board ((lambda) / 4 resonator)
41a-f Insulating layer 42 Inner conductor (λ / 4 length signal conductor)
42 Through conductor (λ / 4 length signal conductor)
44 Internal conductor (grounding conductor)
51 Ceramic circuit board (λ / 2 resonator)
51a-f Insulating layer 52 Inner conductor (λ / 2 length signal conductor)
53 Internal conductor (grounding conductor)

Claims (7)

セラミックスから成る絶縁層と、該絶縁層に配設された貫通導体とを具備するセラミック回路基板であって、
前記貫通導体は、導体部が焼結されて成る焼結導体部を含み、
該焼結導体部の一部と前記絶縁層との界面には、空隙が形成されていることを特徴とするセラミック回路基板。
A ceramic circuit board comprising an insulating layer made of ceramics and a through conductor disposed in the insulating layer,
The through conductor includes a sintered conductor portion formed by sintering a conductor portion,
A ceramic circuit board, wherein a gap is formed at an interface between a part of the sintered conductor portion and the insulating layer.
セラミックスから成る絶縁層と、該絶縁層に配設された貫通導体とを具備するセラミック回路基板であって、
前記貫通導体は、導体部が焼結されて成る焼結導体部と、非導体部とを含み、
該非導体部の一部が前記絶縁層の界面に臨んでいることを特徴とするセラミック回路基板。
A ceramic circuit board comprising an insulating layer made of ceramics and a through conductor disposed in the insulating layer,
The through conductor includes a sintered conductor part formed by sintering a conductor part, and a non-conductor part,
A ceramic circuit board, wherein a part of the non-conductor portion faces the interface of the insulating layer.
前記非導体部の一部は、当該貫通導体の電流の流れる方向に沿って配設されていることを特徴とする請求項2記載のセラミック回路基板。   The ceramic circuit board according to claim 2, wherein a part of the non-conductor portion is disposed along a direction in which a current flows through the through conductor. 前記焼結導体部および前記非導体部は、互いに結合する三次元網目構造によって実現されることを特徴とする請求項2または3記載のセラミック回路基板。   4. The ceramic circuit board according to claim 2, wherein the sintered conductor portion and the non-conductor portion are realized by a three-dimensional network structure coupled to each other. 前記非導体部は、前記貫通導体全体の10体積%以上80体積%以下に規定されることを特徴とする請求項2〜4のいずれか1項に記載のセラミック回路基板。   5. The ceramic circuit board according to claim 2, wherein the non-conductor portion is defined to be 10 volume% or more and 80 volume% or less of the entire through conductor. 前記焼結導体部は、該焼結導体部を基板厚み方向に垂直な仮想平面で切断して見た平均厚みが、当該貫通導体を流れる高周波信号の表皮深さの6倍以上に規定されることを特徴とする請求項1〜5のいずれか1項に記載のセラミック回路基板。   The sintered conductor portion is defined to have an average thickness obtained by cutting the sintered conductor portion along a virtual plane perpendicular to the substrate thickness direction to be not less than 6 times the skin depth of the high-frequency signal flowing through the through conductor. The ceramic circuit board according to claim 1, wherein the ceramic circuit board is provided. セラミックスから成る絶縁層と、該絶縁層に配設された貫通導体とを具備するセラミック回路基板の製造方法であって、
セラミックグリーンシートを作製する工程と、
前記貫通導体の前駆体と、架橋反応により結合させる樹脂から成る樹脂片とを含む導体ペーストを作製する工程と、
前記セラミックグリーンシートに形成される貫通孔に、前記導体ペーストを充填する工程と、
前記セラミックグリーンシートおよび前記導体ペーストを焼成する工程と、
を有することを特徴とするセラミック回路基板の製造方法。
A method of manufacturing a ceramic circuit board comprising an insulating layer made of ceramics and a through conductor disposed in the insulating layer,
Producing a ceramic green sheet;
Producing a conductor paste including a precursor of the through conductor and a resin piece made of a resin to be bonded by a crosslinking reaction;
Filling the conductive paste into a through-hole formed in the ceramic green sheet;
Firing the ceramic green sheet and the conductor paste;
A method for producing a ceramic circuit board, comprising:
JP2006152737A 2006-05-31 2006-05-31 Ceramic circuit substrate and method for manufacturing therefor Pending JP2007324362A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2006152737A JP2007324362A (en) 2006-05-31 2006-05-31 Ceramic circuit substrate and method for manufacturing therefor

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2006152737A JP2007324362A (en) 2006-05-31 2006-05-31 Ceramic circuit substrate and method for manufacturing therefor

Publications (1)

Publication Number Publication Date
JP2007324362A true JP2007324362A (en) 2007-12-13

Family

ID=38856888

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2006152737A Pending JP2007324362A (en) 2006-05-31 2006-05-31 Ceramic circuit substrate and method for manufacturing therefor

Country Status (1)

Country Link
JP (1) JP2007324362A (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2013105901A (en) * 2011-11-14 2013-05-30 Kyocera Corp Multi-piece ceramic board and ceramic substrate
WO2014103896A1 (en) * 2012-12-25 2014-07-03 株式会社ノリタケカンパニーリミテド Electrode forming paste
JP2015207578A (en) * 2014-04-17 2015-11-19 日本特殊陶業株式会社 Multilayer ceramic substrate and method for manufacturing the same

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2013105901A (en) * 2011-11-14 2013-05-30 Kyocera Corp Multi-piece ceramic board and ceramic substrate
WO2014103896A1 (en) * 2012-12-25 2014-07-03 株式会社ノリタケカンパニーリミテド Electrode forming paste
JP2015207578A (en) * 2014-04-17 2015-11-19 日本特殊陶業株式会社 Multilayer ceramic substrate and method for manufacturing the same

Similar Documents

Publication Publication Date Title
JP2001060767A (en) Method for manufacturing ceramic board and unfired ceramic board
JPWO2010110201A1 (en) Dielectric porcelain composition, multilayer dielectric substrate, electronic component, and method for producing dielectric porcelain composition
JP3601679B2 (en) Method for producing composite laminate
JP2005294725A (en) Stacked ceramic electronic component and method for manufacturing the same
US8053682B2 (en) Multilayer ceramic substrate
JP2007324362A (en) Ceramic circuit substrate and method for manufacturing therefor
JP2007123678A (en) Ceramic laminate electronic component and manufacturing method thereof
JP2004104091A (en) Laminated ceramic electronic component and its manufacturing method
JP2006238027A (en) Dielectric filter and its manufacturing method
JP4416346B2 (en) Circuit board manufacturing method
JP2009231414A (en) Multilayer wiring board, and manufacturing method thereof
JP2008186909A (en) Ceramic multilayer plate board
JP2001015878A (en) High-frequency wiring board and its manufacture
CN117316618A (en) Method for manufacturing coil component and coil component
JP2002197922A (en) Conductive paste and method for manufacturing of ceramic circuit board
JP5692469B2 (en) Electronic component and manufacturing method thereof
JP2000235919A (en) Laminated common mode choke coil element
JP2002299924A (en) Laminated stripline resonator
JP2008159940A (en) Multi-layer wiring substrate and manufacturing method therefor
JP4416342B2 (en) Circuit board and manufacturing method thereof
JP2010232257A (en) Multilayer wiring board
JP2006253286A (en) Ceramic circuit board and manufacturing method thereof
JPH1041136A (en) Multilayer common choke coil device
JP5790357B2 (en) Ferrite-plated powder, electronic component using the ferrite-plated powder, and method for manufacturing electronic component
JPH09199328A (en) Multilayer inductive part and its manufacture