JP2007317817A - Method for manufacturing semiconductor device - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a method for manufacturing a semiconductor device which does not apply a thermal damage to a lower layer wiring formed previously, and can remove a water content or etching gas component coupled to a film of a low dielectric constant after etching. <P>SOLUTION: After an organic insulating film 3 and an inorganic insulating film 4 formed on a semiconductor substrate 1 are etched and a wiring groove 5a is formed, a damage component coupled to surfaces of insulating films 3, 4 by the etching is removed by an electron beam EB irradiation and ultraviolet ray UV irradiation. The irradiation of electron beams EB or ultraviolet rays UV is performed while the semiconductor substrate is heated in an inorganic atmosphere. It is performed in an atmosphere to which a restoration gas G is added such as a carbon based gas or silane based gas. <P>COPYRIGHT: (C)2008,JPO&INPIT

Description

  The present invention relates to a method for manufacturing a semiconductor device, and more particularly to a method suitable for a semiconductor device in which a metal wiring is embedded in a groove pattern that is patterned in an insulating film by etching.

  In recent years, with high integration and miniaturization of semiconductor devices, it is particularly necessary to reduce RC delay. For this reason, it is considered that a material having a low specific resistivity is used as the wiring material and a low dielectric constant (low-k) insulating film having a low dielectric constant is used as the insulating film material. As a low dielectric constant insulating film, an insulating film having a relative dielectric constant k <3.0 is being researched. Examples of such a low dielectric constant insulating film include inorganic insulating films mainly composed of silicon such as HSQ (hydrogen-silsesquioxane) and MSQ (methyl-silsesquioxane), and aromatic-containing organic materials such as polyarylene. An organic insulating film made of In addition, for a low dielectric constant insulating film subjected to dual damascene processing, a configuration in which a hybrid structure is formed by combining these inorganic insulating films and organic insulating films is widely used.

  In recent years, the use of a porous film having a low dielectric constant has been studied. The low dielectric constant porous film has pores of about several nanometers in the low dielectric constant film as described above, and the dielectric constant can be reduced to a relative dielectric constant <2.5.

  However, the above-described porous film having a low dielectric constant is fragile because of its low density although the dielectric constant can be kept low. For this reason, it is easy to receive damage in an etching process. Originally, the low dielectric constant porous film has high hygroscopicity, but the low dielectric constant porous film is further damaged by being damaged in the etching process. For this reason, the dielectric constant increases due to moisture absorption during a subsequent process (for example, a cleaning process) or in a state where it is left standing, and this may cause peeling between the barrier metal covering the porous film and causing disconnection. .

  Therefore, in a process using copper wiring, after processing a low dielectric constant film by etching, an etching gas component bonded to the low dielectric constant film at the time of etching and moisture combined in a subsequent cleaning process are removed. The heat treatment is performed. This prevents an increase in dielectric constant due to moisture absorption of the low dielectric constant film, and corrosion and peeling of the barrier metal layer and copper wiring film to be formed next (see Patent Document 1 below).

JP 2005-38967 A

  However, when the copper wiring or the like is previously formed, the above-described heat treatment causes the copper wiring to flow and deteriorates the stress migration resistance. Therefore, the heat treatment is short using a temperature of about 200 ° C. to 300 ° C. Although it is necessary to carry out in time, the etching gas component and moisture bonded to the surface of the low dielectric constant film cannot be sufficiently removed at such temperature and time.

  Therefore, the present invention can remove moisture and etching gas components bonded to the low dielectric constant film after the etching process without causing thermal damage to the previously formed lower layer wiring. An object of the present invention is to provide a method of manufacturing a semiconductor device that can maintain migration resistance and can reliably prevent an increase in dielectric constant of a low dielectric constant film and corrosion and peeling of a barrier metal layer and a copper wiring film to be formed next. And

  In order to achieve such an object, the present invention performs a processing process on an insulating film formed on a substrate, and then causes damage components bonded to the surface layer of the insulating film by the processing process by electron beam irradiation or ultraviolet irradiation. It is characterized by performing a removing step.

  In the manufacturing method of the semiconductor device that performs such a process, the damage component bonded to the surface layer of the insulating film by the processing process is removed by electron beam irradiation or ultraviolet irradiation, so that the damage component caused only by the heat treatment is reduced. Compared with removal, thermal damage to the substrate is prevented.

  As described above, according to the present invention, it is possible to remove moisture and etching gas components bonded to the processed insulating film without causing thermal damage to the previously formed lower layer wiring. Thus, it is possible to obtain a semiconductor device that can maintain the migration resistance in the wiring and reliably prevent the dielectric constant of the insulating film from increasing and the corrosion and peeling of the barrier metal layer and the copper wiring film to be formed next.

  DESCRIPTION OF EMBODIMENTS Hereinafter, embodiments to which the present invention is applied will be described in detail with reference to the drawings.

First, as shown in FIG. 1, after forming a transistor and other semiconductor elements on the surface side of the semiconductor substrate 1, the semiconductor substrate 1 is covered with an etching stopper film 2 through an interlayer insulating film (not shown). The etching stopper film 2 is made of, for example, SiCN (SiN or SiC may be used), and is formed by a CVD method using trimethylsilane (3MS) and NH ₃ as a film forming gas. Thereafter, a contact not shown here is formed on the etching stopper film 2.

Next, a low dielectric constant organic insulating film 3 made of an aromatic-containing organic material such as polyarylene (PAr) is formed on the etching stopper film 2 by a coating method. Next, an inorganic insulating film 4 having a low dielectric constant made of, for example, a SiOC film is formed on the upper portion. At this time, the inorganic insulating film 4 is formed by a CVD method using 3MS and O ₂ as a film forming gas. This inorganic insulating film 4 has a role as a CMP (Chemical Opportunity Polishing) protective layer and a hard mask for the organic insulating film 3 having a low mechanical strength.

Next, a resist pattern (not shown) is formed on the inorganic insulating film 4, and wiring grooves 5 a are formed in the inorganic insulating film 4 and the organic insulating film 3 by dry etching using the resist pattern as a mask. For example, when the inorganic insulating film 4 is etched, dry etching using CF ₄ , C ₅ F ₈ , C ₄ F ₈ , or CHF ₃ as an etching gas is performed. In the case of etching the organic insulating film 3, dry etching using NH ₃ , N ₂ and H ₂ or O ₂ as an etching gas is performed. Then, a wiring groove 5a is formed so as to expose the contact provided on the etching stopper film 2.

  Further, after this etching, ashing for removing the resist pattern is performed as necessary, and chemical treatment for removing residue residue is performed.

  After the above, the process for recovering the damage applied to the surface layers of the etching stopper film 2, the organic insulating film 3, and the inorganic insulating film 13 by the dry etching or chemical processing described above is performed.

Here, for example, as shown in FIG. 2 (1), the surface of the inorganic insulating film 4 made of SiOC is formed immediately after film formation (that is, before performing an etching process) on silicon (Si) with a methyl group (CH ₃ ) terminated in a combined state.

In this state, by performing dry etching and ashing for forming the wiring trench 5a described above, and further chemical treatment, the silicon (Si) constituting the inorganic insulating film 4 is formed on the silicon (Si) as shown in FIG. Then, —NH ₂ which is an etching gas component, —OH in a chemical solution, and further —H, —NH, —CO, —N— and the like are replaced with CH ₃ and —C— to be bonded. These —NH ₂ , —OH and the like cause degassing in the subsequent processes and become damage components that increase the dielectric constant of the insulating film.

  The combination of such damage components is the same in the etching stopper film 2 made of SiCN. Similarly, in the organic insulating film 3, a damage component such as an etching gas component or OH in a chemical solution is bonded to carbon (C).

  Therefore, as shown in FIG. 1, the exposed surface layer of the insulating films 2 to 4 after the dry etching and chemical treatment is a damage layer A in which the above-described damage components are combined.

Therefore, in the present embodiment, as shown in FIG. 3A, the damage components described above are removed and repaired by irradiating the insulating films 2 to 4 with electron beams (EB) or ultraviolet rays (UV). Damage recovery processing is performed. This damage removal treatment is performed in an inert atmosphere such as a vacuum atmosphere, an argon (Ar) atmosphere, a nitrogen (N ₂ ) atmosphere, or a helium (He) atmosphere. The damage removal process and the damage repair process are performed in an atmosphere of a repair gas G obtained by adding a repair gas G to an inert atmosphere.

Here, the repair gas G is a carbon-based gas or a silane-based gas, and specifically, a hydrocarbon-based gas such as methane (CH ₄ ) or ethylene (C ₂ H ₄ ), silane (SiH ₄ ), or trimethylsilane. (3MS), tetramethylsilane (4MS), octamethylcyclotetrasiloxane (OMCTS), tetramethylcyclotetrasiloxane (TMCTS), dimethylphenylsilane (DMPS), diethoxymethylsilane (DEMS), dimethyldimethoxysilane (DMDMOS) Silane-based gas such as In addition to the above, as the repair gas G, the above-described film forming gas used when forming the insulating films 2 to 4 may be used. Therefore, for example, 3MS used as a deposition gas for the etching stopper film 2 made of SiCN or the inorganic insulating film 4 made of SiOC film may be used.

  Further, such damage recovery processing is performed in a state where the substrate is heated, so that further removal of damage components, that is, divergence of damage components with respect to silicon (Si) and carbon (C) constituting the insulating films 2 to 4 is performed. It becomes easy.

For example, an example of processing conditions when performing EB irradiation as damage recovery processing is as follows.
Accelerating voltage: 13.1 keV
Current value: 1100 μA,
Heating temperature: 350 ° C.
Atmospheric gas in chamber: Trimethylsilane (3MS), He as a repair gas
Chamber pressure: 70 Torr,

An example of processing conditions when performing UV irradiation as the damage recovery processing is as follows.
Lamp wavelength: 500 nm or less Heating temperature: 350 ° C.
Atmospheric gas in chamber: Trimethylsilane (3MS), He as a repair gas
Chamber pressure: 5 Torr,

Thus, the silicon constituting dry etching or chemical processing by been example -OH introduced into the insulating film 2-4, -H, -NH, -NH _2, and damage components such as -CO, an insulating film 2-4 ( The bond with Si) or carbon (C) is cut off by EB irradiation or UV irradiation, and these damage components are removed from the surfaces of the insulating films 2 to 4.

  At this time, if an inert gas or a repair gas G is introduced into the processing atmosphere, these gases are decomposed by EB irradiation or UV irradiation to generate ions, and these ion collisions and chemical etching action Further, the damage component is removed by electron collision, and the decomposed gas component is bonded to silicon (Si) and carbon (C) constituting the insulating films 4, 5, and 6.

In particular, if a repair gas G such as a carbon-based gas or a silane-based gas is added to the processing atmosphere, the repair gas component decomposed by the repair gas G is composed of silicon (Si) or the like constituting the insulating films 2 to 4 The insulating films 3, 4 and 5 are repaired by bonding to carbon (C). In the specific example described above, the damage layer is repaired by bonding a methyl group (CH ₃ ) to silicon (Si) or carbon (C) constituting the insulating films 3, 4, and 5.

As a result, the surface of the inorganic insulating film 4 made of, for example, SiOC is restored to a state terminated with a methyl group (CH ₃ ) bonded to silicon (Si) as shown in FIG. The And the damage layer (A) of the surface layer of the insulating films 2-4 as shown in FIG. 1 is removed.

  In the damage recovery process described above, first, a step of removing damage components bonded to the surfaces of the insulating films 2, 3, and 4 by EB irradiation or UV irradiation is performed, and then EB irradiation or UV irradiation is performed in a repair gas atmosphere. By performing, the process which couple | bonds a repair gas component with the surface of the insulating films 2-4 may be performed.

In this case, in the step of removing the damage component, EB irradiation or UV irradiation is performed in an inert atmosphere such as a vacuum atmosphere, an argon (Ar) atmosphere, a helium (He) atmosphere, or a nitrogen (N ₂ ) atmosphere. It is preferable. Moreover, by simultaneously heating, the damage component can be easily removed. Note that the step of removing the damage component and the subsequent step of combining the repair gas component are not limited to being performed in the same apparatus.

  After the above, as shown in FIG. 3B, the barrier metal layer 6 is formed so as to cover the inner wall of the wiring groove 5a. As the barrier metal layer 6, for example, a laminated film of tantalum nitride and tantalum is formed. Subsequently, a conductive layer 17 made of a metal material such as copper is deposited on the inorganic insulating film 4 so as to completely fill the wiring trench 5a.

  Next, as shown in FIG. 3 (3), the conductive layer 7 and the barrier metal layer 6 on the inorganic insulating film 4 are formed by CMP so as to leave the barrier metal layer 6 and the conductive layer 7 only in the wiring trench 5a. Remove. As a result, a first metal wiring M1 is formed in which the conductive layer 7 is buried in the wiring trench 5a with the barrier metal layer 6 interposed therebetween.

  Thereafter, as shown in FIG. 4 (4), on the first metal wiring M1 and the inorganic insulating film 4, an etching stopper film 10 made of SiCN, an inorganic insulating film 11 made of SiOC, and an organic material made of polyaryl ether (PAE). An insulating film 12 and an inorganic insulating film 13 made of SiOC are formed in this order. The films 10 to 13 made of each material are formed in the same manner as the films 2 to 4 made of each material described with reference to FIG.

Next, a first hard mask 14 and a second hard mask 15 are formed on the inorganic insulating film 13. The first hard mask 14 is made of, for example, a silicon nitride (SiN) film, and a connection hole 16b is formed. The second hard mask 15 is made of, for example, a silicon oxide (SiO ₂ ) film, and has a wiring groove 16a.

In forming these hard masks 14 and 15, first, a SiN film for a first hard mask is formed on the inorganic insulating film 13, and then a SiO ₂ film for a second hard mask is formed. Next, a pattern of the wiring groove 16a is formed in the SiO ₂ film by etching using a resist pattern to form a second hard mask (SiO ₂ ) 15. Next, after removing the resist pattern, a resist pattern is formed again, and a pattern of the connection hole 16b is formed in the SiN film by etching using the resist pattern to form the first hard mask (SiN) 14. Although not shown, the resist pattern used for forming the first hard mask (SiN) 14 may remain.

  4 (5), the inorganic insulating film 13 is dry-etched using the first hard mask 14 as an etching mask, and the organic insulating film 12 is further dry-etched. As a result, a connection hole 16 b is formed in the inorganic insulating film 13 and the organic insulating film 12. The resist pattern used when processing the first hard mask 14 is removed by dry etching of the organic insulating film 12.

  Next, as shown in FIG. 4 (6), the first hard mask 14 is dry-etched using the second hard mask 15 as an etching mask to form a pattern of wiring grooves 16 a in the first hard mask 14. At this time, a part of the inorganic insulating film 11 made of SiOC is etched, and the connection hole 16 b is formed to a depth in the middle of the inorganic insulating film 11.

Next, as shown in FIG. 5 (7), the inorganic insulating film 13 is dry-etched from above the second hard mask 15 using the first hard mask 14 as an etching mask, thereby forming a wiring groove 16 a in the inorganic insulating film 13. Form. At this time, the inorganic insulating film 11 is also etched, and a connection hole 16b reaching the etching stopper film 10 is formed. Further, the second hard mask 15 made of SiO ₂ is removed by dry etching at this time.

  Next, as shown in FIG. 5 (8), the etching stopper film 10 on the first metal wiring M <b> 1 is dry-etched to form a connection hole 16 b in the etching stopper film 10. By this etching, the first hard mask 14 made of SiN is removed.

  Next, as shown in FIG. 5 (9), the organic insulating film 12 is etched using the inorganic insulating film 13 as an etching mask, thereby forming a wiring groove 16 a in the organic insulating film 12. Further, after the above dry etching, chemical treatment for removing residue residue is performed.

  The dry etching performed when forming the wiring trench 16a and the connection hole 16b as described above uses the same etching gas as the etching of the inorganic insulating film 4 and the etching of the organic insulating film 3 described with reference to FIG. Done. The subsequent chemical treatment for removing residue residue is also performed using the same chemical solution as described with reference to FIG.

  Then, by these dry etching and chemical treatment, the exposed surface layers of the etching stopper film 10, the inorganic insulating film 11, the organic insulating film 12, and the inorganic insulating film 13 are the same as described with reference to FIGS. The damage layer A is generated due to the combination of the damage components.

  Therefore, as shown in FIG. 6 (10), the damage layer added to the exposed surface layer of the etching stopper film 10, the inorganic insulating film 11, the organic insulating film 12, and the inorganic insulating film 13 by the above-described dry etching or chemical treatment. A process for recovering (A) is performed. The damage recovery process performed here is performed in the same manner as described with reference to FIG. 3A. For example, the damage recovery process is performed by irradiating an electron beam (EB) or ultraviolet light (UV) in the atmosphere of the repair gas G. .

  Next, as shown in FIG. 6 (11), the barrier metal layer 16 is formed on the interlayer insulating film 10 so as to cover the inner walls of the connection holes 16b and the wiring grooves 16a. As the barrier metal layer 16, for example, a laminated film of tantalum nitride and tantalum is formed. Subsequently, a conductive layer 17 made of, for example, copper is formed on the interlayer insulating film 10 so as to fill the connection hole 16b and the wiring groove 16a.

  Next, as shown in FIG. 7 (12), the conductive layer 17 and the barrier metal layer 16 on the inorganic insulating film 13 are left so that the barrier metal layer 16 and the conductive layer 17 are left only in the connection hole 16b and the wiring groove 16a. Is removed by CMP. As a result, the second metal wiring M2 is formed in which the conductive layer 17 is embedded in the wiring groove 16a via the barrier metal layer 16, and the conductive layer 17 is embedded in the connection hole 16b via the barrier metal layer 16. A contact C is formed.

  Next, as shown in FIG. 7 (13), an etching stopper film 18 made of, for example, SiCN is formed on the second metal wiring M 2 and the inorganic insulating film 13.

  In the same manner, the subsequent steps include the formation of an inorganic insulating film or an organic insulating film, the step of forming wiring grooves and connection holes by etching the insulating film, the step of recovering damage due to etching, and the conductive layer. A semiconductor device having a multilayer wiring structure is manufactured through this embedding process.

  According to the manufacturing method of the embodiment described above, the wiring grooves 5a and 16a and the connection holes 16b are formed in the insulating film by dry etching, as described with reference to FIGS. Further, after chemical treatment, damage recovery processing was performed in which damage components bonded to the surface layer of the insulating film were removed by electron beam irradiation or ultraviolet irradiation. As a result, the insulating film can be recovered without causing thermal damage to the underlying layer, as compared with the conventional removal of damage components by only heat treatment.

  Further, by suppressing the thermal damage to the base, it is possible to maintain the migration resistance in the lower layer wiring.

  Moreover, the adhesiveness of the barrier metal layers 6 and 16 and the insulating films 2-4 can be ensured by performing the recovery process of the damage applied to the insulating film. Thereby, peeling of the barrier metal layers 6 and 16 in the step of removing the barrier metal layers 6 and 16 and the conductive layers 7 and 17 by the CMP method can be prevented. Further, by such damage recovery processing, an increase in dielectric constant in the organic insulating film 3 and the inorganic insulating film 4 made of a low dielectric constant material such as PAr or SiOC is prevented. In particular, even when a low dielectric constant porous film that is easily damaged in the etching process is used as an insulating film, an increase in dielectric constant can be prevented, and disconnection due to peeling between the barrier metal layer covering the dielectric film can be prevented. Can be prevented.

  As a result, the migration resistance of the underlying wiring (for example, the first metal wiring M1 in FIG. 6 (10)) can be maintained, the dielectric constant of the insulating film is increased, and the barrier metal layer and copper wiring film to be formed next are corroded. A semiconductor device can be obtained in which peeling is reliably prevented and increases in wiring capacitance and leakage current are suppressed.

  In the above-described embodiment, the procedure for recovering the damage caused to the insulating film by the etching process such as dry etching or chemical processing has been described. However, the damage recovery process described in the embodiment is not limited to the recovery of damage generated in the insulating film by the etching process. For example, the damage applied to the insulating film by the CMP process can be recovered by performing the same damage recovery process as described in FIG. 3A after the CMP process described in FIG. The same effects as in the embodiment can be obtained.

  Furthermore, the above-described means for recovering damage may be performed during the processing such as etching or CMP.

It is sectional process drawing (the 1) explaining the manufacturing method of embodiment. It is sectional process drawing (the 2) explaining the manufacturing method of embodiment. It is sectional process drawing (the 3) explaining the manufacturing method of embodiment. It is sectional process drawing (the 4) explaining the manufacturing method of embodiment. It is sectional process drawing (the 5) explaining the manufacturing method of embodiment. It is sectional process drawing (the 6) explaining the manufacturing method of embodiment. It is sectional process drawing (the 7) explaining the manufacturing method of embodiment.

Explanation of symbols

DESCRIPTION OF SYMBOLS 1 ... Semiconductor substrate, 2, 10 ... Etching stopper film, 3, 12 ... Organic insulating film, 4, 11, 13 ... Inorganic insulating film, 5a ... Wiring groove (groove pattern), 7 ... Conductive layer, 16a ... Wiring groove ( (Groove pattern), 16b ... connection hole (groove pattern), G ... repair gas

Claims (9)

A semiconductor device comprising: performing a processing process on an insulating film formed on a substrate; and removing a damage component bonded to the surface layer of the insulating film by the processing process by electron beam irradiation or ultraviolet irradiation. Manufacturing method. In the manufacturing method of the semiconductor device according to claim 1,
The method of manufacturing a semiconductor device, wherein the electron beam irradiation or the ultraviolet irradiation is performed in an inert atmosphere. In the manufacturing method of the semiconductor device according to claim 1,
The method of manufacturing a semiconductor device, wherein the electron beam irradiation or the ultraviolet irradiation is performed in a state where the substrate is heated. In the manufacturing method of the semiconductor device according to claim 1,
The method of manufacturing a semiconductor device, wherein the electron beam irradiation or ultraviolet irradiation is performed in a repair gas atmosphere such as a carbon-based gas or a silane-based gas. In the manufacturing method of the semiconductor device according to claim 4,
The method of manufacturing a semiconductor device, wherein the repair gas atmosphere is a film forming gas atmosphere used for forming the insulating film. In the method for manufacturing a semiconductor device according to claim 1,
After performing the step of removing damage components by the electron beam irradiation or ultraviolet irradiation,
The insulating film is irradiated with an electron beam or an ultraviolet ray in a repair gas atmosphere such as a carbon-based gas or a silane-based gas, and a gas component obtained by decomposing the repair gas is bonded to the surface layer of the insulating film. A method for manufacturing a semiconductor device. The method of manufacturing a semiconductor device according to claim 6.
The method of manufacturing a semiconductor device, wherein the repair gas atmosphere is a film forming gas atmosphere used for forming the insulating film. In the manufacturing method of the semiconductor device according to claim 1,
A method for manufacturing a semiconductor device, comprising: performing a step of removing the damage component and then embedding a conductive layer in a groove pattern formed by etching the insulating film. In the manufacturing method of the semiconductor device according to claim 1,
Etching or chemical mechanical polishing is performed as the processing. A method for manufacturing a semiconductor device.

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