JP2007312459A - Dc-dc converter - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a DC-DC converter of a circuit constitution which is reduced in the number of inductors for use, in the DC-DC converter for reduction in loss. <P>SOLUTION: The DC-DC converter comprises a transistor Q1, which discharges electromagnetic energy accumulated in an inductor L1 to a secondary power supply voltage V2 from a primary power supply voltage V1; an inductor L2 whose one terminal is connected to a first connecting point X; a transistor Q6 and a transistor Q4 which form a first auxiliary current passage for making a current larger than an input current flow, prior to the conduction of the transistor Q2, and whose one-side terminals are connected to the other terminal of the inductor L2; two diodes connected forward, with a passage which discharges the electromagnetic energy accumulated in the inductor L2 from the inductor L1 to the secondary power supply voltage V2 from the inductor L2; and a capacitor whose one terminal is connected to the first connecting point X, and the other terminal is connected to the connection point of the two diodes. <P>COPYRIGHT: (C)2008,JPO&INPIT

Description

  The present invention relates to a DC-DC converter, and more particularly, to a DC-DC converter designed to reduce loss.

  As shown in FIG. 20, the DC-DC converter 100 disclosed in Non-Patent Document 1 boosts the voltage from the low-voltage power supply V101 and supplies power to the high-voltage power supply V102. This is a step-up / step-down DC-DC converter that can also supply power to V101.

  When power is supplied from the low-voltage power supply V101 to the high-voltage power supply V102, the transistor Q102 is turned on so that a current from the low-voltage power supply V101 flows into the inductor L101, and electromagnetic energy is accumulated in the inductor L101. Thereafter, when the transistor Q102 is turned off, the electromagnetic energy accumulated in the inductor L101 is released as electric power to the high voltage power supply V102 via the diode D101. Prior to turning on transistor Q102, transistor Q104 is turned on to form an auxiliary current path having inductor L104 and transistor Q104 as current paths. Thereby, soft switching of the transistor Q102 is performed.

  On the other hand, when the power is supplied to the low-voltage power supply V101 by stepping down from the high-voltage power supply V102, the transistor Q101 is turned on so that the current from the high-voltage power supply V102 flows into the inductor L101 and electromagnetic energy is accumulated in the inductor L101. The Thereafter, when the transistor Q101 is turned off, the electromagnetic energy accumulated in the inductor L101 is discharged as power to the low voltage power source V101 via the diode D102. Prior to turning on transistor Q101, transistor Q103 is turned on to form an auxiliary current path having inductor L103 and transistor Q103 as current paths. Thereby, soft switching of the transistor Q101 is performed.

In addition, there exists a DC-DC converter currently disclosed by patent document 1 and patent document 2 as another related technique.
IEICE technical report EE2002-41 Japanese Patent Laid-Open No. 7-241701 JP-A-7-244102

  However, in the DC-DC converter 100 of Non-Patent Document 1, two auxiliary inductors such as an inductor L103 and an inductor L104 are required in addition to the inductor L101 which is a main inductor. For this reason, the area of the inductor itself and the area of devices such as cooling fins and cooling fans that dissipate the heat generated by the inductor occupy a large part of the DC-DC converter, which is a problem when miniaturizing the DC-DC converter. It becomes.

  The present invention has been made in view of the above-described problems of the background art, and an object of the present invention is to provide a DC-DC converter having a circuit configuration in which the number of inductors to be used is reduced in a DC-DC converter designed to reduce loss. And

  The solution includes a first switching element that is connected to the other terminal of the first inductor that has one terminal connected to the output terminal of the low-voltage power supply, and that conducts when storing electromagnetic energy in the first inductor by an input current. A non-insulated DC-DC converter, wherein one terminal is connected to a first connection point between the first inductor and the first switching element, and one of the output terminal of the low-voltage power supply and the output terminal of the high-voltage power supply. A second switching element that discharges the electromagnetic energy accumulated in the first inductor to the other of the output terminal of the low-voltage power supply and the output terminal of the high-voltage power supply, and one terminal connected to the first connection point. Prior to conduction between the two inductors and the first switching element, the applied current between the current path terminals of the first switching element is minimized. Forming a first auxiliary current path through which a larger current flows, a third switching element having one terminal connected to the other terminal of the second inductor, and forming the first auxiliary current path together with the third switching element A fourth switching element connected to the other terminal of the third switching element; and electromagnetic energy accumulated in the second inductor from one of the first inductor and the high-voltage power source, and the third switching element Via the first inductor and the two diodes connected to the other of the high-voltage power supplies in the forward direction, one terminal connected to the first connection point, and the other terminal connected to the two diodes. And a capacitor connected to the connection point.

  In the DC-DC converter of the present invention, electromagnetic energy is accumulated in the first inductor from one of the low-voltage power supply terminal and the high-voltage power supply terminal by the input current caused by the conduction of the first switching element, and the accumulated electromagnetic energy is stored in the low-voltage power supply terminal. And discharged to the other of the high-voltage power terminals. At this time, prior to the conduction of the first and second switching elements, the second and first switching elements are turned off so that there is no period in which the first switching element and the second switching element are both conducted.

  When the first switching element is non-conductive, the voltage connected to the first connection point is gradually changed by the capacitor connected to the first connection point. Therefore, the first switching element has a small voltage difference between the current path terminals. It is made non-conductive in the state.

  In the conduction of the first switching element, a current larger than the input current flows through the first auxiliary current path through the first connection point due to the conduction of the third and fourth switching elements before the conduction. The first switching element is conducted with a small voltage difference between the current path terminals. A part of the magnetic energy stored in the second inductor from one of the first inductor and the high-voltage power supply via the first auxiliary current path is transferred to the other of the first inductor and the high-voltage power supply via two diodes. Returned.

  In the conduction (non-conduction) of the second switching element, the voltage change at the first connection point becomes gentle due to the capacitor connected to the first connection point. It can be made conductive (non-conductive) with a small difference.

  In the present invention, a DC-DC converter with reduced switching loss can be configured with one second inductor.

  Further, one terminal of the first switching element and the fourth switching element is connected to a reference terminal, and a voltage boosted with respect to the voltage of the low voltage power supply terminal is supplied to the high voltage power supply terminal. The DC-DC converter according to claim 1 may be used.

  In the DC-DC converter of the present invention, when one terminal of the first switching element and the fourth switching element is connected to the reference terminal, a voltage boosted with respect to the voltage of the low voltage power supply terminal is supplied to the high voltage power supply terminal. Is done. Thereby, a boost converter with reduced switching loss can be configured.

  One terminal of the first switching element and the fourth switching element is connected to the high-voltage power supply terminal, and a voltage that is stepped down with respect to the voltage of the high-voltage power supply terminal is supplied to the low-voltage power supply terminal. The DC-DC converter according to claim 1 is preferable.

  In the DC-DC converter according to the present invention, if one terminal of the first switching element and the fourth switching element is connected to the high voltage power supply terminal, the low voltage power supply terminal has a voltage stepped down with respect to the voltage of the high voltage power supply terminal. Supplied. Thereby, a step-down converter with reduced switching loss can be configured.

  And a main inductor having one terminal connected to the primary power supply terminal, and an upper switching element and a lower switching element connected in series between the secondary power supply terminal and the reference terminal. A DC-DC converter in which the other terminal of the main inductor is connected to the first connection point of the element, and one terminal is connected by conduction between the auxiliary inductor connected to the first connection point and the upper switching element. When accumulating electromagnetic energy in the main inductor, the applied voltage between the current path terminals of the upper switching element is reduced prior to conduction of the upper switching element, so that a current larger than the current flowing through the main inductor is obtained. Forming a first auxiliary current path through which one terminal is connected to the other terminal of the auxiliary inductor A second auxiliary switching element that forms a first auxiliary current path together with the first auxiliary switching element and is connected to the other terminal of the first auxiliary switching element; and from the reference terminal, the first auxiliary switching element and the The first diode and the second diode are connected with the path toward the connection point of the second auxiliary switching element as the forward direction, one terminal is connected to the first connection point, and the other terminal is the first diode and the second diode. When electromagnetic energy is stored in the main inductor by conduction between the first capacitor connected to the diode and the lower switching element, prior to conduction of the lower switching element, between current path terminals of the lower switching element In order to minimize the applied voltage, the second current that flows larger than the current that flows through the main inductor A third auxiliary switching element that forms an auxiliary current path and one terminal is connected to the other terminal of the auxiliary inductor; and the second auxiliary current path is formed together with the third auxiliary switching element, and the third auxiliary switching element. A fourth auxiliary switching element connected to the other terminal, and a third diode connected in a forward direction from the connection point of the third auxiliary switching element and the fourth auxiliary switching element to the secondary power supply terminal And a fourth diode, and a second capacitor having one terminal connected to the first connection point and the other terminal connected to a connection point of the third diode and the fourth diode. -It may be a DC converter.

  In the DC-DC converter according to the present invention, when the input current flows from the secondary power supply terminal to the main inductor due to the conduction of the upper switching element and the magnetic energy is accumulated, the accumulated magnetic energy is accompanied by the conduction of the lower switching element. To the primary power terminal. At this time, prior to the conduction of the upper and lower switching elements, the lower and upper switching elements are turned off so that there is no period in which the upper switching element and the lower switching element are both conducted.

  When the upper switching element is non-conducting, the first capacitor connected to the first connection point gradually changes the voltage at the first connection point, so that the upper switching element has a small potential difference between the current path terminals. Is made non-conductive.

  In the conduction of the upper switching element, a current larger than the input current flows through the first auxiliary current path through the first connection point due to the conduction of the first and second auxiliary switching elements before the conduction. The upper switching element is conducted with a small voltage difference between the current path terminals. At this time, a part of the magnetic energy stored in the auxiliary inductor by the current flowing through the first auxiliary current path is returned to the main inductor through the path through the first diode and the second diode.

  When the lower switching element is non-conductive, the voltage at the first connection point is gradually changed by the second capacitor connected to the first connection point, so that the lower switching element has a small potential difference between the current path terminals. Is made non-conductive.

  In the conduction of the lower switching element, prior to the conduction, a current larger than the input current flows through the second auxiliary current path through the first connection point due to the conduction of the third and fourth auxiliary switching elements. The lower switching element is conducted with a small voltage difference between the current path terminals. At this time, a part of the magnetic energy accumulated in the auxiliary inductor by the current flowing through the second auxiliary current path is released to the secondary power supply terminal through the path through the third diode and the fourth diode.

  As a result, the step-up / step-down DC-DC converter with reduced switching loss can be configured with one auxiliary inductor.

  According to the present invention, it is possible to provide a DC-DC converter having a circuit configuration in which the number of inductors to be used is reduced in a DC-DC converter designed to reduce loss.

  Hereinafter, a DC-DC converter 1 according to an embodiment of the present invention will be described in detail with reference to FIGS.

  FIG. 1 is a circuit diagram of the DC converter 1 of the present embodiment. It has a circuit configuration in which an auxiliary circuit unit 10 which is an invention part is added to a buck-boost converter.

  The buck-boost converter has a function of boosting the primary power supply voltage V1 and supplying it to the secondary power supply, and stepping down the secondary power supply voltage V2 and supplying it to the primary power supply. The buck-boost converter shown in FIG. 1 is a so-called non-insulated DC-DC converter in which a reference terminal G is commonly connected between a primary power supply voltage V1 and a secondary power supply voltage V2. Hereinafter, the low voltage side terminal of the primary power supply voltage V1 is referred to as a primary power supply terminal T1, and the high voltage side terminal of the secondary power supply voltage V2 is referred to as a secondary power supply terminal T2.

  In the transistors Q1 and Q2, the emitter terminal of the transistor Q1 and the collector terminal of the transistor Q2 are connected at the first connection point X, the collector terminal of the transistor Q1 is the secondary power supply terminal T2, and the emitter terminal of the transistor Q2 is the reference. It is connected to the terminal G, and is connected in series between the secondary power supply terminal T2 and the reference terminal G. The base terminals of the transistors Q1 and Q2 are exclusively controlled by a controller (not shown).

  Further, anti-parallel diodes DQ1, DQ2 are connected to the transistors Q1, Q2 in the forward direction from the emitter terminal to the collector terminal. An inductor L1 is connected between the first connection point X and the primary power supply terminal T1. Capacitors C11 and C12 are connected between the primary power supply terminal T1 and the secondary power supply terminal T2 and the reference terminal G in parallel with the primary power supply voltage V1 and the secondary power supply voltage V2.

  When operating as a boost converter that boosts the primary power supply voltage V1 to the secondary power supply voltage V2, the electromagnetic energy accumulated in the inductor L1 due to the conduction of the transistor Q2 is transferred to the secondary power supply voltage via the transistor Q1 and the antiparallel diode DQ1. This is done by supplying to V2. When operating as a step-down converter that steps down the secondary power supply voltage V2 to the primary power supply voltage V1, the electromagnetic energy accumulated in the inductor L1 due to the conduction of the transistor Q1 is transferred to the primary power supply via the transistor Q2 and the antiparallel diode DQ2. This is done by supplying the voltage V1.

  Here, the capacitors C11 and C12 are smoothing capacitors. Transistors such as IGBT, MOS, and bipolar can be used for the transistors Q1 and Q2. In this case, the antiparallel diodes DQ1 and DQ2 can be separately connected to a diode element in addition to the case where they are built in the transistors Q1 and Q2.

  The auxiliary circuit unit 10 includes an inductor L2 having one terminal connected to the first connection point X, and transistors Q3, Q5, Q6, and Q4 connected in series between the secondary power supply terminal T2 and the reference terminal G. ing. The other terminal of inductor L2 is connected to the connection point of transistor Q5 and transistor Q6. Note that reverse-connected diodes DQ3, DQ5, DQ6, and DQ4 are connected to both ends of each of the transistors Q3, Q5, Q6, and Q4.

  In addition, the auxiliary circuit unit 10 includes diodes D5 and D3 connected in the forward direction between the reference terminal G and the connection point of the transistors Q3 and Q5, and between the transistors Q6 and Q4 and the secondary power supply terminal T2. And diodes D4 and D6 connected in the forward direction. Further, a capacitor C3 is connected between the connection point of the diode D5 and the diode D3 and the first connection point X, and a capacitor C4 is connected between the connection point of the diode D4 and the diode D6 and the first connection point X. Has been. A capacitor C1 is connected between the first connection point X and the secondary power supply terminal T2, and a capacitor C2 is connected between the first connection point X and the reference terminal G.

  In the auxiliary circuit unit 10, a second auxiliary current path is formed through the inductor L2, the transistor Q6, and the transistor Q4, and a first auxiliary current path is formed through the transistor Q3, the transistor Q5, and the inductor L2.

Next, the step-up / step-down operation of the DC converter 1 will be described with reference to FIGS.
First, the step-up operation of the DC converter 1 will be described with reference to FIGS. FIG. 2 shows a timing chart, and FIGS. 3 to 10 show circuit operation states in each operation. In the following description, the timing chart (FIG. 2) of the boosting operation will be described with reference to the operation state on the circuit (FIGS. 3 to 10) as appropriate.

  In FIG. 2, gate voltages VGQ1 to VGQ6 are voltages applied to the base terminals of the transistors Q1 to Q6. Further, the inductor currents IL1 and IL2 are currents flowing through the inductors L1 and L2 having a positive direction from the primary power supply voltage V1 to the first connection point X and from the first connection point X to the connection point of the transistors Q5 and Q6, The first connection point voltage VX indicates the voltage at the first connection point X. VQ4 represents the voltage of the transistor Q4, and the diode current ID6 represents the current flowing through the diode D6.

  In FIG. 2, (1), (2) and FIGS. 3 and 4 are the electromagnetic energy emission periods from the inductor L1. In the period (1) in FIG. 2, the gate voltage VGQ1 applied to the gate terminal of the transistor Q1 is at a high level, and the transistor Q1 is conductive. The transistor Q1 that is turned on, together with the antiparallel diode DQ1, flows an inductor current IL1 from the inductor L1 toward the secondary power supply terminal T2. As a result, the electromagnetic energy stored in the inductor L1 is released to the secondary power supply terminal T2, and the boosted secondary power supply voltage V2 is supplied.

  At this time, the first connection point X is substantially equal to the secondary power supply voltage V2, and the voltage difference between the secondary power supply voltage V2 and the primary power supply voltage V1 between the terminals of the inductor L1 is the primary power supply from the first connection point X. An inductor current IL1 having a predetermined negative time gradient flows through the inductor L1 when applied in a direction toward the voltage V1 (this direction is a negative direction). Note that when the gate voltage VGQ1 transitions to a high level and the transistor Q1 transitions to a conducting state, the capacitor C1 is in a discharged state, so that the switching of the transistor Q1 to the conducting state is little between the collector and the emitter. It is performed in a state where the voltage of is applied. Thereby, so-called zero volt switching is performed, and the switching loss to the conduction state of the transistor Q1 can be reduced. After that, when the transistor Q1 transitions to the non-conducting state, the potential at the first connection point X is substantially equal to the secondary power supply voltage V2, so that switching in this case is also performed between the collector and the emitter. This is done in a state where a slight voltage is applied. That is, zero volt switching is performed.

  2 (2) and FIG. 4, after the transistor Q1 is turned off, the high-level gate voltages VGQ4 and VGQ6 are applied to the gate terminals of the transistors Q4 and Q6. As a result, a second auxiliary current path is formed from the first connection point X to the reference terminal G via the inductor L2, the transistor Q6, and the transistor Q4, and the inductor current IL2 begins to flow through the inductor L2. At the moment when the transistors Q4 and Q6 transition to conduction, the inductor current IL2 hardly flows. Thus, the transistors Q4 and Q6 are switched in a state where almost no current flows between the collector and the emitter, so-called zero current switching is performed.

  In FIG. 2, (3) to (7) and FIGS. 5 to 9 are accumulation periods of electromagnetic energy in the inductor L1. In FIG. 2 (3) and FIG. 5, when the inductor current IL2 exceeds the inductor current IL1, the capacitor C1 is charged and the capacitor C2 is discharged. As a result, the potential of the first connection point voltage VX changes from the secondary power supply voltage V2 to the voltage of the reference terminal G.

  The timing for turning on the transistor Q2 is shown in FIG. 2 (4) and FIG. When the charging of the capacitor C1 and the discharging of the capacitor C2 are completed, the inductor current IL2 starts to decrease. In the period when the inductor current IL2 is larger than IL1, the inductor current IL2 is replenished via the antiparallel diode DQ2, but a current path of the inductor current IL1 after the inductor current IL2 falls below the inductor current IL1 is secured. There is a need to. Therefore, the conduction timing of the transistor Q2 is set in a period in which the inductor current IL2 is larger than the inductor current IL1. At this time, switching is performed in a state where a slight voltage (forward voltage of the antiparallel diode DQ2) is applied between the collector and the emitter of the transistor Q2. That is, zero volt switching is performed. When transistor Q2 conducts, a current path is formed through inductor L1 and transistor Q2, and inductor current IL1 increases with a positive current slope.

  In FIG. 2 (5) and FIG. 7, after the transistor Q2 transitions to conduction, the low level gate voltage VGQ4 is applied to the gate terminal of the transistor Q4. As a result, transistor Q4 is switched to a non-conductive state. Thereby, inductor current IL2 starts charging capacitor C4, and collector voltage VQ4 of transistor Q4 starts to rise.

In (6) and FIG. 8 in FIG. 2, the capacitor C4 is charged by the inductor current IL2, the collector voltage VQ4 of the transistor Q4 increases, and the current of the inductor current IL2 decreases. Further, when the collector voltage VQ4 exceeds the secondary power supply voltage V2, the diode D6 becomes conductive, and a part of the magnetic energy stored in the inductor L2 is returned to the secondary power supply voltage V2.
In FIG. 2 (7) and FIG. 9, when all the magnetic energy accumulated in the inductor L2 is released, the inductor current IL2 becomes 0 and the diode D6 becomes non-conductive.

2 (8) and FIG. 10, after the inductor current IL2 becomes 0, the low level gate voltage VGQ2 and the gate voltage VGQ6 are applied to the base terminals of the transistors Q2 and Q6. Thereby, transistor Q2 and transistor Q6 are switched to non-conduction. The magnetic energy stored in the inductor L1 is released toward the capacitor C1, the capacitor C2, and the capacitor C4. That is, when the inductor current IL1 flows, the capacitor C2 is charged, and the capacitor C1 and the capacitor C4 are discharged. By charging / discharging the capacitors C1, C2, and C4, switching of the transistor Q2 to non-conduction is performed in a state where almost no voltage is applied to the transistor Q2. In addition, since the transistor Q6 is switched to the non-conduction state when the inductor current IL2 is 0, the switching of the transistor Q6 is zero current switching.
With the release of the magnetic energy, the voltage of the first connection point voltage VX increases from the voltage of the reference terminal G toward the secondary power supply voltage V2.

  Thereafter, returning to (1) in FIG. 2 and FIG. 3, the above operation is repeated to perform the boosting operation.

  Next, the step-down operation of the DC converter 1 will be described with reference to FIGS. FIG. 11 shows a timing chart, and FIGS. 12 to 19 show circuit operation states in each operation. In the following description, the timing chart (FIG. 11) of the step-down operation will be described with reference to the circuit-like operation states (FIGS. 12 to 19) as appropriate.

  In FIG. 11, gate voltages VGQ1 to VGQ6 are voltages applied to the base terminals of the transistors Q1 to Q6. Further, the inductor currents IL1 and IL2 are currents flowing through the inductors L1 and L2 having a positive direction from the primary power supply voltage V1 to the first connection point X and from the first connection point X to the connection point of the transistors Q5 and Q6, The first connection point voltage VX indicates the voltage at the first connection point X. VQ3 represents the voltage of the transistor Q3, and the diode current ID5 represents the current flowing through the diode D5.

  In FIG. 11, (11), (12), and FIGS. 12 and 13 are the electromagnetic energy emission periods from the inductor L1. In the period (11) in FIG. 11, the gate voltage VGQ2 applied to the gate terminal of the transistor Q2 is at a high level, and the transistor Q2 is conductive. The transistor Q2 that is turned on, together with the anti-parallel diode DQ2, flows an inductor current IL1 from the inductor L1 toward the primary power supply terminal T1. As a result, the electromagnetic energy stored in the inductor L1 is released to T1, and the lowered primary power supply voltage V1 is supplied.

  At this time, the first connection point X becomes a voltage (substantially 0 V) substantially equal to the voltage of the reference terminal G, and the primary power supply voltage V1 is moved from the first connection point X to the primary power supply voltage V1 between the terminals of the inductor L1. The inductor current IL1 having a predetermined positive time gradient flows through the inductor L1. Note that the gate voltage VGQ2 transits to a high level, and the transistor Q2 is switched to the conductive state while a slight voltage is applied between the collector and the emitter. Thereby, zero volt switching is performed and the switching loss to the conduction state of the transistor Q2 can be reduced. After that, when the transistor Q2 transitions to the non-conducting state, the potential at the first connection point X is substantially 0 V. Therefore, in this case, a slight voltage is applied between the collector and the emitter. It is made in the state. That is, zero volt switching is performed.

  In FIG. 11 (12) and FIG. 13, after the transistor Q2 is turned off, high-level gate voltages VGQ3 and VGQ5 are applied to the gate terminals of the transistors Q3 and Q5. As a result, a first auxiliary current path is formed from the first connection point X to the secondary power supply terminal T2 via the inductor L2, the transistor Q5, and the transistor Q3, and the inductor current IL2 begins to flow through the inductor L2. At the moment when the transistors Q3 and Q5 transition to conduction, the inductor current IL2 hardly flows. As a result, the transistors Q3 and Q5 are switched in a state where almost no current flows between the collector and the emitter, and zero current switching is performed.

  In FIG. 11, (13) to (17) and FIGS. 14 to 18 are accumulation periods of electromagnetic energy in the inductor L1. In FIG. 11 (13) and FIG. 14, when the inductor current IL2 falls below the inductor current IL1, the capacitor C1 is discharged and the capacitor C2 is charged. As a result, the potential of the first connection point voltage VX changes from the voltage of the reference terminal G in the direction of the secondary power supply voltage V2.

  Timings for turning on the transistor Q1 are shown in FIG. 11 (14) and FIG. When the discharging of the capacitor C1 and the charging of the capacitor C2 are completed, the absolute value of the inductor current IL2 starts to decrease. While the inductor current IL2 is smaller than IL1, the inductor current IL2 is supplied through the antiparallel diode DQ1, but a current path for the inductor current IL1 after the inductor current IL2 exceeds the inductor current IL1 is secured. There is a need to. Therefore, the conduction timing of the transistor Q1 is set in a period in which the inductor current IL2 is smaller than the inductor current IL1. At this time, switching is performed in a state where a small voltage (forward bias voltage of the antiparallel diode DQ1) is applied between the collector and the emitter of the transistor Q1. That is, zero volt switching is performed. When transistor Q1 conducts, a current path is formed via inductor L1 and transistor Q1, and inductor current IL1 has a negative current slope and its absolute value increases.

  In FIG. 11 (15) and FIG. 16, after the transistor Q1 transitions to conduction, the low-level gate voltage VGQ3 is applied to the gate terminal of the transistor Q3. Thereby, the transistor Q3 is switched to a non-conducting state. As a result, the inductor current IL2 starts to charge the capacitor C3, and the collector voltage VQ3 of the transistor Q3 starts to drop.

In FIG. 11 (16) and FIG. 17, the capacitor C3 is charged by the inductor current IL2, the collector voltage VQ3 of the transistor Q3 decreases, and the current of the inductor current IL2 decreases. On the other hand, when the collector voltage VQ3 falls below the voltage at the reference terminal G, the diode D5 becomes conductive, and a part of the magnetic energy stored in the inductor L2 is returned to the inductor L1.
In (17) and FIG. 18 in FIG. 11, when all the magnetic energy stored in the inductor L2 is released, the inductor current IL2 becomes 0 and the diode D5 becomes non-conductive.

In FIG. 11 (18) and FIG. 19, after the inductor current IL2 becomes 0, the low-level gate voltage VGQ1 and the gate voltage VGQ5 are applied to the base terminals of the transistors Q1 and Q5. Thereby, transistor Q1 and transistor Q5 are switched to non-conduction. The magnetic energy stored in the inductor L1 is released toward the capacitor C1, the capacitor C2, and the capacitor C3. That is, when the inductor current IL1 flows, the capacitor C1 is charged, and the capacitor C2 and the capacitor C3 are discharged. Due to charging / discharging of the capacitors C1, C2, and C3, switching of the transistor Q1 to non-conduction is performed in a state where almost no voltage is applied to the transistor Q1, so that zero volt switching is performed. Further, since the transistor Q5 is switched to the non-conduction state when the inductor current IL2 is 0, the switching of the transistor Q5 is zero current switching.
With the release of the magnetic energy, the voltage of the first connection point voltage VX decreases from the secondary power supply voltage V2 toward the voltage of the reference terminal G.

  Thereafter, returning to (11) and FIG. 12 in FIG. 11, the above-described operation is repeated to perform the step-down operation.

  As described above, in the DC converter 1 according to this embodiment, a single inductor L2 that is an auxiliary inductor can reduce the loss, and a converter that performs a step-up operation and a step-down operation can be configured. Thereby, compared with the DC-DC converter 100 of Non-Patent Document 1 including two auxiliary inductors, the area of the auxiliary inductor itself and the area of devices such as cooling fins and cooling fans that dissipate heat generated by the auxiliary inductor are reduced. Therefore, it is possible to easily reduce the size of the DC-DC converter.

Note that the present invention is not limited to the above-described embodiment, and it goes without saying that various improvements and modifications can be made without departing from the spirit of the present invention.
For example, in the present embodiment, the case where the present invention is used for a buck-boost converter has been described, but the present invention is not limited to this, and can be similarly applied to a boost converter and a step-down converter.
In the present embodiment, the case where the capacitors C1 and C2 are connected in parallel between the current path terminals of the transistors Q1 and Q2 has been described as an example. However, the first connection point X determined by charging and discharging of the capacitor is described. When the capacitance values of the capacitors C3 and C4 can be secured so that the voltage change of the transistors Q1 and Q2 changes so slowly that the zero-volt switching of the transistors Q1 and Q2 is possible, the configuration may be such that the capacitors C1 and C2 are omitted. In this case, it is preferable to provide capacitors C1 and C2 in terms of ease of adjustment of charge / discharge time for zero volt switching of transistors Q1 and Q2.

  The primary power supply terminal T1 is an example of a low voltage power supply terminal, the secondary power supply terminal T2 is an example of a high voltage power supply terminal, the inductor L1 is an example of a first inductor, the inductor L2 is an example of a second inductor, and the transistor Q1 or Q2 is a first An example of a switching element, transistor Q2 or Q1 is an example of a second switching element, transistor Q5 or Q6 is an example of a third switching element, transistor Q3 or Q4 is an example of a fourth switching element, diodes D5 and D3, or The diodes D4 and D6 are examples of two diodes, and the capacitor C3 or C4 is an example of a capacitor. The inductor L1 is an example of a main inductor, the inductor L2 is an example of an auxiliary inductor, the transistor Q1 is an example of an upper switching element, and the transistor Q2 is an example of a lower switching element. The transistor Q5 is an example of a first auxiliary switching element, the transistor Q3 is an example of a second auxiliary switching element, the diode D5 is an example of a first diode, the diode D3 is an example of a second diode, and the capacitor C3 is an example of a first capacitor. It is. The transistor Q6 is an example of a third auxiliary switching element, the transistor Q4 is an example of a fourth auxiliary switching element, the diode D4 is an example of a third diode, the diode D6 is an example of a fourth diode, and the capacitor C4 is an example of a second capacitor. It is.

It is a circuit diagram which shows the structure of the DC-DC converter concerning embodiment. It is a timing chart which shows the pressure | voltage rise operation of the DC-DC converter concerning embodiment. It is a figure which shows the state of the circuit in the accumulation | storage period of the electromagnetic energy to the inductor L1 in pressure | voltage rise operation | movement. It is a figure which shows the state of the circuit immediately after conducting transistor Q4, Q6 in step-up operation. It is a figure which shows the state of the circuit in which charging / discharging of the capacitor is performed by conduction | electrical_connection of transistor Q4, Q6 in boosting operation. It is a figure which shows the state of the circuit which turned on transistor Q1 in pressure | voltage rise operation | movement. In the step-up operation, the circuit state immediately after the transistor Q4 is turned off is shown. It is a figure which shows the state of the circuit which the diode D6 has conduct | electrically_connected in pressure | voltage rise operation | movement. It is a figure which shows the state of a circuit when inductor current IL2 becomes 0 in voltage | pressure | voltage rise operation. FIG. 10 is a diagram showing a state of a circuit immediately after transistors Q2 and Q6 are made non-conductive in a boost operation. 5 is a timing chart illustrating a step-down operation of the DC-DC converter according to the embodiment. It is a figure which shows the state of the circuit in the accumulation | storage period of the electromagnetic energy to the inductor L1 in pressure | voltage fall operation | movement. It is a figure which shows the state of the circuit immediately after conducting transistor Q3, Q5 in step-down operation. FIG. 6 is a diagram showing a state of a circuit in which a capacitor is charged and discharged by conduction of transistors Q3 and Q5 in a step-down operation. It is a figure which shows the state of the circuit which made transistor Q2 conduct | electrically_connected in pressure | voltage fall operation. FIG. 10 is a diagram illustrating a state of a circuit immediately after a transistor Q3 is turned off in a step-down operation. It is a figure which shows the state of the circuit which the diode D5 has conduct | electrically_connected in pressure | voltage fall operation | movement. It is a figure which shows the state of a circuit when the inductor current IL2 becomes 0 in the step-down operation. It is a figure which shows the state of the circuit immediately after making transistor Q1, Q5 non-conducting in step-down operation. It is a circuit diagram of the DC-DC converter of a prior art.

Explanation of symbols

DESCRIPTION OF SYMBOLS 1 DC-DC converter 10 Auxiliary circuit part C1-C4, C11, C12 Capacitor D3-D6 Diode G Reference terminal L1 Inductor L2 Inductor Q1-Q6 Transistor T1 Primary power supply terminal T2 Secondary power supply terminal V1 Primary power supply voltage V2 Secondary power supply voltage X First connection point

Claims (4)

Non-insulated DC having a first switching element connected to the other terminal of the first inductor connected at one terminal to the output terminal of the low-voltage power supply and conducting when storing electromagnetic energy in the first inductor by the input current A DC converter,
One terminal is connected to a first connection point between the first inductor and the first switching element, and electromagnetic energy accumulated in the first inductor is output from one of the output terminal of the low-voltage power supply and the output terminal of the high-voltage power supply. A second switching element that discharges to the other of the output terminal of the low-voltage power supply and the output terminal of the high-voltage power supply;
A second inductor having one terminal connected to the first connection point;
Prior to the conduction of the first switching element, a first auxiliary current path for flowing a current larger than the input current is formed in order to reduce the applied voltage between the current path terminals of the first switching element. A third switching element having a terminal connected to the other terminal of the second inductor;
A fourth switching element that forms the first auxiliary current path together with the third switching element and is connected to the other terminal of the third switching element;
A path through which electromagnetic energy accumulated in the second inductor from one of the first inductor and the high-voltage power supply is discharged to the other of the first inductor and the high-voltage power supply via the third switching element is sequentially transferred. Two diodes connected as direction,
A capacitor having one terminal connected to the first connection point and the other terminal connected to a connection point of the two diodes;
A DC-DC converter comprising:   One terminal of the first switching element and the fourth switching element is connected to a reference terminal, and a voltage boosted with respect to a voltage of the low-voltage power supply terminal is supplied to the high-voltage power supply terminal. The DC-DC converter according to claim 1.   One terminal of the first switching element and the fourth switching element is connected to the high-voltage power supply terminal, and the low-voltage power supply terminal is supplied with a voltage that is stepped down with respect to the voltage of the high-voltage power supply terminal. The DC-DC converter according to claim 1, wherein A main inductor having one terminal connected to the primary power supply terminal; and an upper switching element and a lower switching element connected in series between the secondary power supply terminal and the reference terminal; A DC-DC converter in which the other terminal of the main inductor is connected to a first connection point,
An auxiliary inductor having one terminal connected to the first connection point;
When electromagnetic energy is accumulated in the main inductor due to conduction of the upper switching element, it flows to the main inductor in order to minimize the applied voltage between the current path terminals of the upper switching element prior to conduction of the upper switching element. A first auxiliary switching element that forms a first auxiliary current path through which a current larger than a current flows and whose one terminal is connected to the other terminal of the auxiliary inductor;
A second auxiliary switching element that forms a first auxiliary current path together with the first auxiliary switching element and is connected to the other terminal of the first auxiliary switching element;
A first diode and a second diode connected from the reference terminal as a forward direction toward a connection point of the first auxiliary switching element and the second auxiliary switching element;
A first capacitor having one terminal connected to the first connection point and the other terminal connected to a connection point of the first diode and the second diode;
When electromagnetic energy is stored in the main inductor due to conduction of the lower switching element, it flows to the main inductor in order to minimize the applied voltage between the current path terminals of the lower switching element prior to conduction of the lower switching element. Forming a second auxiliary current path through which a current larger than the current flows, and having one terminal connected to the other terminal of the auxiliary inductor;
A fourth auxiliary switching element that forms the second auxiliary current path together with the third auxiliary switching element and is connected to the other terminal of the third auxiliary switching element;
A third diode and a fourth diode connected from a connection point of the third auxiliary switching element and the fourth auxiliary switching element as a forward direction to a path toward the secondary power supply terminal;
A second capacitor having one terminal connected to the first connection point and the other terminal connected to a connection point of the third diode and the fourth diode;
A DC-DC converter comprising:

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