JP2007311375A - MANUFACTURING METHOD OF p-TYPE GROUP III-V COMPOUND SEMICONDUCTOR AND MANUFACTURING METHOD OF LIGHT-EMITTING ELEMENT - Google Patents

MANUFACTURING METHOD OF p-TYPE GROUP III-V COMPOUND SEMICONDUCTOR AND MANUFACTURING METHOD OF LIGHT-EMITTING ELEMENT Download PDF

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JP2007311375A
JP2007311375A JP2006135991A JP2006135991A JP2007311375A JP 2007311375 A JP2007311375 A JP 2007311375A JP 2006135991 A JP2006135991 A JP 2006135991A JP 2006135991 A JP2006135991 A JP 2006135991A JP 2007311375 A JP2007311375 A JP 2007311375A
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compound semiconductor
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Hisayuki Miki
久幸 三木
Masaharu Oshima
正治 尾嶋
Hiroshi Fujioka
洋 藤岡
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University of Tokyo NUC
Resonac Holdings Corp
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Showa Denko KK
University of Tokyo NUC
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<P>PROBLEM TO BE SOLVED: To provide a manufacturing method of a p-type group III-V compound semiconductor containing Al which can allow to exhibit high p-type conductivity in a method using a catalytic layer on a semiconductor layer, can be manufactured at a low cost and can also realize good ohmic contact with an electrode. <P>SOLUTION: The manufacturing method of the p-type group III-V compound semiconductor includes a first step of forming a p-type group III-V compound semiconductor layer doped with p-type impurities; a second step of forming the catalytic layer on the p-type group III-V compound semiconductor layer; and a third step of applying thermal processing to the p-type group III-V compound semiconductor layer in a state where the catalytic layer is attached. In this method, the p-type group III-V compound semiconductor layer contains Al and the catalytic layer contains at least one kind of Ni, Ag and Cu. <P>COPYRIGHT: (C)2008,JPO&INPIT

Description

この発明は、p型III−V族化合物半導体の作製方法及びIII−V族化合物半導体発光素子の作製方法に関するものである。   The present invention relates to a method for producing a p-type group III-V compound semiconductor and a method for producing a group III-V compound semiconductor light emitting device.

窒化ガリウム系化合物半導体においては、長い間、p型の導電性を示す半導体を形成することが困難であった。その理由は半導体の結晶成長において、水素が半導体の結晶中に取り込まれ、ドープされたp型不純物と結合し、p型の導電性を示さなくなるからである。
これに対し、Mgをドープした窒化ガリウムに低速度電子線を照射する方法(特許文献1参照)や、同じくMgをドープした窒化ガリウムを水素を含まない雰囲気中で熱処理する方法(特許文献2参照)等によって、水素によってパッシベーションされていた半導体中のp型不純物を、脱水素させて活性化させ、それによってp型の導電性を示す半導体を得ることが可能であることが判った。
In gallium nitride-based compound semiconductors, it has been difficult to form a semiconductor exhibiting p-type conductivity for a long time. The reason is that in semiconductor crystal growth, hydrogen is incorporated into the semiconductor crystal and combined with the doped p-type impurity, and does not exhibit p-type conductivity.
On the other hand, a method of irradiating Mg doped gallium nitride with a low-velocity electron beam (see Patent Document 1) and a method of heat-treating Mg-doped gallium nitride in an atmosphere containing no hydrogen (see Patent Document 2) ) And the like, it has been found that a p-type impurity in a semiconductor passivated by hydrogen can be dehydrogenated and activated, thereby obtaining a semiconductor exhibiting p-type conductivity.

しかし、上記の電子線照射を用いる方法は、ウエハの全面を均一に処理することが困難であること、それが可能であったとしても処理を行うのに時間がかかることや装置が大がかりになって高価であることなどの問題がある。そのため、p型窒化ガリウム系化合物半導体の形成のためには、広い面積の試料を均一に処理することができる熱処理による方法の方が、工業的には適しているとされているが、特許文献2に開示されている熱処理による方法では、高いキャリア濃度を確保するために、熱処理を700〜900℃程度の高い温度で行う必要がある。このような高温で熱処理を行うと、発光層を形成する結晶が劣化しやすく、例えばInを含む3元混晶の窒化ガリウム系化合物半導体であるInxGa1-xN(0<x≦1)は、スピノーダル分解を引き起こして結晶が劣化しやすくなり、十分な発光強度を有する可視光の発光素子が得られなくなるという問題があった。 However, the above-described method using electron beam irradiation makes it difficult to uniformly treat the entire surface of the wafer, and even if it is possible, it takes time to perform the treatment and the apparatus becomes large. There are problems such as being expensive. Therefore, for the formation of a p-type gallium nitride compound semiconductor, a method using heat treatment that can uniformly treat a sample of a large area is considered industrially suitable. In the method by heat treatment disclosed in No. 2, heat treatment needs to be performed at a high temperature of about 700 to 900 ° C. in order to ensure a high carrier concentration. When heat treatment is performed at such a high temperature, the crystal forming the light emitting layer is likely to be deteriorated. For example, In x Ga 1-x N (0 <x ≦ 1), which is a ternary mixed crystal gallium nitride compound semiconductor containing In. ) Causes spinodal decomposition and the crystal is liable to deteriorate, and there is a problem that a visible light emitting element having sufficient light emission intensity cannot be obtained.

そこで、熱処理の低温化の方法として、特許文献3のp型窒化ガリウム系化合物半導体の電極を形成する方法において、アクセプタ不純物添加層上にPtを形成した後、少なくとも酸素を含む雰囲気において400℃以上の温度で熱処理する技術や、特許文献4のp形窒化ガリウム系化合物半導体を作製する方法において、アクセプタ不純物を添加した窒化ガリウム系化合物半導体の表面にCoを蒸着して酸素雰囲気中で熱処理を行い、熱処理後に酸化したCo膜を除去することにより熱処理を行う技術、また、特許文献5や特許文献6に開示されている、酸素を含まない雰囲気ガス中で、しかも低い温度で熱処理を行うことでp型の導電性を得る手法が開示されているが、いずれも問題点を抱えている(特許文献7の従来技術参照)。   Therefore, as a method of lowering the temperature of the heat treatment, in the method of forming an electrode of a p-type gallium nitride compound semiconductor disclosed in Patent Document 3, after forming Pt on the acceptor impurity addition layer, at least 400 ° C. in an atmosphere containing oxygen. In the technique of heat-treating at a temperature of 5 and the method of manufacturing a p-type gallium nitride-based compound semiconductor disclosed in Patent Document 4, Co is vapor-deposited on the surface of the gallium nitride-based compound semiconductor to which an acceptor impurity is added and the heat treatment is performed in an oxygen atmosphere. A technique for performing a heat treatment by removing the oxidized Co film after the heat treatment, or by performing a heat treatment in an atmosphere gas containing no oxygen disclosed in Patent Document 5 and Patent Document 6 at a low temperature. Although methods for obtaining p-type conductivity have been disclosed, all have problems (see the prior art in Patent Document 7).

これらの課題を解決する方法として、特許文献7にp型窒化ガリウム系化合物半導体層上に「触媒層」と呼ぶ層を形成して熱処理を行う技術が開示されている。
特開平2−257679号公報 特開平5−183189号公報 特開平11−186605号公報 特開平11−145518号公報 特開平11−177134号公報 特開平11−354458号公報 特開2002−26389号公報
As a method for solving these problems, Patent Document 7 discloses a technique of forming a layer called a “catalyst layer” on a p-type gallium nitride compound semiconductor layer and performing a heat treatment.
JP-A-2-257679 JP-A-5-183189 JP 11-186605 A Japanese Patent Laid-Open No. 11-145518 Japanese Patent Laid-Open No. 11-177134 Japanese Patent Laid-Open No. 11-354458 JP 2002-26389 A

上記の特許文献7の発明は本出願人によるもので、p型の半導体層の作成において、該半導体層上に金属等の触媒層を形成し、その後熱処理することを特徴としている。ところがその後の研究により、p型窒化ガリウム系化合物等の半導体層がAlを組成として含む場合に、触媒層の種類により有効なキャリア濃度の差が大きいことが判明した。特に、0.5質量%以上、好ましくは5質量%以上のAlを含む場合に、この傾向が強かった。   The invention of the above-mentioned Patent Document 7 is based on the applicant of the present application, and is characterized in that, in forming a p-type semiconductor layer, a catalyst layer made of metal or the like is formed on the semiconductor layer and then heat-treated. However, subsequent studies have revealed that when the semiconductor layer of a p-type gallium nitride compound or the like contains Al as a composition, the difference in effective carrier concentration depends on the type of catalyst layer. In particular, this tendency was strong when 0.5% by mass or more, preferably 5% by mass or more of Al was contained.

Alを含むp型窒化ガリウム系化合物半導体のコンタクト層は、発光の透過率を向上することができるために発光層内で発生した発光を外部へ取り出す効率において有利と考えられる。しかし、Alが組成として混入することでバンドギャップの増大が生じ、接触抵抗を高くしてしまうことが判っている。   Since the contact layer of p-type gallium nitride compound semiconductor containing Al can improve the transmittance of light emission, it is considered advantageous in the efficiency of taking out the light emitted in the light emitting layer to the outside. However, it has been found that when Al is mixed in as a composition, the band gap is increased and the contact resistance is increased.

この発明は上記に鑑み提案されたもので、Alを含むp型のIII−V属化合物半導体であって、該半導体層上に触媒層に用いる方法において、高いp型の導電性を発揮させることができ、さらに低コストで作製でき、電極との良好なオーミック接触をも実現することができるp型III−V属化合物半導体の作製方法を提供することを目的とする。   The present invention has been proposed in view of the above, and is a p-type III-V compound semiconductor containing Al, which exhibits high p-type conductivity in a method used for a catalyst layer on the semiconductor layer. It is an object of the present invention to provide a method for producing a p-type group III-V compound semiconductor that can be produced at low cost and can achieve good ohmic contact with an electrode.

上記目的を達成するために研究した結果、Alを含むp型のIII−V属化合物半導体の作製において、該半導体層上に触媒層を形成して熱処理する場合に触媒層として特定の金属を用いると導電性を高める上で顕著な効果があることを見出した。本発明はこの研究成果に基づくもので以下の発明からなる。
(1)p型不純物を添加したp型III−V族化合物半導体層を作製する第1の工程と、上記p型III−V族化合物半導体層上に触媒層を作製する第2の工程と、上記触媒層を付けた状態でのp型III−V族化合物半導体層を熱処理する第3の工程とを含むp型III−V族化合物半導体の作製方法において、前記p型III−V族化合物半導体層がAlを含んでおり、かつ、触媒層がNi、AgまたはCuのうちの少なくとも1種類を含んでいることを特徴とするp型III−V族化合物半導体の作製方法。
(2)p型III−V族化合物半導体が、窒化ガリウム系化合物半導体である上記(1)に記載のp型III−V族化合物半導体の作製方法。
As a result of research to achieve the above object, when a p-type III-V compound semiconductor containing Al is produced, a specific metal is used as the catalyst layer when a catalyst layer is formed on the semiconductor layer and heat-treated. And found that there is a remarkable effect in increasing the conductivity. The present invention is based on this research result and comprises the following inventions.
(1) a first step of producing a p-type III-V compound semiconductor layer to which a p-type impurity is added, a second step of producing a catalyst layer on the p-type III-V compound semiconductor layer, And a third step of heat-treating the p-type III-V compound semiconductor layer with the catalyst layer attached thereto. In the method for producing a p-type III-V compound semiconductor, the p-type III-V compound semiconductor A method for producing a p-type group III-V compound semiconductor, wherein the layer contains Al and the catalyst layer contains at least one of Ni, Ag, and Cu.
(2) The method for producing a p-type III-V compound semiconductor according to (1), wherein the p-type III-V compound semiconductor is a gallium nitride compound semiconductor.

(3)上記p型III−V族化合物半導体が含むAlの量が、0.5原子%以上であることを特徴とする、上記(1)または(2)に記載のp型III−V族化合物半導体の作製方法。
(4)p型III−V族化合物半導体が含むAlの量が、5〜50原子%である上記(1)〜(3)のいずれかに記載のp型III−V族化合物半導体の作製方法。
(5)触媒層が、CuまたはAgのうちの一種類以上を含む、上記(1)〜(4)の何れかに記載のp型III−V族化合物半導体の作製方法。
(6)上記第3の工程における熱処理温度が、200℃以上である上記(1)〜(5)の何れかに記載のp型III−V族化合物半導体の作製方法。
(7)上記第3の工程の後に、触媒層を剥離する第4の工程を含む、上記(1)〜(6)の何れかに記載のp型III−V族化合物半導体の作製方法。
(3) The p-type III-V group according to (1) or (2) above, wherein the amount of Al contained in the p-type III-V compound semiconductor is 0.5 atomic% or more. A method for manufacturing a compound semiconductor.
(4) The method for producing a p-type group III-V compound semiconductor according to any one of the above (1) to (3), wherein the amount of Al contained in the p-type group III-V compound semiconductor is 5 to 50 atomic% .
(5) The method for producing a p-type group III-V compound semiconductor according to any one of (1) to (4), wherein the catalyst layer contains one or more of Cu and Ag.
(6) The method for producing a p-type III-V compound semiconductor according to any one of (1) to (5), wherein the heat treatment temperature in the third step is 200 ° C. or higher.
(7) The manufacturing method of the p-type III-V compound semiconductor in any one of said (1)-(6) including the 4th process of peeling a catalyst layer after the said 3rd process.

(8)上記触媒層の膜厚は、1nm〜100nmの範囲である上記(1)〜(7)の何れかに記載のp型III−V族化合物半導体の作製方法。
(9)上記触媒層がNi、AgあるいはCuを含有する割合が50〜100原子%の範囲である、上記(1)〜(8)の何れかに記載のp型III−V族化合物半導体の作製方法。
(10)上記p型III−V族化合物半導体層の膜厚は、1nm〜5μmの範囲である、上記(1)〜(9)の何れかに記載のp型III−V族化合物半導体の作製方法。
(11)III−V族化合物半導体層からなるn型層、発光層及びp型層を備えた発光素子の作成方法において、前記p型層を、Alを含むIII−V族化合物半導体層とし、該p型層上にNi、AgまたはCuのうちの少なくとも1種類を含む触媒層を形成し、次いで熱処理することにより作製することを特徴とする発光素子の作製方法。
(12)p型III−V族化合物半導体が、窒化ガリウム系化合物半導体である上記(11)に記載の発光素子の作製方法。
(8) The method for producing a p-type group III-V compound semiconductor according to any one of (1) to (7), wherein the thickness of the catalyst layer is in the range of 1 nm to 100 nm.
(9) The p-type group III-V compound semiconductor according to any one of (1) to (8), wherein the catalyst layer contains Ni, Ag or Cu in a range of 50 to 100 atomic%. Manufacturing method.
(10) The p-type III-V group compound semiconductor layer has a thickness in the range of 1 nm to 5 μm, and the p-type III-V group compound semiconductor according to any one of (1) to (9) is manufactured. Method.
(11) In the method for producing a light-emitting element including an n-type layer composed of a III-V group compound semiconductor layer, a light-emitting layer, and a p-type layer, the p-type layer is a group III-V compound semiconductor layer containing Al, A method for manufacturing a light-emitting element, comprising forming a catalyst layer containing at least one of Ni, Ag, or Cu on the p-type layer, and then performing heat treatment.
(12) The method for manufacturing a light-emitting element according to (11), wherein the p-type III-V compound semiconductor is a gallium nitride compound semiconductor.

(13)上記p型III−V族化合物半導体が含むAlの量が、0.5原子%以上であることを特徴とする、上記(11)または12に記載の発光素子の作製方法。
(14)p型III−V族化合物半導体が含むAlの量が、5〜50原子%である上記(11)〜(13)のいずれかに記載の発光素子の作製方法。
(15)触媒層が、CuまたはAgのうちの一種類以上を含む、上記(11)〜(14)の何れかに記載の発光素子の作製方法。
(16)熱処理温度が、200℃以上である上記(11)〜(15)の何れかに記載の発光素子の作製方法。
(13) The method for manufacturing a light-emitting element according to (11) or 12, wherein the amount of Al contained in the p-type III-V compound semiconductor is 0.5 atomic% or more.
(14) The method for manufacturing a light-emitting element according to any one of (11) to (13), wherein the amount of Al contained in the p-type III-V compound semiconductor is 5 to 50 atomic%.
(15) The method for manufacturing a light-emitting element according to any one of (11) to (14), wherein the catalyst layer includes one or more of Cu and Ag.
(16) The method for manufacturing a light-emitting element according to any one of (11) to (15), wherein the heat treatment temperature is 200 ° C. or higher.

(17)上記熱処理後に、触媒層を剥離する工程を含む、上記(11)〜(16)の何れかに記載の発光素子の作製方法。
(18)上記触媒層の膜厚が、1nm〜100nmの範囲である、上記(11)〜(17)の何れかに記載の発光素子の作製方法。
(19)上記触媒層がNi、AgあるいはCuを含有する割合が50〜100原子%の範囲である、上記(11)〜(18)の何れかに記載の発光素子の作製方法。
(20) 上記p型III−V族化合物半導体層の膜厚が、1nm〜5μmの範囲である、上記(11)〜(19)の何れかに記載の発光素子の作製方法。
(17) The method for manufacturing a light-emitting element according to any one of (11) to (16), including a step of peeling the catalyst layer after the heat treatment.
(18) The method for producing a light-emitting element according to any one of (11) to (17), wherein the thickness of the catalyst layer is in the range of 1 nm to 100 nm.
(19) The method for manufacturing a light-emitting element according to any one of (11) to (18), wherein the catalyst layer contains Ni, Ag, or Cu in a range of 50 to 100 atomic%.
(20) The method for manufacturing a light-emitting element according to any one of (11) to (19), wherein the thickness of the p-type III-V compound semiconductor layer is in the range of 1 nm to 5 μm.

Alを含むp型のIII−V属化合物半導体層上に、Ni,AgまたはCuを含む金属からなる触媒層を形成し、熱処理を施すことにより、触媒層として他の金属を用いた場合に比べ著しい効果がある。即ち、キャリア濃度を著しく高くすることができ、したがって導電性を高め、p型としての機能を十分に発揮させることができるようになる。   Compared to the case where a catalyst layer made of a metal containing Ni, Ag or Cu is formed on a p-type group III-V compound semiconductor layer containing Al and heat-treated, so that another metal is used as the catalyst layer. There is a remarkable effect. That is, the carrier concentration can be remarkably increased, so that the conductivity can be increased and the p-type function can be fully exhibited.

以下図面を参照して本発明を詳しく説明する。
本発明において、III−V属化合物半導体はAlを含むGaNを基礎とし、そのGaの一部或いは全部をB、Inで置換したものも含む。またNの一部或いは全部をP,Asで置換したものも含む。一般式で表せばAlxyInzGa1-x-y-z1-i-jiAsj(0<x≦1、0≦y<1、0≦z<1、0≦j≦1、0≦i≦1、0<x+y+z≦1、0≦i+j≦1)である。これらの一般式の中で本発明の方法は特にAlを含む窒化ガリウム(GaN)系化合物半導体の場合に効果が大きく望ましいものである。これを一般式で表せばAlxyInzGa1-x-y-zN(0<x<1、0≦y<1、0≦z<1、0<x+y+z<1、)である。この中でさらに好ましくはGaAlN、GaAlInNである。
Hereinafter, the present invention will be described in detail with reference to the drawings.
In the present invention, Group III-V compound semiconductors are based on GaN containing Al, and include those in which part or all of Ga is substituted with B and In. Moreover, the thing which substituted a part or all of N by P and As is also included. Expressed by the formula Al x B y In z Ga 1 -xyz N 1-ij P i As j (0 <x ≦ 1,0 ≦ y <1,0 ≦ z <1,0 ≦ j ≦ 1,0 ≦ i ≦ 1, 0 <x + y + z ≦ 1, 0 ≦ i + j ≦ 1). Among these general formulas, the method of the present invention is particularly effective and desirable in the case of a gallium nitride (GaN) -based compound semiconductor containing Al. I expressed this with general formula Al x B y In z Ga 1 -xyz N (0 <x <1,0 ≦ y <1,0 ≦ z <1,0 <x + y + z <1,) is. Of these, GaAlN and GaAlInN are more preferable.

以下III−V属化合物半導体として窒化ガリウム系化合物半導体を例にとり本発明を説明する。
図1は本発明のp型窒化ガリウム系化合物半導体の作製方法の手順の概念を説明するための図である。図において、この発明のp型窒化ガリウム系化合物半導体の作製方法では、先ず図1(A)に示すように、サファイアからなる基板1上にバッファ層、その他様々な組成や層構造からなるp型層でない層2と、Mgをドープしたp型層3上に、触媒層7を形成して、積層体(試料)10を構成し、この試料10に熱処理を施す。この熱処理により、p型層3のMgと結合していた水素は移動し、(B)に示すように、触媒層7をなす材料と結合するようになる。そして、この試料11を塩酸に含浸して触媒層7を除去し、(C)に示すような、試料12を形成する。この試料12のp型層3では、試料10の段階では水素と結合してパッシベーションされていたMgが活性化してキャリア濃度が上昇するので、p型層3は、p型としての機能を十分に発揮することができるようになる。
Hereinafter, the present invention will be described taking a gallium nitride compound semiconductor as an example of a III-V compound semiconductor.
FIG. 1 is a diagram for explaining the concept of the procedure of a method for producing a p-type gallium nitride compound semiconductor according to the present invention. Referring to FIG. 1, in the method for producing a p-type gallium nitride compound semiconductor according to the present invention, first, as shown in FIG. 1A, a buffer layer is formed on a substrate 1 made of sapphire and other p-types made of various compositions and layer structures. A catalyst layer 7 is formed on the layer 2 that is not a layer and the p-type layer 3 doped with Mg to form a laminate (sample) 10, and the sample 10 is subjected to heat treatment. By this heat treatment, hydrogen bonded to Mg of the p-type layer 3 moves and bonds to the material forming the catalyst layer 7 as shown in FIG. Then, the sample 11 is impregnated with hydrochloric acid to remove the catalyst layer 7 to form a sample 12 as shown in FIG. In the p-type layer 3 of the sample 12, Mg that has been passivated by being bonded to hydrogen in the stage of the sample 10 is activated to increase the carrier concentration. Therefore, the p-type layer 3 has a sufficient p-type function. It will be possible to demonstrate.

触媒層を形成した後にアニールを行うことが必要である。その温度としては、200℃以上の温度が必要である。また、この温度はできるだけ低い方が良い。発光層がInGaNからなる場合、熱処理によって組成の分離を生じやすいため、高い温度での熱処理で発光強度の低下を招くことがある。
本発明は触媒層としてNi,Ag,Cuのうちの一種類以上を含むことが特徴である。これらの金属を用いた場合、文献7に記載のPdやCoなど他の金属を使用した場合に比較して100℃程度処理温度を低下させることに成功した。この効果により、処理温度は200℃以上で十分なキャリア濃度を得ることが可能となった。さらに望ましくは、400℃以上の温度であり、500℃以上では、なおさら望ましい。
一方、処理温度を900℃以上とすると、上記のInGaN結晶の分解を生じる。p層にAlGaNを用いると従来は900℃以上等の高温を必要としていたが、本発明の技術により900℃以下の温度での処理によって充分な活性化を得ることができるようになった。InGaNの分解を防ぐ観点からさらに望ましい、700℃以下の温度とすることも可能である。
It is necessary to perform annealing after forming the catalyst layer. As the temperature, a temperature of 200 ° C. or higher is necessary. Also, this temperature should be as low as possible. When the light emitting layer is made of InGaN, composition separation is likely to occur by heat treatment, and thus the light emission intensity may be lowered by heat treatment at a high temperature.
The present invention is characterized in that it includes one or more of Ni, Ag, and Cu as the catalyst layer. When these metals were used, the treatment temperature was successfully reduced by about 100 ° C. compared to the case where other metals such as Pd and Co described in Document 7 were used. This effect makes it possible to obtain a sufficient carrier concentration at a treatment temperature of 200 ° C. or higher. More preferably, the temperature is 400 ° C. or higher, and more preferably 500 ° C. or higher.
On the other hand, when the processing temperature is set to 900 ° C. or higher, the above InGaN crystal is decomposed. Conventionally, when AlGaN is used for the p-layer, a high temperature of 900 ° C. or higher has been required, but sufficient activation can be obtained by the treatment at a temperature of 900 ° C. or lower by the technique of the present invention. It is also possible to set the temperature to 700 ° C. or lower, which is more desirable from the viewpoint of preventing decomposition of InGaN.

なかでも、AgとCuは、成膜がしやすく、また剥離も容易であり、安価であることなどの点でNiよりも優れている。
これらの金属を1種以上含めば他の金属、例えば文献7に記載のその他の金属を含んでもよい。この場合Ni,Ag,Cuの少なくとも1種が50原子%以上含むことが望ましい。
熱処理を行う時間については、温度に応じて適切に選ぶ必要がある。短すぎれば十分な活性化の効果を得ることができないし、長すぎれば発光層に含まれるInGaNの分解を招き、素子の出力の低下を誘発する。
Among these, Ag and Cu are superior to Ni in that they are easy to form a film, are easy to peel off, and are inexpensive.
If one or more of these metals are included, other metals such as other metals described in Document 7 may be included. In this case, it is desirable that at least one of Ni, Ag, and Cu is contained by 50 atomic% or more.
The time for performing the heat treatment needs to be appropriately selected according to the temperature. If it is too short, a sufficient activation effect cannot be obtained, and if it is too long, the InGaN contained in the light emitting layer is decomposed and the output of the device is lowered.

本発明で触媒層として用いるNiやAgやCuは、仕事関数の小さい金属であり、そのままではp型電極として利用できない。このため、第4の工程として触媒層を剥離する工程を含むことが望ましい。剥離は、酸やアルカリに含浸させるなどの方法で容易に行うことができる。表面の平坦性を必要とする場合、ドライエッチングによって行っても良い。   Ni, Ag, and Cu used as a catalyst layer in the present invention are metals having a small work function, and cannot be used as p-type electrodes as they are. For this reason, it is desirable to include the process of peeling a catalyst layer as a 4th process. Peeling can be easily performed by a method such as impregnation with acid or alkali. If surface flatness is required, dry etching may be performed.

触媒層の膜厚は、1nmから100nmであることが望ましい。これ以上薄いと、均一な膜とすることが難しくなるし、これ以上厚くなると触媒層としての効果には違いがなく、いたずらに成膜の工程時間と剥離の工程時間が延びるのみである。
触媒層は金属の膜であるので、その成膜方法は一般に知られたものを問題なく用いることができる。具体的には、真空蒸着、スパッタ、化学的気相成膜法(CVD)などである。なかでも、真空蒸着はp型窒化ガリウム系化合物半導体に与えるダメージも少なく、触媒層の成膜に向いた手法である。
The film thickness of the catalyst layer is desirably 1 nm to 100 nm. If it is thinner than this, it becomes difficult to form a uniform film, and if it is thicker than this, there is no difference in the effect as a catalyst layer, and only the film forming process time and the peeling process time are unnecessarily prolonged.
Since the catalyst layer is a metal film, a generally known film forming method can be used without any problem. Specifically, vacuum deposition, sputtering, chemical vapor deposition (CVD), and the like. Among these, vacuum deposition is a method suitable for forming a catalyst layer with little damage to the p-type gallium nitride compound semiconductor.

p型窒化ガリウム系化合物半導体に含まれるAlの組成としては、0.5質量%以上である場合に本発明の効果が顕著になり望ましい。さらに好ましくは5質量%以上である。これ以下の組成では、他の材料を触媒層として用いても十分活性化させることができる。Al含有量の上限は50原子%程度とし、Ga等を含むようにするのがよい。   The composition of Al contained in the p-type gallium nitride compound semiconductor is preferably 0.5% by mass or more because the effect of the present invention becomes remarkable. More preferably, it is 5 mass% or more. If the composition is less than this, it can be sufficiently activated even if another material is used as the catalyst layer. The upper limit of the Al content is preferably about 50 atomic% and preferably contains Ga or the like.

触媒層のアニールの際には、できるだけ気相に水素を含まないことが望ましい。ここでいう水素とは、水素原子を含む化合物も含んでいる。圧力は任意で構わないが、70Torr以下の低圧の方が望ましい。また、触媒層の表面に金属の酸化物等を生じないよう、熱処理雰囲気の気相中の酸素をできる限り取り除く努力が必要である。気相中に1質量%の酸素を含んだ場合でも、金属の酸化が発生することがある。   When annealing the catalyst layer, it is desirable that the gas phase contains as little hydrogen as possible. The term “hydrogen” as used herein includes a compound containing a hydrogen atom. The pressure may be arbitrary, but a low pressure of 70 Torr or less is desirable. Further, it is necessary to make an effort to remove as much oxygen as possible from the gas phase in the heat treatment atmosphere so as not to generate metal oxides on the surface of the catalyst layer. Even when 1% by mass of oxygen is contained in the gas phase, metal oxidation may occur.

触媒層とp層との界面には、酸化物層を含まない方が良く、p型層表面に前処理を施すことが望ましい。前処理は乾式でも湿式でも良いが、湿式のほうが簡便であり、低コスト化が可能である。湿式処理としては、酸処理やアルカリ処理を用いることができる。よく知られた塩酸、燐酸、硫酸、アンモニア、NaOH、KOHなどによる含浸や煮沸の他、RCA洗浄、ピラニハ洗浄などを用いることができる。
p型窒化ガリウム系化合物半導体の膜厚としては、1nmから5μmであることが望ましい。これ以下の膜厚では、p型層として機能するのが難しいので、素子構造に採用する必要がないと思われ、これ以上の膜厚では、深底部より水素を取り出すのが困難となる。
It is better not to include an oxide layer at the interface between the catalyst layer and the p layer, and it is desirable to pre-treat the p-type layer surface. The pretreatment may be dry or wet, but the wet is simpler and the cost can be reduced. As the wet treatment, acid treatment or alkali treatment can be used. In addition to the well-known impregnation and boiling with hydrochloric acid, phosphoric acid, sulfuric acid, ammonia, NaOH, KOH, etc., RCA cleaning, Piraniha cleaning, and the like can be used.
The film thickness of the p-type gallium nitride compound semiconductor is desirably 1 nm to 5 μm. If the film thickness is less than this, it is difficult to function as a p-type layer, so that it is not necessary to employ the element structure. If the film thickness is more than this, it is difficult to extract hydrogen from the deep bottom.

(実施例1)
次に、この発明の実施例を図2を用いて説明する。
図2は本発明方法により作製したp型窒化ガリウム系化合物半導体を含めて構成した半導体発光素子(半導体発光ダイオード)の作製方法についての説明図である。
この実施例では、MOCVD法を用いて、サファイアからなる基板21上に、AlNからなるバッファ層22、アンドープのGaNからなるn型層231、GeドープのAlGaNからなるn型層232、InGaN層とGaN層からなる多重量子井戸(MQW)層24、MgドープのAlGaN層25、MgドープのAlGaNからなるp型層26を順に積層し、半導体発光素子用の多層構造を有するウェーハを作製した。
Example 1
Next, an embodiment of the present invention will be described with reference to FIG.
FIG. 2 is an explanatory view of a method for producing a semiconductor light emitting device (semiconductor light emitting diode) including a p-type gallium nitride compound semiconductor produced by the method of the present invention.
In this embodiment, a MOCVD method is used to form a buffer layer 22 made of AlN, an n-type layer 231 made of undoped GaN, an n-type layer 232 made of Ge-doped AlGaN, an InGaN layer on a substrate 21 made of sapphire. A multi-quantum well (MQW) layer 24 composed of a GaN layer, an Mg-doped AlGaN layer 25, and a p-type layer 26 composed of Mg-doped AlGaN were sequentially laminated to produce a wafer having a multilayer structure for a semiconductor light emitting device.

この多層構造を有するウェーハ上に、蒸着機を用いて抵抗加熱方式にて10nmの膜厚のAgからなる触媒層27を形成して、試料200を作製し(図2(A))、その後、熱処理炉を用いて同様の手順により、窒素キャリアガス中で450℃において10分間の熱処理を施した。このようにして、試料201を作製した(図2(B))。その後、HClに含浸させることでAgからなる触媒層27を除去し、p型層26を最表面とする試料(ウェーハ)202を作製した(図2(C))。   On the wafer having this multilayer structure, a catalyst layer 27 made of Ag having a thickness of 10 nm is formed by a resistance heating method using a vapor deposition machine to produce a sample 200 (FIG. 2A), and then A heat treatment was performed for 10 minutes at 450 ° C. in a nitrogen carrier gas by a similar procedure using a heat treatment furnace. In this way, a sample 201 was manufactured (FIG. 2B). Thereafter, the catalyst layer 27 made of Ag was removed by impregnating with HCl, and a sample (wafer) 202 having the p-type layer 26 as the outermost surface was produced (FIG. 2C).

このような熱処理を施したウェーハ202の最表面のp型層26についてキャリア濃度を測定したところ、キャリア濃度はおよそ6×1017cm-3であり、p型の導電性を発揮した。これは、p型層26のMgと結合していた水素が熱処理によって触媒層27に移動し、触媒層27のAgと結合した結果p型層26でのキャリア濃度が上昇したものと考えている。
熱処理の終わったウェーハ202について、公知のフォトリソグラフィーによってp型層26の表面側にITOからなる透光性の電極と、ボンディングパッドとを形成し、p側電極とした。
さらにその後ウェーハ202にドライエッチングを行い、n側電極を形成する部分のn型層231を露出させ、露出した部分にn側電極を作製した。
When the carrier concentration was measured for the p-type layer 26 on the outermost surface of the wafer 202 subjected to such heat treatment, the carrier concentration was about 6 × 10 17 cm −3 and exhibited p-type conductivity. It is considered that this is because the hydrogen bonded to Mg in the p-type layer 26 moves to the catalyst layer 27 by the heat treatment, and as a result of combining with Ag in the catalyst layer 27, the carrier concentration in the p-type layer 26 increases. .
With respect to the wafer 202 after the heat treatment, a translucent electrode made of ITO and a bonding pad were formed on the surface side of the p-type layer 26 by known photolithography to form a p-side electrode.
Further, dry etching was then performed on the wafer 202 to expose a portion of the n-type layer 231 where the n-side electrode was to be formed, and an n-side electrode was fabricated in the exposed portion.

このようにしてp側およびn側の電極を形成したウェーハについて、基板21の裏面を研削、研磨してミラー状の面とした。その後、ウェーハを350μm角の正方形のチップに切断し、電極が上になるように、リードフレーム上に載置し、金線でリードフレームへ結線して半導体発光ダイオードとした。
上記のようにして作製した発光ダイオードのp側およびn側の電極間に順方向電流を流したところ、電流20mAにおける順方向電圧は3.2Vであった。また、p側の透光性電極を通して発光を観察したところ、発光波長は465nmであり、発光出力は15mWを示した。
For the wafer on which the p-side and n-side electrodes were formed in this way, the back surface of the substrate 21 was ground and polished to form a mirror-like surface. Thereafter, the wafer was cut into 350 μm square chips, placed on the lead frame so that the electrodes were on top, and connected to the lead frame with gold wires to form a semiconductor light emitting diode.
When a forward current was passed between the p-side and n-side electrodes of the light emitting diode produced as described above, the forward voltage at a current of 20 mA was 3.2V. Moreover, when light emission was observed through the p side translucent electrode, the light emission wavelength was 465 nm and the light emission output showed 15 mW.

(実施例2〜3)
次に、実施例1で用いたのと同じ構造を持つエピ基板上に触媒層としてCu(実施例2)、Ni(実施例3)を50nm形成し、3×10-3Torrの真空中にて、5分間の500℃における熱処理を施した。
この基板より、実施例1と同様の手順で発光ダイオードを作製した。p型層のキャリア濃度を表1に示す。この発光ダイオードのp側およびn側の電極間に順方向電流を流した場合の電流20mAにおける順方向電圧を表1にしめす。また、p側の透光性電極を通して発光を観察したところ、発光波長は525nmであり、発光出力は8mWを示した。
(比較例1〜6)
(Examples 2-3)
Next, 50 nm of Cu (Example 2) and Ni (Example 3) are formed as catalyst layers on an epitaxial substrate having the same structure as that used in Example 1, and the vacuum is 3 × 10 −3 Torr. Then, heat treatment was performed at 500 ° C. for 5 minutes.
From this substrate, a light emitting diode was produced in the same procedure as in Example 1. Table 1 shows the carrier concentration of the p-type layer. Table 1 shows forward voltages at a current of 20 mA when a forward current is passed between the p-side and n-side electrodes of the light emitting diode. Moreover, when light emission was observed through the p side translucent electrode, the light emission wavelength was 525 nm and the light emission output showed 8 mW.
(Comparative Examples 1-6)

実施例と同様にしてMOCVD法により製造した多層構造を有するウェーハについて、同様の方法で表面に様々な触媒層を形成し、窒素ガス雰囲気中で10分間の熱処理を施すことでAlGaN層中のMgを活性化するとともに、触媒層を除去し、AlGaNからなるp型層を製造した。以上、実施例、比較例のp型層のキャリア濃度を表1に示す。

Figure 2007311375
For a wafer having a multilayer structure manufactured by the MOCVD method in the same manner as in the examples, various catalyst layers are formed on the surface by the same method, and heat treatment is performed in a nitrogen gas atmosphere for 10 minutes, whereby Mg in the AlGaN layer is formed. And the catalyst layer was removed to produce a p-type layer made of AlGaN. The carrier concentrations of the p-type layers of the examples and comparative examples are shown in Table 1 above.
Figure 2007311375

熱処理の終わったウェーハについて、実施例と同様にしてp側電極およびn側電極を作製した。さらに、このウェーハから実施例と同様にして発光ダイオードを形成した。
上記のようにして作製した発光ダイオードのp側およびn側の電極間に順方向電流を流したところ、電流20mAにおける順方向電圧は表1のようになった。また、p側の透光性電極を通して発光を観察したところ、発光波長および発光出力は第2の実施形態とほぼ同じであった。
A p-side electrode and an n-side electrode were prepared in the same manner as in the example for the heat-treated wafer. Further, a light emitting diode was formed from this wafer in the same manner as in the example.
When a forward current was passed between the p-side and n-side electrodes of the light-emitting diode fabricated as described above, the forward voltage at a current of 20 mA was as shown in Table 1. Further, when light emission was observed through the p-side translucent electrode, the light emission wavelength and light emission output were almost the same as those in the second embodiment.

このように実施例と比較例1〜6では、発光ダイオードの発光出力には違いがないものの、p型層のキャリア濃度、電流20mAにおける順方向電圧に大きな違いが生じた。
上記の実施例では、熱処理を窒素ガス雰囲気中で行うようにしたが、他の不活性ガス、例えばAr等の希ガス中で行うようにしてもよい。また、熱処理を3×10-3Torrなどの真空中で行っても良く、酸化が進まない程度の圧力であればよく、特に圧力の値は制限されない。
また、実施例では触媒層を1種類の金属からなる単層膜として構成したが、1種類の金属あるいは二種以上の金属の合金あるいは化合物からなる多層膜として構成するようにしてもよい。
Thus, although there was no difference in the light emission output of a light emitting diode in Example and Comparative Examples 1-6, a big difference arose in the carrier voltage of the p-type layer and the forward voltage at a current of 20 mA.
In the above embodiment, the heat treatment is performed in a nitrogen gas atmosphere, but may be performed in another inert gas, for example, a rare gas such as Ar. Further, the heat treatment may be performed in a vacuum such as 3 × 10 −3 Torr, as long as the pressure does not allow the oxidation to proceed, and the pressure value is not particularly limited.
In the embodiment, the catalyst layer is configured as a single layer film made of one type of metal, but may be formed as a multilayer film made of one type of metal or an alloy or compound of two or more types of metals.

本発明によればp型電極はキャリア濃度が高く、低抵抗となり、駆動電圧を低くでき、高い発光出力が得られ、各種の表示ランプに利用できる。   According to the present invention, the p-type electrode has a high carrier concentration, a low resistance, a low driving voltage, a high light emission output, and can be used for various display lamps.

この発明のp型窒化ガリウム系化合物半導体の作製方法の手順を説明するための図である。It is a figure for demonstrating the procedure of the manufacturing method of the p-type gallium nitride compound semiconductor of this invention. 本発明方法により作製したp型窒化ガリウム系化合物半導体を含めて構成した半導体発光素子の作製方法についての説明図である。It is explanatory drawing about the manufacturing method of the semiconductor light-emitting device comprised including the p-type gallium nitride type compound semiconductor produced by the method of this invention.

符号の説明Explanation of symbols

1 基板
2 バッファ層
3 p型層
7 触媒層
10 試料
11 試料
12 試料
21 基板
22 バッファ層
24 多重量子井戸(MQW)層
25 アンドープのGaN層
26 p型層
27 触媒層
200 試料
201 試料
202 ウェーハ
202 ウェーハ
231 n型層
232 n型層
DESCRIPTION OF SYMBOLS 1 Substrate 2 Buffer layer 3 P-type layer 7 Catalyst layer 10 Sample 11 Sample 12 Sample 21 Substrate 22 Buffer layer 24 Multiple quantum well (MQW) layer 25 Undoped GaN layer 26 P-type layer 27 Catalyst layer 200 Sample 201 Sample 202 Wafer 202 Wafer 231 n-type layer 232 n-type layer

Claims (20)

p型不純物を添加したp型III−V族化合物半導体層を作製する第1の工程と、上記p型III−V族化合物半導体層上に触媒層を作製する第2の工程と、上記触媒層を付けた状態でのp型III−V族化合物半導体層を熱処理する第3の工程とを含むp型III−V族化合物半導体の作製方法において、前記p型III−V族化合物半導体層がAlを含んでおり、かつ、触媒層がNi、AgまたはCuのうちの少なくとも1種類を含んでいることを特徴とするp型III−V族化合物半導体の作製方法。   a first step of producing a p-type III-V compound semiconductor layer to which a p-type impurity is added; a second step of producing a catalyst layer on the p-type III-V compound semiconductor layer; and the catalyst layer And a third step of heat-treating the p-type III-V compound semiconductor layer in a state of attaching a p-type III-V compound semiconductor layer, wherein the p-type III-V compound semiconductor layer is made of Al. And the catalyst layer contains at least one of Ni, Ag, or Cu. A method for producing a p-type group III-V compound semiconductor. p型III−V族化合物半導体が、窒化ガリウム系化合物半導体である請求項1に記載のp型III−V族化合物半導体の作製方法。   The method for producing a p-type group III-V compound semiconductor according to claim 1, wherein the p-type group III-V compound semiconductor is a gallium nitride compound semiconductor. 上記p型III−V族化合物半導体が含むAlの量が、0.5原子%以上であることを特徴とする、請求項1または2に記載のp型III−V族化合物半導体の作製方法。   The method for producing a p-type group III-V compound semiconductor according to claim 1 or 2, wherein the amount of Al contained in the p-type group III-V compound semiconductor is 0.5 atomic% or more. p型III−V族化合物半導体が含むAlの量が、5〜50原子%である請求項1〜3のいずれかに記載のp型III−V族化合物半導体の作製方法。   The method for producing a p-type group III-V compound semiconductor according to any one of claims 1 to 3, wherein the amount of Al contained in the p-type group III-V compound semiconductor is 5 to 50 atomic%. 触媒層が、CuまたはAgのうちの一種類以上を含む、請求項1から4の何れかに記載のp型III−V族化合物半導体の作製方法。   The method for producing a p-type group III-V compound semiconductor according to any one of claims 1 to 4, wherein the catalyst layer contains one or more of Cu and Ag. 上記第3の工程における熱処理温度が、200℃以上である請求項1から5 の何れかに記載のp型III−V族化合物半導体の作製方法。   The method for producing a p-type group III-V compound semiconductor according to any one of claims 1 to 5, wherein a heat treatment temperature in the third step is 200 ° C or higher. 上記第3の工程の後に、触媒層を剥離する第4の工程を含む、請求項1から6の何れかに記載のp型III−V族化合物半導体の作製方法。   The method for producing a p-type group III-V compound semiconductor according to any one of claims 1 to 6, further comprising a fourth step of peeling the catalyst layer after the third step. 上記触媒層の膜厚は、1nm〜100nmの範囲である、請求項1から7の何れかに記載のp型III−V族化合物半導体の作製方法。   The method for producing a p-type group III-V compound semiconductor according to any one of claims 1 to 7, wherein the catalyst layer has a thickness in a range of 1 nm to 100 nm. 上記触媒層がNi、AgあるいはCuを含有する割合が50〜100原子%の範囲である、請求項1から8の何れかに記載のp型III−V族化合物半導体の作製方法。   The method for producing a p-type group III-V compound semiconductor according to any one of claims 1 to 8, wherein the catalyst layer contains Ni, Ag or Cu in a range of 50 to 100 atomic%. 上記p型III−V族化合物半導体層の膜厚は、1nm〜5μmの範囲である、請求項1から9の何れかに記載のp型III−V族化合物半導体の作製方法。   The method for producing a p-type III-V group compound semiconductor according to any one of claims 1 to 9, wherein a film thickness of the p-type III-V group compound semiconductor layer is in a range of 1 nm to 5 µm. III−V族化合物半導体層からなるn型層、発光層及びp型層を備えた発光素子の作成方法において、前記p型層を、Alを含むIII−V族化合物半導体層とし、該p型層上にNi、AgまたはCuのうちの少なくとも1種類を含む触媒層を形成し、次いで熱処理することにより作製することを特徴とする発光素子の作製方法。   In a method for manufacturing a light emitting device including an n-type layer, a light emitting layer, and a p-type layer made of a III-V group compound semiconductor layer, the p-type layer is an III-V group compound semiconductor layer containing Al, and the p-type layer A method for manufacturing a light-emitting element, which includes forming a catalyst layer containing at least one of Ni, Ag, and Cu on a layer and then performing heat treatment. p型III−V族化合物半導体が、窒化ガリウム系化合物半導体である請求項11に記載の発光素子の作製方法。   The method for manufacturing a light-emitting element according to claim 11, wherein the p-type III-V compound semiconductor is a gallium nitride-based compound semiconductor. 上記p型III−V族化合物半導体が含むAlの量が、0.5原子%以上であることを特徴とする、請求項11または12に記載の発光素子の作製方法。   13. The method for manufacturing a light-emitting element according to claim 11, wherein the amount of Al contained in the p-type III-V compound semiconductor is 0.5 atomic% or more. p型III−V族化合物半導体が含むAlの量が、5〜50原子%である請求項11から13のいずれかに記載の発光素子の作製方法。   The method for manufacturing a light-emitting element according to claim 11, wherein the amount of Al contained in the p-type III-V compound semiconductor is 5 to 50 atomic%. 触媒層が、CuまたはAgのうちの一種類以上を含む、請求項11から14の何れかに記載の発光素子の作製方法。   The method for manufacturing a light-emitting element according to claim 11, wherein the catalyst layer contains one or more of Cu and Ag. 熱処理温度が、200℃以上である請求項11から15の何れかに記載の発光素子の作製方法。   The method for manufacturing a light-emitting element according to claim 11, wherein the heat treatment temperature is 200 ° C. or higher. 上記熱処理後に、触媒層を剥離する工程を含む、請求項11から16の何れかに記載の発光素子の作製方法。   The method for manufacturing a light-emitting element according to claim 11, further comprising a step of peeling the catalyst layer after the heat treatment. 上記触媒層の膜厚が、1nm〜100nmの範囲である、請求項11から 17の何れかに記載の発光素子の作製方法。   The method for manufacturing a light-emitting element according to claim 11, wherein the catalyst layer has a thickness in a range of 1 nm to 100 nm. 上記触媒層がNi、AgあるいはCuを含有する割合が50〜100原子%の範囲である、請求項11から18の何れかに記載の発光素子の作製方法。   19. The method for manufacturing a light-emitting element according to claim 11, wherein the catalyst layer contains Ni, Ag, or Cu in a range of 50 to 100 atomic%. 上記p型III−V族化合物半導体層の膜厚が、1nm〜5μmの範囲である、請求項11から19の何れかに記載の発光素子の作製方法。    20. The method for manufacturing a light-emitting element according to claim 11, wherein the thickness of the p-type III-V compound semiconductor layer is in the range of 1 nm to 5 μm.
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