JP2007304062A - Surface inspection device - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a surface inspection device for deciding the quality of a surface flaw more in detail. <P>SOLUTION: The surface inspection device is constituted so that two polarizing elements different in a polarizing direction are respectively provided to an illumination light path and a light detection path in a polarizing observation state and the pattern of a substrate to be inspected is obliquely set with respect to the vibration surface of illumination light. In this state, the luminous flux of the light detection path is formed into an image to form a light intensity signal. The first signal level of the light intensity signal is qualitatively decided under a preliminarily stored quality decision condition (first condition). The surface inspection device detaches at least one of polarizing elements from a light path to bring the same to an open observation state. The second signal level of the light intensity signal obtained in this state is qualitatively decided and a preliminarily stored quality decision condition (second condition). The quality of the substrate to be inspected can be decided more in detail on the basis of two kinds of quality decision. <P>COPYRIGHT: (C)2008,JPO&INPIT

Description

  The present invention relates to a surface inspection apparatus.

Conventionally, as a technique for determining the quality of a pattern formed on the surface of a semiconductor wafer, an inspection technique using a scanning electron microscope (SEM) has been proposed (Patent Document 1).
In this conventional technique, it is necessary to repeat electron beam irradiation in order to detect a surface level difference, and a long time is required for inspection. Further, since the observation magnification of the scanning electron microscope is high, the entire wafer surface cannot be inspected at the same time, and more time is required for the inspection of the entire wafer surface. Therefore, the technique of Patent Document 1 is not very suitable for applications that require high throughput, such as quality determination in the semiconductor manufacturing process.

On the other hand, the present inventor in Japanese Patent Application Laid-Open No. H10-228561 discloses a technique for irradiating a semiconductor wafer with linearly polarized light and detecting a defect on the wafer surface from a change in a polarization component generated in a reflected image.
According to the technique of Patent Document 2, surface defects on the entire wafer surface can be detected in a short time. Therefore, the technique of Patent Document 2 is a technique suitable for applications that require high throughput, such as pass / fail determination in a semiconductor manufacturing process.
JP 2003-302214 A International Publication No. 2005/040776 Specification

The present inventor succeeded in inspecting surface defects for each cause of failure by further developing the technique of Patent Document 2.
SUMMARY OF THE INVENTION An object of the present invention is to provide a surface inspection apparatus that performs surface defect determination in more detail.

<< 1 >> The surface inspection apparatus of the present invention includes an illumination unit, a light receiving unit, a first polarizing element, a setting unit, a second polarizing element, a control unit, a condition storage unit, a first determination unit, and a second determination unit.
The illumination unit irradiates the test substrate with illumination light.
The light receiving section forms an image of light generated in the regular reflection direction from the test substrate by irradiation of illumination light, and photoelectrically converts the formed image to generate a light intensity signal.
The first polarizing element is provided in the optical path between the illumination unit and the test substrate.
The setting unit sets the periodic pattern of the surface shape of the test substrate in an oblique direction with respect to the vibration surface of the illumination light that has passed through the first polarizing element.
The second polarizing element is provided in the optical path between the test substrate and the light receiving unit, and the polarization direction is different from that of the first polarizing element.
The control unit detects the first signal level of the light intensity signal in the polarization observation state in which the first polarizing element and the second polarizing element are arranged in the optical path. Further, the control unit detects the second signal level of the light intensity signal in an open observation state in which at least one of the first polarizing element and the second polarizing element is removed from the optical path.
The condition storage unit stores a first condition, which is a pass / fail determination condition based on the first signal level, and a second condition, which is a pass / fail determination condition based on the second signal level.
The first determination unit performs pass / fail determination based on the first signal level based on the first condition.
The second determination unit performs pass / fail determination based on the second signal level based on the second condition.
<< 2 >> Preferably, a non-defective product determination unit is provided that determines that the test substrate is a defective product when the first determination unit or the second determination unit determines that the test substrate is defective.
<< 3 >> Preferably, an operation mode function for learning the first condition and the second condition is provided. In this operation mode, the control unit accepts the information input of the non-defective product / defective product with respect to the test substrate in which the good product / defective product is known in advance. The control unit generates the first condition and the second condition in a learning manner by classifying the first signal level and the second signal level detected for the test substrate according to the information on the input non-defective product / defective product. .
<< 4 >> Preferably, the quality of the test substrate having a resist pattern formed on the surface through a photolithography process is determined. In this case, a 1st determination part determines the quality of the focus at the time of exposing a resist pattern from a 1st signal level. The second determination unit determines whether or not the exposure amount when exposing the resist pattern is good or bad from the second signal level.

  The quality of the test substrate is determined for each of the two types of observation states (polarized light observation state and open observation state). Therefore, it is possible to carry out the determination of the quality of the surface defect in more detail.

<< Configuration of surface inspection equipment >>
FIG. 1 is a diagram showing a configuration of the surface inspection apparatus 10.
In FIG. 1, the surface inspection apparatus 10 is provided with a stage 11 that supports a semiconductor wafer 20 that is a substrate to be tested. In the semiconductor manufacturing process, the semiconductor wafer 20 is transferred from a wafer cassette or exposure / development apparatus via a transfer system (not shown), and is attracted to the stage 11.
The rotation angle of the stage 11 is controlled by a stage driving mechanism 16. An alignment system 12 is provided above the stage 11. The alignment system 12 obtains the angle of the semiconductor wafer 20 by detecting the position of the alignment mark or the like of the semiconductor wafer 20.
A concave reflecting mirror or other illumination optical system 35 is disposed above the stage 11. The illumination optical system 35 shapes the light from the light source 31 into substantially parallel collimated light and collectively illuminates almost the entire circuit formation range on the semiconductor wafer 20. The light source 31 incorporates a halogen lamp, a metal halide lamp, a mercury lamp, etc., as well as a wavelength selection filter, an ND filter for adjusting the amount of light, and the like in a replaceable manner. Therefore, light in a desired wavelength region can be appropriately emitted with a desired light amount setting.

The drive motor 40 inserts and removes the polarizing plate 34 with respect to the illumination optical path. When the polarizing plate 34 is inserted on the illumination optical path, the illumination light for the semiconductor wafer 20 is processed into linearly polarized light (for example, P-polarized light).
The illumination light described above is reflected on the surface of the semiconductor wafer 20. In this regular reflection direction, a concave reflecting mirror or other light receiving optical system 36 is arranged. The reflected light collected by the light receiving optical system 36 forms an optical image on the imaging surface of the imaging unit 39 via the imaging lens 37. The imaging unit 39 photoelectrically converts this optical image (that is, converts it into an electric signal having a level corresponding to the intensity of the incident light for each pixel), and generates image data.
The drive motor 41 inserts and removes the polarizing plate 38 with respect to the light receiving optical path. The polarizing direction of the polarizing plate 38 is set to an angle different from the polarizing direction of the polarizing plate 34.
The surface inspection apparatus 10 is provided with a microprocessor 15. The microprocessor 15 controls the drive motor 40, the alignment system 12, the light source 31, the stage drive mechanism 16, the imaging unit 39, the drive motor 41, and the like described above. In addition, a condition learning unit 15a and a memory 15b are connected to the microprocessor 15.

《Explanation of pass / fail judgment operation》
FIG. 2 is a flowchart showing the quality determination of the semiconductor wafer 20 by the surface inspection apparatus 10. Hereinafter, the quality determination process will be described along the step numbers shown in FIG.

Step S1: The microprocessor 15 controls the drive motor 40 to insert the polarizing plate 34 into the illumination optical path. Similarly, the microprocessor 15 controls the drive motor 41 to insert a polarizing plate 38 having a polarization direction different from that of the polarizing plate 34 into the light receiving optical path. Hereinafter, this state is referred to as a polarization observation state.

Step S2: A surface step due to a resist pattern as shown in FIG. 3A is formed on the surface of the semiconductor wafer 20 through a photolithography process. The edges of the surface steps are mainly arranged in the vertical and horizontal directions according to the shape of the semiconductor circuit to be manufactured. Therefore, the resist pattern is a pattern with strong periodicity that repeats vertically and horizontally.

  The microprocessor 15 detects the main pattern direction (step pattern direction) of the resist pattern by detecting the position of the alignment mark on the semiconductor wafer 20 via the alignment system 12. The microprocessor 15 controls the rotation angle of the stage 11 via the stage drive mechanism 16 so that the pattern direction is inclined with respect to the vibration surface of the illumination light (linearly polarized light). FIG. 3B is a diagram illustrating a state after the rotation angle control.

By thus arranging the periodic pattern obliquely with respect to the plane of vibration of the linearly polarized light, the reflected light generated from the step pattern becomes elliptically polarized light as shown in FIG. 3C. This is presumably because the polarization state and phase change in the biaxial direction of the pattern direction and its orthogonal direction (pattern repeat direction) due to the structural birefringence of the periodic pattern.
By passing this reflected light through the polarizing plate 38, a component having a polarization direction different from that of the polarizing plate 34 is extracted as shown in FIG.
In order to detect sharply only the change in the polarization state during reflection, it is preferable to set the polarizing plates 34 and 38 in a crossed Nicols state (orthogonal polarization direction).

In order to cause such a change in the polarization state to occur remarkably, it is preferable to set the angles as shown in FIGS. In this case, the angle between the vibration surface of the illumination light and the pattern direction is set to 45 degrees, 135 degrees, 225 degrees, 315 degrees, or close to these angles.
In addition, by tilting the repeating direction of the repeated pattern of the wafer with respect to the incident surface of the illumination light in this way, there is also an effect that the diffracted light by the repeated pattern becomes difficult to enter the light receiving optical path.

Step S3: The microprocessor 15 compensates for the decrease in the amount of light due to the polarizing plates 34 and 38, so that exposure suitable for the polarization observation state (imaging sensitivity and exposure time of the imaging unit 39, aperture value of the imaging lens 37, ND filter Set).

Step S4: The microprocessor 15 controls the imaging unit 39 to generate image data Ip in the polarization observation state.

Step S5: The microprocessor 15 reads out the determination condition Cp as shown in FIG. 5A from the memory 15b. The microprocessor 15 determines the signal level Lp of the image data Ip in pixel units or pixel block units in accordance with the determination condition Cp. Prior to the determination, it is preferable to improve the S / N of the signal level Ip in advance by locally smoothing the image data Ip.

Step S6: If there is a defect determination location in the determination in step S5, the microprocessor 15 proceeds to step S13.
On the other hand, if there is no failure determination location, the microprocessor 15 proceeds to step S7.

Step S7: The microprocessor 15 controls the drive motor 40 to retract the polarizing plate 34 from the illumination optical path. Similarly, the microprocessor 15 controls the drive motor 41 to retract the polarizing plate 38 from the light receiving optical path. Hereinafter, this state is referred to as an open observation state.
Note that a state where only one of the polarizing plates 34 and 38 is retracted may be an open observation state.

Step S8: The microprocessor 15 corrects the overexposure associated with the retracting of the polarizing plates 34 and 38, so that the exposure suitable for the open observation state (imaging sensitivity and exposure time of the imaging unit 39, aperture value of the imaging lens 37, ND filter presence / absence).

Step S9: The microprocessor 15 controls the imaging unit 39 to generate image data Io in the open observation state.

Step S10: The microprocessor 15 reads out the determination condition Co as shown in FIG. 5B from the memory 15b. The microprocessor 15 determines the signal level Lo of the image data Io in pixel units or pixel block units in accordance with the determination condition Co. Prior to the determination, it is preferable to improve the S / N of the signal level Io in advance by locally smoothing the image data Io.

Step S11: If there is a defect determination location in the determination in step S10, the microprocessor 15 proceeds to step S13.
On the other hand, if there is no failure determination location, the microprocessor 15 proceeds to step S12.

Step S12: Since no defect determination part is detected in both step S6 and step S11, the microprocessor 15 determines that the semiconductor wafer 20 (resist pattern) is a non-defective product. In this case, the semiconductor wafer 20 is transported to a manufacturing process (ion implantation or the like) using a resist pattern through a transport system (not shown).

Step S13: Since a defect determination location is detected in one of Step S6 and Step S11, the microprocessor 15 determines that the semiconductor wafer 20 (resist pattern) is a defective product. In this case, the semiconductor wafer 20 is transferred to a resist pattern re-forming step (step of peeling and re-forming the resist pattern) via a transfer system (not shown).

<< Description of judgment condition learning operation >>
FIG. 6 is a flowchart of an operation mode for learning the determination conditions Cp and Co by the surface inspection apparatus 10. Hereinafter, this operation mode will be described along the step numbers shown in FIG.

Step S21: For learning the determination conditions Cp and Co, as shown in FIGS. 7A and 7B, for each exposure range of the resist pattern, a test substrate in which the focus position and the exposure amount are shifted by a predetermined step size. 20a is created in advance.
When learning the determination conditions, the test board 20a is transported by a transport system (not shown) and is attracted to the stage 11.

Steps S22 to S25: The same processing as steps S1 to S4.

Step S26: The image data Ip is displayed on the monitor screen of the condition learning unit 15a. While viewing the image data Ip, the user inputs information regarding whether each of the test board 20a is good or defective into the condition learning unit 15a.
These pieces of information are information in which the pass / fail classification is determined in advance by observing the surface level difference of the test substrate 20a with an electron microscope or the like.

Step S27: The microprocessor 15 compares the image data Ip with the information on the non-defective product / defective product, thereby obtaining the allowable lower limit of the signal level Lp corresponding to the non-defective product range. The microprocessor 15 determines a determination condition Cp as shown in FIG. 5A based on the allowable lower limit of the signal level Lp. The microprocessor 15 stores the determined determination condition Cp in the memory 15b.

Steps S28 to S30: The same processing as steps S7 to S9.

Step S31: The microprocessor 15 obtains the upper and lower limits of the signal level Lo corresponding to the non-defective product range by comparing the image data Io with the information on the good product / defective product. The microprocessor 15 determines a determination condition Co as shown in FIG. 5B based on the upper and lower limits of the signal level Lo. The microprocessor 15 stores the determined determination condition Co in the memory 15b.

<< Effects of this embodiment >>
In the polarization observation state described above, the better the line linearity of the surface step of the test substrate, the stronger the effect of structural birefringence and the higher the signal level Lp. Therefore, if the determination condition Cp for determining that the signal level Lp is equal to or higher than the predetermined allowable lower limit is determined, it is possible to quickly determine that the test substrate exhibiting line linearity with an acceptable surface step is determined to be good.

  In the case of a resist pattern, this line linearity changes greatly depending on the focus position during resist exposure. That is, the line linearity is the best in the just focus state, and the signal level Lp shows the maximum value. On the other hand, the line linearity of the resist pattern is disturbed as the focus is lost, and the signal level Lp is lowered accordingly. Therefore, by determining the signal level Lp according to the determination condition Cp, it is possible to quickly determine that the test substrate in an acceptable focus state is a non-defective product.

  On the other hand, in the open observation state, the light image reflected by the convex surface portion, the concave surface portion or the intermediate side wall portion of the test substrate is observed. In this case, the brightness of the optical image changes in accordance with the area ratio of the uneven surface, the level difference of the step, or the reflectance difference. Therefore, if the signal range of the signal level Lo corresponding to the non-defective range is determined as the determination condition Co, a test substrate having a normal surface level difference (for example, volume ratio) can be quickly determined as non-defective.

  In the case of a resist pattern, the quantitative state of the surface step varies greatly depending on the exposure amount during resist exposure. Therefore, by determining the signal level Lo according to the determination condition Co, it becomes possible to quickly determine that the test substrate having the appropriate exposure amount is a non-defective product.

  Furthermore, in this embodiment, when a defect is determined in either the polarization observation state or the open observation state, the test substrate is determined as a defective product. In this case, it is possible to perform quick and strict quality determination from the viewpoints of both the line linearity of the surface step of the test substrate and the quantitative state of the surface step.

  In addition, since the conditions for non-defective products change each time the type of the test substrate changes, the determination conditions need to be changed frequently. However, the surface inspection apparatus 10 can quickly determine the determination conditions Cp and Co for each substrate to be tested simply by giving the test substrate 20a and its pass / fail information. Therefore, particularly convenient surface inspection apparatus 10 can be realized in manufacturing a small number of semiconductors.

<< Additional items of embodiment >>
In the above-described embodiment, the operation of simply distinguishing the test substrate as a non-defective product or a defective product has been described. However, the embodiment is not limited to this. In the surface inspection apparatus 10, it is possible to perform pass / fail judgment of the substrate to be tested by dividing the line linearity of the surface step (such as focus) and the quantitative state of the uneven pattern of the surface step (such as exposure amount). As a result, it is possible to distinguish non-defective / defective products of the test substrate according to the cause of the failure.

  In the above-described embodiment, the surface inspection apparatus 10 may be incorporated as a part of a semiconductor manufacturing system or an exposure apparatus system. In this case, the surface inspection apparatus 10 preferably feeds back the cause of the resist pattern defect to the exposure apparatus. On the exposure apparatus side, the setting of the cause of the defect (focus and / or exposure amount) can be corrected and changed in the next resist exposure. As a result, it is possible to prevent the continuous generation of defective products in the semiconductor manufacturing system and the exposure apparatus system.

  In the above-described embodiment, the determination conditions Cp and Co are learned at a time using one test board 20a. However, the embodiment is not limited to this. For example, a plurality of test substrates with the focus and exposure amount being changed by a predetermined step size may be prepared, and the determination conditions Cp and Co may be learned while replacing these test substrates.

  In the above-described embodiment, the quality determination is performed on the surface step of the resist pattern. However, the embodiment is not limited to this. In general, it is possible to determine whether or not the test substrate has a periodic surface step having a periodicity. For example, it is possible to determine whether or not the surface level difference due to etching is good.

  As described above, the present invention is a technique that can be used for a surface inspection apparatus, an exposure apparatus system, and the like.

1 is a diagram illustrating a configuration of a surface inspection apparatus 10. 4 is a flowchart showing a quality determination process for a semiconductor wafer 20. It is a figure explaining the optical action in a polarization observation state. 3 is a diagram illustrating an example of an arrangement angle of a semiconductor wafer 20. FIG. It is a figure explaining judgment conditions Cp and Co. It is a flowchart which shows learning operation of determination conditions Cp and Co. It is a figure which shows the learning operation | movement of the determination conditions using the test board | substrate 20a.

Explanation of symbols

DESCRIPTION OF SYMBOLS 10 ... Surface inspection apparatus, 11 ... Stage, 12 ... Alignment system, 15 ... Microprocessor, 15a ... Condition learning part, 15b ... Memory, 16 ... Stage drive mechanism, 20 ... Semiconductor wafer, 20a ... Test substrate, 31 ... Light source, 34 ... Polarizing plate, 35 ... Illumination optical system, 36 ... Light receiving optical system, 37 ... Imaging lens, 38 ... Polarizing plate, 39 ... Imaging unit, 40 ... Drive motor, 41 ... Drive motor

Claims (4)

An illumination unit for irradiating the test substrate with illumination light; and
A light receiving unit that images light generated in the regular reflection direction from the test substrate by irradiation of the illumination light, photoelectrically converts the formed image, and generates a light intensity signal;
A first polarizing element provided in an optical path between the illumination section and the test substrate;
A setting unit that sets the periodic pattern of the surface shape of the test substrate in an oblique direction with respect to the vibration surface of the illumination light that has passed through the first polarizing element;
A second polarizing element provided in an optical path between the test substrate and the light receiving unit, and having a polarization direction different from that of the first polarizing element;
The first signal level of the light intensity signal is detected in a polarization observation state in which the first polarizing element and the second polarizing element are arranged in the optical path, and at least one of the first polarizing element and the second polarizing element is set in the optical path. A control unit for detecting a second signal level of the light intensity signal in an open observation state removed from
A condition storage unit that stores a first condition, which is a pass / fail judgment condition based on the first signal level, and a second condition, which is a pass / fail judgment condition based on the second signal level;
A first determination unit configured to perform pass / fail determination based on the first signal level based on the first condition;
A surface inspection apparatus comprising: a second determination unit configured to perform pass / fail determination based on the second signal level based on the second condition. The surface inspection apparatus according to claim 1,
A surface inspection apparatus comprising: a non-defective product determining unit that determines that the test substrate is a defective product when any of the first determining unit and the second determining unit determines that the test substrate is defective. In the surface inspection apparatus according to claim 1 or 2,
The controller is
The non-defective product / defective product information input is received for the test substrate for which the non-defective product / defective product is known in advance, and the first signal level and the second signal level detected for the test substrate are input. A surface inspection apparatus comprising an operation mode in which the first condition and the second condition are generated in a learning manner by sorting according to defective product information. In the surface inspection apparatus according to claim 1 to claim 3,
The test substrate has a resist pattern formed on the surface through a photolithography process,
The first determination unit determines whether or not a focus is good when exposing the resist pattern from the first signal level,
The surface inspection apparatus according to claim 2, wherein the second determination unit determines whether or not an exposure amount when the resist pattern is exposed is determined based on the second signal level.

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