JP2007294928A5 - - Google Patents

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Publication number
JP2007294928A5
JP2007294928A5 JP2007083487A JP2007083487A JP2007294928A5 JP 2007294928 A5 JP2007294928 A5 JP 2007294928A5 JP 2007083487 A JP2007083487 A JP 2007083487A JP 2007083487 A JP2007083487 A JP 2007083487A JP 2007294928 A5 JP2007294928 A5 JP 2007294928A5
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JP
Japan
Prior art keywords
region
impurity region
memory elements
impurity
electrically connected
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Application number
JP2007083487A
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English (en)
Japanese (ja)
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JP5238178B2 (ja
JP2007294928A (ja
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Priority to JP2007083487A priority Critical patent/JP5238178B2/ja
Priority claimed from JP2007083487A external-priority patent/JP5238178B2/ja
Publication of JP2007294928A publication Critical patent/JP2007294928A/ja
Publication of JP2007294928A5 publication Critical patent/JP2007294928A5/ja
Application granted granted Critical
Publication of JP5238178B2 publication Critical patent/JP5238178B2/ja
Expired - Fee Related legal-status Critical Current
Anticipated expiration legal-status Critical

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JP2007083487A 2006-03-31 2007-03-28 半導体装置 Expired - Fee Related JP5238178B2 (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2007083487A JP5238178B2 (ja) 2006-03-31 2007-03-28 半導体装置

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
JP2006101265 2006-03-31
JP2006101265 2006-03-31
JP2007083487A JP5238178B2 (ja) 2006-03-31 2007-03-28 半導体装置

Publications (3)

Publication Number Publication Date
JP2007294928A JP2007294928A (ja) 2007-11-08
JP2007294928A5 true JP2007294928A5 (fr) 2010-03-18
JP5238178B2 JP5238178B2 (ja) 2013-07-17

Family

ID=38765178

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2007083487A Expired - Fee Related JP5238178B2 (ja) 2006-03-31 2007-03-28 半導体装置

Country Status (1)

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JP (1) JP5238178B2 (fr)

Families Citing this family (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2011108050A1 (fr) * 2010-03-02 2011-09-09 シャープ株式会社 Substrat de transistor à couches minces et son procédé de fabrication
JP5790214B2 (ja) * 2010-09-09 2015-10-07 株式会社デンソー 横型の絶縁ゲート型バイポーラトランジスタ
TWI602303B (zh) * 2011-01-26 2017-10-11 半導體能源研究所股份有限公司 半導體裝置及其製造方法
US10141322B2 (en) * 2013-12-17 2018-11-27 Intel Corporation Metal floating gate composite 3D NAND memory devices and associated methods
KR102118440B1 (ko) * 2018-09-05 2020-06-03 고려대학교 산학협력단 휘발성 및 비휘발성 동작변환 가능한 피드백 전계효과 배열소자 및 이를 이용한 배열 회로
JP7405027B2 (ja) * 2020-07-07 2023-12-26 豊田合成株式会社 半導体装置とその製造方法

Family Cites Families (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP3018085B2 (ja) * 1990-05-16 2000-03-13 セイコーインスツルメンツ株式会社 半導体不揮発性メモリ
US5241507A (en) * 1991-05-03 1993-08-31 Hyundai Electronics America One transistor cell flash memory assay with over-erase protection
JPH06168597A (ja) * 1992-03-19 1994-06-14 Fujitsu Ltd フラッシュメモリ及びレベル変換回路
JPH05275658A (ja) * 1992-03-30 1993-10-22 Toshiba Corp 不揮発性半導体記憶装置
JP3959165B2 (ja) * 1997-11-27 2007-08-15 株式会社東芝 不揮発性半導体記憶装置
JP2000174241A (ja) * 1998-12-10 2000-06-23 Toshiba Corp 不揮発性半導体記憶装置
JP4531194B2 (ja) * 1999-04-15 2010-08-25 株式会社半導体エネルギー研究所 電気光学装置及び電子機器

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