JP2007281044A - Solar battery - Google Patents

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Publication number
JP2007281044A
JP2007281044A JP2006102642A JP2006102642A JP2007281044A JP 2007281044 A JP2007281044 A JP 2007281044A JP 2006102642 A JP2006102642 A JP 2006102642A JP 2006102642 A JP2006102642 A JP 2006102642A JP 2007281044 A JP2007281044 A JP 2007281044A
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Prior art keywords
solar cell
substrate
layer
electrode
bus bar
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JP2006102642A
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Japanese (ja)
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Tsutomu Murakami
勉 村上
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Canon Inc
キヤノン株式会社
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    • HELECTRICITY
    • H01BASIC ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H01L31/00Semiconductor devices sensitive to infra-red radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus peculiar to the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/02Details
    • H01L31/0224Electrodes
    • H01L31/022408Electrodes for devices characterised by at least one potential jump barrier or surface barrier
    • H01L31/022425Electrodes for devices characterised by at least one potential jump barrier or surface barrier for solar cells
    • H01L31/022441Electrode arrangements specially adapted for back-contact solar cells
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02EREDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
    • Y02E10/00Energy generation through renewable energy sources
    • Y02E10/50Photovoltaic [PV] energy
    • Y02E10/54Material technologies
    • Y02E10/547Monocrystalline silicon PV cells

Abstract

Provided is a back contact solar cell capable of improving carrier collection efficiency in a bus bar portion and improving photoelectric conversion efficiency.
A plurality of current collecting positive electrodes and a plurality of negative electrodes are formed on the back surface of a crystalline semiconductor substrate, and each of them is commonly connected by bus bars, and further outside the bus bars. The auxiliary electrodes 5 and 8 having opposite polarities are formed and connected to the collecting electrodes 7 and 9 having the same polarity.
[Selection] Figure 1

Description

  The present invention relates to a back contact solar cell in which a collecting electrode is disposed on the back surface.

  As a technique for dramatically improving the photoelectric conversion efficiency, a back contact solar cell has attracted attention. In a normal solar cell, a current collecting electrode is formed on the light incident surface, so that the current collecting electrode portion becomes a non-power generating portion, which causes a reduction in conversion efficiency. The back contact solar cell has a structure in which shadow loss is eliminated by disposing a collecting electrode on the back surface. Further, since the collecting electrode is on the back surface, a pn junction is formed on the back surface.

  In addition, in an ordinary solar cell, when an antireflection texture is provided on the surface, it is difficult to form a good pn junction due to the unevenness, or the surface electrode cannot be covered with the unevenness and is disconnected. There's a problem. However, in the back contact solar cell, the pn junction and the electrode are disposed on the flat substrate back surface, and thus the above problem does not occur. Further, since both the plus electrode and the minus electrode are on the back surface, it is not necessary to turn the front electrode on the back side for serialization as in the prior art, and the structure becomes simple. And since there is no surface electrode, the designability improves, and the designability preferable for installing on the roof of a house is obtained.

For example, in Patent Document 1, a p + layer and an n + layer are formed on the back side to form a pn junction with a substrate, and a positive side electrode and a negative side electrode for extracting current are a p + layer and an n + layer. A back contact type solar cell formed in an overlapping manner is disclosed. Minority carriers generated by light recombine and disappear when the moving distance exceeds the diffusion length, and cannot be taken out effectively. Further, since the short-circuit current value decreases, it is desirable that the movement distance of minority carriers is not more than the diffusion length.

  In the structure of taking out the current to the outside, in the case of a large area cell solar cell such as a non-condensing type, if an insulating material or the like is provided so that the lead frame covering the entire surface or the electrodes are not short-circuited, the cost becomes high. Therefore, a bus bar is provided in order to extract current into the collecting portion of the plurality of collecting electrodes and serialize it. The bus bar is generally arranged at the end of the substrate on the same plane as the current collecting electrode, for example, as a shape formed wider than the current collecting electrode.

JP 2003-298078 A

  However, the bus bar disclosed in Patent Document 1 is disposed at the end of the solar battery cell, and there is no current collecting electrode of reverse polarity on one side. For this reason, the minority carriers generated in the upper part of the bus bar have a long diffusion distance to the opposite polarity electrode, so that the collection efficiency is not sufficient, and the bus bar part is substantially an invalid area that is not effectively used for photoelectric conversion. It was.

  An object of the present invention is to provide a back contact solar cell capable of improving the carrier collection efficiency in the bus bar portion and improving the photoelectric conversion efficiency.

The solar cell of the present invention includes a crystalline semiconductor substrate, a plurality of current collecting electrodes respectively disposed in regions of different polarities formed on the back surface of the substrate, and a current that commonly connects the current collecting electrodes of each polarity In a back contact type solar cell provided with a bus bar for taking out,
An auxiliary electrode having a polarity different from that of the bus bar is provided in the vicinity of the bus bar.

The present invention includes the following configuration as a preferred embodiment.
The auxiliary electrode is provided at an end of the substrate.
The distance between the bus bar and the auxiliary electrode is not more than the diffusion length of the semiconductor substrate.
The current collecting electrode is formed in a comb shape.
The auxiliary electrode is connected to the current collecting electrode having the same polarity.
On the light incident side of the substrate, a surface electric field layer having the same conductivity type as the substrate and having a higher impurity concentration than the substrate is provided.
A passivation layer is provided on the back surface of the substrate.
The crystalline semiconductor substrate is formed of polycrystalline or single crystal silicon.

  According to the present invention, by providing an auxiliary electrode having a reverse polarity in the vicinity of the bus bar, carriers generated on the upper portion of the bus bar can be effectively taken out by the auxiliary electrode, and a solar cell with high photoelectric conversion efficiency is provided. The

FIG. 1: shows 1st Embodiment of the solar cell of this invention, (a) is a schematic diagram of the back surface side of a solar cell, (b) is a schematic diagram of the AA 'cross section of (a), (c) ) Is a schematic view of the BB ′ cross section of (a). In FIG. 1, 1 is a surface passivation layer, 2 is a p substrate, 3 is a p + layer, and 4 is an n + layer. Further, 5 is a plus side auxiliary electrode, 6 is a minus side bus bar, 7 is a plus electrode, 8 is a minus side auxiliary electrode, 9 is a minus electrode, and 10 is a plus side bus bar.

The p substrate 2 has the function of absorbing light and generating optical carriers. As a material of the substrate 2, a material known as a solar cell such as silicon or GaAs is preferably used. In particular, silicon is a more preferable material because it can be supplied inexpensively and stably, and a relatively large area such as 15 cm square can be obtained.

  Further, as the crystal quality of the substrate 2, both polycrystal and single crystal can be used. A known method for solidifying the raw material polysilicon is suitably used for the method of manufacturing the substrate 2. For example, in the case of a single crystal, the CZ method or the FZ method is used, and in the case of a polycrystal, a unidirectional solidification method is used to form an ingot.

  The surrounding shape of the ingot is adjusted with a band saw or the like. The ingot is cut into a circular shape in the case of a single crystal and a rectangular shape in the case of a polycrystal. Since the ingot in the case of polycrystal is as large as about 70 cm square, for example, after being divided by a band saw so as to be 15 cm square, it is sliced into a wafer shape with a wire saw or the like. The thickness after slicing is usually about 200 μm to 300 μm, but it is desired to further reduce the thickness in order to improve the carrier collection efficiency and reduce the material cost. However, it cannot be made extremely thin due to process restrictions caused by the problem of cracking when thinned. Accordingly, the thickness that can be stably produced is preferably about 100 μm.

  For the purpose of light confinement after slicing, it is preferable to form a fine texture on the light incident surface side surface. In general, anisotropic etching using alkali is practically used as a texture forming method. However, since the crystal orientation is not constant in a polycrystalline substrate, the anisotropic etching method is not sufficient, and in some cases, the etching is omitted or another method such as RIE is used.

  Characteristic parameters representing the substrate quality important for the solar cell are carrier diffusion length, substrate resistivity, and the like.

  The diffusion length varies depending on the substrate quality, but is about several μm to several thousand μm. In general, the value is small for polycrystals and large for single crystals. As a method for measuring the diffusion length, a known SPV method is preferably used.

  The specific resistance is controlled by doping, and usually about 0.1 to 10 Ω · cm is a preferable value. Although p-type is shown as the conductivity type in FIG. 1, it may be n-type as desired. In this case, the other doped layers have the opposite conductivity type to that of FIG.

The surface passivation layer 1 is a thin film material provided for relaxing surface recombination on the light incident side surface of the p substrate 2 and preventing reflection. As a material for the surface passivation layer 1, a SiO 2 film or a SiN film is preferably used. In general, SiO 2 film is known as a good material for surface passivation of single crystal silicon. On the other hand, SiN film is known as a good material for surface passivation of polycrystalline silicon. Furthermore, it is known that the effect of passivation differs depending on the manufacturing method. Therefore, it is preferable to select and use the material and manufacturing method of the surface passivation layer 1 according to the substrate material. As a method for forming the SiO 2 film, it is suitably formed by using a known thermal oxidation method. The SiN film is formed using a CVD method. When the SiN film is formed to serve as both the passivation layer and the antireflection layer, the SiN film may be formed by a CVD method and then subjected to heat treatment for passivation. The reason why the heat treatment is performed is explained that the hydrogen atoms in the SiN film liberated by heat have the effect of reducing defects such as the substrate surface and bulk grain boundaries.

The thickness of the surface passivation layer 1 is preferably about 10 nm to 100 nm. The preferred thickness when serving also as the antireflection layer should be a suitable value derived from the optical design that minimizes the light reflectance obtained from the wavelength of light, the refractive index of the semiconductor substrate, and the refractive index of the thin film material. preferable. As such a thickness, for example, when designing to minimize the reflectance with respect to a wavelength of 550 nm, the thickness is about 100 nm. In addition, a SiN film may be formed as an antireflection layer after passivation with the SiO 2 film.

The p + layer 3 is a layer for satisfactorily ohmic-bonding the p substrate 2 and the plus electrode 7. As a method for producing the p + layer 3, a method is known in which an aluminum paste is applied by a screen printing method and dried, followed by baking at about 800 ° C. This method can be suitably used in the present invention, p - p + layer 3 is formed in the substrate 2. In particular, in the present invention, since the p + layer 3 and the n + layer 4 have a comb shape or a dot shape, it is preferable in production to use a screen printing method.

The n + layer 4 is a layer for generating a photovoltaic force by forming a semiconductor junction with the p substrate 2. As a method for producing the n + layer 4, for example, a known method in which POCl 3 or P 2 O 5 is vaporized and thermally diffused as a gas containing phosphorus is preferably used. In this case, in order to obtain a desired pattern such as a comb shape, a mask pattern in which an opening is provided in an SiO 2 film or the like is required. As a method not using a mask, a medicine containing phosphorus may be applied in a paste form by a screen printing method or an ink jet method, and each method is appropriately selected according to desired printing accuracy and characteristics.

By arranging the p + layer 3 and the n + layer 4 so as to be adjacent to each other, the carrier collection efficiency is improved. That is, good characteristics can be obtained by setting the horizontal distance between the p + layer 3 and the n + layer 4 to be equal to or less than the diffusion length of the substrate 2. This is because when minority carriers (electrons) generated in the upper part of the p + layer 3 move to the n + layer 4, if the moving distance is equal to or shorter than the diffusion length, the carriers are not lost and can be effectively extracted. For example, it is preferable to arrange the p + layer 3 and the n + layer 4 adjacent to each other by an elongated pattern or a dot pattern. In the case of an elongated pattern, it is preferable that the comb-like patterns composed of the p + layer 3 and the n + layer 4 are arranged so as to face each other.

FIG. 2 is an explanatory diagram showing a simulation result of the relationship between the electrode pitch and the efficiency when the p + layer 3 and the n + layer 4 having an elongated comb-like pattern are formed. The simulation was performed using commercially available device simulation software. From the results shown in FIG. 2, it can be seen that the conversion efficiency improves as the electrode pitch (that is, the pitch of the p + layer and the n + layer) is smaller.

  The plus electrode 7 and the minus electrode 9 are formed as current collecting electrodes in order to take out the current of the solar battery cell. Carrier collection efficiency improves as the electrode width and distance between the collector electrodes are smaller. However, microfabrication is required as a manufacturing process to reduce the width and distance. For example, processing of several μm to several tens of μm is possible by using a photolithography technique. However, the use of a photolithography technique is not practical because it requires a photomask, increases costs due to an increase in processes such as exposure, development, and mask removal, resulting in poor throughput. At the mass production level, a screen printing method with low cost and good throughput is used. That is, as a method for forming the collector electrode, an aluminum paste or a silver paste is applied by screen printing, dried, and fired to form a good electrode having a small specific resistance. The widths of the plus electrode 7 and the minus electrode 9 are determined by the practical printing accuracy of screen printing and the diffusion length of the semiconductor substrate 2, and are preferably about 0.1 mm to 2 mm. Also, the distance between the electrodes in the arrangement facing each other in a comb-like shape (the distance between the plus electrode and the minus electrode) is preferably about 0.1 mm to about 2 mm as described above.

As the aluminum paste or silver paste, a firing type paste known for solar cells to which glass frit is added is suitably used. Further, when aluminum paste is used to form the p + layer 3, the plus electrode 7 is formed at the same time, so that the process is simplified.

  The bus bar 6 is used to collect the negative electrodes 9 and collect current in one place. Accordingly, the polarity of the bus bar 6 is negative. The bus bar 6 needs to be formed wide to avoid an increase in current density, and a width of about 2 mm to 5 mm is usually good.

The auxiliary electrode 5 is formed adjacent to the bus bar 6 and has a polarity opposite to that of the bus bar 6. A corresponding impurity doped layer (p + layer in FIG. 1) is formed on the upper portion. The auxiliary electrode 5 is preferably provided at the extreme end of the semiconductor substrate 2. The reason is as follows.

  In general, the characteristics of the substrate 2 have an in-plane distribution, but the characteristics tend to deteriorate at the edges. This is because impurities from the crucible are easily taken into the substrate end when the ingot is formed, and damage is easily left on the substrate end that becomes a cut surface when a large ingot is divided. For these reasons, the carrier collection efficiency at the edge of the substrate is generally poor. Although the distance from the end of the portion where the characteristics are deteriorated varies depending on the manufacturing method, it is considered to be several hundred μm to several mm.

  Since the substrate characteristics are low at the substrate edge, it is difficult to collect carriers generated near the surface on the light incident side up to the back surface of the substrate. However, since the collection distance is short with respect to the collection of the carrier generated at the upper part of the adjacent bus bar portion and diffused to the vicinity of the back surface, the auxiliary electrode 5 can be used for carrier collection. Therefore, even when the characteristics of the endmost portion of the substrate 2 are low and cannot be used as a carrier generation layer, the auxiliary electrode 5 is disposed at the endmost portion of the substrate 2 because it can be used for collecting carriers of adjacent bus bars. Is desirable. Needless to say, if the characteristics at the extreme end of the substrate 2 are good, the portion of the auxiliary electrode 5 can also use the generation of carriers by light.

  FIG. 7 shows a conventional back contact solar cell without an auxiliary electrode, where (a) is a schematic diagram of the back side of the solar cell, and (b) is a schematic diagram of a C-C ′ cross section of (a). FIG. 8 is a schematic diagram showing carrier generation and collection in the vicinity of the bus bar of FIG. 7 and 8, the same members as those in FIG. 1 are denoted by the same reference numerals.

As shown in FIG. 7, one side of the bus bar 6 is an end of the substrate. As shown in FIG. 8, minority carriers (electrons) generated in the upper portion of the bus bar 6 need to move to the distant p + layer 3. However, if this moving distance is longer than the diffusion length of the substrate, it will be recombined and disappear, making it difficult to take out. As described above, the width of the bus bar 6 is about 2 mm to 5 mm. However, since the diffusion length is about 1 mm even in high-quality single crystal silicon, it is understood that it is difficult to take out the carrier generated at the end of the bus bar 6 (side facing the end of the substrate).

  FIG. 3 is a schematic diagram showing how carriers are generated and collected in the solar cell of the present invention. As shown in the figure, the carrier generated at the upper end of the bus bar 6 can be effectively taken out by diffusing to the auxiliary electrode 5. The width of the auxiliary electrode 5 itself can be made as thin as about 0.1 mm in the case of a screen printing method as with the collecting electrode. Therefore, there is no problem with the extraction of the carrier generated at the upper part of the auxiliary electrode 5. In addition, since the auxiliary electrode 5 has a current value larger than that of the current collecting electrode and has a longer current collecting distance, the auxiliary electrode 5 may be wider than the current collecting electrode or thickened using an electrode material or solder. Also good.

  Next, the manufacturing process of the solar cell of the first embodiment shown in FIG. 1 will be described with a specific example. First, a polycrystalline silicon wafer substrate 2 having a thickness of 200 μm and a size of 15 cm square is prepared. The specific resistance of the substrate 2 is 0.5 Ω · cm, and the conductivity type is p-type. Next, the substrate 2 is immersed in a mixed acid of hydrofluoric acid, nitric acid and acetic acid for several minutes to remove saw damage, and subsequently immersed in a 20% sodium hydroxide solution at 80 ° C. for 30 minutes to perform alkali etching and texture treatment. I do.

In addition, the SiN film 1 having both passivation and antireflection functions is formed on the light incident surface side by the CVD method. A film is formed by a known plasma CVD apparatus using SiH 4 gas and NH 3 gas as source gases for the CVD method. The film thickness of the SiN film 1 is set to 100 nm in order to minimize the reflectance in light having a wavelength of 550 nm.

Further, a p + layer is formed on one side of the substrate 2 by screen printing as follows. That is, a printing pattern of the p + layer 3 is prepared and aluminum paste is printed. The pattern is a rectangular shape with a width of 1 mm and a length of 140 mm and formed in parallel at intervals of 1.4 mm, and a horizontal line pattern with a width of 4 mm corresponding to the bus bar 6 perpendicular to the vertical line pattern, This is a horizontal line pattern corresponding to the auxiliary electrode 5.

Then, drying and baking are continuously performed using a conveyor type IR baking furnace. The drying temperature is 120 ° C., and the firing temperature is 800 ° C. After firing, aluminum diffuses into the substrate 2 to form a p + layer pattern 3. Electrodes such as the plus electrode 7, the auxiliary electrode 8, and the bus bar 10 are formed simultaneously by the aluminum remaining without being diffused.

Thereafter, a paste-like diffusing agent containing phosphorus is printed by a printing method, followed by drying and diffusing to form an n + layer pattern. shape of the pattern of the n + layer is similar to the p + layer and the bus bar 6 width 1mm corresponding to the auxiliary electrode 8, and parallel to the comb-shaped vertical line pattern in 1.4mm pitch as the shape of length 140mm . A space of 0.2 mm is opened between the p + layer pattern and the n + layer pattern.

  Next, the silver paste is printed by screen printing and dried, and then fired at 800 ° C. using an IR firing furnace to simultaneously form the negative electrode 9, the auxiliary electrode 5, and the bus bar 6. As described above, the solar cell of the first embodiment is manufactured.

  As described above, according to the solar cell of the first embodiment, the auxiliary electrode 5 is disposed adjacent to the bus bar 6 for extracting current, and the adjacent bus bar 6 and the auxiliary electrode 5 have different polarities. Yes. Further, the distance between the bus bar 6 and the auxiliary electrode 5 is set to be equal to or less than the diffusion length of the semiconductor substrate 2. Further, the auxiliary electrode 5 is connected to the current collecting electrode 7. Therefore, with these configurations, carriers generated on the upper portion of the bus bar 6 can be effectively taken out by the auxiliary electrode 5, and the photoelectric conversion efficiency of the solar cell can be improved.

  Further, by forming the current collecting electrode in a comb shape, the generated carrier can be taken out effectively and transported to the bus bar 6. Further, by providing the auxiliary electrode 5 at the extreme end of the substrate 2, even when the characteristic of the extreme end of the substrate 2 is low, it can be effectively used as a carrier collection region. Therefore, the collection efficiency of the generated carriers is increased by these configurations, and the photoelectric conversion efficiency of the solar cell can be improved.

  In addition, when the crystalline semiconductor substrate is formed using polycrystalline or single crystal silicon, a solar cell having favorable characteristics and being inexpensive can be provided.

FIG. 4 is a schematic view showing a second embodiment of the solar cell of the present invention. In FIG. 4, 1 is a surface passivation layer, 2 is a p substrate, 3 is a p + layer, and 4 is an n + layer. Further, 5 is an auxiliary electrode, 6 is a bus bar, 7 is a plus electrode, 41 is a surface electric field layer (front surface field layer), and 42 is a back surface passivation layer.

  The second embodiment is a configuration example in which a back surface passivation layer 42 and a front surface electric field layer 41 are provided, and each layer is formed by appropriately selecting as desired. The functions of the back surface passivation layer 42 and the front surface electric field layer 41 will be described below.

On the back surface of the p substrate 2, a back surface passivation layer 42 is provided. The function of the back surface passivation layer 42 is to reduce the surface recombination rate by covering the back surface of the p substrate 2 and the back surfaces of the p + layer 3 and the n + layer 4. Further, by reducing the contact area between the auxiliary electrode 5, the bus bar 6, the plus electrode 7 and the p + layer 3, and the minus electrode (not shown) and the n + layer 4, the surface recombination speed can be further reduced.

The auxiliary electrode 5, the bus bar 6, the positive electrode 7, and the negative electrode (not shown) are in contact with the p + layer 3 or the n + layer 4 through an opening provided in the back surface passivation layer 42. That is, it is formed for the purpose of minimizing the disappearance of carriers due to direct contact between the bus bar 6 and the plus electrode 7 and the p + layer 3 or the n + layer 4. As the material and manufacturing method of the back surface passivation layer 42, the same material and manufacturing method as those of the front surface passivation layer 1 are used. After the back surface passivation layer 42 is formed, an electrode contact opening is formed by etching at a predetermined position. In this case, the opening may be formed in a dot shape instead of a comb tooth shape. Although the effect of passivation is further increased when the opening area is small, the contact resistance is increased. Therefore, it is only necessary to select and use an opening area that balances the interaction and has an optimum characteristic.

On the surface of the substrate 2, a surface electric field layer 41 made of a p + layer having the same conductivity type as the substrate 2 and a high impurity concentration is provided. By providing the surface electric field layer 41, a barrier is formed on the conduction band side of the energy band of the p substrate 2 and minority carrier electrons are diffused to the back side without recombination. Thus, the surface electric field layer 41 is a layer that prevents recombination of minority carriers generated on the light incident side and reaches the back electrode, and this surface electric field layer 41 is called a front surface field.

  Next, the manufacturing process of the solar cell of the second embodiment shown in FIG. 4 will be described with a specific example. The solar cell of the second embodiment is manufactured in substantially the same manner as the manufacturing process of the solar cell of the first embodiment, except for the matters described below.

First, the substrate 2 is subjected to mixed acid treatment and alkali treatment, and then the surface passivation layer 41 is formed. Thereafter, the substrate 2 is heated while N 2 gas containing BBr 3 is passed through the diffusion furnace to form the p-type surface electric field layer 41. Then, the rear surface is etched to remove the p + layer 3.

Further, an aluminum paste is printed on the back surface of the substrate 2 by a screen printing method to form a comb-shaped pattern of the p + layer 3 and then dried and fired. Further, a paste-like diffusing agent containing phosphorus is printed by a screen printing method to form a pattern of the n + layer 4 and then dried and fired.

  Then, the back surface passivation layer 42 is formed in the same manner as the method for forming the front surface passivation layer 41. Next, in order to provide an opening in the back surface passivation layer 42, a paste for SiN etching is screen-printed according to the opening pattern and heated and washed. In this step, an opening is formed in the back surface passivation layer 42 as shown in FIG. Thereafter, an electrode pattern of aluminum paste and silver paste is printed and fired to form a positive electrode 7, a negative electrode (not shown), an auxiliary electrode 5, and a bus bar 6. As described above, the solar cell of the second embodiment is manufactured.

  As described above, the solar cell according to the second embodiment has basically the same effects as the solar cell according to the first embodiment. In particular, according to the second embodiment, the surface electric field layer 41 having the same conductivity type as that of the substrate 2 and having a higher impurity concentration than the substrate 2 is provided on the light incident side of the substrate 2. The carrier can be taken out effectively. In addition, since the passivation layer 42 is provided on the back surface of the substrate 2, recombination of carriers on the back surface can be prevented. Therefore, with these configurations, the carrier collection efficiency increases, and the photoelectric conversion efficiency of the solar cell can be improved.

  Next, a structure in which a plurality of solar cells according to the first and second embodiments are connected in series or in parallel will be described. FIG. 5 is a schematic view showing a method of taking out terminals for arranging a plurality of solar cells of the present invention in series. As shown in FIG. 5, a metal connection terminal 51 such as a silver-plated copper foil is joined to the end portion of the minus side bus bar 6 of one solar cell by soldering or the like and pulled out to the outside. Then, the solar cells can be serialized by soldering the connection terminal 51 to the end portion of the plus-side bus bar 10 of the other solar cell adjacent thereto. By adopting such a connection structure, the back contact solar cells can be connected in series or in parallel without connecting the terminals for connection from the front to the back.

  Examples of the solar cell of the present invention will be described in detail below, but the present invention is not limited to these examples.

  In this example, using a commercially available two-dimensional device simulation software ATLAS, the difference in characteristics between the solar cell of the present invention and a conventional solar cell was verified by simulation.

  FIG. 6 shows a model used for the simulation, where (a) shows the configuration of the present invention and (b) shows the conventional configuration. The solar cell of the present invention has the same configuration as that of the first embodiment, but is a two-dimensional model, and FIG. 6 is a schematic cross-sectional view of FIG. Only the right side of the figure is modeled. In both the configurations of FIGS. 6A and 6B, a p-type surface electric field layer 41 is formed.

In FIG. 6, the thickness of the substrate 2 is 150 μm, and the length of the n + layer 3 above the bus bar 6 is 25 μm. The width of the auxiliary electrode 5 top of p + layer and 25 [mu] m, the width of the collector electrode (positive electrode) 7 top of the p + layer was 50 [mu] m. Further, as the substrate quality, the lifetime which is an index representing the traveling property of the carrier as well as the diffusion length is set to 100 μsec. This lifetime is generally about 10 μsec for polycrystals and generally about 1 msec for single crystals.

  In the above configuration, the photoelectric conversion efficiency of the configuration in which the auxiliary electrode 5 in FIG. 6A exists and the photoelectric conversion efficiency in the configuration in which the auxiliary electrode 5 of FIG. 6B does not exist are compared. In the case where the auxiliary electrode 5 is present, it has been found that the conversion efficiency is improved by 0.3% by increasing the short-circuit current value as compared with the conventional solar cell in which the auxiliary electrode 5 is not present.

It is a schematic diagram of the first embodiment of the solar cell of the present invention. It is explanatory drawing which shows the simulation result of the relationship between the electrode pitch at the time of forming the p + layer and n + layer of an elongate comb-tooth pattern, and efficiency. It is a schematic diagram which shows the mode of the generation | occurrence | production and collection of the carrier in the solar cell of this invention. It is a schematic diagram which shows 2nd Embodiment of the solar cell of this invention. It is a schematic diagram which shows how to take out the terminal for serializing the solar cell of this invention. It is a schematic diagram which shows the model used for the simulation in the Example of this invention. It is a schematic diagram which shows the conventional back contact solar cell. It is a schematic diagram which shows the carrier generation and collection in the bus-bar vicinity of the conventional solar cell.

Explanation of symbols

1 Surface passivation layer
2 p - substrate 3 p + layer 4 n + layer 5 plus side auxiliary electrode 6 minus side bus bar 7 plus electrode 8 minus side auxiliary electrode 9 minus electrode 10 plus side bus bar 41 back surface passivation layer 42 surface electric field layer 51 connection terminal

Claims (8)

  1. A crystalline semiconductor substrate, a plurality of current collecting electrodes respectively disposed in regions of different polarities formed on the back surface of the substrate, and a current extraction bus bar that commonly connects the current collecting electrodes of each polarity, In the back contact type solar cell provided,
    A solar cell, wherein an auxiliary electrode having a polarity different from that of the bus bar is provided in the vicinity of the bus bar.
  2.   The solar cell according to claim 1, wherein the auxiliary electrode is provided at an end of the substrate.
  3.   The solar cell according to claim 1 or 2, wherein a distance between the bus bar and the auxiliary electrode is equal to or less than a diffusion length of the semiconductor substrate.
  4.   The solar cell according to claim 1, wherein the current collecting electrode is formed in a comb shape.
  5.   The solar cell according to claim 1, wherein the auxiliary electrode is connected to the collecting electrode having the same polarity.
  6.   6. The solar cell according to claim 1, wherein a surface electric field layer having the same conductivity type as that of the substrate and having a higher impurity concentration than the substrate is provided on the light incident side of the substrate.
  7.   The solar cell according to claim 1, wherein a passivation layer is provided on the back surface of the substrate.
  8.   The solar cell according to claim 1, wherein the crystalline semiconductor substrate is made of polycrystalline or single crystal silicon.
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