JP2007251316A - Digital camera - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a digital camera with a high recycle efficiency. <P>SOLUTION: A flowchart associated with image transmission and erasure processing of a first memory includes: a step S21 of executing confirmation of the number of photographed images; a step S22 of transferring image files one by one; a step S23 of repeating the transfer of images by the number of confirmed files as above until the transfer is finished; a step S24 of erasing contents of a second memory storing image data when image transmission is finished and confirmation of normal reception of the image is informed from an external device via an external I/F (Yes in a processing S23); a step S25 of copying a program part for erasing the first memory to a RAM and expanded therein after the erasure of the second memory; and a step S26 wherein a CPU executes the program expanded in the RAM, executes an erasure command of the first memory and erases the contents of the first memory. <P>COPYRIGHT: (C)2007,JPO&INPIT

Description

  The present invention relates to a digital camera, and more particularly to a disposable digital camera with a high recycling rate.

  In a conventional digital camera, for example, as described in Patent Document 1, a photo sensor that detects that the housing has been disassembled is provided inside, and notification that the internal image data has been disassembled when transferred to the image database is provided. However, a proposal has been made to raise the recycling rate by issuing a warning notice when viewing an image. In the embodiment, a business model is proposed in which an image of a digital camera is transferred to an image database and the image can be viewed via the Internet. However, when a pirate who provides a service capable of browsing the decomposed digital camera image without any trouble appears, there is a possibility that a sufficient recycling rate cannot be obtained.

  Japanese Patent Application Laid-Open No. 2004-228561 proposes a technique in which image data encrypted in a digital camera is held, and the demodulating function of the encrypted data is recycled only as a store data demodulator. However, since the encrypted data is held, the amount of data is larger than that of normal image data, and thus it is necessary to take measures such as increasing the capacity of an expensive memory or reducing the number of shots. Also, when the number of images is large, it takes time to transfer data, and when the number of images is large, the user feels stressed. It may also be used illegally for illegal use.

Japanese Patent Application Laid-Open No. 2004-26883 proposes to increase the recycling efficiency by erasing image data if the encryption input from the device to which the digital camera is connected is appropriate. However, there is a possibility that a sufficient recycling rate cannot be obtained due to leakage of encrypted data or illegal analysis. In addition, since the image cannot be erased unless cryptographic input is performed at the factory, etc., the user cannot erase the failed photographed image. Can not receive.
Japanese Patent No. 3605008 JP 2000-196931 A JP 2003-319318 A

  The present invention relates to a recycle digital camera called a so-called disposable camera, and an object of the present invention is to provide a digital camera with high recycle efficiency while solving the problems of the technology. That is, without increasing the volume of image data as in the conventional example, and without having a special function in the store side device, it prevents the pirates from reducing the recycling rate and prevents users from deleting images. The purpose is to provide a digital camera that can increase the recycling rate without doing so.

  In order to achieve the above object, a digital camera according to claim 1 of the present invention includes: a solid-state imaging device that converts reflected light from an object image collected by an optical system including a lens into an electrical signal; An image processing unit that digitizes and processes an image from a solid-state image sensor, a CPU that controls the operation of each device, a first memory that stores a program of the CPU, and a second that stores image data that has undergone image processing A memory, a sending means for sending image data held in the second memory via an external interface, and an erasing means for erasing the contents of the first memory or both the first memory and the second memory after sending the image data With this configuration, after the image is sent out, it will be returned through the store, and it is possible to prevent outflow to others for the purpose of unauthorized use.

  Further, in the digital camera according to claim 2, in the digital camera according to claim 1, the image transmission flag is written in a part of the first memory or the second memory when the image data is transmitted by the transmission means. When the execution of the image transmission is detected by the image transmission flag, the first memory or both the first memory and the second memory are deleted, the execution of the image transmission is detected by the image flag, and the second memory Even if the system of the digital camera is stopped before the first memory is erased after the image transmission by the configuration that can only execute the image transmission when the image remains in Since the main program is erased and does not function, it is possible to prevent leakage to others for the purpose of unauthorized use.

  The digital camera described in claims 5 and 6 is the digital camera according to claims 1 to 4, further comprising writing means for directly writing to the first memory, and the housing is opened. When detecting that the housing has been opened, the memory is replaced with a first memory from which the program has been erased by a configuration for erasing the program held in the first memory. It is possible to write the main program without any trouble, prevent the cost and failure due to replacement, and if the case is opened, the main program can be deleted to avoid illegal reuse including duplication of the main program, etc., and recycling efficiency Can be raised.

  According to the present invention, it is possible to stop the function of the digital camera by erasing the main body program after sending the image to the external device, thereby preventing unauthorized use of the digital camera and increasing the recycling efficiency. Play.

  Hereinafter, embodiments of the present invention will be described in detail with reference to the drawings.

  FIG. 1 is a block diagram showing a schematic configuration of a digital camera according to an embodiment of the present invention. The block diagram shown in FIG. 1 has the same configuration as a general digital camera, and is not a configuration specific to the present invention.

  The configuration of the digital camera will be described below with reference to the block diagram of FIG. Light from the subject enters the image sensor 2 via the optical system 1. The optical system generally includes an imaging lens 1a for adjusting the focal length and angle of view, an aperture / shutter 1b having both an aperture function and a shutter function, and an optical filter 1c for removing infrared light and the like. The imaging lens 1a and the diaphragm / shutter 1b are driven by a mechanical drive circuit 3. Reflected light from the subject is converted into an electrical signal by the image sensor 2 via the optical system 1.

  The timing signal generation circuit 4 (TG) generates a timing signal necessary for operating the image sensor 2, is amplified by the image sensor drive circuit 5 to a level at which the image sensor 2 can be driven, and is supplied to the image sensor 2. The output of the image sensor 2 is input to the pre-processing circuit 6 and is analog processed by a CDS (correlated double sampling) circuit for removing output noise of the image sensor 2 or an AGC circuit for signal amplification, and A / D conversion is performed. Is input to the device 7. A signal digitized by A / D conversion is input to an imaging signal processing circuit 8 having a memory for temporarily storing and an imaging signal processing circuit for processing the signal.

  The signal-processed data is stored in the second memory 10 which is a nonvolatile memory through the medium I / F 9. Generally, as the second memory 10, a NAND flash ROM widely used in an SD memory card (registered trademark) or the like is used.

  These blocks are controlled by the CPU 11 that performs system control. The CPU 11 operates according to an operation program recorded in the first memory 12, and the arithmetic processing and the like use the RAM 13 connected on the bus as a work area. Also, a release switch 15 that is a photographing button for the photographer to control the display for the user's operation assistance, the writing to the display unit 14 indicating the state of the digital camera, and the photographing start of the digital camera is monitored.

  Note that the release switch 15 can generally be operated in two steps: a first stroke SW1 for executing an AF (Auto-Focus) operation for focusing on a subject and a second stroke SW2 for performing main photographing. A state where the release switch 15 is pressed halfway until the first stroke SW1 is pressed is half-pressed, and a state where the release switch 15 is fully pressed until the second stroke SW2 is pressed is called full press.

  The power block 16 is a block that supplies power to all the blocks. When a power switch (not shown) is turned on, power is supplied to each block, and the power supply block 16 is turned off by the CPU 11 when the power switch continues to be turned off or not used. . The distance measuring sensor 17 is composed of an image sensor 2 and a distance measuring sensor and circuit for measuring the brightness of the subject for focus adjustment of the optical system 1. The photometric sensor 18 includes a photometric sensor and a circuit for measuring the brightness of the subject.

  The image data stored in the second memory 10 is transmitted to the external device 20 by the sending means via the external I / F 19. The external I / F 19 may be a general-purpose interface, for example, a known interface such as a USB interface, a serial ATA interface, an RS232C interface, or wireless BlueTooth (registered trademark). Of course, each company's original special interface may be used.

  In FIG. 1, the first memory 12 and the second memory 10 are described separately, but the memory space of one memory device is divided and the areas of the first memory 12 and the second memory 10 are allocated. May be.

  FIG. 2 is a flowchart showing the operation of the digital camera according to the first embodiment of the present invention, which will be described with reference to FIG.

  First, when the power is turned on, a timer in the CPU 11 is initialized (S1). This timer is a timer for turning off the power when it is not in use. Next, it is determined whether or not the release switch 15 is pressed (S2). When the button is pressed (Yes in process S2), an imaging process (S10) described later is executed.

  If the release switch 15 has not been pressed (No in step S2), it is confirmed whether there is an image transmission request via the external I / F 19 (S3). Generally, when an external device 20 such as a PC sends a status request or the like to the external I / F 19 of the digital camera, and the digital camera returns a ready status or the like to the external device 20, an image request command or the like is sent. Here, this series of operations is called an image transmission request.

  When there is a transmission request (Yes in process S3), an image transmission and an erasure process (S20) of the first memory 12 described later are executed. If there is no transmission request (No in process S3), it is determined whether or not the initially initialized timer has timed out (S4). If not timed out (No in process S4), the process is executed again from process S2 for confirming the release switch 15, and if timed out (Yes in process S4), the process is terminated. In general, the power supply block 16 is controlled immediately before the end of the process, and the power supply is turned off or a standby mode is set in which each element is in a standby state.

  Further, the transition to the imaging process (S10), the image transmission, and the erasure process (S20) of the first memory 12 may be performed by interruption.

  FIG. 3 is a flowchart of the imaging process (S10) shown in FIG. 2 of the first embodiment, and the operation will be described below with reference to FIG. The operation shown in FIG. 3 is a general processing method and is not a method specific to the present invention.

  This process is started when the operator operates the first stroke SW1 of the release switch 15 to start photographing of the operation unit (S11). First, the distance measuring sensor 17 starts operating, and its output is input to the CPU 11 that performs system control (S12). The CPU 11 derives the amount of movement of the focus lens from the output of the distance measuring sensor 17, and moves the focus adjustment lens of the imaging lens 1a through the mechanical system drive circuit 3 to bring it into focus (S13). When the movement of the lens is completed, the AFLock state is set, and thereafter the focus adjustment lens does not move.

  Thereafter, until it is detected that the second stroke SW2 is pressed, the output of the photometric sensor 18 is input to the CPU 11 that performs system control (S14). When it is detected that the second stroke SW2 is pressed (S15), the brightness of the subject is detected from the output of the photometric sensor 18, and the aperture value and shutter speed for the detected value are derived (S16). The aperture and the electronic shutter timing of the timing signal generation circuit 4 are set according to the derived exposure conditions (S17), the main exposure imaging of the image sensor 2 is performed (S18), and the output of the image sensor 2 is read (S19).

  The read out imaging output is subjected to signal processing such as CDS (correlated double sampling) processing and gain control in the pre-processing circuit 6, converted into a digital signal by the A / D converter 7, and imaged signal processing circuit The exposure condition is reconfirmed from the imaging output by the imaging signal processing circuit 8 and the CPU 11 that performs system control, and the setting of the shutter speed is changed by detecting an error from the appropriate exposure. Then, the imaging device 2 is exposed again according to the changed exposure condition, and the output is read out. The output of the image sensor 2 is converted into a digital signal, and after being converted into a specific format by the image signal processing circuit 8, the captured image signal is recorded in the second memory 10 via the medium I / F 9.

  FIG. 4 is a flowchart of the image sending and first memory erasing process (S20) shown in FIG. 2 of the first embodiment, and the operation will be described below with reference to FIG. In this process, in addition to the conventional image transmission, an erasing process by the erasing means of the first memory 12 is added after the image transfer, which is a feature of the present invention.

  In the flowchart shown in FIG. 4, first, the number of images is confirmed (S21). This is done by checking the number of files in the second memory 10 via the medium I / F 9 of FIG. 1 and sending the number of files to the CPU 11 of the system control via the bus.

  Next, the image files are transferred one by one (S22), and the image transfer is repeated for the number of confirmed files until the transfer is completed (S23). This may be transferred once from the medium I / F 9 to the RAM 13 on the bus and then transferred to the external device 20 via the external I / F 19, or the medium I / F 9 and the external I / F 19 may be directly transferred by an instruction from the CPU 11. The image may be transmitted by DMA transfer.

  In the first embodiment, the number of images is checked first, and the image transfer is repeated until the number of images is completed. However, the remaining image is checked every time one image is sent, and if there is a remaining image, the sending is executed. However, the processing may be terminated when there are no remaining images.

  When the image transmission is completed (Yes in step S23) and the normal image reception confirmation is notified from the external device 20 side via the external I / F 19, accumulation of the image data is performed via the medium I / F 9 according to a command of the CPU 11 The stored contents of the second memory 10 are erased (S24).

  In the first embodiment, the configuration is such that the second memory 10 is erased collectively after all the images are transmitted. However, the image file transmitted every time the image is transmitted may be deleted. Further, here, the flowchart is shown in which the image data is deleted after being sent out, but the image may be deleted after being returned to the factory.

  After erasing the second memory 10, in order to further erase the first memory 12, the program portion for erasing the first memory 12 is copied to the RAM 13 and developed (S25). In general, the CPU 11 sequentially executes instructions at addresses written in vector addresses. If the vector address is changed to the address of the RAM 13 after development in the memory, the CPU 11 executes the program developed on the RAM 13. Since a program for erasing the first memory 12 is developed on the RAM 13, the CPU 11 executes an erasure command for the first memory 12 and erases the first memory 12 (S26).

  In order to realize this, the first memory 12 is a semiconductor element that can be electrically erased and written, such as a Flash ROM. In addition, although the present process is terminated after erasing the first memory 12, from the viewpoint of battery recycling, the power may be turned off or each device may be set in a standby mode before the termination.

  Since the execution program is erased after image transfer by this processing, the digital camera does not function as a digital camera and does not leak to pirates, and there is a high probability that the digital camera will be returned to the factory via the store. Become.

  Further, in the flowchart shown in FIG. 5, processing S27 for setting an image transmission flag after confirming the number of images is added to the flowchart of FIG. 4 described above. Specifically, the CPU 11 shown in FIG. 1 writes data to the flag writing area of the first memory 12 or the flag writing area of the second memory 10. As the simplest method, the flag writing area is set to “0” at the time of shipment, and this is rewritten to “1” when writing the flag.

  Since there may be a bit defect or the like, several bits may be assigned instead of one bit. Although the flag writing area is provided in the first memory 12 or the second memory 10, for example, a nonvolatile memory such as an EEPROM for storing adjustment data of the digital camera is provided separately from the first and second memories 12 and 10. If so, a flag may be written to the nonvolatile memory.

  As described above, by holding the image transmission flag in the non-volatile memory, whether or not the image transmission was executed at the next startup even if the user intended for unauthorized use turned off the power before erasing the first memory 12 It becomes possible to determine whether or not, and the erasing process of the first memory 12 can be started.

  FIG. 6 is a flowchart showing the operation of the digital camera according to Embodiment 2 of the present invention, and will be described with reference to FIG. Further, in the second embodiment, as shown in FIG. 6, in the flowchart shown in FIG. 2, the CPU 11 first reads the image flag from the image flag area (S31), and then reads the image from the read image transmission flag. It is determined whether or not sending has been executed (S32). If the image transmission is executed by this determination (Yes at step S32), the erasure program in the first memory 12 is immediately expanded in the RAM 13 (S35), and the program expanded in the RAM 13 is executed in the same manner as described above. One memory 12 is erased (S36).

  When the image transmission flag is not set (No in process S32), the normal release switch 15 operation or the image transmission request instruction is kept waiting until a time-out occurs (process S1 to process S1) as in the flowchart shown in FIG. S4) When the operation of the release switch 15 is performed (Yes in process S2), when the imaging process shown in FIG. 3 is received (Yes in process S3), the image transmission shown in FIG. One memory 12 is erased.

  Thus, after the image is sent, the main body program for system control can be deleted even if the first memory 12 is not normally deleted due to an operation intended for illegal use or an abnormal operation, so the digital camera is returned to the factory. The probability of being done can be made higher.

  Further, in the flowchart shown in FIG. 7, when the image transmission flag is set in the flowchart of FIG. 6 described above (Yes in S32), the following processing is added before the erasure processing (S35) of the first memory 12 is performed. It is a thing. That is, whether or not there is an image file in the second memory 10 is checked via the medium I / F 9 (S33), whether or not there is a remaining image (S34), and if there is no remaining image (No in processing S34) ) Performs an erasing process of the first memory 12.

  However, when there is a remaining image (Yes in process S34), a process of confirming the presence / absence of an image transmission request is executed (S37). If there is an image transmission request based on confirmation of the presence or absence of image transmission (Yes in process S37), the image transmission and the erasure process of the second memory 10 are executed and finished, and then the erasure process of the first memory 12 is performed (S20). If there is no request for image transmission (No in process S37), the process ends. Therefore, when the image transmission is performed by the determination of the first image transmission flag, the imaging process is not performed.

  As described above, even when the image transmission to the external device 20 is terminated in the middle due to a trouble such as a power failure or a failure, the remaining image can be transmitted, so that damage to a legitimate user can be prevented. it can.

  The second embodiment may be configured to prevent unauthorized reading of the contents of the non-volatile memory from pirates as a configuration for deleting the main body program portion other than the image transmission held in the first memory 12. In other words, after determining that there is a remaining image and before determining whether or not there is an image transmission request, a program for erasing and executing the main body program portion other than the image transmission is developed in the RAM 13 and the main body program portion other than the image transmission is deleted. Also good.

  FIG. 8 is a block diagram showing a schematic configuration of a part of the digital camera according to Embodiment 3 of the present invention. In FIG. 8, the imaging-related configuration in the block diagram shown in FIG. Only the part related to the on-board writing I / F 21 of the writing means for performing the above is described.

  In FIG. 8, an on-board write I / F 21 controls the number of bus signal lines and chip select signals, write signals, read signals, etc. determined by the address bus width and data bus width of the CPU 11, the first memory 12, and the RAM 13. A connector or terminal for connecting a signal to the on-board FROM writer 22, a connector or terminal for connecting a first memory KILL signal sent from the timing generator 23, and resetting the system when the digital camera is turned on From a connector or terminal that supplies a reset signal output from the reset IC 24 to the on-board FROM writing device 22 and a connector or terminal that supplies a ROM select signal output from the port of the CPU 11 to the on-board FROM writing device 22 Composed That.

  In the following description, the first memory 12 and the master ROM 25 of the on-board FROM writing device 22 are devices in which the bus line and the control signal are in a high impedance (hereinafter referred to as Hi-Z) state in the reset state.

  When a non-volatile memory other than those described above is used, a 3-state buffer may be provided between the non-volatile memory and the bus so that the non-volatile memory can be separated from the bus in the Hi-Z state. good.

  First, when the power of the digital camera is turned on, a reset signal is output from the reset IC 24 of the digital camera for a certain period, and all the devices shown in FIG. 8 are in a reset state. After the power is turned on, the reset output is canceled after a few milliseconds to several tens of milliseconds have elapsed. A reset signal is supplied to the first memory 12 and the master ROM 25 via an OR gate, and one of the reset signal of the reset IC 24 or the ROMKILL signal (master KILL signal, first memory KILL signal) of the timing generator 23 is output. In this case, the reset state, that is, the bus line and the control signal are in the Hi-Z state, and are not connected in a signal manner.

  When the output of the reset IC 24 is cancelled, the timing generator 23 first outputs the first memory KILL signal so that the first memory 12 is not connected. Thereby, the CPU 11 executes the program of the master ROM 25 instead of the first memory 12 separated from the address bus and the data bus by the Hi-Z state.

  A program for executing the flowchart shown in FIG. 9 is written in the master ROM 25, and the “first memory writing program” held in the master ROM 25 is written in the first memory 12.

  The flowchart shown in FIG. 9 will be described below with reference to FIG. The program in the “first memory writing program” holding area in the master ROM 25 is expanded in the RAM 13 in the digital camera (S41). Next, the program in the “RAM → first memory transfer program” holding area in the master ROM 25 is expanded in the RAM 13 in the digital camera (S42). At this point, two programs are expanded in the RAM 13.

  Next, the vector address executed by the CPU 11 is set to the start address of “RAM → first memory transfer program” expanded in the RAM 13, and the program expanded on the RAM 13 is subsequently executed (S43). Next, the ROM select signal is turned on (S44). Up to this point, the first memory KILL signal has been output from the timing generator 23. However, when the ROM select signal is turned on, the master KILL signal is output, and the first memory 12 changes from the Hi-Z state to the bus connection state. In addition, the master ROM 25 changes from the bus connection state to the Hi-Z state. As a result, the CPU 11 is in a state where writing to the first memory 12 can be executed. Then, the CPU 11 writes the “first memory writing program” expanded in the RAM 13 to the first memory 12 (S45), and ends the processing when the writing is completed.

  As described above, when the digital camera from which an image is sent out by the user and the contents of the first memory 12 are erased is sent to the factory via the store, the first memory 12 mounted on the board in the digital camera. The program can be rewritten and shipped to the first memory 12 without re-installing and re-installing another first memory 12 that has already been programmed. Occurrence can be suppressed.

FIG. 10 is a schematic diagram showing an outline of a configuration for detecting disassembly of a digital camera according to Embodiment 4 of the present invention, and FIG. 11 is a diagram showing a circuit example for detecting disassembly.
The fourth embodiment will be described with reference to FIGS.

  As shown in FIG. 10, the housing disassembly detection switch 31 is arranged inside the digital camera so that it is pushed when the back cover 29 of the digital camera is closed and opened when the back cover 29 is opened. In the fourth embodiment, it is disposed on the circuit board 30 and pressed by the back cover 29, but may be disposed anywhere as long as it can be detected that the housing is opened.

  Further, as in the circuit example shown in FIG. 11, the casing disassembly detection switch 31 is pulled up by a resistor, and the “Low” level is set to the CPU 11 when the casing is closed and the casing disassembly detection switch 31 is pressed. Has been entered. Once the housing is opened, the input of the CPU 11 is disconnected from the GND, so that it is pulled to the power supply voltage through the resistor, and the “High” level is input to the CPU 11. Since the interrupt input of the CPU 11 generally detects the edge of the input signal, the case disassembly detection interrupt process shown in FIG.

  In the fourth embodiment, the moment of switching to “High” is used. However, when the CPU 11 that operates at the moment of switching to “Low” is used, the power source connected to the housing disassembly detection switch 31 and GND are reversed. Just do it.

  Also, since recent digital cameras generally speed up the time until shooting is possible after the power switch is operated, even if the power switch is turned off, the IDLE mode (the system clock of the CPU 11 is maintained or operated at a low speed). There is a configuration in which the entire system is stopped and the entire system is immediately restored by a power-on interrupt, and a high-speed recovery and ultra-low power consumption standby state) is entered. In the fourth embodiment, assuming such a system, the case disassembly detection switch 31 is connected to the interrupt input. However, in the case where the apparatus is completely turned off, the case disassembly is performed. The system power is turned on with the detection switch 31 or the power switch, and when the case disassembly detection switch 31 is pressed, the contents of the interrupt process shown in FIG. 12 may be performed. In the fourth embodiment, the disassembly is detected by the casing disassembly detection switch 31. However, a configuration may be adopted in which a light receiving element is arranged inside the casing and an interrupt process is executed when light is detected.

  Next, the housing disassembly detection interrupt process shown in FIG. 12 will be described. First, it is determined whether or not the IDLE mode is set (S46). If the IDLE mode is selected (Yes in step S46), the normal mode (the system clock is returned to the normal speed and the entire system that has been stopped is restored) is set. Return (S47). Here, the apparatus using the IDLE mode described above is shown as an example. However, when the system power is turned on by the casing disassembly detection switch 31 as described above, the processes S46 and S47 of this flowchart are not necessary. .

  Next, the first memory erase program portion of the program area of the first memory 12 shown in FIG. 1 is developed in the RAM 13 (S48), and the vector address is set as the address developed on the RAM 13, and the first memory 12 is erased. (S49), the process ends.

  When turning on the power when the housing is open at the time of production at the factory, the back cover is first installed so that this interrupt does not function until shipment so that the erase program for the first memory 12 is not executed first. When it is closed, an initial flag indicating that the casing is closed is written to the nonvolatile memory, and the first memory 12 is erased only when the initial flag is set. An initial flag may be detected before the erasure process, and if the initial flag is not detected, a process that does not execute the interrupt process may be added.

  With the above configuration, when the housing is opened, the main body program is deleted, and the pirate trader copies the main body program by removing the non-volatile memory, and writes the copying program to the digital camera from which the main body program has been deleted. Can avoid illegal reuse and increase recycling efficiency.

  The digital camera according to the present invention erases the main body program after image transmission to an external device and stops the function of the digital camera, thereby preventing unauthorized use of the digital camera and improving the recycling efficiency. It is useful as a high-rate disposable digital camera.

1 is a block diagram showing a schematic configuration of a digital camera according to an embodiment of the present invention. The flowchart which shows operation | movement of the digital camera in Embodiment 1 of this invention. Flowchart of the imaging process (S10) shown in FIG. Flowchart of image transmission and first memory erasing process (S20) shown in FIG. 4 is a flowchart in which processing S27 for setting an image transmission flag after confirming the number of images shown in FIG. The flowchart which shows operation | movement of the digital camera in Embodiment 2 of this invention. The flowchart which added the process which confirms the presence or absence of a remaining image to the operation | movement shown in FIG. FIG. 9 is a block diagram showing a schematic configuration of a part of a digital camera according to Embodiment 3 of the present invention. 10 is a flowchart showing rewriting processing of an erased memory writing program according to the third embodiment. The schematic diagram which shows the outline of the structure which detects the disassembly of the digital camera in Embodiment 4 of this invention. The figure which shows the example of a circuit which detects the disassembly of the digital camera in this Embodiment 4. The flowchart which shows the housing | casing disassembly detection interruption process of the digital camera in this Embodiment 4.

Explanation of symbols

DESCRIPTION OF SYMBOLS 1 Optical system 2 Image pick-up element 3 Mechanical system drive circuit 4 Timing signal generation circuit 5 Image pick-up element drive circuit 6 Pre-processing circuit 7 A / D converter 8 Image pick-up signal processing circuit 9 Medium I / F
10 Second memory 11 CPU
12 First memory 13 RAM
14 Display unit 15 Release switch 16 Power supply block 17 Distance sensor 18 Photometric sensor 19 External I / F
20 External device 21 On-board writing I / F
22 On-board FROM writer 23 Timing generator 24 Reset IC
25 Master ROM
29 Back cover 30 Circuit board 31 Case disassembly detection switch

Claims (6)

  A solid-state imaging device that converts reflected light from an object image collected by an optical system including a lens into an electrical signal, an image processing unit that digitizes and processes an image from the solid-state imaging device, and the operation of each device A first memory for holding the CPU program, a second memory for holding the image processed image data, and sending the image data held in the second memory via an external interface A digital camera comprising: sending means for sending and erasing means for erasing the contents of the first memory or both the first memory and the second memory after sending the image data.   2. The digital camera according to claim 1, wherein an image sending flag is written in a part of the first memory or the second memory when the sending means sends the image data.   3. The digital camera according to claim 2, wherein when the execution of image transmission is detected by the image transmission flag, the first memory or both the first memory and the second memory are deleted.   3. The digital camera according to claim 2, wherein execution of image transmission is enabled only when image transmission execution is detected by the image transmission flag and an image remains in the second memory.   The digital camera according to claim 1, further comprising a writing unit that directly writes data to the first memory.   2. The apparatus according to claim 1, further comprising detection means for detecting that the housing is opened, and erasing the program held in the first memory when the detection means detects that the housing is opened. 6. The digital camera according to any one of 5 above.

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