JP2007250703A - Semiconductor device and its manufacturing method - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a semiconductor device which can prevent any cracking on a boundary face between a lead frame and a sealing material and avoid faults due to ion migration, and to provide its manufacturing method. <P>SOLUTION: The semiconductor device is provided with a semiconductor chip 30; a package 33 formed of a sealing material such as resin or the like; a plurality of leads 24 of which one end is electrically connected with the semiconductor chip 30, and of which the other end is projected to the outside of the package 33; and a stress relieving layer 27 which is made of a smaller elastic modulus than the sealing material, and is interposed between the lead 24 and the sealing material on the edge part of the package 33. The stress relieving layer 27 is made of resin or the like with elastic modulus of 100 MPa such as polyimide or the like, and it is exposed over the surface of the package 33. <P>COPYRIGHT: (C)2007,JPO&INPIT

Description

  The present invention relates to a semiconductor device manufactured using a lead frame and a method for manufacturing the semiconductor device, and more particularly to a semiconductor device that prevents the occurrence of defects due to a difference in thermal expansion coefficient between a lead frame and a sealing material and the manufacturing thereof. Regarding the method.

  Many semiconductor devices are formed by bonding a semiconductor chip onto a lead frame and then sealing the semiconductor chip with a sealing material such as a resin that becomes a package. The lead frame is formed by etching a metal thin plate, and includes a die pad that joins semiconductor chips and a large number of leads that are arranged radially around the die pad. Of the leads, the inner part of the package (the part embedded in the sealing material) is called an inner lead, and the part exposed to the outside of the package is called an outer lead.

  FIG. 1 is a cross-sectional view showing an example of a conventional semiconductor device. In the semiconductor device shown in FIG. 1, the semiconductor chip 11 is bonded (die-bonded) on the die pad 13 at the center of the lead frame with the element formation surface facing up. The electrode formed on the element formation surface of the semiconductor chip 11 is electrically connected to the lead 14 (inner lead) through a thin metal wire (gold wire) 15.

  The semiconductor chip 11, the die pad 13, and the fine metal wire 15 are embedded in a package 16 made of resin (sealing material). A part of the lead 14 (outer lead) protrudes from the package 16, and the protruding part is bent into a crank shape. And the front-end | tip part of those lead | read | reeds 14 is joined to a mounting board | substrate with solder etc. FIG.

  As described above, the lead frame is made of metal and has a coefficient of thermal expansion different from that of the resin constituting the package. Therefore, a minute gap is likely to be generated between the lead and the package due to a temperature change. When moisture enters the package through such a gap, the characteristics of the semiconductor chip deteriorate and cause defects. Therefore, various devices have been conventionally made to prevent moisture from entering the package. For example, Patent Document 1 describes that a resin is applied around the lead in the inner portion of the package, and this resin prevents moisture from entering the semiconductor chip. Patent Document 2 describes that moisture is prevented from entering the semiconductor chip by covering the periphery of the lead in the inner portion of the package with a glass layer.

In addition, there are Patent Literature 3 and Patent Literature 4 as conventional technologies that are considered to be related to the present invention. These Patent Documents 3 and 4 describe joining a resin having predetermined characteristics to a semiconductor chip in order to reduce the stress applied to the semiconductor chip.
JP-A-61-253845 JP 59-155152 A JP-A-9-246423 Japanese Patent No. 2556628

  In recent years, with the increase in functionality and density of semiconductor devices, the package size of semiconductor devices has increased, and the number of leads has also increased. On the other hand, due to demands for downsizing and weight reduction of electronic devices, the thickness of semiconductor device packages has been reduced, and the width and pitch of leads tend to be reduced. Overlapping these factors, in recent years, cracks due to the difference in thermal expansion coefficient between the lead frame and the sealing material have frequently occurred at the interface between the lead frame and the sealing material. Moisture enters the package from this crack, and ion migration occurs between the leads, causing problems such as a short circuit.

  In view of the above, an object of the present invention is to provide a semiconductor device that can prevent the occurrence of cracks at the interface between the lead frame and the sealing material and avoid the occurrence of defects due to ion migration, and a method for manufacturing the same.

  According to one aspect of the present invention, a semiconductor chip, a package made of a sealing material for sealing the semiconductor chip, one end side is electrically connected to the semiconductor chip, and the other end side is outside the package. Stress relief formed by a plurality of protruding leads and a material having a lower elastic modulus than that of the sealing material and interposed between the leads and the sealing material at the edge of the package and exposed outside the package A semiconductor device having a layer is provided.

  In the present invention, the edge portion of the package has a stress relaxation layer that is interposed between the lead and the sealing material and exposed on the surface of the package. When a temperature change is applied to the semiconductor device, a stress corresponding to the difference in thermal expansion coefficient between the lead and the sealing material is generated. The stress relaxation layer is elastically deformed by this stress, and the sealing material (package) is transformed. The applied stress is relaxed.

  Thereby, it is avoided that a crack generate | occur | produces in a sealing material (package). As a result, ion migration due to moisture entering the crack is prevented, and the reliability of the semiconductor device is improved.

  The stress relaxation layer may be disposed at least at the edge of the package. However, in order to prevent cracks more reliably, the entire inner lead (excluding the portion electrically connected to the semiconductor chip) is stressed. It is preferable to coat with a relaxation layer. The stress relaxation layer is required to have good adhesion to both the lead and the sealing material. Moreover, the elastic modulus of the stress relaxation layer is required to be smaller than the elastic modulus of the sealing material. The elastic modulus of the stress relaxation layer may be, for example, 100 MPa or less.

  According to another aspect of the present invention, a step of covering a portion of the inner lead and the outer lead on the outer lead side of the inner lead with a stress relaxation layer, an inner lead of the lead frame, and a semiconductor chip And electrically sealing the semiconductor chip with a sealing material having a higher elastic modulus than the stress relieving layer, and from the portion of the inner lead covered with the stress relieving layer, the semiconductor chip There is provided a method for manufacturing a semiconductor device including a step of embedding a side portion with a sealing material.

  In the present invention, the outer lead side portion of the inner lead is covered with the stress relaxation layer, and then the semiconductor chip is sealed with the sealing material. Thereby, the semiconductor device having the above-described structure can be manufactured.

  In addition, in Patent Documents 1 and 2 described above, moisture entering from a gap generated between the lead and the sealing material is blocked by a resin or glass layer arranged inside the package, and cracks are generated. The technical idea is different from that of the present invention for preventing the above-described problem. Further, in Patent Documents 1 and 2, the resin or glass layer is inside the package, but in the present invention, there is an apparent difference that the low elastic resin is exposed on the surface of the package.

  Further, Patent Documents 3 and 4 described above are for bonding a specific resin to the semiconductor chip in order to reduce the stress applied to the semiconductor chip and preventing cracks generated between the lead and the sealing material. Not what you want.

  Hereinafter, embodiments of the present invention will be described with reference to the accompanying drawings.

  FIG. 2 is a cross-sectional view showing a semiconductor device according to an embodiment of the present invention. As shown in FIG. 2, in the semiconductor device of this embodiment, the semiconductor chip 30 is bonded (die-bonded) on the die pad 23 at the center of the lead frame formed of a thin metal plate with the element formation surface facing upward. Yes. A large number of leads 24 are radially arranged around the die pad 23. The electrode formed on the element formation surface of the semiconductor chip 30 is electrically connected to one end portion (end portion on the die pad 23 side) of the lead 24 through a thin metal wire (gold wire) 31.

  The semiconductor chip 30, the die pad 23, and the fine metal wires 31 are embedded in a package 33 made of resin (sealing material). A part of the lead 24 (outer lead) protrudes outside the package 33, and the protruding part is bent in a crank shape. And the front-end | tip part of those leads 24 is joined to a mounting board by solder etc.

  In the semiconductor device of this embodiment, as shown in FIG. 2, a stress relaxation layer 27 made of a low elastic resin such as polyamideimide is disposed around a portion of the lead 24 protruding from the package 33. Thereby, in the part where the lead 24 protrudes from the package 33, the stress relaxation layer 27 is interposed between the sealing material (package 33) and the lead 24, and the sealing material and the lead (metal) 24 are not in direct contact. It is like that. For this reason, in this embodiment, even if a stress is generated between the sealing material and the lead 24 due to the difference in thermal expansion coefficient, the stress relaxation layer 27 interposed therebetween is elastically deformed, and the sealing material The stress applied to is relaxed. Thereby, it is avoided that a crack generate | occur | produces in a sealing material.

  Many epoxy resins generally used as a sealing material have an elastic modulus of 1 GPa or more. The elastic modulus of the stress relaxation layer 27 needs to be sufficiently lower than the elastic modulus of the sealing material. For example, the stress relaxation layer 27 is preferably formed of a low elastic resin having an elastic modulus of 100 MPa or less. Further, the stress relaxation layer 27 may be provided only in a portion where the lead 24 intersects the outer surface of the package 33 (an edge portion of the package 33). However, from the viewpoint of more reliably preventing cracking of the sealing material, it is preferable to cover the entire lead inside the package 33 (however, excluding the portion to which the fine metal wire 31 is joined) with the stress relaxation layer 27. As shown in FIG. 3, the stress relaxation layer 27 may protrude outside the package 33.

  In the present embodiment, as the stress relaxation layer 27, a resin (polyamideimide) having good adhesion to both the sealing material constituting the package 33 and the lead 24 is used. For this reason, for example, when a temperature change from 250 ° C. to 25 ° C. corresponding to the reflow temperature of an electronic component is applied to a 30 mm square semiconductor device, a lead frame having a thermal expansion coefficient of, for example, 15 ppm shrinks by 101 μm. On the other hand, for example, the sealing material (package 33) having a thermal expansion coefficient of 5 ppm does not shrink only about 33 μm, and the stress generated in the sealing material due to temperature change is small. As a result, the occurrence of cracks in the sealing material (package 33) is avoided, and entry of moisture into the package 33 can be prevented. As a result, the occurrence of a short circuit between the leads due to ion migration can be avoided, and the reliability of the semiconductor device is improved.

  Hereinafter, a method for manufacturing the semiconductor device according to the present embodiment will be described with reference to FIGS.

  First, a lead frame 20 as shown in FIG. 4 is prepared. The lead frame 20 is formed by etching a thin plate of Kovar (Fe—Ni—Co alloy), for example, and includes a frame body 21, a die pad support portion 22, a die pad 23, a lead 24, and a tie bar 25. Has been. In the present embodiment, the die pad 23 is formed in a substantially square shape, and is supported by four die pad support portions 22 that communicate with the corner portions, and is disposed at the center in the width direction of the lead frame 20. A large number of leads 24 are arranged radially around the die pad 23. These leads 24 are constituted by inner leads 24 a embedded in the package 33 and outer leads 24 b protruding outside the package 33. The tip of each inner lead 24a is separated from the die pad 23 by a certain distance. Further, the outer lead 24 b is supported between the frame body 21 and the tie bar 25. The tie bar 25 is provided to support the lead 24 and the die pad support portion 22, and is cut and removed after the semiconductor chip 30 is sealed with a sealing material.

  In addition to the above-mentioned Kovar, the lead frame 20 has a metal thin plate made of 42 alloy (Fe—Ni alloy), phosphor bronze, copper, or the like, or a metal thin plate made of solder, copper, nickel, silver, or the like. A material plated with metal is used.

  Next, the lead frame 20 is washed with a neutral detergent or solvent to remove oil and fat and dirt. Thereafter, as shown in FIG. 5, a predetermined portion of the lead frame 20 (the portion indicated by the shaded area A in FIG. 5) of the lead frame 20 is covered with a low elastic resin such as polyamide imide serving as the stress relaxation layer 27. To do. The stress relaxation layer 27 is formed by, for example, a screen printing method. That is, first, on one surface side of the lead frame 20, a low-elasticity resin such as polyamide imide that becomes the stress relaxation layer 27 is screen-printed. Thereafter, the low elastic resin is dried at a temperature of 180 ° C. for 10 minutes. Then, after cooling the lead frame 20 to room temperature, a low-elasticity resin is screen-printed on the other surface side of the lead frame 20 in the same manner, and dried at a temperature of 180 ° C.

  As the low-elasticity resin that becomes the stress relaxation layer 27, in addition to the above-mentioned polyamideimide, silicone resin gel, silicone resin elastomer, acrylic rubber, butadiene rubber, urethane rubber, flexibilizer-modified low-elasticity epoxy resin, low elasticity An elastomer such as urethane resin can be used. The low elastic resin is required to have good adhesion to both the lead 24 and the sealing material.

  Although the case where the low-elasticity resin is applied onto the lead frame 20 by the screen printing method to form the stress relaxation layer 27 has been described here, the die pad 23, the tip end portion of the inner lead 24a and the outer lead of the lead frame 20 are described. After covering 24b with a metal plate or a solvent-resistant plastic plate or the like, the stress relaxation layer 27 may be formed by applying a low elastic resin by spraying or rolling.

  In the present embodiment, as will be described later, since a low elastic resin to be the stress relaxation layer 27 is applied to the lead frame 20 and then molded (sealed) with the resin, the glass transition temperature of the low elastic resin is the sealing material ( It is preferably higher than the glass transition temperature of the sealing resin.

  Next, as shown in FIG. 6, the semiconductor chip 30 is bonded onto the die pad 23 of the lead frame 20. For the bonding of the semiconductor chip 30, for example, an epoxy resin die bonding agent containing silver is used. Thereafter, a wire bonding apparatus is used to electrically connect the electrode on the element forming surface of the semiconductor chip 30 and the tip of the inner lead 24 a of the lead frame 20 by a metal thin wire (gold wire) 31.

  Next, using a low-pressure transfer molding apparatus, as shown in FIG. 7, the semiconductor chip 30, the die pad 23, and the fine metal wires 31 are sealed with a sealing material. The sealing material used for the low-pressure transfer molding is required to be thermosetting, and an epoxy resin or a silicone resin is used. In this embodiment, an epoxy resin that is generally used as a sealing material is used. Specifically, a mixture of a phenol novolac resin curing agent and a triphenylphosphine curing accelerator mixed with an orthocresol novolac type epoxy resin is used as the sealing material. Then, the lead frame 20 to which the semiconductor chip 30 is bonded is placed in a mold, and low-pressure transfer press molding is performed at a temperature of 175 ° C. for 90 seconds. Thereafter, the sealing material is cured for 5 hours at a temperature of 175 ° C., and the package 33 is formed.

  In the present embodiment, as described above, the low-pressure transfer formation method is used for sealing the semiconductor chip 30, but the semiconductor chip 30 may be sealed by a potting method, a dipping method, a casting method, or an impregnation method. .

  Next, the resin adhered between the package 33 and the tie bar 25 is removed using a resin cut punch, and the tie bar 25 is cut using a tie bar cut punch. Further, the lead 24 is separated from the frame body 21 using a lead cut punch. After each lead 24 is electrically separated in this way, the lead 24 is bent into a predetermined shape (crank shape) using a bending punch. In this way, the semiconductor device of the present embodiment having the structure shown in FIG. 2 is completed.

  Hereinafter, various aspects of the present invention will be collectively described as supplementary notes.

(Appendix 1) a semiconductor chip;
A package made of a sealing material for sealing the semiconductor chip;
A plurality of leads having one end side electrically connected to the semiconductor chip and the other end protruding to the outside of the package;
A stress relaxation layer that is formed of a material having a lower elastic modulus than that of the sealing material and is interposed between the lead and the sealing material at an edge of the package and exposed on the surface of the package. A semiconductor device.

  (Supplementary Note 2) The stress relaxation layer is selected from the group consisting of polyamideimide, silicone resin gel, silicone resin elastomer, acrylic rubber, butadiene rubber, urethane rubber, flexibilizer-modified low elastic epoxy resin, and low elastic urethane resin. 2. The semiconductor device according to appendix 1, wherein the semiconductor device is formed of any one of the materials.

  (Supplementary note 3) The semiconductor device according to supplementary note 1, wherein an elastic modulus of the stress relaxation layer is 100 MPa or less.

  (Additional remark 4) The semiconductor device of Additional remark 1 characterized by the above-mentioned sealing material having an epoxy resin as a main component.

  (Supplementary note 5) The semiconductor device according to supplementary note 1, wherein the semiconductor chip and the lead are electrically connected through a thin metal wire.

(Appendix 6) A step of coating a portion of the inner lead on the outer lead side of the inner lead and outer lead of the lead frame with a stress relaxation layer;
Electrically connecting the inner lead of the lead frame and the semiconductor chip;
The semiconductor chip is sealed with a sealing material having a higher elastic modulus than the stress relaxation layer, and a portion of the inner lead on the semiconductor chip side is embedded with a sealing material from a portion covered with the stress relaxation layer. A method for manufacturing a semiconductor device, comprising the steps of:

  (Additional remark 7) Sealing of the said semiconductor chip with the said sealing material is performed using a transfer molding apparatus, The manufacturing method of the semiconductor device of Additional remark 6 characterized by the above-mentioned.

  (Additional remark 8) The said lead frame has a die pad which mounts the said semiconductor chip, The manufacturing method of the semiconductor device of Additional remark 6 characterized by the above-mentioned.

FIG. 1 is a cross-sectional view showing an example of a conventional semiconductor device. FIG. 2 is a cross-sectional view showing a semiconductor device according to an embodiment of the present invention. FIG. 3 is a sectional view showing a modification of the semiconductor device according to the embodiment of the present invention. FIG. 4 is a diagram (part 1) illustrating the method for manufacturing a semiconductor device according to the embodiment of the present invention, and is a plan view of the lead frame. FIG. 5 is a diagram (part 2) illustrating the method for manufacturing the semiconductor device according to the embodiment of the present invention, and illustrates an application region of a low elastic resin serving as a stress relaxation layer. FIG. 6 is a view (No. 3) showing the method for manufacturing a semiconductor device according to the embodiment of the invention, and shows a lead frame on which a semiconductor chip is mounted. FIG. 7 is a view (No. 4) illustrating the method for manufacturing the semiconductor device according to the embodiment of the invention, and shows a state in which the semiconductor chip is sealed.

Explanation of symbols

11, 30 ... Semiconductor chip,
13, 23 ... Die pad,
14, 24 ... Lead,
15, 31 ... fine metal wire,
16, 33 ... package,
20 ... Lead frame 21 ... Frame,
22 ... Die pad support,
24a ... Inner lead,
24b ... Outer lead,
25 ... Tie bar,
27: Stress relaxation layer.

Claims (4)

A semiconductor chip;
A package made of a sealing material for sealing the semiconductor chip;
A plurality of leads having one end side electrically connected to the semiconductor chip and the other end protruding to the outside of the package;
A stress relaxation layer that is formed of a material having a lower elastic modulus than the sealing material and is interposed between the lead and the sealing material at an edge of the package and exposed outside the package. Semiconductor device.   The stress relaxation layer is any one selected from the group consisting of polyamideimide, silicone resin gel, silicone resin elastomer, acrylic rubber, butadiene rubber, urethane rubber, flexibilizer-modified low elastic epoxy resin, and low elastic urethane resin. 2. The semiconductor device according to claim 1, wherein the semiconductor device is made of a seed material. A step of covering a portion of the inner lead on the outer lead side of the inner lead and outer lead of the lead frame with a stress relaxation layer;
Electrically connecting the inner lead of the lead frame and the semiconductor chip;
The semiconductor chip is sealed with a sealing material having a higher elastic modulus than the stress relaxation layer, and a portion of the inner lead on the semiconductor chip side is embedded with a sealing material from a portion covered with the stress relaxation layer. A method for manufacturing a semiconductor device, comprising the steps of:   The method of manufacturing a semiconductor device according to claim 3, wherein the semiconductor chip is sealed with the sealing material using a transfer molding apparatus.

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