JP2007235300A - Video processing apparatus, and video processing method - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a video display apparatus and a video display method for displaying a normal video source with high image quality and displaying even with respect to a video signal similar to flashings or the like, with fidelity to an original image intended by a creator. <P>SOLUTION: A video processing apparatus includes a GAME mode detection decision means 5 for detecting and deciding whether a received video signal meets prescribed conditions to decide a GAME mode; an interpolation arithmetic circuit 3 for changing the interpolation method of the video signal in response to a result of the detection and decision to execute IP conversion; and an output line arithmetic circuit 6 for outputting progressive video signals. Furthermore, the GAME mode detection decision means 5 includes a noninterlace decision means 51 for detecting video signals similar to the signals in noninterlace mode; and a flashing decision means 52 for detecting video signals with video effects similar to flashing. <P>COPYRIGHT: (C)2007,JPO&INPIT

Description

  The present invention particularly relates to a video processing apparatus and a video processing method.

In recent years, a progressive scan and a large screen of a television receiver (TV) have been advanced. Accordingly, various methods for converting an interlaced video signal into a progressive video signal, that is, an IP conversion method have been devised. As such a conventional IP conversion method, a video processing method called a motion adaptive progressive conversion process has been mainly used. This detects video features such as the amount of motion and vertical edges, and adaptively switches between inter-field scanning line conversion by inter-field arithmetic and intra-field scanning line conversion by intra-field arithmetic (for example, Patent Documents). 1). Further, for example, an invention as disclosed in Patent Document 2 has been proposed as a method of improving the motion adaptive progressive conversion processing.
Japanese Patent Laid-Open No. 6-311488 JP 2005-191619 A

  In recent years, opportunities for connecting AV devices such as game devices to TVs are increasing. In such video images of game machines and animation images, a screen effect such as flushing that reverses every frame as shown in [Original Image] in FIG. 4 is used as one of the creator's expression methods. . When the conventional IP conversion method as described above is performed on such a video signal that is switched for each frame similar to flushing or the like, a stationary state such as missing teeth as shown in [data after IP conversion] in FIG. Is converted into a video signal of the image, resulting in a video far from the original image intended by the creator.

  One method for solving this problem is to perform a doubling process as shown in FIG. The video signal such as the flushing can be supplemented with a video along the original image intended by the creator by performing a doubling process. However, this doubling process has a problem that the normal image source such as a DVD (Digital Versatile Disk) or digital TV broadcast lacks the vertical resolution and the image quality deteriorates.

  The present invention has been made in view of such a problem, and displays a normal video source with high image quality, and also displays an image faithful to the original image intended by the creator for a video signal similar to flushing or the like. An object of the present invention is to provide a video display device and a video display method.

In order to solve the above problems, the present invention has the following configuration.
The gist of the present invention is that whether or not a video signal input to the video processing device satisfies at least one of the following conditions a or b, the input signal V ₀ and the input signal V ₀ are field memories. GAME mode detection and determination means for determining the video signal to be in GAME mode when the condition is met, and detecting and determining from the delayed signal that is the signal delayed by The present invention resides in a video processing apparatus comprising an output line arithmetic circuit that changes an interpolation method in a complementary arithmetic circuit and performs IP conversion. (A) A video signal in which pixels are not divided in the time axis direction in units of horizontal lines when creating video data. (B) A video signal having a video effect in which the display color is switched for each field.
The gist of the present invention resides in a video processing apparatus characterized in that the complementing method of the video signal in the GAME mode is a doubling process.
Further, the gist of the present invention is that the GAME mode detection / determination means includes the following means A and B, and determines the GAME mode when the video signal satisfies the condition. Exist. (A) Non-interlace determination means for calculating whether or not the condition a is satisfied by calculating video difference data for every two pixels using an even pixel or an odd pixel of one horizontal line as a base point. (B) Flushing determination means for calculating at least one of the video difference data between even fields or odd fields from the input signal V0 and the delayed signal and determining whether the condition b is satisfied.
The gist of the present invention resides in a video processing apparatus in which the GAME mode detection / determination means changes a threshold for detection / determination of the GAME mode in accordance with the type of the video signal.
Further, the gist of the present invention resides in a video processing apparatus in which the GAME mode detection / determination means determines the GAME mode when the following formula 1 is calculated and the result is true.
The gist of the present invention resides in a video processing apparatus in which the GAME mode detection / determination means determines the GAME mode when the following Formula 2 is calculated and the result is true.
The gist of the present invention is that the input signal V ₀ and the input signal V ₀ are a field indicating whether or not the video signal satisfies at least one of the following conditions a or b. A detection determination step for determining detection from a delayed signal that is a signal delayed by a memory, a GAME mode detection determination step for determining the video signal as a GAME mode when the condition is satisfied, and a detection determination result. And an IP conversion step of performing IP conversion by changing the complementing method of the video signal. (A) A video signal in which pixels are not divided in the time axis direction in units of horizontal lines when creating video data. (B) A video signal having a video effect in which the display color is switched for each field.
The gist of the present invention resides in a video processing method characterized in that the complementing method of the video signal in the GAME mode is a doubling process.
Further, the gist of the present invention is that the GAME mode detection determination step includes the following steps A and B, and determines the GAME mode when the video signal satisfies the condition. Exist. (A) A non-interlace determination step for determining whether or not the condition a is satisfied by calculating video difference data for every two pixels using an even pixel or an odd pixel of one horizontal line as a base point. (B) A flushing determination step of calculating whether at least one of the video difference data between even fields or odd fields is calculated from the input signal V ₀ and the delay signal and meets the condition b.
The gist of the present invention resides in the video processing method according to the invention, wherein, in the GAME mode detection determination step, a threshold for detection determination in the GAME mode is changed according to the type of the video signal. .
The gist of the present invention resides in the video processing method characterized in that, in the GAME mode detection determination step, the following mathematical expression 3 is calculated and the result is determined to be the GAME mode.
The gist of the present invention resides in the video processing method characterized in that, in the GAME mode detection determination step, the following equation 4 is calculated and the result is determined to be the GAME mode.
The gist of the present invention resides in a program capable of executing the above video processing method.

  The video display apparatus and video display method according to the present invention automatically discriminates from the GAME mode by automatically detecting a video signal in which pixels are not divided in the time axis direction in units of horizontal lines or a video signal similar to flushing at the time of creating video data. However, by adaptively processing the IP conversion complementing method according to the result, there is an advantage that a normal video source can be displayed with high image quality and in the GAME mode, the original image intended by the creator can be displayed faithfully. .

  Hereinafter, embodiments of the present invention will be described in detail.

First, the video display device 9 of the present embodiment is configured to include a video processing device 8 as shown in FIG. The video processing device 8 is composed of elements as shown in FIG. That is, a field memory 1 that is a means for delaying the video inputs I _V and V ₀ to which the video signal V ₀ is inputted, in a field unit, a complementary operation circuit 3 that is a means for performing an IP conversion complementary operation, A motion detection determination unit 4 which is a means for performing motion detection determination from video signals of a plurality of fields, a GAME mode detection determination unit 5 which is a game mode detection determination unit for performing GAME mode detection determination from video signals, and this GAME mode detection determination and CPU7 to convey the results of the parts to complement arithmetic circuit 3, the output line calculation circuit 6 for outputting the video signal V _C and the input signal V _0, which is complemented by the complementary operation circuit 3 as a progressive video signal V _M together, motion determination A memory 2 for storing each history for saving results, GAME mode determination work, and GAME mode determination result storage Constructed. Further, the GAME mode detection / determination unit 5 has a non-interlace determination unit 51 that is a unit for determining a video signal whose horizontal resolution is less than half the horizontal resolution of the video display device, and a screen effect such as flushing. Flushing determination means 52 for determining the video signal that it has may be provided.

First, FIG. 4 shows two typical output formats of the game machine. The non-interlace mode, one of these two output formats, is a relatively old game device output format. In general, video data of 60 frames per second is created by a game device with a vertical 230 lines and horizontal 360 pixels as one frame. Is done. The output video signal is output from the game device as a (pseudo) interlaced signal by doubling the pixels in the horizontal direction.
The interlace mode, which is the other of the above two output formats, is a relatively new game device output format. In general, the video data of about 60 frames per second is assumed to be virtual with 460 pixels in the vertical direction and 720 pixels in the horizontal direction. Create it automatically. The actual video data stored in the VRAM of the game device is processed as actual video data only for odd lines of one frame in the odd field and only even lines of one frame in the even field due to the VRAM capacity problem. As a result, a video signal of about 60 fields per second with vertical 230 lines and horizontal 720 pixels as one field is output as an interlace signal from the game device.

Next, processing steps of the image processing apparatus according to the present embodiment will be described below with reference to FIGS.
First, an input signal V ₀ , a signal V ₁ delayed by one field by the field memory 1, and a signal V ₂ further delayed by one field by the field memory 1 are used as a complementary arithmetic circuit 3, a motion detection determination unit 4, and The signal is input to the GAME mode detection determination unit 5 (video signal input S1). More field memories 1 may be provided. In this case, the signals V ₃ , V ₄ ... Delayed by one field are used as the complementary arithmetic circuit 3, the motion detection determination unit 4, and the GAME mode. Input to the detection determination unit 5.

  By the way, the video output format of the game device is mainly classified into a non-interlace mode and an interlace mode which are the two modes shown in FIG. In addition, it is preferable that a video signal in which pixels are not divided in the time axis direction in units of horizontal lines when the video data is created is also processed in the same manner as in the non-interlace mode. Therefore, the game mode detection determination unit detects the video format in order to perform video processing suitable for the video signal input equivalent to the two formats.

  First, the non-interlaced mode video signal is normally subjected to doubling processing when it is output from the game device. In addition, a video signal in which pixels are not divided in the time axis direction in units of horizontal lines when creating video data is usually subjected to doubling processing and scaling processing before video signal input. The video signal in which pixels are not divided in the time axis direction in units of horizontal lines when creating video data refers to the following video signals. In other words, in interlaced display, pixels are divided in different frames of interlaced display, that is, in the time axis direction in order to approximate the display when the video source is displayed in progressive display. This refers to a video signal that can be processed in a similar manner, but has not been subjected to such processing. Here, FIG. 7 is an example of a pixel row of one horizontal line. However, if the video signal input from a game device is an analog signal, the video signal has already been doubled, but the phase distortion of the transmission system, the output of the game device, or the LPF (low pass filter) inside the receiving device such as a television The sampled video data is not completely doubled due to the effects of group delay characteristics / passband characteristics due to the above. In addition, when analog video signals are sampled, doubling processing is performed on game devices, etc., since the variation due to video signal output devices and not all game devices are completely compliant with video format standards such as ITU. It is impossible to clearly determine the reference position of the reference pixel when it is done. Therefore, in consideration of the case of an analog input signal, the presence / absence of doubling processing is detected by performing two operations based on the odd pixel pixels and even pixel pixels of the video data sampled by the non-interlace determination means 51. To deal with. The specific detection method is shown in detail in FIG. That is, the total average of the difference data ΔVot of two adjacent pixels based on an odd pixel t, and the total average of the difference data ΔVet of two adjacent pixels based on the even pixel t + 1 adjacent to the pixel t When the smaller value of the two total averages is equal to or less than an arbitrary threshold value Snonint, the non-interlace determination means 51 determines that this input signal is in the GAME mode (non-interlace determination S2). This specific determination formula is shown in Formula 5.

  Here, as pixel data used for pixel difference data calculation, luminance information, hue information, color difference information, or a combination thereof may be used as appropriate. When this determination formula holds, that is, when the determination result is true, the non-interlace determination means 51 determines that the input signal is in the GAME mode (S4), and the GAME mode detection determination unit 5 uses the control signal RG as the complementary arithmetic circuit 3. (S5). It is preferable that the threshold value Snonint used in Formula 1 can be appropriately changed according to the type of the input video signal. For example, for input video signals that are simply doubled, such as non-interlaced input signals from game devices, this threshold Snonint is reduced to make non-interlace criteria stricter, while the source resolution is simply For input video signals that have undergone scaling processing, such as low video signals, examples of adaptation include increasing the threshold value Snonint to loosen the non-interlace criteria. Further, the history of the non-interlace determination result is sequentially stored in the memory 2 by the GAME mode detection determination unit 5.

On the other hand, the video signal in interlace mode is not different from the video format of normal DVD, etc., and it is detected from the video signal input from game devices etc. whether it is in interlace mode of game devices or normal DVD video format. Since it is impossible to do this, detection is performed from the input video signal.
Here, a signal output from a game device or the like, which is an input signal that is complemented differently from the original image intended by the creator by the motion adaptive progressive conversion of the prior art, mainly abruptly for each field. It is a video signal having a screen effect such as changing flashing. In the step of detecting the screen effect, the flushing determination means 52 detects the flushing from the input signal and determines the format of the input video signal so that the optimum complementing method can be applied (flushing determination S3).
First, FIG. 9 shows a video signal format in the interlace mode. In this figure, the Y-axis direction represents the pixels of the horizontal line, indicating that there are the number of lines from “_a” to “_P”. The X axis direction represents a field in the time axis direction, indicating that there are fields from "1_" to "Q_".
Here, the video signal similar to the flushing that is switched for each field is mainly the same signal between even-numbered fields or odd-numbered fields, and the luminance and hue difference such that the video signals of the even-numbered field and the odd-numbered field are inverted. A large signal is set. FIG. 10 is an enlarged view of a part of FIG.
The difference ΔVg1 between the video signal data of the pixel “1_a” existing in a certain odd field and the pixel “2_a” present in the next even field in time axis, the pixel “2_a”, and the time axis shown in FIG. Therefore, the difference ΔVh1 of the video signal data of the pixel “3_a” existing in the next odd field is calculated. As the absolute value of the difference between the two difference data ΔVg1 and ΔVh1 is smaller, it can be recognized as a video signal like flushing in which switching such as inversion is performed for each field. Then, the flushing determination means 52 determines by performing the same arithmetic processing in an area having an arbitrary number of fields Q and an arbitrary number of lines P. The region used for this determination may be arbitrarily set according to the type of input video signal. For example, by setting a wide area, the doubling process may be performed only for an input video signal having a screen effect that the entire screen such as an input video signal from a game device is flushed. By setting the area narrowly at an arbitrary position, it is possible for the flushing determination means 52 to perform the flushing determination in consideration of a partial screen effect seen in an animation or the like and an excluded portion of a screen effect such as a caption. Here, for an area having an arbitrary number of fields Q and an arbitrary number of lines P, when the sum of the absolute values of the differences between ΔVg1 and ΔVh1 is equal to or less than a certain threshold value Sint, the flushing determination means 52 The signal is determined to be in the game mode (S4), and the GAME mode detection / determination unit 5 outputs the control signal RG to the complementary arithmetic circuit 3 (S5). This specific determination formula is shown in Formula 6.

  As the pixel data used for the difference calculation of the video signal data of the pixel in Equation 2, luminance information, hue information, color difference information, or a combination thereof may be used as appropriate. When this determination formula is satisfied, that is, when it is true, the flushing determination unit 52 determines that the input signal is in the game mode. Here, it is preferable that the threshold value Sint can be appropriately changed according to the type of the input video signal. The history of the flushing determination result is sequentially stored in the memory 2. As described above, the screen area used for the flushing determination can be arbitrarily set. Therefore, the screen may be divided into a plurality of regions, the determination may be performed, only the region corresponding to the flushing determination may be doubled, and another supplement method may be employed for the other regions.

Next, apart from the above non-interlace determination and flushing determination, the motion detection determination unit 4 performs motion detection determination on the input video signal (S6). This determination is the same as that detected in the conventional motion adaptive progressive conversion process. In other words, the video feature such as the amount of motion and the vertical edge is detected from the input video signal, and the motion detection determination unit 4 determines whether the input video signal is close to a moving image or a still image. This determination may be performed after the non-interlace determination and the flushing determination, which are the above game mode determinations, or may be performed separately in parallel. In this motion detection determination, the input signal V ₀ is input by the field memory 1. V ₁ , V ₂ ,..., Which are delayed video signals. Here, the determination result whether the input video signal is closer to the moving image or the still image is transmitted when the motion detection determination unit 4 outputs the control signal RM to the complementary arithmetic circuit 3. A complement method is determined. The history of the motion determination result is sequentially stored in the memory 2 by the motion detection determination unit 4.

The GAME mode detection / determination unit 5 detects the interlace mode and the non-interlace mode, which are video output formats of two typical game devices, by the above detection methods, and the input video signal is subjected to doubling processing in the complementary arithmetic circuit 3. It is determined whether or not the GAME mode is preferable. In this complementary arithmetic circuit 3, the complementary line arithmetic method is changed according to the control signal RG that is the GAME mode detection determination result and the control signal RM that is the motion detection determination result.
If the GAME mode detection determination unit 5 determines that the mode is the GAME mode, the complementary arithmetic circuit 3 performs a doubling process regardless of the detection result of the control signal RM (S7). As a result, when the video data is created such that the video signal has been doubled before being input, the input video signal in which the pixels are not divided in the time axis direction in units of horizontal lines or the luminance of each field is intense. An input video signal having a changing screen effect can be displayed on the video display device as intended by the creator. If it is determined that the input video signal is not in the GAME mode and the control signal RM is determined to be closer to the still image, the complementary calculation circuit 3 performs inter-field interpolation (S8). When it is determined that the mode is not the GAME mode, and the control signal RM is determined to be closer to the moving image, the complement calculation circuit 3 performs in-field complement (S9). The complementary processing for each detection result is shown in Table 1 below.
Thus, image line V _C created by complement arithmetic circuit 3 described above by complementing the above selected method is generated (S10), the original video signal V ₀ is existing line by the output line calculation circuit 6 It is integrated to be output as a progressive video signal V _M.
In this way, the video signal output from the game device or the like is IP-converted by each circuit of the present embodiment. Therefore, the progressive video signal to be output is complemented with a video signal faithful to the original picture as shown in FIG. In addition, by using the video processing apparatus of the present embodiment, a VGA video source is displayed on a QVGA screen of a mobile phone or the like, or a 1920 × 1080 pixel video source that is a D5 standard video is displayed at a lower resolution. Also when displaying on the apparatus, it becomes possible to perform display faithful to the video intended by the original video source.

  Note that the video display device and video display method of the present invention are not limited to the above-described embodiments, and can be appropriately improved, modified, and changed within the technical scope conceivable by those skilled in the art.

1 is a configuration diagram of a video display device according to an embodiment of the present invention. 1 is a configuration diagram of a video processing apparatus according to an embodiment of the present invention. Flow of Complementation Method Corresponding to Discrimination Processing by Video Format Detection Unit in Embodiment of the Present Invention Explanatory drawing about the non-interlace mode and the interlace mode which are examples of the video signal input in embodiment of this invention Output data diagram after conventional motion adaptive progressive conversion processing Output data after doubling IP conversion Non-interlaced pixel array Illustration of GAME mode detection method in non-interlace mode Pixel pixel array diagram in interlaced mode Illustration of calculation method in detection of flushing determination

Explanation of symbols

DESCRIPTION OF SYMBOLS 1 Field memory 2 Memory 3 Complementary arithmetic circuit 4 Motion detection determination part 5 GAME mode detection determination part 51 Non-interlace determination means 52 Flushing determination means 6 Output line arithmetic circuit 7 CPU
8 Video processing device 9 Video display device 10 Game equipment

Claims (13)

Whether the video signal input to the video processing device corresponds to at least one of the conditions of the following a or b, or the input signal V _0, a signal input signal V ₀ is delayed by the field memory GAME mode detection and determination means for detecting and determining from a certain delayed signal, and determining that the video signal is in the GAME mode when the condition is satisfied,
A video processing apparatus comprising: an output line arithmetic circuit that performs IP conversion by changing a complementing method in the complementary arithmetic circuit of the video signal in accordance with a result of detection determination.
(A) A video signal in which pixels are not divided in the time axis direction in units of horizontal lines when creating video data.
(B) A video signal having a video effect in which the display color is switched for each field.   The video processing apparatus according to claim 1, wherein the complementing method of the video signal in the GAME mode is a doubling process. 3. The video processing according to claim 1, wherein the GAME mode detection determination unit includes the following A and B units, and determines the GAME mode when the video signal satisfies the condition. apparatus.
(A) Non-interlace determination means for calculating whether or not the condition a is satisfied by calculating video difference data for every two pixels using an even pixel or an odd pixel of one horizontal line as a base point.
(B) Flushing determination means for calculating at least one of the video difference data between even fields or odd fields from the input signal V0 and the delayed signal and determining whether the condition b is satisfied.   The video processing apparatus according to claim 1, wherein the GAME mode detection determination unit changes a threshold for detection determination in the GAME mode according to a type of the video signal. 5. The video processing apparatus according to claim 1, wherein the GAME mode detection determination unit determines the GAME mode when the following Formula 1 is calculated and the result is true.
The video processing apparatus according to claim 1, wherein the GAME mode detection determination unit determines the GAME mode when the following Formula 2 is calculated and the result is true.
For an input image signal whether the video signal corresponds to at least one of the conditions of the following a or b, or the input signal V _0, a signal input signal V ₀ is delayed by the field memory A detection determining step for detecting from a certain delayed signal;
GAME mode detection determination step for determining the video signal as a GAME mode when the condition is satisfied;
An IP conversion step of performing IP conversion by changing a complementing method of the video signal according to a result of detection determination.
(A) A video signal in which pixels are not divided in the time axis direction in units of horizontal lines when creating video data.
(B) A video signal having a video effect in which the display color is switched for each field.   The video processing method according to claim 7, wherein the complementing method of the video signal in the GAME mode is a doubling process. The video processing according to claim 7 or 8, wherein the GAME mode detection determination step includes the following steps A and B, and determines the GAME mode when the video signal satisfies the condition. Method.
(A) A non-interlace determination step for determining whether or not the condition a is satisfied by calculating video difference data for every two pixels using an even pixel or an odd pixel of one horizontal line as a base point.
(B) A flushing determination step of calculating whether at least one of the video difference data between even fields or odd fields is calculated from the input signal V ₀ and the delay signal and meets the condition b.   10. The video processing method according to claim 7, wherein, in the GAME mode detection determination step, a threshold for detection determination of the GAME mode is changed according to a type of the video signal. 11. . The video processing method according to claim 7, wherein, in the GAME mode detection determination step, the GAME mode is determined when the following expression 3 is calculated and the result is true.
The video processing method according to claim 7, wherein, in the GAME mode detection determination step, the GAME mode is determined when the following expression 4 is calculated and the result is true.
  A program capable of executing the video processing method according to claim 7.