JP2007235122A - Semiconductor light-emitting apparatus, and its manufacturing method - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To obtain a high luminance by improving the light extraction efficiency and also high-output operation by improving heat radiation, while achieving cost reduction. <P>SOLUTION: The semiconductor light-emitting apparatus has a substrate 101, multiple nitride semiconductor layers 120 including an LED structure formed on the substrate 101 by growth, and p-side high-reflection electrodes 107 formed on the nitride semiconductor layer 120. A first opening 101a that exposes the nitride semiconductor layer 120 is formed on the substrate 101. The p-side high-reflection electrode 107 is formed to counter the first opening 101a and the peripheral region of the first opening 101a on the substrate 101. <P>COPYRIGHT: (C)2007,JPO&INPIT

Description

  The present invention relates to a semiconductor light emitting device applicable to, for example, a short wavelength light emitting diode element and a manufacturing method thereof.

  In the case of gallium nitride (GaN) III-V nitride semiconductor, for example, in the case of GaN, the forbidden band width at room temperature is as large as 3.4 eV. Therefore, a light emitting device such as a visible light emitting diode element or a short wavelength semiconductor laser element It can be applied to. In particular, as a light emitting diode element, a white light emitting diode element that emits light by exciting a fluorescent material with blue-green or blue emitted light has been put to practical use in various displays or display devices.

  GaN-based light-emitting diode elements, which are expected to expand in the future, have generally used an epitaxially grown layer that has been crystal-grown on a sapphire substrate by metal organic chemical vapor deposition (MOCVD). ing. Elemental technologies such as heteroepitaxial growth in which a low-temperature buffer layer is provided on a sapphire substrate, growth of an active layer having a multiple quantum well structure made of indium gallium nitride (InGaN), and growth of a low-resistance p-type GaN layer by activation annealing technology As a result, the characteristics of GaN-based light-emitting diode elements have been improved.

  However, the sapphire substrate has various problems such as non-conductivity and low heat dissipation, and there is a limit to lower operating voltage or higher output. Thus, in order to solve various problems of the GaN-based light emitting device using the sapphire substrate, for example, by irradiating a pulse laser beam having a high output and a short wavelength from the surface opposite to the GaN-based epitaxial layer in the sapphire substrate, A so-called laser lift-off technology has been developed to separate the epitaxial growth layer by thermally decomposing the GaN layer in the vicinity of the interface between the substrate and the epitaxial layer, and a light emitting diode element having a vertical structure separated from the sapphire substrate has been realized. .

With this configuration, when a metal holding substrate made of a gold plating material or copper tungsten (CuW) having a relatively large film thickness and having excellent heat dissipation properties is bonded to the epitaxial layer, heat is released through the metal holding substrate. As a result, it is easy to increase the output. Further, since a vertical electrode structure in which electrodes are formed on both sides of the epitaxial layer can be adopted, the series resistance and the operating voltage can be reduced, which is an advantageous structure. In the future, in order to improve the performance of GaN-based light emitting diode elements, it is considered essential to adopt a so-called free standing structure in which the crystal growth substrate is separated.
JP 2004-088083 A T. Ueda et al, Phys. Stat. Sol. 0, No.7 pp.2219-2222 (2003) D. Morita et al, Jpn. J. Appl. Phys. 41 pp. L1434-1436 (2002)

  However, the conventional nitride semiconductor light emitting device has the following problems. For example, since the light-emitting diode element described in Non-Patent Document 1 holds the diode chip only with a gold plating material, the strength of the diode chip is insufficient, and there is a risk of chip cracking or the like during mounting. In addition, although a high reflection electrode is provided on the p-type semiconductor layer side, the light extraction efficiency is improved, but there is no means for taking out leaked light leaking in the lateral direction of the chip, thereby increasing the brightness. There are limits.

  In the GaN-based light emitting diode device described in Non-Patent Document 2, the epitaxial growth layer is bonded to a holding substrate made of CuW, and then the sapphire substrate for crystal growth is separated. Accordingly, a process for bonding the holding substrate to the epitaxial layer is added, so that there is a limit in reducing the cost of the chip.

  In view of the above-described conventional problems, the present invention achieves high brightness by improving light extraction efficiency and reducing heat in a semiconductor light emitting device using a compound semiconductor, particularly a GaN-based compound semiconductor. The purpose is to improve the performance and realize high output operation.

  In order to achieve the above object, the present invention provides a semiconductor light emitting device in which an opening for exposing a semiconductor layer is provided on a crystal growth substrate after a semiconductor layer is grown on the crystal growth substrate, An electrode having a larger area than the opening is formed on the opposite surface.

  Furthermore, the light extraction efficiency is greatly improved by making the exposed region of the semiconductor layer from the opening of the substrate for crystal growth into a concavo-convex shape, and a photonic crystal structure, and the electrode facing the opening is a highly reflective electrode. To improve. In addition, when a thick metal film is used for the electrode, heat dissipation is improved through the metal film, and high output operation is possible.

  Specifically, a semiconductor light emitting device according to the present invention includes a substrate, a plurality of semiconductor layers formed by growth on the substrate and including an active layer, and a first electrode formed on the semiconductor layer. A first opening exposing the semiconductor layer is formed in the substrate, and the first electrode is formed so as to face the first opening in the substrate and a peripheral region of the first opening. The planar area of the first electrode is larger than the opening area of the first opening.

  According to the semiconductor light emitting device of the present invention, since the substrate for growing the semiconductor layer is not completely separated and removed, but the opening for exposing the semiconductor layer is provided in the substrate, the substrate has a function of holding the semiconductor layer. Can be maintained. Furthermore, since the first electrode is formed so as to face the first opening in the substrate and the peripheral region of the first opening, for example, by using the first electrode as a highly reflective electrode, High brightness can be realized.

  In the semiconductor light emitting device of the present invention, the first electrode is electrically connected to one semiconductor layer having one conductivity type among the plurality of semiconductor layers, and the other conductivity type among the plurality of semiconductor layers is selected. A second electrode electrically connected to the other semiconductor layer, and the second electrode is drawn to the opposite side of the first electrode through the second opening formed in the substrate. Preferably it is. In this case, since the first electrode and the second electrode are formed on both sides of the semiconductor layer, a vertical device can be obtained.

  In this case, the second electrode is preferably formed in a planar comb shape on another semiconductor layer. In this way, since the distribution of current injected into the semiconductor layer can be made uniform, uniform high-luminance light emission can be realized.

  In this case, it is preferable that a plurality of second openings are formed in the substrate. Thus, by forming a plurality of feeding points for the second electrode, a uniform current distribution and uniform light emission can be realized even when the chip area is large.

  In the semiconductor light emitting device of the present invention, the first electrode is electrically connected to one semiconductor layer having one conductivity type among the plurality of semiconductor layers, and the other conductivity type among the plurality of semiconductor layers is selected. It is preferable that a second electrode electrically connected to the other semiconductor layer is further provided, and the second electrode is led out to the same side as the first electrode. In this manner, when the first electrode and the second electrode are provided on the same surface side of the semiconductor layer, for example, the first electrode and the second electrode can be mounted on the mounting substrate without using wire bonding. In addition, it is possible to realize a semiconductor light emitting device having a good light emission pattern at a low manufacturing cost, such as realizing a light emission pattern that is not affected by the bonding wire.

  In this case, it is preferable that the second electrode is formed so as to be located in the peripheral portion of the first electrode. In this way, since the distribution of the injection current can be made uniform, more uniform high-luminance light emission can be realized.

  In the semiconductor light emitting device of the present invention, the first electrode is preferably made of a metal having a thickness of 10 μm or more. In this case, since the holding force for holding the semiconductor layer of the first electrode is increased, chip cracking or the like is less likely to occur when mounted on the mounting substrate.

  In the semiconductor light emitting device of the present invention, it is preferable that an uneven portion is formed in an exposed portion of the semiconductor layer from the first opening. In this way, light emitted from the semiconductor layer can be effectively extracted to the outside by the irregularities formed in the semiconductor layer, so that the light emitted from the semiconductor layer can be effectively extracted to the outside due to reflection above the critical angle. Efficiency is improved and a semiconductor light emitting device with higher brightness can be realized.

  In this case, it is preferable that the uneven portion constitutes a photonic crystal. If it does in this way, the extraction efficiency of light can be improved significantly.

  Furthermore, in this case, the wall surface of the first opening is preferably tapered so that the opening diameter increases as the distance from the semiconductor layer increases. In this way, light emitted from the semiconductor layer is reflected on the tapered wall surface in the first opening and efficiently extracted in the vertical direction, so that the light extraction efficiency is improved.

  In the semiconductor light emitting device of the present invention, it is preferable that a reflective film is formed on the wall surface of the first opening. In this way, the light emission luminance can be further increased.

  In this case, the reflective film is preferably a metal film or a laminated film of the metal film and an insulating film. In this case, since the deterioration of the reflective film can be prevented, the reliability is improved.

  In this case, the metal film preferably contains aluminum. Thus, by using aluminum having a high reflectance in a wide wavelength range as at least a part of the reflective film, a semiconductor light emitting device having a high luminance in a wider wavelength range can be realized.

  In the semiconductor light emitting device of the present invention, the semiconductor layer includes a p-type semiconductor layer and an n-type semiconductor layer, and the first electrode has an n-type low resistance in which an impurity is added at a high concentration between the first electrode and the p-type semiconductor layer. It is preferably formed with a layer interposed. In this case, since the first electrode is extracted using a tunnel junction, for example, in the case of a GaN-based semiconductor having a large resistance in the p-type semiconductor layer, it is possible to promote the spread of the current in the lateral direction in the semiconductor layer. Uniform high-luminance light emission can be realized.

  In this case, it is preferable that the first electrode has a reflective layer containing aluminum in part. In this case, for example, a GaN-based semiconductor light-emitting device having a tunnel junction can use aluminum having a high reflectance as an ohmic electrode provided in the high-concentration n-type semiconductor layer. Extraction efficiency is improved.

  In the semiconductor light emitting device of the present invention, the semiconductor layer is preferably made of a nitride semiconductor. In this way, it is possible to realize a semiconductor light-emitting device capable of high luminance and high-power operation that emits light in a wide wavelength range covering the visible region and the ultraviolet region or white.

  In the semiconductor light emitting device of the present invention, the substrate is preferably made of silicon. In this case, since silicon is less expensive than sapphire or the like, a semiconductor light emitting device capable of high luminance and high output operation can be realized at a lower cost.

  In this case, it is preferable that the surface orientation of the substrate is the (111) plane. In this case, for example, when a GaN-based semiconductor is epitaxially grown on a substrate whose main surface has a (111) plane orientation, the growing semiconductor layer has excellent crystallinity on the growth surface (0001). ) Surface is formed, so that higher brightness and higher output operation are possible.

  The method for manufacturing a semiconductor light emitting device according to the present invention includes a step (a) of forming a concavo-convex portion on a main surface of a substrate and a step in which an active layer and a conductivity type are different from each other on the main surface of the substrate on which the concavo-convex portion is formed. (B) forming a plurality of semiconductor layers including one semiconductor layer and a second semiconductor layer, forming a first electrode on the first semiconductor layer, and forming a first electrode on the second semiconductor layer; A step (c) of forming the second electrode, and a step (d) of forming a first opening that exposes the concavo-convex portion on the substrate.

  According to the method for manufacturing a semiconductor light emitting device of the present invention, by forming the uneven portion on the substrate, a post-process for forming the uneven portion on the grown semiconductor layer becomes unnecessary. Further, since the substrate is not separated from the semiconductor layer, the semiconductor layer can be held as it is. For this reason, since the process etc. of bonding another holding substrate are unnecessary, manufacturing cost can be reduced. In addition, since the semiconductor layer having the concavo-convex portion transferred from the first opening formed in the substrate is exposed, the light extraction efficiency can be greatly improved and heat can be radiated through the first electrode. High output is possible.

  In the method for manufacturing a semiconductor light emitting device of the present invention, in the step (d), the opening position of the first opening is preferably formed so as to be within the center portion of the first electrode. In this case, for example, by using the first electrode as a highly reflective electrode, high luminance can be realized.

  In the method for manufacturing a semiconductor light emitting device according to the present invention, the step (d) preferably includes a step of forming a second opening exposing the second electrode on the substrate. In this case, since the first electrode and the second electrode can be formed on both sides of the semiconductor layer, a vertical device can be obtained.

  In the method for manufacturing a semiconductor light emitting device of the present invention, in the step (d), the wall surface of the first opening is preferably formed in a tapered shape so that the opening diameter increases as the distance from the semiconductor layer increases. In this way, light emitted from the semiconductor layer is reflected on the tapered wall surface in the first opening and efficiently extracted in the vertical direction, so that the light extraction efficiency is improved.

  In the method for manufacturing a semiconductor light emitting device of the present invention, the semiconductor layer is preferably made of a nitride semiconductor. In this way, it is possible to obtain a semiconductor light emitting device capable of high luminance and high output operation that emits light in a wide wavelength range or white range covering the visible region and the ultraviolet region.

  According to the semiconductor light emitting device and the manufacturing method thereof of the present invention, while simplifying the manufacturing process, the light extraction efficiency is improved, the brightness is increased, the heat dissipation is improved, and the high output operation is realized. it can.

(First embodiment)
A first embodiment of the present invention will be described with reference to the drawings.

  1A and 1B show a semiconductor light emitting device according to the first embodiment of the present invention, in which a planar configuration and a bottom surface of a GaN-based light emitting diode element capable of emitting light of a short wavelength such as blue or green are shown. FIG. 2 shows a cross-sectional structure taken along line II-II in FIGS. 1A and 1B.

As shown in FIG. 2, for example, a p-side highly reflective electrode 107 made of platinum (Pt) with a thickness of about 200 nm is formed on a p-side electrode pad 110 made of gold (Au) with a thickness of about 30 μm. The p-type contact layer 106 made of p-type GaN having a thickness of 5 nm and the p-type Al _0.1 Ga _0.9 N having a thickness of 200 nm are formed on the p-side highly reflective electrode 107. A p-type cladding layer 105, for example, a multiple quantum well (MQW) active layer in which a well layer made of In _0.35 Ga _0.65 N and a barrier layer made of In _0.05 Ga _0.95 N are stacked for three periods. 104, an n-type cladding layer 103 made of n-type GaN having a thickness of 500 nm and a buffer layer 102 made of AlN having a thickness of 100 nm are sequentially formed to constitute an epitaxial semiconductor layer 120. In addition, uneven portions 102 a are periodically formed on the upper surface of the buffer layer 102.

  On the buffer layer 102, a substrate 101 made of silicon (Si) having a first opening 101a that exposes the concavo-convex portion 102a of the buffer layer 102 is formed.

  Part of the p-type contact layer 106, the p-type cladding layer 105, and the MQW active layer 104 is selectively removed, and the n-type cladding layer 103 is exposed at the removed step portion. In the exposed region of the n-type cladding layer 103, an n-side ohmic electrode 108 made of a laminated film of titanium (Ti) and aluminum (Al) formed from the n-type cladding layer 103 side is formed. Here, as shown in FIG. 1A, the n-side ohmic electrode 108 is desirably arranged in a planar comb shape. In this case, since the current injected from the planar comb-shaped n-side ohmic electrode 108 is uniformly distributed, the obtained emitted light can be made uniform.

Further, as shown in FIG. 2, a passivation film 109 made of silicon oxide (SiO ₂ ) having a thickness of about 300 nm is formed between the n-side ohmic electrode 108 and the p-side electrode pad 110, for example. The n-side ohmic electrode 108 and the p-side electrode pad 110 are electrically separated.

  As described above, the substrate 101 according to the first embodiment is formed only in the peripheral portion of the chip because the first opening 101a that exposes the uneven portion 102a of the buffer layer 102 is formed. . As will be described later, the substrate 101 is a substrate for crystal growth when the epitaxial semiconductor layer 120 is formed. The grown epitaxial semiconductor layer 120 has a p-side highly reflective electrode 107, an n-side ohmic electrode 108, and a p-side electrode pad 110. After forming the first opening 101a, the central portion of the substrate 101 is selectively removed. The first opening 101a serves as a portion for extracting emitted light from the MQW active layer 104.

  The substrate 101 is formed with a plurality of through holes (second openings) 101b exposing a part of the n-side ohmic electrode 108. Each of the formed through holes 101b is made of, for example, Au plating. Side electrode pads 111 are respectively formed.

  In the first embodiment, the case where the emission wavelength is about 470 nm is shown as the composition of the MQW active layer 104. However, by increasing or decreasing the In composition in the well layer or by using a quaternary mixed crystal composed of InAlGaN. For example, the emission wavelength can be changed from 340 nm to about 550 nm.

  As long as the p-side highly reflective electrode 107 has a work function large enough to obtain good ohmic characteristics with the p-type contact layer 106 and has a sufficiently large reflectance with respect to the emission wavelength, for example, rhodium (Rh) or A metal such as silver (Ag) can be used.

As a modification, an n ⁺ -type GaN layer is provided between the p-type contact layer 106 and the p-side highly reflective electrode 107, and the provided n ⁺ -type GaN layer and the p-type contact layer 106 make a so-called tunnel junction. May be formed. In this case, aluminum (Al) may be used as a constituent material of the p-side highly reflective electrode 107 instead of platinum (Pt). Since aluminum has a high reflectance in a wider wavelength band, a light-emitting diode element with higher luminance can be obtained.

  The concavo-convex portion 102a formed in the buffer layer 102 is desirably formed with a periodic condition and a depth at which a so-called photonic crystal is obtained. When the concavo-convex portion 102a has a photonic crystal structure, light extraction efficiency can be improved and luminance can be further increased. For example, in the first embodiment, the concavo-convex portion 102a is formed in a cylindrical shape having a convex formation period of 1 μm, a diameter of 0.5 μm, and a height of 150 nm, and these are arranged in a hexagonal lattice shape. Has been.

  The substrate 101 made of silicon (Si) may have any plane orientation as long as a GaN-based semiconductor having a good crystal structure can be formed on its main surface. For example, the main surface of the substrate 101 may be a (111) plane which is a preferable plane orientation in Si, or a main surface having an off-angle with respect to the (111) plane.

  The substrate 101 may be a compound semiconductor substrate that can be easily wet etched, such as gallium arsenide (GaAs). Thereby, formation of the 1st opening part 101a with respect to the board | substrate 101 becomes easy. Further, if the substrate 101 is made of a material having a lattice constant close to that of a GaN-based semiconductor, such as silicon carbide (SiC) or gallium nitride (GaN), the crystallinity of the epitaxial semiconductor layer 120 is further improved. A luminance light-emitting diode element can be obtained.

  Further, in the first embodiment, unlike the conventional substrate made of sapphire or the like, the heat radiation from the epitaxial semiconductor layer 120 can be performed through the p-side electrode pad 110 made of Au plating.

  As described above, according to the first embodiment, the substrate 101 for crystal growth is left at the peripheral portion of the chip, so that the substrate 101 also serves as a chip holding function and the first opening provided in the substrate 101. By providing the epitaxial semiconductor layer 120 exposed from the portion 101a, here the buffer layer 102, with a photonic crystal structure, light extraction efficiency can be improved and high luminance can be achieved. In addition, as described above, since heat can be radiated through the p-side electrode pad 110 made of a relatively thick film metal, it is possible to realize a light emitting diode element that is more excellent in heat dissipation and capable of high output operation. In addition, since a bonding step of separating the crystal growth substrate 101 and bonding a holding substrate made of another material becomes unnecessary, the manufacturing cost can be reduced.

  Hereinafter, a method of manufacturing the semiconductor light emitting device configured as described above will be described with reference to the drawings.

  FIG. 3A to FIG. 3F show cross-sectional structures in the order of steps of the method for manufacturing the semiconductor light emitting device according to the first embodiment of the present invention.

  First, as shown in FIG. 3A, for example, a photonic crystal structure is formed on a main surface of a substrate 101 made of silicon whose main surface has a (111) plane orientation by a lithography method and a dry etching method. The uneven portion 101c is formed. Here, the formed photonic crystal structure has the planar configuration shown in FIG. 1A, and the period, shape, and depth are as described above. That is, the photonic crystal structure constituting the concavo-convex portion 101c is set to a dimension that further improves the light extraction efficiency. Note that the uneven portion 101 c formed on the substrate 101 has a pattern obtained by inverting the uneven portion 102 a formed on the buffer layer 102 in a later step.

Subsequently, for example, a buffer layer 102 made of AlN having a thickness of 100 nm and a thickness of 500 nm are formed on the main surface of the substrate 101 on which the concavo-convex portion 101c is formed on the main surface by metal organic chemical vapor deposition (MOCVD). N-type cladding layer 103 made of n-type GaN, MQW active layer 104 including a well layer made of In _0.35 Ga _0.65 N and a barrier layer made of In _0.05 Ga _0.95 N for three periods, thickness An epitaxial semiconductor layer 120 is formed by sequentially growing a p-type cladding layer 105 made of p-type Al _0.1 Ga _0.9 N having a thickness of 200 nm and a p-type contact layer 106 made of p-type GaN having a thickness of 5 nm. To do. At this time, the uneven portion 101 c of the substrate 101 is transferred to the buffer layer 102 to form the uneven portion 102 a. Depending on the thickness of the buffer layer 102, the uneven portion 102a is also formed on the n-type cladding layer 103 that grows thereon.

  Next, as shown in FIG. 3B, the p-type contact layer 106, the p-type cladding layer 105, and the MQW active layer 104 are formed by dry etching such as inductively coupled plasma (ICP) etching. By sequentially etching, the n-type cladding layer 103 is selectively exposed. Specifically, as shown in FIG. 1A, it is exposed in a planar comb shape.

Next, as shown in FIG. 3C, a p-side highly reflective electrode 107 made of Pt is selectively formed on the p-type contact layer 106 by sputtering or the like. An n-side ohmic electrode 108 made of Ti / Al is selectively formed on the exposed n-type cladding layer 103. The order of forming the p-side highly reflective electrode 107 and the n-side ohmic electrode 108 is not particularly limited. Subsequently, a passivation film 109 made of SiO ₂ having a thickness of 300 nm is formed on the entire surface of the epitaxial semiconductor layer 120 including the p-side highly reflective electrode 107 and the n-side ohmic electrode 108 by chemical vapor deposition (CVD). Form. Thereafter, the region covering the p-side highly reflective electrode 107 in the passivation film 109 is selectively removed by etching.

  Next, as shown in FIG. 3D, a p-side electrode pad 110 made of Au plating having a thickness of about 30 μm is formed on the p-side highly reflective electrode 107 and the passivation film 109 by plating. Here, as shown in FIG. 1B, the peripheral portion of the chip in the p-side electrode pad 110 is removed.

Next, as shown in FIG. 3E, a first opening 101a that exposes the concavo-convex portion 102a transferred to the buffer layer 102 from the surface opposite to the buffer layer 102 in the substrate 101, and an n-side ohmic contact. A through hole 101b exposing the electrode 108 is formed. Here, the planar configuration of the first opening 101a and the through hole 101b is as shown in FIG. The first opening 101a and the through-hole 101b are formed on the substrate 101 by dry etching such as electron cyclotron resonance (ECR) plasma etching using sulfur hexafluoride (SF ₆ ) gas, for example. Alternatively, it can be formed by wet etching using a mixed solution of hydrofluoric acid (HF) and nitric acid (HNO ₃ ). Further, when the through hole 101b is formed in the epitaxial semiconductor layer 120, ICP etching using chlorine (Cl ₂ ) gas can be used.

  Next, as shown in FIG. 3F, the n-side electrode pad 111 is formed so as to fill the through hole 101b by, for example, Au plating. As shown in FIG. 1A, the n-side electrode pad 111 is formed, for example, at a corner of the chip. Thus, the n-side electrode pad 111 is preferably formed at a position where the area of the light emitting region can be increased and the holding force of the chip by the substrate 101 is not impaired.

  In the first embodiment, the n-type cladding layer 103 made of n-type GaN is directly provided on the buffer layer 102 made of AlN. However, between the buffer layer 102 and the n-type cladding layer 103, A laminated semiconductor having a periodic structure made of AlN / GaN or a laminated semiconductor made of AlGaN and having a periodic structure having a different composition may be provided. In this way, the crystallinity of the epitaxial semiconductor layer 120 is improved. In this case, in order to further reduce the series resistance as the light emitting diode element, the laminated semiconductor having a periodic structure is doped with an n-type dopant such as silicon (Si), so that the n-type laminated structure having a lower resistance is formed. It is desirable to use a semiconductor.

  The light emitting diode structure shown in FIGS. 1 and 2 can be manufactured by the process flow described above.

  As another modification, in the pre-process or the post-process of the process of forming the first opening 101a and the through hole 101b in the substrate 101, for example, copper tungsten (CuW), aluminum nitride ( Different substrates different from nitride semiconductors having excellent heat dissipation such as AlN) or silicon carbide (SiC) may be bonded together. In this case, the heat dissipation is further improved, so that a higher output operation is possible.

(Second Embodiment)
Hereinafter, a second embodiment of the present invention will be described with reference to the drawings.

  4 (a) and 4 (b) are semiconductor light emitting devices according to the second embodiment of the present invention, in which the planar configuration and bottom surface of a GaN-based light emitting diode element capable of emitting short wavelengths such as blue or green are shown. FIG. 5 shows a cross-sectional configuration taken along line VV in FIGS. 4A and 4B.

  The difference from the semiconductor light emitting device according to the first embodiment is that the n-side electrode pad 211 is formed on the same surface side as the p-side electrode pad 210, and the opening 201 a formed in the substrate 201 is a substrate. This is a point having a tapered cross-sectional shape in which the opening diameter increases with distance from 201. The opening 201a having a tapered cross section provided in the substrate 201 can reflect light emitted from the light emitting region of the epitaxial semiconductor layer 220 upward (opposite side of the p-side electrode pad 210) with high efficiency. The extraction efficiency can be further improved.

Specifically, as shown in FIG. 5, for example, a p-side highly reflective electrode 207 made of Pt having a thickness of about 200 nm is formed on a p-side electrode pad 210 made of Au plating having a thickness of about 30 μm. A p-type contact layer 206 made of p-type GaN with a thickness of 5 nm and a p-type Al _0.1 Ga _0.9 N with a thickness of 200 nm are formed on the p-side highly reflective electrode 207. A type cladding layer 205, for example, an MQW active layer 204 in which a well layer made of In _0.35 Ga _0.65 N and a barrier layer made of In _0.05 Ga _0.95 N are stacked for three periods, a thickness of 500 nm An n-type cladding layer 203 made of n-type GaN and a buffer layer 202 made of AlN having a thickness of 100 nm are sequentially formed to form an epitaxial semiconductor layer 220. In addition, uneven portions 202 a are periodically formed on the upper surface of the buffer layer 202.

  On the buffer layer 202, a substrate 201 made of silicon (Si) Si having a tapered cross section and having an opening 201a exposing the uneven portion 102a of the buffer layer 202 is formed.

  The peripheral portions of the p-type contact layer 206, the p-type cladding layer 205, and the MQW active layer 204 are selectively removed, and the n-type cladding layer 203 is exposed at the removed stepped portion. In the exposed region of the n-type cladding layer 203, an n-side ohmic electrode 208 made of a laminated film of Ti and Al formed from the n-type cladding layer 203 side is formed.

In addition, a passivation film 209 made of SiO ₂ having a thickness of, for example, about 300 nm is formed between the n-side ohmic electrode 208 and the p-side electrode pad 210, and the n-side ohmic electrode 208 and the p-side electrode pad 210 are formed. And are electrically separated.

  As shown in FIGS. 4B and 5, an n-side electrode pad 211 made of Au plating is formed around the p-side electrode pad 210 on the surface of the n-side ohmic electrode 208 opposite to the n-type cladding layer 203. It is formed in an annular shape.

  As described above, the substrate 201 according to the second embodiment is formed only in the peripheral portion of the chip because the opening 201a that exposes the uneven portion 202a of the buffer layer 202 is formed. As will be described later, the substrate 201 is a crystal growth substrate when the epitaxial semiconductor layer 220 is formed, and the grown epitaxial semiconductor layer 220 has a p-side highly reflective electrode 207, an n-side ohmic electrode 208, and a p-side electrode pad 210. Then, a part of the substrate 201 is selectively removed to form an opening 201a. The opening 201 a serves as a portion for extracting emitted light from the MQW active layer 204.

  Here, as shown in FIG. 5, it is desirable that the cross-sectional shape of the opening 201a formed in the substrate 201 is a taper shape spreading upward. In this case, the light extraction efficiency is improved by efficiently reflecting the emitted light from the MQW active layer 204 upward, so that the brightness of the light-emitting diode element can be increased.

In the first embodiment, a reflective film 212 in which, for example, Al and SiO ₂ are laminated in this order is formed on the wall surface of the opening 201a of the substrate 201 and the peripheral edge of the substrate 201, and the reflectance is increased. It is improving.

  Also in the second embodiment, the case where the emission wavelength is about 470 nm is shown as the composition of the MQW active layer 204, but by increasing or decreasing the In composition in the well layer or by configuring with a quaternary mixed crystal made of InAlGaN. For example, the emission wavelength can be changed from 340 nm to about 550 nm.

  The p-side highly reflective electrode 207 can be made of metal such as rhodium (Rh) or silver (Ag) instead of gold (Au).

  The concavo-convex portion 202a formed in the buffer layer 202 is desirably formed with a periodic condition and a depth at which a so-called photonic crystal can be obtained. For example, in the second embodiment, the concavo-convex portion 202a is formed in a cylindrical shape having a convex formation period of 1 μm, a diameter of 0.5 μm, and a height of 150 nm, and these are arranged in a hexagonal lattice shape. Has been. Thereby, the light extraction efficiency is improved, and a light-emitting diode element with higher luminance can be obtained.

  The substrate 201 made of silicon may have any plane orientation as long as a GaN-based semiconductor having a good crystal structure can be formed on its main surface. For example, the main surface of the substrate 101 may be a (111) plane which is a preferable plane orientation in Si, or a main surface having an off-angle with respect to the (111) plane.

  The substrate 201 may be a compound semiconductor substrate that can be easily wet etched, such as GaAs. In addition, if a material such as SiC or GaN having a lattice constant close to that of a GaN-based semiconductor is used for the substrate 201, the crystallinity of the epitaxial semiconductor layer 220 is further improved, so that a light-emitting diode element with higher luminance can be obtained. Can do.

  Also in the second embodiment, unlike the conventional substrate made of sapphire or the like, the heat radiation from the epitaxial semiconductor layer 220 can be performed through the p-side electrode pad 210 and the n-side electrode pad 211 made of Au plating. .

  As described above, according to the second embodiment, by leaving the crystal growth substrate 201 at the peripheral portion of the chip, the substrate 201 also serves as a holding function of the chip, and from the opening 201a provided in the substrate 201. By providing the exposed epitaxial semiconductor layer 220, here the buffer layer 202, with a photonic crystal structure, light extraction efficiency can be improved and high luminance can be achieved. In addition, as described above, since heat can be radiated through the p-side electrode pad 210 and the n-side electrode pad 211 made of a relatively thick film metal, the light-emitting diode capable of high output operation with excellent heat dissipation. An element can be realized. In addition, since a bonding step of separating the crystal growth substrate 201 and bonding a holding substrate made of another material becomes unnecessary, the manufacturing cost can be reduced.

  Hereinafter, a method of manufacturing the semiconductor light emitting device configured as described above will be described with reference to the drawings.

  FIG. 6A to FIG. 6E show cross-sectional structures in the order of steps in the method for manufacturing a semiconductor light emitting device according to the second embodiment of the present invention.

  First, as shown in FIG. 6A, for example, a photonic crystal structure is formed on the main surface of a substrate 201 made of silicon whose main surface has a (111) plane orientation by lithography and dry etching. The concavo-convex portion 201b is formed. Here, the formed photonic crystal structure has a planar configuration shown in FIG. 4A, and its period, shape, and depth are the same as those in the first embodiment. In other words, the photonic crystal structure constituting the concavo-convex portion 201b is set to a dimension that further improves the light extraction efficiency. Note that the uneven portion 201b formed on the substrate 201 has a pattern obtained by inverting the uneven portion 202a formed on the buffer layer 202 in a later step.

Subsequently, for example, a buffer layer 202 made of AlN having a thickness of 100 nm and an n-type made of n-type GaN having a thickness of 500 nm are formed on the main surface of the substrate 201 on which the concavo-convex portion 201b is formed on the main surface by MOCVD. Type cladding layer 203, MQW active layer 204 including three periods of a well layer made of In _0.35 Ga _0.65 N and a barrier layer made of In _0.05 Ga _0.95 N, p-type Al having a thickness of 200 nm _An epitaxial semiconductor layer 220 is formed by sequentially growing a p-type cladding layer 205 made of _0.1 Ga _0.9 N and a p-type contact layer 206 made of p-type GaN having a thickness of 5 nm. At this time, the uneven portion 201b of the substrate 201 is transferred to the buffer layer 202 to form the uneven portion 202a. Depending on the thickness of the buffer layer 202, the uneven portion 202a is also formed on the n-type cladding layer 203 that grows thereon.

  Next, as shown in FIG. 6B, the p-type contact layer 206, the p-type cladding layer 205, and the MQW active layer 204 are sequentially etched by dry etching such as ICP etching, for example, to thereby form an n-type. The cladding layer 203 is selectively exposed. Specifically, as shown in FIG. 4B, the peripheral edge of the chip is exposed annularly.

Next, as shown in FIG. 6C, a p-side highly reflective electrode 207 made of Pt is selectively formed on the p-type contact layer 206 by sputtering or the like. Further, an n-side ohmic electrode 208 made of Ti / Al is selectively formed on the n-type cladding layer 203 exposed in a ring shape. The order of forming the p-side highly reflective electrode 207 and the n-side ohmic electrode 208 is not particularly limited. Subsequently, a passivation film 209 made of SiO ₂ having a thickness of 300 nm is formed on the entire surface of the epitaxial semiconductor layer 220 including the p-side highly reflective electrode 207 and the n-side ohmic electrode 208 by CVD. Thereafter, the region covering the p-side highly reflective electrode 207 and the n-side ohmic electrode 208 in the passivation film 109 is selectively removed by etching.

  Next, as shown in FIG. 6D, a p-side electrode pad 210 made of Au plating having a thickness of about 30 μm is formed on the p-side highly reflective electrode 207 and the n-side ohmic electrode 208 by plating. An n-side electrode pad 211 is formed around each.

Next, as shown in FIG. 6E, an opening 201a having a tapered cross section is formed to expose the uneven portion 202a transferred to the buffer layer 202 from the surface of the substrate 201 opposite to the buffer layer 202. . Here, the opening 201a can be formed by dry etching such as ECR plasma etching used in the first embodiment or wet etching using a mixed acid of HF and HNO ₃ . However, in the second embodiment, since the cross section of the opening 201a has a tapered shape that widens upward, when using dry etching, for example, the pressure at the time of etching is set so that the chemical reaction is further promoted. It is preferable to set higher than usual. Note that the wall surface of the opening 201a can also be tapered by forming the resist film itself used for the etching mask into a tapered cross section.

Subsequently, a metal film made of Al is selectively deposited on the upper surface of the substrate 201 and the wall surface of the opening 201a by sputtering or the like, and then an insulating film made of SiO ₂ is selectively deposited by the CVD method. Then, the reflective film 212 is formed from the metal film and the insulating film. Here, a metal film made of Al is used for the reflection film 212, but silver (Ag), gold (Au), or the like can be used instead of Al as long as it has a large reflectance with respect to the emission wavelength. . In addition, the insulating film laminated on the metal film is formed to prevent the metal film from being deteriorated. For example, silicon nitride (SiN) can be used instead of SiO ₂ as long as it can transmit the emitted light. Insulating film (dielectric film) can be used.

  Also in the second embodiment, in order to improve the crystallinity of the MQW active layer 204 or the like, a laminated semiconductor having a periodic structure made of AlN / GaN between the buffer layer 202 and the n-type cladding layer 203 or A laminated semiconductor made of AlGaN and having a periodic structure with different compositions may be provided.

  The light emitting diode structure shown in FIGS. 4 and 5 can be manufactured by the process flow described above.

  As a modification, in the pre-process or post-process of the step of forming the opening 201a in the substrate 201, the p-side electrode pad 210 is different from a nitride semiconductor excellent in heat dissipation such as CuW, AlN, or SiC. Different substrates may be bonded together. In this case, the heat dissipation is further improved, so that a higher output operation is possible.

  In the first embodiment and the second embodiment, the compound semiconductor constituting the light emitting diode structure is not limited to the group III nitride, and light emission such as gallium arsenide (GaAs) or indium phosphide (InP) is used. Any semiconductor that can realize a diode structure may be used.

  Also, the epitaxial semiconductor layer growth substrate may be any type of substrate as long as it is a material that can realize good crystal growth and is excellent in workability. Further, the surface orientation of the main surface of the substrate is not particularly limited, and may be a surface orientation with an off-angle attached to a typical surface orientation.

  The crystal growth method of the epitaxial semiconductor layer is not limited to the MOCVD method. For example, a molecular beam epitaxy (MBE) method or an HVPE (Hydride Vapor Phase Epitaxy) method may be used, and a plurality of semiconductor layers may be used. MBE or HVPE may be used for some of the semiconductor layers.

  The semiconductor light emitting device and the method for manufacturing the same according to the present invention can improve the light extraction efficiency and increase the brightness while simplifying the process, improve the heat dissipation, and realize the high output operation. It is useful for semiconductor light-emitting diode elements that can generate ultraviolet light or white light.

(A) And (b) shows the semiconductor light-emitting device concerning the 1st Embodiment of this invention, (a) is a top view, (b) is a bottom view. It is sectional drawing in the II-II line | wire of Fig.1 (a) and FIG.1 (b). (A)-(f) is sectional drawing of the order of a process which shows the manufacturing method of the semiconductor light-emitting device concerning the 1st Embodiment of this invention. (A) And (b) shows the semiconductor light-emitting device concerning the 2nd Embodiment of this invention, (a) is a top view, (b) is a bottom view. It is sectional drawing in the VV line | wire of Fig.4 (a) and FIG.4 (b). (A)-(e) is sectional drawing of the order of a process which shows the manufacturing method of the semiconductor light-emitting device concerning the 2nd Embodiment of this invention.

Explanation of symbols

101 Substrate 101a First opening 101b Through hole (second opening)
101c Uneven portion 102 Buffer layer 102a Uneven portion 103 n-type cladding layer 104 multiple quantum well active layer 105 p-type cladding layer 106 p-type contact layer 107 p-side highly reflective electrode 108 n-side ohmic electrode 109 passivation film 110 p-side electrode pad 111 n-side electrode pad 120 epitaxial semiconductor layer 201 substrate 201a opening 201b uneven portion 202 buffer layer 202a uneven portion 203 n-type cladding layer 204 multiple quantum well active layer 205 p-type cladding layer 206 p-type contact layer 207 p-side highly reflective electrode 208 n-side ohmic electrode 209 passivation film 210 p-side electrode pad 211 n-side electrode pad 212 reflective film 220 epitaxial semiconductor layer

Claims (23)

A substrate,
A plurality of semiconductor layers formed by growth on the substrate and including an active layer;
A first electrode formed on the semiconductor layer,
The substrate has a first opening that exposes the semiconductor layer,
The first electrode is formed to face the first opening in the substrate and a peripheral region of the first opening, and a plane area of the first electrode is equal to the first opening. A semiconductor light emitting device having a larger opening area. The first electrode is electrically connected to one semiconductor layer having one conductivity type among the plurality of semiconductor layers,
A second electrode electrically connected to another semiconductor layer having another conductivity type among the plurality of semiconductor layers;
The semiconductor light emitting device according to claim 1, wherein the second electrode is led out to the opposite side of the first electrode through a second opening formed in the substrate.   3. The semiconductor light emitting device according to claim 2, wherein the second electrode is formed in a planar comb shape on the other semiconductor layer.   The semiconductor light emitting device according to claim 2, wherein a plurality of the second openings are formed in the substrate. The first electrode is electrically connected to one semiconductor layer having one conductivity type among the plurality of semiconductor layers,
A second electrode electrically connected to another semiconductor layer having another conductivity type among the plurality of semiconductor layers;
The semiconductor light emitting device according to claim 1, wherein the second electrode is led out to the same side as the first electrode.   The semiconductor light emitting device according to claim 5, wherein the second electrode is formed so as to be positioned in a peripheral portion of the first electrode.   The semiconductor light emitting device according to claim 1, wherein the first electrode is made of a metal having a thickness of 10 μm or more.   The semiconductor light emitting device according to claim 1, wherein an uneven portion is formed in an exposed portion of the semiconductor layer from the first opening.   The semiconductor light emitting device according to claim 8, wherein the uneven portion constitutes a photonic crystal.   2. The semiconductor light emitting device according to claim 1, wherein the wall surface of the first opening has a tapered shape in which the opening diameter increases as the distance from the semiconductor layer increases.   The semiconductor light emitting device according to claim 1, wherein a reflective film is formed on a wall surface of the first opening.   The semiconductor light emitting device according to claim 11, wherein the reflective film is a metal film or a laminated film of the metal film and an insulating film.   The semiconductor light emitting device according to claim 12, wherein the metal film includes aluminum. The semiconductor layer includes a p-type semiconductor layer and an n-type semiconductor layer,
2. The semiconductor according to claim 1, wherein the first electrode is formed with an n-type low-resistance layer doped with an impurity at a high concentration interposed between the first electrode and the p-type semiconductor layer. Light emitting device.   The semiconductor light emitting device according to claim 14, wherein the first electrode has a reflective layer containing aluminum in a part thereof.   The semiconductor light emitting device according to claim 1, wherein the semiconductor layer is made of a nitride semiconductor.   The semiconductor light emitting device according to claim 1, wherein the substrate is made of silicon.   The semiconductor light-emitting device according to claim 17, wherein the substrate has a (111) plane as a principal plane. Forming a concavo-convex portion on the main surface of the substrate;
A step (b) of forming a plurality of semiconductor layers including an active layer, a first semiconductor layer and a second semiconductor layer having different conductivity types on the main surface of the substrate on which the uneven portion is formed;
(C) forming a first electrode on the first semiconductor layer and forming a second electrode on the second semiconductor layer;
And (d) forming a first opening that exposes the uneven portion on the substrate.   20. The method of manufacturing a semiconductor light emitting device according to claim 19, wherein in the step (d), the opening position of the first opening is formed so as to be within a central portion of the first electrode.   21. The method of manufacturing a semiconductor light emitting device according to claim 19, wherein the step (d) includes a step of forming a second opening exposing the second electrode on the substrate.   20. The semiconductor light emitting device according to claim 19, wherein in the step (d), the wall surface of the first opening is formed in a tapered shape so that the opening diameter increases as the distance from the semiconductor layer increases. Production method.   The method of manufacturing a semiconductor light emitting device according to claim 19, wherein the semiconductor layer is made of a nitride semiconductor.

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