JP2007213567A - Support apparatus and method for circuit design - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a circuit design support apparatus which designs a circuit with considering output impedance values in both high level output and low level output from an output means. <P>SOLUTION: The circuit design support apparatus has a circuit information storage means for storing circuit information included with impedances in high level output and low level output from the output means, and a circuit information calculation means for extracting circuit information from the circuit information storage means and calculating wave distortion values in high level output and low level output from the output means. In addition, the circuit design support apparatus also has a wave distortion permissible value extraction means for extracting a wave distortion permissible value that a receiving means which receives output from the output means can permit, and a wave distortion determination means for comparing wave distortion values in high level output and low level output from the output means with the wave distortion permissible value and determining whether or not the wave distortion value is within the wave distortion permissible value. <P>COPYRIGHT: (C)2007,JPO&INPIT

Description

  The present invention relates to a circuit design support apparatus and a circuit design method for designing a circuit to be designed to operate normally at the time of circuit design of a printed circuit board, and a circuit designed by the circuit design method.

When designing the digital wiring of the printed circuit board, as shown in FIG. 1, the waveform resulting from the reflection of the digital wiring 3 connected from the driver side IC1 which is a means for outputting a signal to the receiver side IC5 which is a means for receiving a signal. Care must be taken not to cause malfunction of the circuit due to distortion. Reflection may occur in the driver side IC and the receiver side IC. As a countermeasure against such reflection, a method is known in which a damping resistor is inserted in series near the driver so that the sum of the output impedance value and the damping resistance value of the driver is close to the characteristic impedance value of the wiring.
For example, Patent Document 1 discloses an apparatus for determining a damping resistance value for suppressing reflection.
JP 2002-41592 A

According to Patent Document 1, the damping resistance value is determined using the internal resistance value of the driver so as to suppress reflection. However, some drivers have different output impedance values for high-level output and low-level output. Therefore, in order to suppress reflection, it is necessary to consider both the output impedance value at the time of high level output of the driver and the output impedance value at the time of low level output.
The present invention provides a circuit design support device for designing a circuit in consideration of both output impedance values at the time of high level output and low level output of a driver. A circuit design method is also provided. Furthermore, the present invention provides a circuit designed by a circuit design method.

FIG. 3 shows an example of waveform distortion when the output impedance value of the driver at the high level output is different from that at the low level output. In FIG. 3, the horizontal axis represents time, and the vertical axis represents voltage on an arbitrary scale.
FIG. 3A shows a case where a damping resistor whose resistance value is determined so that the sum of the output impedance value and the damping resistance value at the time of high level output of the driver becomes the characteristic impedance of the wiring is shown. In this case, the waveform distortion at the low level output of the driver is large as indicated by VL.
FIG. 3B shows a case where a damping resistor whose resistance value is determined so that the sum of the output impedance value and the damping resistance value at the time of low level output of the driver becomes the characteristic impedance of the wiring is shown. In this case, the waveform distortion at the time of high level output of the driver is large as indicated by VH.

FIG. 3C shows a case where a damping resistor whose resistance value is determined in consideration of the output impedance at the time of high level output and low level output of the driver is inserted. The waveform distortion value when a damping resistor is inserted in consideration of the output impedance value at the time of high level output and low level output of the driver, such as VH ′ and VL ′ in FIG. 3C, and FIG. The waveform distortion value when inserting a damping resistor that takes into account the output impedance value of either the high level output or low level output of the driver, such as VL in FIG. 3 and VH in FIG. , VH and VL are larger than VH ′ and VL ′. If the waveform distortion is large like VH and VL, the circuit may malfunction due to the waveform distortion.
As shown in FIG. 3C, when a damping resistor whose resistance value is determined in consideration of both the output impedance of the driver at the high level output and the low level output is inserted, the waveform distortion can be reduced. it can. As a result, the circuit can be operated normally.

  Based on the considerations as described above, the circuit design support apparatus of the present invention is a circuit including impedance at the time of high level output of the output means, impedance at the time of low level output of the output means, and wiring structure information. Circuit information storage means for inputting and storing information, and extracting circuit information including impedance at the time of high level output of the output means and impedance at the time of low level output of the output means from the circuit information storage means, and output means Is a waveform distortion value at the time of high level output, a circuit information calculation means for calculating a waveform distortion value at the time when the output means is at a low level output, and a waveform distortion tolerance value that is acceptable by the receiving means for receiving the output of the output means Waveform distortion allowable value extraction means for extracting, waveform distortion values when the output means outputs a high level, waveform distortion values when the output means outputs a low level, and the waveform distortion tolerance In comparison, the waveform distortion value and a determining waveform distortion determination means whether the waveform distortion tolerance. According to this configuration, it is possible to determine at the time of design whether or not the waveform distortion value when the output unit outputs a high level and outputs a low level is within an allowable range.

ここで、ＺＨは高レベル出力時のドライバの出力インピーダンス、ＺＬは低レベル出力時のドライバの出力インピーダンス、ＲＤはダンピング抵抗値、Ｚ０は配線の特性インピーダンス、Ｖｃｃは信号の振幅電圧値である。 The circuit information calculation means calculates the waveform distortion value VH when the output means is a high level output and the waveform distortion value VL when the output means is a low level output by the following equations (1) and (2).

Here, ZH is the output impedance of the driver at the time of high level output, ZL is the output impedance of the driver at the time of low level output, RD is the damping resistance value, Z0 is the characteristic impedance of the wiring, and Vcc is the amplitude voltage value of the signal.

The circuit information calculation means preferably includes candidate value setting means for setting another candidate value for the circuit information extracted from the circuit information storage means. The candidate value setting means sets the resistance value of the damping resistor and / or the characteristic value of the wiring impedance that satisfies the waveform distortion tolerance value when the waveform distortion determination means determines NO, or the waveform distortion When the determination means determines that it is appropriate, the range of the resistance value of the damping resistor and / or the range of the characteristic impedance of the wiring that satisfies the waveform distortion allowable value is set.
Further, the candidate value setting means can determine a candidate value of the damping resistance value Rd by the following equation (3).

  Further, the circuit design support apparatus of the present invention provides the determination result of the waveform distortion determination unit and the damping resistor candidate value and / or the characteristic impedance of the wiring set when the waveform distortion determination unit determines NO, or the waveform distortion. It is preferable to further include display means for displaying a damping resistance value range and / or a characteristic impedance range of the wiring satisfying the set waveform distortion tolerance when the judgment means judges that it is appropriate. Thereby, it is possible to inform the designer of the determination result. An appropriate value can be notified.

The circuit design support apparatus of the present invention further includes an output unit, a receiving unit, and a circuit information specifying unit for arbitrarily specifying a wiring from the circuit information stored in the circuit information storing unit, The circuit information calculation means extracts the waveform distortion value for the output means, reception means, and wiring combination circuit specified by the circuit information specifying means, and the waveform distortion determination means determines whether the waveform distortion value is within the allowable waveform distortion value. It is preferable to determine whether or not. In addition, when it is determined NO based on the determination result of the waveform distortion determination means, it is preferable to display a damping resistance value or a characteristic impedance value range of the wiring that satisfies the waveform distortion allowable value.
Further, the circuit design support device of the present invention performs waveform distortion determination for a plurality of combination circuits of output means, reception means, and wiring designated by the circuit information designation means, and for the plurality of combination circuits, It is preferable to obtain a damping resistance value or wiring characteristic impedance value that satisfies the waveform distortion tolerance value, or a range thereof, and display the list for the plurality of combinational circuits.

Further, according to another aspect of the present invention, there is provided a circuit design method, a circuit information accumulation step for accumulating circuit information including impedance at the time of high level output of the output means and impedance at the time of low level output of the output means; The circuit information including the impedance at the time of high level output of the output means and the impedance at the time of low level output of the output means is extracted, the waveform distortion value when the output means is at high level output, and the output means is low A circuit information extracting step for calculating a waveform distortion value at the time of level output, a waveform distortion allowable value extracting step for extracting a waveform distortion allowable value acceptable by a receiving means for receiving the output of the output means, and the output means having a high level. Comparing the waveform distortion value at the time of level output and the waveform distortion value when the output means outputs a low level with the allowable waveform distortion value, whether or not the waveform distortion is within the allowable waveform distortion value And a waveform distortion determination step of determining. By designing in accordance with this step, it is possible to determine at the design time whether the waveform distortion value when the output means is at the high level output and at the low level output is within the allowable range.
Further, the present invention is a circuit designed by the above circuit design method. Therefore, it is possible to obtain a circuit having no waveform distortion when the output means outputs a high level and a low level.

  According to the present invention, it is determined whether or not the waveform distortion value considering the output impedance at the time of high level output and low level output of the output means is within an allowable value, and further, the waveform distortion value is within the allowable value. It is possible to extract a damping resistance value and a characteristic impedance of the wiring. As a result, it is possible to design a circuit that does not cause malfunction of the circuit due to waveform distortion. Further, it is possible to obtain a circuit in which malfunction of the circuit due to waveform distortion does not occur.

Hereinafter, a circuit design support apparatus and a design method for designing an output impedance of a driver and a characteristic impedance of the wiring according to an embodiment of the present invention will be described with reference to the drawings.
FIG. 1 shows a circuit to be designed by the present invention. An output terminal 2 of a driver side IC 1 mounted on a printed circuit board is input to a receiver side IC 5 via a damping resistor 6 and a digital wiring 3 wired to the printed circuit board. A circuit connected to the terminal 4 is shown. The circuit to be designed shown in FIG. 1 is an example, and there are various other circuits that can be supported by the present invention.

FIG. 2 is a system configuration diagram of the circuit design support apparatus according to the present embodiment, and the circuit design support apparatus of the present invention includes a circuit information storage unit 11 and a waveform distortion inspection unit 12.
The circuit information storage unit 11 stores the circuit information shown in FIG. FIG. 4 shows part of circuit information of netA and netB. In this embodiment, since the output impedance of the driver and the characteristic impedance of the wiring are designed, the circuit information includes the wiring name for each wiring for determining waveform distortion, and the output impedance ZH at the time of high-level output of the driver. The output impedance ZL when the driver outputs at a low level, the amplitude voltage value Vcc of the signal flowing through the wiring, the characteristic impedance Z0 of the wiring, the damping resistance value RD inserted in the wiring, and the like. In addition, wiring structure information and the like may be input and stored.

The name of wiring, amplitude voltage value, characteristic impedance, and damping resistance value are acquired from circuit design and board design information. The output impedance at the time of high level output and low level output of the driver is obtained from the driver specifications. For example, using the corresponding data of the voltage and current at the time of pull-up and pull-down of the driver shown in FIG. And the output impedance ZL at the time of a low level output is computable by following formula (4) and Formula (5). Equations (4) and (5) below are calculated by applying a high level / low level threshold voltage value. Here, the calculation is performed using the value when the high level / low level threshold voltage value is 1 [V].
Note that the pull-up is a state where the input of the driver is connected to the power supply voltage. The pull-down is a state where the input of the driver is connected to the ground (0 [V]).

ここで、ＶＵはプルアップ時の電圧、ＩＵはプルアップ時の電流、ＶＤはプルダウン時の電圧、ＩＤはプルダウン時の電流である。

Here, VU is a pull-up voltage, IU is a pull-up current, VD is a pull-down voltage, and ID is a pull-down current.

  The waveform distortion inspection unit 12 that inspects the waveform distortion based on the circuit information stored in the circuit information storage unit 11 includes a circuit information calculation unit 13, a waveform distortion allowable value extraction unit 14, a waveform distortion determination unit 15, and a display unit. 16. The circuit information calculating unit 13 includes a circuit information reading unit 17 and a candidate value setting unit 18. In addition to these, although not shown, a control unit comprising a CPU for controlling the entire circuit design support apparatus of the present invention is provided. This control unit stores a control program in a nonvolatile memory or a temporary memory provided inside the waveform distortion inspection means 12 or outside the apparatus of the present invention, and controls the sequential operation of the apparatus of the present invention.

The circuit information calculation unit 13 extracts circuit information necessary for determination by the circuit information reading unit 17 from the circuit information storage unit 11, and the waveform distortion value when the driver outputs a high level of the waveform distortion determination target wiring. VH and a waveform distortion value VL when the driver outputs a low level are calculated. (Calculation method will be described later)
Next, the allowable waveform distortion value extracting unit 14 extracts the allowable waveform distortion value VP that can be received by the receiving unit that receives the output from the output unit. The allowable waveform distortion value VP is determined based on the specifications of the receiver. For example, FIG. 6A shows a case where there is one waveform distortion allowable value for one wire for netA and netB. FIG. 6B shows a case where there are a plurality of allowable values for netA and netB, for example, there are separate waveform distortion allowable values at high level output and low level output. FIG. 6C shows the relationship between the waveform and the waveform distortion tolerance. The allowable values shown in FIG. 6A or 6B may be set by the designer according to the conditions of the circuit to be designed, or may be determined based on the specifications of the receiver.

Next, the waveform distortion determination unit 15 extracts the circuit information extracted by the circuit information calculation unit 13, the waveform distortion value when the calculated driver outputs a high level and a low level, and the waveform distortion allowable value extraction unit 14 extracts. It is determined from the waveform distortion allowable value whether or not the waveform distortion value is within the waveform distortion allowable value. If the waveform distortion value is not within the allowable waveform distortion value, the candidate value setting unit 18 included in the circuit information calculation unit 13 sets a new candidate value, and the waveform distortion value falls within the allowable waveform distortion value. Calculate the value and the characteristic impedance of the wiring.
When it is determined whether or not the waveform distortion value is within the allowable waveform distortion value, the display unit 16 displays the determination result of the waveform distortion determination unit 15 on a display device such as a display. For example, “no waveform distortion problem” or “waveform distortion problem” is displayed.

The above is the system configuration of the circuit design support apparatus of the present invention. Next, the operation of waveform distortion determination will be described using a flowchart. FIG. 7 is a flowchart showing the waveform distortion determination operation according to this embodiment.
First, in step 101, circuit information necessary for the present invention is extracted from the circuit information stored in the circuit information storage means 11 by the circuit information reading means 17 included in the circuit information calculation means 13. As necessary circuit information, as shown in FIG. 4, for each wiring, the wiring name, the output impedance ZH when the driver outputs a high level, the output impedance ZL when the driver outputs a low level, the amplitude voltage of the signal flowing through the wiring The value Vcc, the characteristic impedance Z0 of the wiring, the damping resistance value RD inserted in the wiring, and the like. In step 102, the extracted circuit information is substituted into the following equations (1) and (2) to calculate the waveform distortion value VH when the driver outputs a high level and the waveform distortion value VL when the driver outputs a low level.

ここで、ＺＨは、高レベル出力時のドライバの出力インピーダンス
ＺＬは、低レベル出力時のドライバの出力インピーダンス
ＲＤは、ダンピング抵抗値
Ｚ０は、配線の特性インピーダンス
Ｖｃｃは、信号の振幅電圧値

Here, ZH is the output impedance of the driver at the time of high level output
ZL is the output impedance of the driver at low level output
RD is the damping resistance value
Z0 is the characteristic impedance of the wiring
Vcc is the amplitude voltage value of the signal

Here, an example of calculating the waveform distortion values VH and VL from the extracted circuit information in the circuit information calculation means 13 will be described by applying the numerical values shown in FIG.
For example, the waveform distortion value when the driver of the wiring netA in FIG. 4 outputs a high level and a low level outputs the circuit information of the netA (ZH = 20 [Ω], ZL = 40 [ Ω], Vcc = 3.3 [V], Z0 = 60 [Ω], RD = 40 [Ω]), and VH is 0 [V] and VL is about 0.47 [V] .

Next, in step 103, the waveform distortion allowable value extraction means 14 extracts the waveform distortion allowable value VP.
For example, the allowable waveform distortion value VP of the wiring netA in FIG. 6A is −0.3 [V] to 0.3 [V].

Next, in step 104, the waveform distortion determination unit 15 performs waveform distortion determination. The waveform distortion values VH and VL when the driver calculated at step 102 is at a high level output and at a low level output are compared with the waveform distortion allowable value VP extracted at step 103, and the driver outputs at a high level and at a low level. It is determined whether both of the current waveform distortion values are within the allowable waveform distortion value. If it is determined that the waveform distortion value is within the allowable waveform distortion value, the process proceeds to step 105. If it is determined that the waveform distortion value is not within the allowable waveform distortion value, the process proceeds to step 106.
For example, the waveform distortion values VH (0 [V]) and VL (about 0.47 [V]) when the driver of the wiring netA in FIG. 4 outputs a high level and a low level output the wirings in FIG. When determining whether or not the waveform distortion allowable value VP (−0.3 [V] to 0.3 [V]) of netA is within, since VH is within VP but VL is not within VP, waveform distortion It is determined that the value is not within the allowable value.

In step 105, the display means 16 displays that the determination target wiring has no problem of waveform distortion, and the process ends.
In step 106, the display unit 16 displays a warning that the determination target wiring has a waveform distortion value not within the allowable waveform distortion.
In step 107, a new candidate value is set by the candidate value setting means 18, and the damping resistance value RD and the characteristic impedance Z0 of the wiring that the waveform distortion value of the determination target wiring is within the waveform distortion allowable value are extracted. The extraction of the damping resistance value RD and the characteristic impedance Z0 of the wiring will be described later with reference to the RD and Z0 extraction flow shown in FIG.
In step 108, the damping resistance value RD and the characteristic impedance Z0 of the wiring extracted in step 107 are displayed on the display means 16, and the process ends.
The above is the waveform distortion determination operation in the flowchart of FIG. 7, and it is possible to confirm whether or not the waveform distortion value of the determination target wiring is within the allowable waveform distortion value by these series of processing steps. In this way, design support can be provided.

Next, the operation of the RD, Z0 calculation flow will be described. FIG. 8 is a flowchart showing the operation of extracting the damping resistance value RD and the characteristic impedance Z0 of the wiring that make the waveform distortion value within the allowable waveform distortion value according to this embodiment.
First, in step 111, the circuit information calculation means 13 is used to calculate the waveform distortion values VH and VL when the damping resistance value RD is replaced with a new candidate value obtained by changing the original design value. Then, a damping resistance value range RD ′ in which both the waveform distortion values VH and VL are within the waveform distortion allowable value VP is extracted. At this time, ZH, ZL, Z0, and Vcc are fixed values.

For example, in the wiring netA in FIG. 4, the waveform distortion values VH and VL when the driver changes the damping resistance value RD at the time of high level output and low level output are obtained from the equations (1) and (2). As shown in FIG. In this case, the damping resistance value RD ′ in which both the waveform distortion values VH and VL are within the waveform distortion value VP (−0.3 [V] to 0.3 [V]) of the wiring netA in FIG. 30 [Ω].
In this example, the damping resistance value RD ′ is one, but there may or may not be a plurality. Further, although the damping resistance value is even changed at intervals of 5 [Ω], it may be changed at a finer interval or a value based on the standard resistance value (E series).

Next, in step 112, it is determined whether or not there is a damping resistance value RD ′ extracted in step 111. If it is determined that there is a damping resistance value RD ′, the process proceeds to step 113 and there is no damping resistance value RD ′. If so, the process proceeds to step 114.
In step 113, RD = RD ′ is set, the damping resistance value RD and the characteristic impedance Z0 of the wiring are extracted as values within which the waveform distortion is within the allowable waveform distortion, and the process ends.
In step 114, the characteristic impedance Z0 of the wiring is set to a large value Z0 ′ by one step. For example, conditions for increasing the characteristic impedance of wiring include reducing the wiring width and separating the ground between the wiring and the wiring.When these conditions are changed in the smallest unit according to the physical and design conditions of the board The characteristic impedance of the wiring may be Z0 ′. If the characteristic impedance of the wiring cannot be increased due to the physical conditions and design conditions of the board, the damping resistance value and the characteristic impedance value of the wiring that cause the waveform distortion to be within the waveform distortion tolerance cannot be extracted, and the process ends. It doesn't matter.

In step 115, Z0 '= Z0 and return to step 111.
The above is the operation of extracting the damping resistance value RD and the characteristic impedance Z0 of the wiring in which the waveform distortion is within the allowable waveform distortion value in the flowchart of FIG. 8, and the waveform distortion of the determination target wiring is performed by these series of processing steps. It is possible to extract the damping resistance value RD and the characteristic impedance Z0 of the wiring that are within the waveform distortion tolerance.
Thus, the designed circuit is a circuit without waveform distortion, and a printed circuit board can be manufactured based on this circuit.

Next, another system configuration example of the circuit design support apparatus according to the present invention is shown in FIG. The system configuration example shown in FIG. 10 is obtained by adding circuit information specifying means 19 to the system configuration diagram of FIG. The circuit information specifying means 19 is constituted by input means such as a mouse, a cursor, and a pointing device. Further, a control line for giving an instruction from the waveform distortion determination means 15 to the candidate value setting means 18 is added. The other parts are the same as in FIG.
The circuit design support apparatus according to this embodiment realizes design support more specifically by designating an IC or wiring on a circuit through a dialog with a designer. That is, circuit information is read from the circuit information storage means 11 by the circuit information reading means 17 and the wiring or IC required by the designer is specified by the circuit information specifying means 19. Then, in the circuit design support apparatus, the circuit information calculation unit 13 calculates the waveform distortion value when the output unit outputs a high level and the waveform distortion value when the output unit outputs a low level, as described above. The waveform distortion value when the output means outputs a high level and the waveform distortion value when the output means outputs a low level and the allowable waveform distortion value acceptable by the receiving means are compared by the waveform distortion determination means 15, and the waveform distortion It is determined whether or not the value is within the allowable waveform distortion value.

The above-described operation of the circuit design support apparatus is displayed by, for example, the circuit design support screen 20 shown in FIG. 11, and realizes a conversation with the designer. In the circuit design support screen 20 shown in FIG. 11, the circuit information reading means 17 reads the circuit information contained in the circuit information storage means 11 in the circuit information designation area 21 below the display screen and displays it on the display means 16.
The circuit information designation area 21 includes a driver IC designation area 23, a wiring designation area 24, and a receiver designation area 25. The driver IC designation area 23 lists and displays driver ICs that can be used for this design target circuit. The wiring designation area 24 lists and displays wiring names, for example. The receiver IC designation area 25 lists and displays receiver ICs that can be used for the circuit to be designed. In addition to this, an area for displaying information necessary for circuit design may be provided.
The circuit information displayed and listed in the circuit information specifying area 21 can be selected and specified by the designer by the circuit information specifying means 19. For example, in the driver designation area 23, the reference number and pin number of the driver IC included in the circuit information storage means 11 are displayed as IC1 (2), IC11 (3), IC12 (6), and the reference number. A check box for designating by the designer is provided on the left side of the, and the check box can be selected and specified by checking with a means such as a mouse. Here, the numbers in parentheses represent pin numbers. The wiring designation area 24 and the receiver IC designation area 25 can be selected and designated similarly.

  In this way, the combination of the IC and the wiring selected and designated by the check box is displayed as a circuit configuration diagram above the display screen. At the same time, for the selected combination of IC and wiring, the waveform distortion value when the output means outputs a high level and the waveform distortion value when the output means outputs a low level are calculated and compared with the allowable waveform distortion value of the reception means. Then, it is determined whether or not the waveform distortion is within the allowable value. This determination result is displayed in the display area 22.

FIG. 11 shows that the determination result is “no problem”, but when the determination result is determined to be inappropriate, the candidate value newly set by the candidate value setting means 18 is displayed on the countermeasure range display area 26. Display as an appropriate damping resistance. Alternatively, the damping resistance value displayed in the countermeasure range display area 26 displays an applicable range, a standard value, and a recommended value such as a minimum value (Min), a maximum value (Max), and a standard value (Typ).
Further, even when it is determined that the determination result is appropriate for the selected combination of IC and wiring, the candidate value that can be set by the candidate value setting means 18 is displayed in the countermeasure range display area 26 with the appropriate resistance value of the damping resistor and The design range may be displayed as the maximum value or minimum value. Thereby, the circuit determined to be appropriate and the appropriate resistance range can be compared.
The circuit design support screen shown in FIG. 11 is an example, and may be displayed entirely on one screen, or may be divided and displayed on two or more screens. Information other than that shown in FIG. 11 may be displayed.

Furthermore, in another embodiment of the present invention, determination can be made by specifying a plurality of wirings in the circuit information specifying area 21. In this case, a plurality of combinations of specified ICs and wirings are extracted from the circuit connection information, and the same determination as described above is performed. Then, the corresponding wiring, IC reference number, determination result, and appropriate countermeasure range may be displayed in a list format, for example, as shown in a list on the determination result and countermeasure range list display screen 27 as shown in FIG.
In FIG. 12, the driver IC and the receiver IC are specified for netA and netB, the determination results are displayed, and the maximum and minimum damping resistance values and the standard damping resistance value are displayed for the “net problem” wiring netA. is doing. Of course, the maximum and minimum damping resistance values and the standard damping resistance value may be displayed for the “net no problem” wiring netB.

In the embodiment, the method of obtaining the Rd value within the allowable range of the waveform distortion by sequentially changing the value of the damping resistance value Rd when the waveform distortion determination unit determines NO is described. The value of Rd may be set by the candidate value setting means 18 using the following equation (3).

It is a design object circuit diagram of the present invention. 1 is a system configuration diagram showing an embodiment of a circuit design support apparatus of the present invention. It is a figure explaining the waveform distortion by the difference in the output impedance at the time of the high level output of a driver, and the low level output. It is a figure showing the data structure of the circuit information in one Embodiment of the circuit design support apparatus of this invention. It is a figure showing an example of the voltage current corresponding data at the time of pull-up and pull-down. It is a figure showing the data structure of the waveform distortion allowable value in one Embodiment of the circuit design support apparatus of this invention. It is a flowchart showing one Embodiment of the circuit design support apparatus of this invention. It is a flowchart showing the extraction method of the damping resistance value and the characteristic impedance of wiring in which the waveform distortion in one Embodiment of the circuit design support apparatus of this invention becomes in a waveform distortion tolerance value. It is a figure explaining the waveform distortion value at the time of changing a damping resistance value. It is a system block diagram showing other embodiment of the circuit design support apparatus of this invention. It is a figure which illustrates the display screen in the other Example of the circuit design assistance apparatus of this invention. It is a figure which illustrates the display screen which displays as a list the determination result with respect to several circuit information in further another embodiment of the circuit design support apparatus of this invention.

Explanation of symbols

1 Driver side IC
2 Output terminal 3 Digital wiring 4 Input terminal 5 Receiver IC
6 Damping resistor 11 Circuit information accumulating means 12 Waveform distortion inspecting means 13 Circuit information calculating means 14 Waveform distortion allowable value extracting means 15 Waveform distortion determining means 16 Display means 17 Circuit information reading means 18 Candidate value setting means 19 Circuit information specifying means 20 Circuit Design support display screen 21 Circuit information designation area 22 Judgment result display area 23 Driver IC designation area 24 Wiring designation area 25 Receiver IC designation area 26 Countermeasure area display area 27 Judgment result and countermeasure area list display screen

Claims (11)

Circuit information accumulating means for inputting and accumulating circuit information including structure information of wiring, impedance at the time of high level output of the output means, impedance at the time of low level output of the output means,
Extracting circuit information including the impedance at the time of high level output of the output means and the impedance at the time of low level output of the output means from the circuit information storage means, the waveform distortion value when the output means is high level output, and the output means Circuit information calculation means for calculating a waveform distortion value at the time of low level output,
A waveform distortion allowable value extracting means for extracting a waveform distortion allowable value acceptable by the receiving means for receiving the output of the output means;
The waveform distortion value when the output means outputs a high level and the waveform distortion value when the output means outputs a low level are compared with the allowable waveform distortion value to determine whether the waveform distortion value is within the allowable waveform distortion value. A circuit design support apparatus comprising waveform distortion determination means for determining. The circuit information calculation means calculates the waveform distortion value VH when the output means is a high level output and the waveform distortion value VL when the output means is a low level output by the following equations (1) and (2). The circuit design support apparatus according to claim 1.

Where ZH is the output impedance of the output means at the time of high level output
ZL is the output impedance of the output means at low level output
RD is the damping resistance value
Z0 is the characteristic impedance of the wiring
Vcc is the amplitude voltage value of the signal   The circuit design support apparatus according to claim 1, wherein the circuit information calculation unit includes a candidate value setting unit that sets another candidate value for the circuit information extracted from the circuit information storage unit.   The candidate value setting means sets a resistance value of a damping resistor and / or a candidate value of a characteristic impedance of a wiring that satisfies the waveform distortion tolerance value when the waveform distortion determination means determines NO, or the waveform distortion 4. The circuit design support according to claim 3, wherein when the determination means determines appropriate, the resistance value range of the damping resistor and / or the characteristic impedance range of the wiring satisfying the waveform distortion allowable value is set. apparatus. 5. The circuit design support apparatus according to claim 3, wherein the candidate value setting unit determines a candidate value of a damping resistance value Rd by the following equation (3).

  The determination result of the waveform distortion determination means and the damping resistor candidate value and / or the characteristic impedance of the wiring set when the waveform distortion determination means determines NO, or set when the waveform distortion determination means determines appropriate 6. The circuit design support according to claim 1, further comprising display means for displaying a range of a damping resistance value that satisfies the waveform distortion allowable value and a range of a characteristic impedance of the wiring. apparatus.   Out of the circuit information stored in the circuit information storage means, the output means, the receiving means, and the circuit information designating means for arbitrarily designating the wiring, the output means designated by the circuit information designating means, The waveform distortion value for the combination circuit of the receiving means and the wiring is extracted by the circuit information calculation means, and the waveform distortion determination means determines whether or not the waveform distortion value is within a waveform distortion allowable value. The circuit design support apparatus according to any one of 1 to 6.   The range of the damping resistance value or the characteristic impedance value of the wiring that satisfies the waveform distortion tolerance value is displayed when it is determined to be negative based on the determination result of the waveform distortion determination means. The circuit design support apparatus described.   Waveform distortion determination is performed for a plurality of combination circuits of output means, reception means, and wiring specified by the circuit information specifying means, and a damping resistance value that satisfies the waveform distortion allowable value for the plurality of combination circuits or 9. The circuit design support apparatus according to claim 1, wherein characteristic impedance values of wirings or ranges thereof are obtained and a list is displayed for the plurality of combinational circuits. A circuit information accumulation step for inputting and accumulating circuit information including structure information of wiring, impedance at the time of high level output of the output means, impedance at the time of low level output of the output means,
The circuit information including the impedance at the time of high level output of the output means and the impedance at the time of low level output of the output means is extracted, the waveform distortion value when the output means is high level output, and the output means is low level A circuit information extraction step for calculating a waveform distortion value at the time of output;
A waveform distortion tolerance extraction step for extracting a waveform distortion tolerance that is acceptable by the reception means that receives the output of the output means;
Comparing the waveform distortion value when the output means outputs a high level and the waveform distortion value when the output means outputs a low level with the allowable waveform distortion value, whether the waveform distortion value is within the allowable waveform distortion value A circuit design method comprising: a waveform distortion determination step for determining.   A circuit designed by the circuit design method according to claim 10.

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