JP2007213038A - Display device and electronic apparatus having same - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a display device where power consumption can be suppressed and the number of gray scales can be increased without a scanning line driver circuit on both sides of a pixel portion. <P>SOLUTION: In the display device having a scanning line driver circuit, a shift register comprising the scanning line driver circuit has 4m-stage flip-flop circuits in every m scanning lines (m is a natural number), and a signal which selects the scanning line in a first half period of one scanning line selection period and a signal which selects the scanning line in a second half period of the one scanning line selection period is output to the scanning line by other start pulse. <P>COPYRIGHT: (C)2007,JPO&INPIT

Description

  The present invention relates to a display device. The present invention particularly relates to a structure of a scanning line driver circuit in an active matrix display including a light-emitting element and manufactured using a semiconductor device.

  Note that the semiconductor device here refers to all devices that can function by utilizing semiconductor characteristics.

  In recent years, demand for thin displays has been rapidly increased mainly for TVs, PC monitors, mobile terminals, and the like, and further development has been promoted. Thin displays include a liquid crystal display (LCD) and a display device including a light emitting element. In particular, an active matrix display using a self-luminous element is bent by the use of a flexible substrate, etc. in addition to the advantages of existing LCDs such as thinness, light weight and high image quality, fast response speed, wide viewing characteristics, etc. Because it becomes possible, it is expected as a next-generation display.

  In an active matrix display using a light-emitting element, the most basic pixel structure is the structure shown in FIG. 16B (see Non-Patent Document 1). As the driving method of the pixel configuration, the driving transistor is driven in a saturation region, the current luminance is controlled by a current flowing through the light emitting element, and the driving transistor is driven in a non-saturation region (linear region). There is a voltage drive that controls light emission by an applied voltage.

  In the current driving described above, it is necessary to operate the driving transistor in the saturation region. Ideally, the current flowing to the light emitting element is determined not by the drain-source voltage (Vds) of the driving transistor but by the gate-source voltage (Vgs). However, if the drive transistor characteristics vary among the pixels due to the transistor manufacturing process or the like, the flowing current value is affected. In particular, if the effective Vgs (hereinafter referred to as eVgs) is not uniform among the pixels due to variations in the threshold voltage (hereinafter referred to as Vth) of the transistors, the emission luminance varies greatly among the pixels, resulting in display unevenness and display quality. Result.

Therefore, it is desirable to employ voltage driving in which the driving transistor is operated in a linear region that is not easily affected by variations in Vth. As a gradation method in the case of voltage driving, there is a digital time gradation method in which gradation is expressed by continuously changing the light emission time. Further, in the digital time gray scale method, there are problems such as an increase in the speed of the signal line driver circuit, an increase in the number of divided video signals, an increase in the number of transistors in each pixel, and the like. As means for solving these problems, there has been proposed a driving method in which the scanning line selection period is divided into front and rear, and a signal writing period and an erasing period are alternately provided. (See Patent Document 1)
M.M. Mizukami, K .; Inukai, H .; Yamagata et al. , Society For Information Display '00 Digest, vol31, pp912-915 JP 2005-338777 A

  The outline of the driving method proposed in Patent Document 1 (hereinafter referred to as GSD driving) will be described with reference to FIG.

  As shown in FIG. 16A, in the digital time gray scale method, one frame is divided into subframes (SF1 to SF4) corresponding to the number of bits, and light emission and non-light emission of each subframe and weighting of the light emission period are performed. Brightness is controlled to express gradation. Here, a case of 4 bits will be described as an example. Further, the number of subframes only needs to be equal to or greater than the number of bits, and may be further increased as a countermeasure against pseudo contour.

  First, in SF1, the video signal of the first bit is written from the first scanning line to the last row in order, and the light emission period is sequentially shifted from the row in which the video signal is written. The light emission period shown in FIG. 16A is the light emission period of the last row in SF1. The second bit video signal is written in SF2 in order from the row where the light emission period of SF1 ends, and the light emission period is sequentially shifted in the same manner as in SF1.

  A period during which a video signal is written from the first row to the last row is referred to as a writing period. In SF3 and SF4 in which the writing period is longer than the light emitting period, even if the light emitting period ends, the next subframe cannot be entered, so an erasing period in which the non-light emitting state is forcibly inserted is inserted. By inserting the erasing period, accurate gradation expression is possible.

  Specifically, this will be described together with driving of the pixel illustrated in FIG. A selection pulse is input to the scanning line 211, the writing transistor 213 is turned on, and the video signal input to the signal line 210 is written to the driving transistor 214 and the capacitor 215. Here, a case where the driving transistor 214 is a p-type transistor will be described. Since the driving transistor 214 is a p-type transistor, when the written video signal is Low (hereinafter referred to as L), the driving transistor 214 is turned on, current flows from the current supply line 212 to the cathode 217, and light emission occurs. The element 216 emits light. If the video signal is High (hereinafter referred to as H), the driving transistor 214 is turned off, so that the light emitting element 216 is in a non-light emitting state.

  In the above-described erasing period, the scanning line selection period is divided into two erasing timings and writing timings. At the erasing timing, the H potential is always input to the signal line 210, the driving transistor 214 is forcibly turned off in the row selected in accordance with the erasing timing, and the light emitting element 216 is in a non-light emitting state. Further, at the write timing, a video signal is input to the signal line 210, and light emission or non-light emission of the light emitting element 216 is determined by each video signal in a row selected in accordance with the write timing.

  In the above-described erasing period, the scanning line selection period is divided into two parts before and after the erasing timing and the writing timing. As shown in the SF3 period of FIG. 16A, this is because the light emission period from the first row starts before the writing period up to the last row ends. This is because it is necessary to input a video signal and an erase signal. At the erasing timing, the Hi potential is always input to the signal line 210, the driving transistor 214 is forcibly turned off in the row selected in accordance with the erasing timing, and the light emitting element 216 is in a non-light emitting state. Further, at the write timing, a video signal is input to the signal line 210, and light emission or non-light emission of the light emitting element 216 is determined by each video signal in a row selected in accordance with the write timing.

  Further, a method of dividing the scanning line selection period will be described with reference to FIG. FIG. 17 shows an example of an active matrix display device. The active matrix display device generally includes a signal line driving circuit 312 that outputs a video signal to S1 to Sn of a signal line 304, a scanning line driving circuit 301 for writing that sequentially selects G1 to Gm of a scanning line 313, and An erasing scanning line driving circuit 302, a switching circuit 303 provided between the scanning line driving circuits and the scanning lines, and a display area 311 in which pixels 310 are arranged in a matrix. Each pixel 310 includes a writing transistor 305, a driving transistor 306, and a light emitting element 307.

  The signal line driver circuit 312 is line-sequentially driven, and outputs a desired video signal and erase signal alternately to the signal line 304 in the first half and the second half of the two-divided scanning line selection period. The switching circuit 303 operates in synchronization with the timing of the first half and the second half of the scanning line selection period to determine whether writing to the scanning line 313 from each scanning line driving circuit is in an active state or a high impedance state. Switch. When the video signal is output from the signal line driver circuit 312 to the signal line 304, the output from the writing scan line driver circuit 301 is in an active state, and the output to the scan line 313 of the erase scan line driver circuit 302 is It becomes a high impedance state. On the other hand, when the erase signal is output from the signal line driver circuit 312 to the signal line 304, the output from the write scan line driver circuit 301 is in a high impedance state, and the scan line 313 of the erase scan line driver circuit 302 is output. Output to becomes active.

  Thus, it is possible to write the video signal and the erase signal to different rows in one scanning line selection period. However, in order to perform the GSD driving described above, two scanning line driving circuits are required on both sides. In addition, the scanning line driving circuit needs a pulse width control circuit in addition to the switching circuit so that writing to the scanning line from both scanning line driving circuits does not overlap, which is disadvantageous for a narrow frame due to an increase in circuit area. . Furthermore, all the scanning lines connected to the scanning line driving circuit are repeatedly charged and discharged every scanning line selection period during the erasing timing. Further, since the capacitance value related to the scanning line is high, the power consumption is greatly increased by repeating charging and discharging.

  In order to solve the above-described problems, the present invention provides a new display device and electronic apparatus.

  One aspect of the display device of the present invention is a display device including a scan line driver circuit that supplies signals to m (m is a natural number) scan lines, and the shift register constituting the scan line driver circuit includes the scan line. At least 4k stages (k is a natural number) are provided for each corresponding flip-flop circuit, and a start pulse with a different timing is input to the shift register, so that the scanning line in the first half period of one scanning line selection period. And a second selection signal for selecting the scanning line in the second half of the one scanning line selection period are output to the scanning line.

  Another display device of the present invention is a display device having a scanning line driving circuit that supplies signals to m scanning lines (m is a natural number of 2 or more), and a shift register that constitutes the scanning line driving circuit. Are provided with at least 4k stages (k is a natural number) of flip-flop circuits corresponding to the first to (m−1) -th scanning lines of the scanning lines, and corresponding to the m-th scanning line. A first selection signal for selecting the scanning line in the first half of one scanning line selection period by inputting start pulses of different timings to the shift register; In the second half of the scanning line selection period, the second selection signal for selecting the scanning line is output to the scanning line.

  Another display device of the present invention is a display device having a scan line driver circuit that supplies signals to m (m is a natural number) scan lines, and the shift register that constitutes the scan line driver circuit includes At least 4k stages (k is a natural number) of flip-flop circuits corresponding to each scanning line are provided, and start pulses at different timings are input to the shift register, whereby the first period of one scanning line selection period. In order to erase the video data input to the pixels connected to the scanning line and the video data input to the pixels connected to the scanning line in the second period of the one scanning line selection period. The signal is output to the scanning line.

  Another display device of the present invention is a display device having a scanning line driving circuit that supplies signals to m scanning lines (m is a natural number of 2 or more), and a shift register that constitutes the scanning line driving circuit. Are provided with at least 4k stages (k is a natural number) of flip-flop circuits corresponding to the first to (m−1) -th scanning lines of the scanning lines, and corresponding to the m-th scanning line. At least one stage, and when a start pulse having a different timing is input to the shift register, video data is supplied to pixels connected to the scan line in the first period of one scan line selection period. A signal for inputting, and a signal for erasing video data input to a pixel connected to the scan line in the second period of the one scan line selection period, And configured to be output to 査線.

  Another display device of the present invention is a display device having a scan line driver circuit that supplies signals to m (m is a natural number) scan lines, and the shift register that constitutes the scan line driver circuit includes At least 4k stages (k is a natural number) of flip-flop circuits corresponding to each scanning line are provided, and start pulses at different timings are input to the shift register, whereby the first period of one scanning line selection period. And a signal for inputting the first video data to the pixels connected to the scan line in the second scan line selection period and the second video data to the pixels connected to the scan line in the second period of the one scan line selection period. A signal for input is output to the scanning line.

  Another display device of the present invention is a display device having a scanning line driving circuit that supplies signals to m scanning lines (m is a natural number of 2 or more), and a shift register that constitutes the scanning line driving circuit. Are provided with at least 4k stages (k is a natural number) of flip-flop circuits corresponding to the first to (m−1) -th scanning lines of the scanning lines, and corresponding to the m-th scanning line. At least one stage, and a start pulse having a different timing is input to the shift register, so that a pixel connected to the scan line in the first period of one scan line selection period has a first A signal for inputting video data and a signal for inputting second video data to a pixel connected to the scan line in the second period of the one scan line selection period And configured to be output to the scan line.

  Another display device of the present invention is a display device having a scan line driver circuit that supplies signals to m (m is a natural number) scan lines, and the shift register that constitutes the scan line driver circuit includes At least 4k stages (k is a natural number) of flip-flop circuits corresponding to each scanning line are provided, and the start pulse of different timing is input to the shift register, so that the first half period of one scanning line selection period A signal for selecting a scanning line and a signal for selecting the scanning line in the second half of the one scanning line selection period are output to the scanning line, and the scanning line in the first period and the second period. Is output from any one of the 4k flip-flops corresponding to one scanning line.

  Another display device of the present invention is a display device having a scanning line driving circuit that supplies signals to m scanning lines (m is a natural number of 2 or more), and a shift register that constitutes the scanning line driving circuit. Are provided with at least 4k stages (k is a natural number) of flip-flop circuits corresponding to the first to (m−1) -th scanning lines of the scanning lines, and corresponding to the m-th scanning line. At least one stage, and by inputting start pulses of different timings to the shift register, a signal for selecting the scanning line in the first half of one scanning line selection period, and the one scanning line selection A signal for selecting the scanning line in the second half of the period is output to the scanning line, and a signal output from the scanning line in the first period and the second period is Of the flip-flop circuit of 4k stage corresponding to one scanning line, and the structure is a signal output from any one of the flip-flop circuit.

  Another display device of the present invention is a display device having a scan line driver circuit that supplies signals to m (m is a natural number) scan lines, and the shift register that constitutes the scan line driver circuit includes At least 4k stages (k is a natural number) of flip-flop circuits corresponding to each scanning line are provided, and start pulses at different timings are input to the shift register, whereby the first period of one scanning line selection period. In order to erase the video data input to the pixels connected to the scanning line and the video data input to the pixels connected to the scanning line in the second period of the one scanning line selection period. Are output to the scanning lines, and the signals output from the scanning lines in the first period and the second period are 4k stages corresponding to one scanning line. Of flip-flop circuit, and a configuration is a signal output from any one of the flip-flop circuit.

  Another display device of the present invention is a display device having a scanning line driving circuit that supplies signals to m scanning lines (m is a natural number of 2 or more), and a shift register that constitutes the scanning line driving circuit. Are provided with at least 4k stages (k is a natural number) of flip-flop circuits corresponding to the first to (m−1) -th scanning lines of the scanning lines, and corresponding to the m-th scanning line. At least one stage, and when a start pulse having a different timing is input to the shift register, video data is supplied to pixels connected to the scan line in the first period of one scan line selection period. A signal for inputting, and a signal for erasing video data input to a pixel connected to the scan line in the second period of the one scan line selection period, A signal output to the inspection line and output to the scanning line in the first period and the second period is any one of 4k-stage flip-flops corresponding to one scanning line. The signal is output from the circuit.

  Note that the display device of the present invention may have a configuration in which the start pulse input to the scanning line driving circuit is input from the flip-flop circuit side corresponding to the first scanning line.

  Note that in the display device of the present invention, at least one flip-flop circuit is further provided on the side of the flip-flop circuit corresponding to the first scanning line (that is, the previous stage) in the scanning line driving circuit. It may be a configuration.

  Note that the display device of the present invention includes a plurality of pixels, a signal line driver circuit, and the scan line driver circuit, and the plurality of pixels, the signal line driver circuit, and the scan line driver circuit are the same. The structure provided on the board | substrate may be sufficient.

  Note that the display device of the present invention has a structure in which each of the plurality of pixels is provided with a light emitting element, a transistor for driving the light emitting element, and a transistor for selecting the pixel. Also good.

  The display device of the present invention includes a liquid crystal display device, a DMD (Digital Micromirror Device), a PDP (Plasma Display Panel), a light emitting device including a light emitting element represented by an organic light emitting element (OLED) in each pixel, A display device capable of display by FED (Field Emission Display) and other time gray scale methods is included in the category.

  In this specification, a light-emitting element includes, in its category, an element whose luminance is controlled by current or voltage. Specifically, an OLED (Organic Light Emitting Diode), an inorganic EL (Electro Luminescence), a MIM type electron source element (electron emitting element) used in FED (Field Emission Display), and the like are included.

  One of the light emitting elements, OLED (Organic Light Emitting Diode), is a layer containing an electroluminescent material (hereinafter referred to as an electroluminescent layer) that can obtain luminescence generated by applying an electric field, an anode, and an anode. And a cathode. The electroluminescent layer is provided between the anode and the cathode, and is composed of a single layer or a plurality of layers. In some cases, these layers contain an inorganic compound. Luminescence in the electroluminescent layer includes light emission (fluorescence) when returning from the singlet excited state to the ground state and light emission (phosphorescence) when returning from the triplet excited state to the ground state.

  The display device includes a panel in which the light emitting element is sealed, and a module in which an IC including a controller is mounted on the panel.

  Note that as a transistor used in the light-emitting device of the present invention, a polycrystalline semiconductor, a microcrystalline semiconductor (including a semi-amorphous semiconductor), or a thin film transistor using an amorphous semiconductor can be used. It is not limited to a thin film transistor. A transistor formed using single crystal silicon or a transistor using SOI may be used. In addition, a transistor using an organic semiconductor, a transistor using carbon nanotubes, or a transistor using zinc oxide may be used. In addition, the transistor provided in the pixel of the light-emitting device of the present invention may have a single gate structure, a double gate structure, or a multi-gate structure having more gates.

  In a time-division gray scale method (also referred to as a time gray scale method) which is one of driving methods of a display device, a row writing period is divided into two, and pixels in the first half row writing period (first row writing period). A video signal is written to the pixel, and a signal for forcibly stopping the supply of current to the light-emitting element is written to the pixel in the latter row writing period (second row writing period). A non-display period is provided by writing a signal for forcibly stopping the supply of current to the light-emitting element to the pixel, and the length of the subframe period is shorter than the length of the writing period. By using the scanning line driving circuit having the structure of the present invention, it is necessary to repeatedly charge and discharge all scanning lines in the erasing period, which is a period for inputting a signal for forcibly stopping the supply of current to the light emitting element. Power consumption can be greatly reduced. Further, by using the scan line driver circuit having the structure of the present invention, it is not necessary to provide a switching circuit or the like. Further, by using the scan line driver circuit having the structure of the present invention, the scan line driver circuit can be operated only by being arranged on one side, and the circuit scale can be reduced.

  In addition, since the length of the writing period can be ensured even if the number of subframe periods appearing in one frame period is increased, the number of gradations can be increased while suppressing the driving frequency of the driving circuit. . Further, even when the subframe period is further divided, the length of the writing period can be ensured, so that generation of a pseudo contour can be suppressed while suppressing the driving frequency of the driving circuit.

Further, by using the scanning line driving circuit, it is possible to select different scanning lines and input different video signals to each scanning line selection period in addition to the erasing period. Therefore, since the light-emitting element can emit light in the subframe period without providing an erasing period, display can be performed without reducing the duty ratio, power consumption can be reduced, and the wiring width can be reduced. it can.

  Hereinafter, embodiments of the present invention will be described with reference to the drawings. However, the present invention can be implemented in many different modes, and those skilled in the art can easily understand that the modes and details can be variously changed without departing from the spirit and scope of the present invention. Is done. Therefore, the present invention is not construed as being limited to the description of this embodiment mode.

(Embodiment 1)
The specific structure of the scanning line driving circuit of the present invention will be described in detail with reference to FIG. An outline of a display device including a scan line driver circuit of the present invention will be described.

  FIG. 1A illustrates a structure of a display device including a scan line driver circuit of the present invention. The display device illustrated in FIG. 1A includes a pixel portion 11 in which a plurality of pixels 10 are formed, a signal line driver circuit 12, and a scanning line driver circuit 13. The scanning line driving circuit 13 can select the scanning lines G1 to Gm, that is, the pixels 10 in each row. The signal line driving circuit 12 can control a video signal input to the pixels 10 in the row selected by the scanning line driving circuit 13 via the signal lines S1 to Sx.

  Next, FIG. 1B illustrates a structure of the scan line driver circuit of the present invention shown in FIG. The scanning line driving circuit includes a shift register 101, a level shifter 103, and a buffer circuit 104, and the shift register 101 includes a plurality of flip-flops 102. A start pulse (GSP) is input to the first flip-flop 102 (also referred to as a flip-flop circuit) of the shift register 101, a clock (GCK) is input to the odd-numbered stage of the flip-flop 102, and a clock is input to the even-numbered stage. Is inverted (GCKB). The output of the flip-flop is connected to the level shifter 103 every four stages, and amplifies or shifts the input pulse to an arbitrary voltage. The pulses output from the level shifter 103 are output to the scanning lines G1 to Gm (m is a natural number) via the buffer circuit 104.

Note that the flip-flops 102 in the scanning line driving circuit correspond to the number of scanning lines, and at least 4k stages (k is a natural number) of flip-flops are provided for each scanning line except the last row. . In this embodiment mode, the scanning line driving circuit will be described below on the assumption that it has a 4m-stage flip-flop.

Note that as illustrated in FIG. 18A, the flip-flop 102 in the scan line driver circuit includes at least 4k flip-flops for each of the first to (m−1) th scan lines. Note that the flip-flop corresponding to the m-th scanning line may have 4k stages as in the case of the other scanning lines, but it may have a configuration in which at least one stage is provided. This is because the flip-flop corresponding to the m-th scanning line does not use the signal output from the (4 (m−1) +1) to (4m) -th flip-flop. Therefore, a configuration in which the (4 (m−1) +1) to (4m) stage flip-flops are not provided in advance can further reduce the size of the scanning line driver circuit including the flip-flop circuits, which is preferable. is there.

  As shown in FIG. 18B, the flip-flop 102 in the scan line driver circuit outputs the signal of F1 in the flip-flop corresponding to the first scan line, in other words, the side to which the start pulse is input. Further, a flip-flop may be provided in front of the flip-flop. This is to make the signal input to the flip-flop corresponding to the first scanning line more accurate. In this way, variations in signals output to the scanning lines G1 to Gm can be reduced, which is preferable.

  The driving timing of the scanning line driving circuit will be described with reference to FIG. FIG. 2 shows a timing chart of the scanning line driving circuit.

  As shown in FIG. 2, the scanning line selection period is divided into a first row writing period AP1 and a second row writing period AP2. When it is necessary to write a video signal to a pixel in a certain row, the first row writing period AP1 (writing timing) is necessary. When it is necessary to write an erasing signal, the second row writing period AP2 (erasing timing). It is necessary to select a scanning line.

The input / output of signals input to the scan line driver circuit will be described with reference to FIG.

In FIG. 2, the timing when a high potential is input is abbreviated as H, and the timing when a low potential is input is abbreviated as L. This is because the semiconductor elements constituting the flip-flop are turned on (active) by the H signal, but the present invention is not limited to this. On and off of the semiconductor elements are controlled by reversing H and L. For example, H and L may be interchanged.

In FIG. 2, first, an H signal of a write start pulse (write SP) is input. Then, the write SP signal is output with a delay of a half cycle of the clock via the first stage of the flip-flop 102. In addition, signals sequentially input to the second and third stages of the flip-flop are also output with a delay of a half cycle of the clock. Here, for explanation, a signal output from the first flip-flop is F1, a signal output from the second flip-flop is F2, and a signal output from the 4m flip-flop is F4m. To do. Of these output signals, a signal output from the 4 (m−1) +1 stage flip-flop is output to the m-th scanning line. That is, the signal output from the flip-flop of the 4 (α-1) +1 stage (α is 1 to m) is output to the scanning line Gα (G1, G2, G3... Gm) in FIG. Note that the signals output to these scanning lines are referred to as first selection signals for selecting the scanning lines in this specification.

Subsequently, in FIG. 2, the H signal of the erase start pulse (erase SP) is inputted at a timing delayed by a half cycle of the clock from the first selection signal outputted to the scanning line G3. Then, as with the write SP, the erase SP is output to each stage of the flip-flop as a signal obtained by sequentially shifting the output pulse by a half cycle of the clock. Therefore, in the present invention, without providing two scanning line driving circuits, the video signal of the bit input to the pixel is scanned before all the scanning lines G1 to Gm are selected in the first row writing period AP1. It is possible to erase sequentially from the line G1. In this manner, the video data of the bits input to the pixels by the scanning line selected in the first row writing period AP1 can be erased in the second row writing period AP2. Therefore, for example, when focusing on the scanning line G1, after the scanning line Gm is selected in the first row writing period AP1, after the scanning line Gm is selected in the first row writing period AP1, the scanning line G1 is in the second row writing period AP1. In the row writing period AP2, it is selected and an erase signal is input. The video signal written to the pixel when the scanning line G1 is selected in the first row writing period AP1 is held until the scanning line G1 is selected in the second row writing period AP2. Therefore, a period from when the scanning line G1 is selected in the first row writing period AP1 to when the scanning line G1 is selected again in the first row writing period AP1 corresponds to the subframe period SF. Note that the erase signal output to the scanning line is referred to as a second selection signal for selecting the scanning line in this specification.

  In FIG. 2, in the first row writing period AP1 and the second row writing period AP2, the scanning line to which an H level selection signal is input is selected as the selected scanning line. Equivalent to. Although FIG. 2 shows the case where the scanning line is selected at the H level, the scanning line may be selected at the L level. A corresponding video signal is input from the signal line driver circuit 12 (see FIG. 1) to the pixels in the row sharing the selected scanning line.

  In a time division gray scale method (also referred to as a time gray scale method) which is one of driving methods of a display device, a row writing period is divided into two, and in the first half row writing period AP1 (first row writing period). A video signal is written to the pixel, and a signal for forcibly stopping the supply of current to the light-emitting element is written to the pixel in the latter row writing period AP2 (second row writing period). A non-display period is provided by writing a signal for forcibly stopping the supply of current to the light emitting element to the pixel, and the length of the subframe period is set to the writing period (scanning line from the first line to the last line). Shorter than the length of the writing period). By using the scanning line driving circuit having the configuration of this embodiment, charging and discharging of all scanning lines in the erasing period, which is a period for inputting a signal for forcibly stopping the supply of current to the light emitting element, is repeated. There is no need, and power consumption can be greatly reduced. Further, by using the scan line driver circuit having the structure of this embodiment mode, it is not necessary to provide a switching circuit or the like. Further, by using the scan line driver circuit having the structure of this embodiment mode, the scan line driver circuit can be operated only by being arranged on one side, and the circuit scale can be significantly reduced.

  In addition, since the length of the writing period can be ensured even if the number of subframe periods appearing in one frame period is increased, the number of gradations can be increased while suppressing the driving frequency of the driving circuit. . Further, even when the subframe period is further divided, the length of the writing period can be ensured, so that generation of a pseudo contour can be suppressed while suppressing the driving frequency of the driving circuit.

  Note that this embodiment can be combined with any of the other examples in this specification as appropriate.

In this example, a structure of a pixel of the display device described in Embodiment Mode will be described in detail.

The configuration of the display device will be described with reference to FIGS. The pixel 1010 includes a light-emitting element 1013, a capacitor 1016, and two transistors. Of the two transistors, one is a switching transistor 1011 (hereinafter sometimes referred to as TFT 1011) that controls input of a video signal to the pixel 1010, and the other controls lighting and non-lighting of the light emitting element 1013. This is a driving transistor 1012 (hereinafter referred to as TFT 1012). The TFTs 1011 and 1012 are field effect transistors and have three terminals of a gate electrode, a source electrode, and a drain electrode.

The gate electrode of the TFT 1011 is connected to the gate line Gy, one of the source electrode and the drain electrode is connected to the source line Sx, and the other is connected to the gate electrode of the TFT 1012. One of the source electrode and the drain electrode of the TFT 1012 is connected to the first power supply 1017 through the power supply line Vx (x is a natural number, 1 ≦ x ≦ m), and the other is connected to the pixel electrode of the light emitting element 1013. The counter electrode of the light emitting element 1013 is connected to the second power supply 1018. The capacitor 1016 is provided between the gate electrode and the source electrode of the TFT 1012. The conductivity types of the TFTs 1011 and 1012 are not limited and may be either n-type or p-type. However, in the illustrated configuration, the TFT 1011 is n-type and the TFT 1012 is p-type. The potential of the first power supply 1017 and the potential of the second power supply 1018 are not particularly limited, but are set to such a potential that a forward bias is applied to the light-emitting element 1013.

The display device having the above structure is characterized in that the number of transistors arranged in the pixel 1010 is two. With the above feature, since the number of transistors is small, the number of wirings to be inevitably arranged can be reduced, so that a high aperture ratio, high definition, and a high yield can be realized. In addition, when a high aperture ratio is realized, the current density can be lowered as the area for emitting light increases. Accordingly, the driving voltage can be lowered, so that power consumption can be reduced. Further, the reliability can be improved by reducing the drive voltage.

The semiconductor constituting the TFTs 1011 and 1012 may be any of an amorphous semiconductor (for example, amorphous silicon), a microcrystalline semiconductor (for example, microcrystalline silicon), a polycrystalline semiconductor (for example, polysilicon), an organic semiconductor, and the like. Note that microcrystalline silicon is formed by using silane gas (SiH ₄ ) and fluorine gas (F ₂ ), by using silane gas and hydrogen gas, or after forming a thin film by using the above-described gases, and then by laser. You may form by irradiating light.

The gate electrodes of the TFTs 1011 and 1012 are formed of a single layer or a stacked layer using a conductive material. For example, a laminated structure of tungsten (W) and tungsten nitride (WN), a laminated structure of molybdenum (Mo), aluminum (Al) and molybdenum (Mo), and a laminated structure of molybdenum (Mo) and molybdenum nitride (MoN) are adopted. Good.

The conductive layers (source wiring and drain wiring) connected to the impurity regions (source electrode and drain electrode) included in the TFTs 1011 and 1012 are formed of a single layer or stacked layers using a conductive material. For example, a laminated structure of titanium (Ti), aluminum silicon (Al-Si) and titanium (Ti), a laminated structure of molybdenum (Mo), aluminum-silicon (Al-Si) and molybdenum (Mo), molybdenum nitride (MoN) A stacked structure of aluminum-silicon (Al-Si) and molybdenum nitride (MoN) may be employed.

Next, a layout of the pixel 1010 having the above structure is shown in FIG. In this layout, a conductive layer 1019 corresponding to the pixel electrodes of the TFT 1011, the TFT 1012, the capacitor 1016, and the light emitting element 1013 is shown. Next, FIG. 3B shows a cross-sectional structure corresponding to AB and BC of this layout. TFTs 1011 and 1012, a light-emitting element 1013, and a capacitor 1016 are provided over a substrate 1020 having an insulating surface such as glass or quartz.

The light-emitting element 1013 corresponds to a stacked body of a conductive layer 1019 corresponding to a pixel electrode, an electroluminescent layer 1033, and a conductive layer 1034 corresponding to a counter electrode. In the case where both the conductive layer 1019 and the conductive layer 1034 have a light-transmitting property, the light-emitting element 1013 emits light in a direction toward the conductive layer 1019 and a direction toward the conductive layer 1034. That is, the light emitting element 1013 performs double-sided emission. In the case where one of the conductive layer 1019 and the conductive layer 1034 has a light-transmitting property and the other has a light-blocking property, the light-emitting element 1013 emits light only in the direction toward the conductive layer 1019 or only in the direction toward the conductive layer 1034. To emit. That is, the light emitting element 1013 performs top emission or bottom emission. FIG. 3B illustrates a cross-sectional structure in the case where the light-emitting element 1013 performs bottom emission.

The capacitor 1016 is disposed between the gate electrode and the source electrode of the TFT 1012 and holds the gate-source voltage of the TFT 1012. The capacitor 1016 includes a semiconductor layer 1021 provided in the same layer as the semiconductor layers included in the TFTs 1011 and 1012, a conductive layer 1022 a and a conductive layer 1022 b (hereinafter collectively referred to as conductive layers) provided in the same layer as the gate electrodes of the TFT 1011 and TFT 1012. A capacitor is formed using a layer 1022) and an insulating layer between the semiconductor layer 1021 and the conductive layer 1022. The capacitor 1016 is provided in the same layer as the conductive layer 1022 provided in the same layer as the gate electrodes of the TFT 1011 and TFT 1012 and the conductive layers 1024 to 1027 connected to the source electrode and the drain electrode of the TFT 1011 and TFT 1012. A capacitor is formed by the conductive layer 1023 and the insulating layer between the conductive layer 1022 and the conductive layer 1023. With such a structure, the capacitor 1016 can obtain a capacitance value sufficient to hold the gate-source voltage of the TFT 1012. Further, the capacitor element 1016 is provided below the conductive layer constituting the power supply line Vx, and therefore, the aperture ratio is not reduced by the arrangement of the capacitor element 1016.

The thickness of the conductive layer 1023 to the conductive layer 1027 corresponding to the source wiring and drain wiring of the TFT 1011 and the TFT 1012 is preferably 500 nm to 2000 nm, preferably 500 nm to 1300 nm. Since the conductive layer 1023 to the conductive layer 1027 constitute the source line Sx and the power supply line Vx, the influence of the voltage drop is increased by increasing the thickness of the conductive layer 1023 to the conductive layer 1027 as in the above structure. Can be suppressed. Note that the wiring resistance can be reduced by increasing the thickness of the conductive layer 1023 to the conductive layer 1027, but conversely, if the conductive layer 1023 to the conductive layer 1027 is excessively thick, it becomes difficult to perform pattern processing accurately. Surface irregularities can be a problem. That is, the thicknesses of the conductive layers 1023 to 1027 are preferably determined within the above range in consideration of the wiring resistance, the ease of patterning, and the influence of surface irregularities.

The TFT 1011 and the TFT 1012 are covered with an insulating layer 1028, an insulating layer 1029 (hereinafter collectively referred to as a first insulating layer 1030), and a second insulating layer 1031 provided over the first insulating layer 1030. In addition, a conductive layer 1019 corresponding to a pixel electrode is provided over the second insulating layer 1031. If the second insulating layer 1031 is not provided, the conductive layers 1023 to 1027 corresponding to the source wiring and the drain wiring and the conductive layer 1019 are provided in the same layer. Then, a region where the conductive layer 1019 is provided is limited to a region other than the region where the conductive layer 1023 to the conductive layer 1027 are provided. However, when the second insulating layer 1031 is provided, a region where the conductive layer 1019 is provided is widened, and a high aperture ratio can be realized. In the case of top injection, this configuration is particularly effective. When a high aperture ratio is realized, the drive voltage can be lowered and the power consumption can be reduced as the area for emitting light increases.

Note that the first insulating layer 1030 and the second insulating layer 1031 are formed using an inorganic material such as silicon oxide or silicon nitride, an organic material such as polyimide or acrylic, or the like. The first insulating layer 1030 and the second insulating layer 1031 may be formed using the same material or different materials. As the inorganic material, a siloxane-based material may be used. For example, a skeleton structure is configured by a bond of silicon and oxygen, and a skeleton structure is formed of a material containing at least hydrogen as a substituent, or a bond of silicon and oxygen. A material that is configured and includes at least one of fluorine, an alkyl group, and an aryl group as a substituent is used.

Further, a partition layer 1032 (also referred to as a bank, a bank, or an insulating layer) is provided between the pixels 1010, but the width 1035 of the partition layer 1032 over the capacitor 1016 can hide a wiring provided thereunder. Any width is acceptable. Specifically, the width 1035 is 7.5 μm or more and 27.5 μm or less, preferably 10 μm or more and 25 μm or less (see FIG. 5). In this manner, a high aperture ratio is realized by narrowing the width of the partition wall layer 1032. When a high aperture ratio is realized, the drive voltage can be lowered and the power consumption can be reduced as the area for emitting light increases.

According to the layout shown in FIG. 5, the aperture ratio of the pixel is about 50%. The length in the column direction (vertical direction) of the pixel 1010 in the illustrated layout is indicated by a width 1038, and the length in the row direction (lateral direction) is indicated by a width 1037. The partition layer 1032 may be formed using either an inorganic material or an organic material. However, since the electroluminescent layer 1033 is provided so as to be in contact with the partition layer 1032, it is preferable that the radius of curvature is continuously changed so that pinholes and the like are not generated in the electroluminescent layer 1033 (FIG. 3 ( B)).

Further, the partition wall layer 1032 may have a light-blocking property. By having the light shielding property, the outline between the pixels 1010 becomes clear and a high-definition image can be displayed. The partition wall layer 1032 includes pigments and carbon nanotubes, and is colored with additives such as these pigments and carbon, and thus can have a light shielding property.

  Note that this embodiment can be appropriately combined with the embodiment mode and other embodiments in this specification. In a time-division gray scale method (also referred to as a time gray scale method) which is one of driving methods of a display device, a row writing period is divided into two, and pixels in the first half row writing period (first row writing period). A video signal is written to the pixel, and a signal for forcibly stopping the supply of current to the light-emitting element is written to the pixel in the latter row writing period (second row writing period). A non-display period is provided by writing a signal for forcibly stopping the supply of current to the light-emitting element to the pixel, and the length of the subframe period is shorter than the length of the writing period. By using the scanning line driver circuit having the configuration of the above embodiment, charging and discharging of all scanning lines in the erasing period, which is a period for inputting a signal for forcibly stopping the supply of current to the light emitting element, is repeated. There is no need, and power consumption can be greatly reduced. Further, by using the scan line driver circuit having the structure of the above embodiment mode, it is not necessary to provide a switching circuit or the like. Further, by using the scan line driver circuit having the structure of the above embodiment, the scan line driver circuit can be operated only by being arranged on one side, and the circuit scale can be greatly reduced.

  In addition, since the length of the writing period can be ensured even if the number of subframe periods appearing in one frame period is increased, the number of gradations can be increased while suppressing the driving frequency of the driving circuit. . Further, even when the subframe period is further divided, the length of the writing period can be ensured, so that generation of a pseudo contour can be suppressed while suppressing the driving frequency of the driving circuit.

  In this embodiment, regarding the operation of the display device having the pixel shown in Embodiment 1, the vertical axis represents the scanning line, the horizontal axis represents the time chart (FIG. 6A), and the i-th gate line Gi. This will be described with reference to a timing chart (FIG. 6B) (1 ≦ i ≦ m). In the time gray scale method, one frame period has a plurality of subframe periods SF1, SF2,..., SFn (n is a natural number).

Each of the plurality of subframe periods includes one selected from a plurality of write periods Ta1, Ta2,..., Tan performing a write operation or an erase operation, and a plurality of lighting periods Ts1, Ts2,. With one selected. Each of the plurality of writing periods has a plurality of gate selection periods. Each of the plurality of gate selection periods has a plurality of sub-gate selection periods. The number of divisions in each gate selection period is not particularly limited, but is preferably divided into two to eight, and more preferably two to four. Further, the lighting period Ts1: Ts2:...: Tsn has a length ratio of, for example, 2 (n-1): 2 (n-2):. That is, the lighting periods Ts1, Ts2,..., Tsn are set so that each bit has a different length.

Hereinafter, a timing chart in the case of expressing 3-bit gradation (8 gradations) will be described (see FIGS. 6A and 6B). In this case, one frame period is divided into three subframe periods SF1 to SF3. The sub-frame periods SF1 to SF3 have one selected from the writing periods Ta1 to Ta3 and one selected from the lighting periods Ts1 to Ts3. The writing period has a plurality of gate selection periods. Each of the plurality of gate selection periods has a plurality of subgate selection periods. Here, each of the plurality of gate selection periods has two subgate selection periods, and performs an erasing operation in the first subgate selection period. A case where a writing operation is performed in the second sub-gate selection period is described.

Note that the erasing operation is an operation performed in order to make the light emitting element emit no light, and is an operation performed only in a necessary subframe period.

  Note that this embodiment can be appropriately combined with the embodiment mode and other embodiments in this specification. In a time-division gray scale method (also referred to as a time gray scale method) which is one of driving methods of a display device, a row writing period is divided into two, and pixels in the first half row writing period (first row writing period). A video signal is written to the pixel, and a signal for forcibly stopping the supply of current to the light-emitting element is written to the pixel in the latter row writing period (second row writing period). A non-display period is provided by writing a signal for forcibly stopping the supply of current to the light-emitting element to the pixel, and the length of the subframe period is shorter than the length of the writing period. By using the scanning line driver circuit having the configuration of the above embodiment, charging and discharging of all scanning lines in the erasing period, which is a period for inputting a signal for forcibly stopping the supply of current to the light emitting element, is repeated. There is no need, and power consumption can be greatly reduced. Further, by using the scan line driver circuit having the structure of the above embodiment mode, it is not necessary to provide a switching circuit or the like. Further, by using the scan line driver circuit having the structure of the above embodiment, the scan line driver circuit can be operated only by being arranged on one side, and the circuit scale can be greatly reduced.

  In addition, since the length of the writing period can be ensured even if the number of subframe periods appearing in one frame period is increased, the number of gradations can be increased while suppressing the driving frequency of the driving circuit. . Further, even when the subframe period is further divided, the length of the writing period can be ensured, so that generation of a pseudo contour can be suppressed while suppressing the driving frequency of the driving circuit.

In this embodiment, an operation different from the operation of the display device shown in Embodiment 2 will be described.

  The timing of each subframe period in the present embodiment will be described. FIG. 7A shows timing GAP1 of a writing period in which video signal writing is performed in the first half period AP1 of the one scanning line selection period described in the above embodiment by the scanning line driver circuit. In addition, a timing GAP2 of a writing period in which a video signal is written in the second half period AP2 of the one scanning line selection period described in the above embodiment is shown by the scanning line driver circuit. Furthermore, the timing of the subframe period that appears in the pixels in the first row is also shown. Note that FIG. 7A illustrates an example in which an 8-bit video signal is used in a QVGA panel (number of pixels: 320 × 240).

  W1 to W8 correspond to a writing period corresponding to a video signal of each bit. Each of the writing periods W1 to W8 corresponds to a length obtained by multiplying the period of the half of the clock signal for the scanning line driving circuit by 320.

  In FIG. 7A, a period from when the writing period W6 is started at the timing GAP1 of the scanning line driver circuit to when the writing period W1 is started at the timing GAP2 of the scanning line driver circuit corresponds to the subframe period SF6. To do. Further, a period from when the writing period W1 is started at the timing GAP2 of the scanning line driver circuit to when the writing period W5 is started by the scanning line driver circuit corresponds to the subframe period SF1. Similarly, the timing of each subframe period is controlled by the timings GAP1 and GAP2 of the scanning line driving circuit.

FIG. 7B shows the total length of each subframe period. As shown in FIG. 7B, ΣSF1: ΣSF2: ΣSF3: ΣSF4: ΣSF5: ΣSF6: ΣSF7: ΣSF8 = 2 ⁷ : 2 ⁶ : 2 ⁵ : 2 ⁴ : 2 ³ : 2 ² : 2 ¹ : 2 ⁰ It has become. Thus, the total length of the short sub-frame periods SFn the n-th shortest subframe period 2 ^(n-1) With multiple, can be displayed 2 ⁸ gradations.

  FIG. 8 shows timings of the subframe periods SF1 to SF8 in the entire pixel portion when the driving method shown in FIG. 7A is used. In FIG. 8, the horizontal axis corresponds to time, and the vertical axis corresponds to the direction in which a scanning line is selected (scanning direction). In each of the subframe periods SF1 to SF8, a period from when the first row is selected until the last row is selected corresponds to each bit writing period W1 to W6. In addition, a period until all subframe periods SF1 to SF8 end in each row corresponds to one frame period F.

  In the driving methods shown in FIGS. 7A and 8, all the subframe periods appear continuously, and the duty ratio is 100%. However, the present invention is not limited to this driving method, and a non-display period may be provided between subframe periods. In order to provide the non-display period, a signal for forcibly stopping the supply of current to the light-emitting element may be written in the pixel.

In this embodiment, by using the scanning line driving circuit of the present invention, it is possible to select different scanning lines and input different video signals to each scanning line selection period as well as the erasing period. It becomes. Therefore, since the light-emitting element can emit light in the subframe period without providing an erasing period, display can be performed without reducing the duty ratio. In addition, since the current value can be reduced, the wiring of the power supply line can be narrowed. Furthermore, it is possible to realize low power consumption.

  Note that this embodiment can be appropriately combined with the embodiment mode and other embodiments in this specification. In a time-division gray scale method (also referred to as a time gray scale method) which is one of driving methods of a display device, a row writing period is divided into two, and pixels in the first half row writing period (first row writing period). A video signal is written to the pixel, and a signal for forcibly stopping the supply of current to the light-emitting element is written to the pixel in the latter row writing period (second row writing period). A non-display period is provided by writing a signal for forcibly stopping the supply of current to the light-emitting element to the pixel, and the length of the subframe period is shorter than the length of the writing period. By using the scanning line driver circuit having the configuration of the above embodiment, charging and discharging of all scanning lines in the erasing period, which is a period for inputting a signal for forcibly stopping the supply of current to the light emitting element, is repeated. There is no need, and power consumption can be greatly reduced. Further, by using the scan line driver circuit having the structure of the above embodiment mode, it is not necessary to provide a switching circuit or the like. Further, by using the scan line driver circuit having the structure of the above embodiment, the scan line driver circuit can be operated only by being arranged on one side, and the circuit scale can be greatly reduced.

  In addition, since the length of the writing period can be ensured even if the number of subframe periods appearing in one frame period is increased, the number of gradations can be increased while suppressing the driving frequency of the driving circuit. . Further, even when the subframe period is further divided, the length of the writing period can be ensured, so that generation of a pseudo contour can be suppressed while suppressing the driving frequency of the driving circuit.

  The pixel included in the light-emitting device of the present invention is not limited to the structure shown in FIG. FIG. 9A illustrates one mode of a pixel included in the light-emitting device of the present invention. The pixel illustrated in FIG. 9 includes a light-emitting element 401, a switching transistor 402, a driving transistor 403, and a current control transistor 404 that selects whether or not current is supplied to the light-emitting element 401. Further, although not shown in FIG. 9A, a capacitor for holding the voltage of the video signal may be formed in the pixel.

  The driving transistor 403 and the current control transistor 404 may have the same polarity or different polarities. The driving transistor 403 is operated in the saturation region, and the current control transistor 404 is operated in the linear region. Note that the driving transistor 403 is preferably operated in a saturation region; however, the present invention is not necessarily limited thereto, and the driving transistor 403 may be operated in a linear region. The switching transistor 402 is operated in a linear region. The switching transistor 402 may be either n-type or p-type.

  As shown in FIG. 9A, when the driving transistor 403 is p-type, the anode of the light-emitting element 401 is preferably used as a first electrode and the cathode is preferably used as a second electrode. Note that in this specification, the first electrode in the light-emitting element corresponds to a pixel electrode, and the second electrode corresponds to a counter electrode. Conversely, when the driving transistor 403 is an n-type, it is preferable to use the cathode of the light-emitting element 401 as the first electrode and the anode as the second electrode.

  The gate of the switching transistor 402 is connected to the scanning line Gj (j = 1 to y). One of the source and the drain of the switching transistor 402 is connected to the signal line Si (i = 1 to x), and the other is connected to the gate of the current control transistor 404. The gate of the driving transistor 403 is connected to the power supply line Vi (i = 1 to x). The driving transistor 403 and the current control transistor 404 are supplied from the power supply line Vi so that the current supplied from the power supply line Vi is supplied to the light emitting element 401 as the drain current of the driving transistor 403 and the current control transistor 404. And the light emitting element 401. In this embodiment, the source of the driving transistor 403 is connected to the power supply line Vi, and the current control transistor 404 is provided between the driving transistor 403 and the first electrode of the light emitting element 401.

  In the case of forming a capacitor element, one of the two electrodes of the capacitor element is connected to the power supply line Vi and the other electrode is connected to the gate of the current control transistor 404. The capacitive element is provided to hold the gate voltage of the current control transistor 404.

  Note that the structure of the pixel illustrated in FIG. 9A is merely an embodiment of the present invention, and the light-emitting device of the present invention is not limited to FIG. 9A. For example, as shown in FIG. 9B, the drain of the driving transistor 403 is connected to the first electrode of the light-emitting element 401, and a current control transistor 404 is formed between the driving transistor 403 and the power supply line Vi. Also good. In FIG. 9B, the same reference numerals are given to those already shown in FIG.

  This embodiment can be appropriately combined with the embodiment mode and other embodiments in this specification. In a time-division gray scale method (also referred to as a time gray scale method) which is one of driving methods of a display device, a row writing period is divided into two, and pixels in the first half row writing period (first row writing period). A video signal is written to the pixel, and a signal for forcibly stopping the supply of current to the light-emitting element is written to the pixel in the latter row writing period (second row writing period). A non-display period is provided by writing a signal for forcibly stopping the supply of current to the light-emitting element to the pixel, and the length of the subframe period is shorter than the length of the writing period. By using the scanning line driver circuit having the configuration of the above embodiment, charging and discharging of all scanning lines in the erasing period, which is a period for inputting a signal for forcibly stopping the supply of current to the light emitting element, is repeated. There is no need, and power consumption can be greatly reduced. Further, by using the scan line driver circuit having the structure of the above embodiment mode, it is not necessary to provide a switching circuit or the like. Further, by using the scan line driver circuit having the structure of the above embodiment, the scan line driver circuit can be operated only by being arranged on one side, and the circuit scale can be greatly reduced.

  In addition, since the length of the writing period can be ensured even if the number of subframe periods appearing in one frame period is increased, the number of gradations can be increased while suppressing the driving frequency of the driving circuit. . Further, even when the subframe period is further divided, the length of the writing period can be ensured, so that generation of a pseudo contour can be suppressed while suppressing the driving frequency of the driving circuit.

  In this example, the appearance of a panel corresponding to one embodiment of the light-emitting device of the present invention will be described with reference to FIG. FIG. 10 is a top view of a panel in which a transistor and a light-emitting element formed over a first substrate are sealed with a sealant between the second substrate and FIG. 10B. This corresponds to a cross-sectional view taken along line AA ′ in FIG.

  A sealant 4020 is provided so as to surround the pixel portion 4002, the signal line driver circuit 4003, and the scan line driver circuit 4004 which are provided over the first substrate 4001. In addition, a second substrate 4006 is provided over the pixel portion 4002, the signal line driver circuit 4003, and the scan line driver circuit 4004. Therefore, the pixel portion 4002, the signal line driver circuit 4003, and the scan line driver circuit 4004 are sealed together with the filler 4007 by the first substrate 4001, the sealant 4020, and the second substrate 4006.

  In addition, the pixel portion 4002, the signal line driver circuit 4003, and the scan line driver circuit 4004 provided over the first substrate 4001 include a plurality of transistors. FIG. 10B illustrates a transistor 4008 included in the signal line driver circuit 4003, and a driving transistor 4009 and a switching transistor 4010 included in the pixel portion 4002.

  Reference numeral 4011 corresponds to a light-emitting element, and a part of the wiring 4017 connected to the drain of the driving transistor 4009 functions as a first electrode of the light-emitting element 4011. The transparent conductive film functions as the second electrode 4012 of the light-emitting element 4011. Note that the structure of the light-emitting element 4011 is not limited to the structure shown in this embodiment. The structure of the light-emitting element 4011 can be changed as appropriate depending on the direction of light extracted from the light-emitting element 4011, the polarity of the driving transistor 4009, or the like.

  Various signals and voltages supplied to the signal line driver circuit 4003, the scan line driver circuit 4004, or the pixel portion 4002 are not shown in the cross-sectional view of FIG. It is supplied from the connection terminal 4016.

  In this embodiment, the connection terminal 4016 is formed using the same conductive film as the second electrode 4012 included in the light-emitting element 4011. The lead wiring 4014 is formed from the same conductive film as the wiring 4017. The lead wiring 4015 is formed of the same conductive film as the gates of the driving transistor 4009, the switching transistor 4010, and the transistor 4008.

  The connection terminal 4016 is electrically connected to a terminal included in the FPC 4018 through an anisotropic conductive film 4019.

  Note that as the first substrate 4001 and the second substrate 4006, glass, metal (typically stainless steel), ceramics, or plastic can be used. As the plastic, an FRP (Fiberglass-Reinforced Plastics) plate, a PVF (polyvinyl fluoride) film, a mylar film, a polyester film, or an acrylic resin film can be used. A sheet having a structure in which an aluminum foil is sandwiched between PVF films or mylar films can also be used.

  Note that the second substrate 4006 located in the direction in which light is extracted from the light-emitting element 4011 must have a light-transmitting property. Therefore, the second substrate 4006 is formed using a light-transmitting material such as a glass plate, a plastic plate, a polyester film, or an acrylic film.

  As the filler 4007, in addition to an inert gas such as nitrogen or argon, an ultraviolet curable resin or a thermosetting resin can be used. PVC (polyvinyl chloride), acrylic, polyimide, epoxy resin, silicon resin, PVB (Polyvinyl butyral) or EVA (ethylene vinyl acetate) can be used. In this example, nitrogen was used as the filler.

  Note that a circuit such as a CPU or a controller may be formed over the first substrate 4001 in addition to the driver circuit. Then, the number of external circuits (ICs) to be connected is reduced, and the weight and thickness can be further increased, which is particularly effective for a portable terminal or the like.

  Note that in this specification, as shown in FIG. 10A, a panel in which an FPC is attached and an EL element is used as a light-emitting element is referred to as an EL module in this specification.

  Note that this embodiment can be appropriately combined with the embodiment mode and other embodiments in this specification. In a time-division gray scale method (also referred to as a time gray scale method) which is one of driving methods of a display device, a row writing period is divided into two, and pixels in the first half row writing period (first row writing period). A video signal is written to the pixel, and a signal for forcibly stopping the supply of current to the light-emitting element is written to the pixel in the latter row writing period (second row writing period). A non-display period is provided by writing a signal for forcibly stopping the supply of current to the light-emitting element to the pixel, and the length of the subframe period is shorter than the length of the writing period. By using the scanning line driver circuit having the configuration of the above embodiment, charging and discharging of all scanning lines in the erasing period, which is a period for inputting a signal for forcibly stopping the supply of current to the light emitting element, is repeated. There is no need, and power consumption can be greatly reduced. Further, by using the scan line driver circuit having the structure of the above embodiment mode, it is not necessary to provide a switching circuit or the like. Further, by using the scan line driver circuit having the structure of the above embodiment, the scan line driver circuit can be operated only by being arranged on one side, and the circuit scale can be greatly reduced.

  In addition, since the length of the writing period can be ensured even if the number of subframe periods appearing in one frame period is increased, the number of gradations can be increased while suppressing the driving frequency of the driving circuit. . Further, even when the subframe period is further divided, the length of the writing period can be ensured, so that generation of a pseudo contour can be suppressed while suppressing the driving frequency of the driving circuit.

  In this embodiment, a cross-sectional structure of a pixel when a driving transistor is a p-type is described with reference to FIGS. Note that FIG. 11 illustrates the case where the first electrode is an anode and the second electrode is a cathode; however, the first electrode may be a cathode and the second electrode may be an anode.

  FIG. 11A is a cross-sectional view of a pixel in the case where the driving transistor 6001 is p-type and light emitted from the light-emitting element 6003 is extracted from the first electrode 6004 side.

  The driving transistor 6001 is covered with an interlayer insulating film 6007, and a partition wall 6008 having an opening is formed over the interlayer insulating film 6007. A part of the first electrode 6004 is exposed in the opening of the partition wall 6008, and the electroluminescent layer 6005 and the second electrode 6006 are sequentially stacked on the first electrode 6004 in the opening.

  The interlayer insulating film 6007 is formed using an organic resin film, an inorganic insulating film, or an insulating film including a Si—O—Si bond (hereinafter referred to as a siloxane-based insulating film) formed using a siloxane-based material as a starting material. Can do. The siloxane insulating film may have at least one of fluorine, an alkyl group, and an aryl group in addition to hydrogen as a substituent. A material called a low dielectric constant material (low-k material) may be used for the interlayer insulating film 6007.

  The partition wall 6008 can be formed using an organic resin film, an inorganic insulating film, or a siloxane-based insulating film. For example, acrylic resin, polyimide, polyamide, or the like can be used for the organic resin film, and silicon oxide, silicon nitride oxide, or the like can be used for the inorganic insulating film. In particular, a photosensitive organic resin film is used for the partition wall 6008, an opening is formed on the first electrode 6004, and the side wall of the opening is formed to be an inclined surface having a continuous curvature. It is possible to prevent the electrode 6004 and the second electrode 6006 from being connected.

  The first electrode 6004 is formed using a light-transmitting material or film thickness, and is formed using a material suitable for use as an anode. For example, another light-transmitting oxide conductive material such as indium tin oxide (ITO), zinc oxide (ZnO), indium zinc oxide (IZO), or zinc oxide added with gallium (GZO) is used for the first electrode 6004. Is possible. In addition, indium tin oxide containing ITO and silicon oxide (hereinafter referred to as ITSO) or indium oxide containing silicon oxide and further mixed with 2 to 20 wt% zinc oxide (ZnO) are used as the first electrode 6004. It may be used. In addition to the light-transmitting oxide conductive material, for example, a single layer film made of one or more of TiN, ZrN, Ti, W, Ni, Pt, Cr, Ag, Al, etc., titanium nitride film and aluminum Alternatively, the first electrode 6004 can be formed using a stack of a film mainly containing silicon, a three-layer structure of a titanium nitride film, a film mainly containing aluminum, and a titanium nitride film. Note that in the case where a material other than the light-transmitting oxide conductive material is used, the first electrode 6004 is formed with a thickness enough to transmit light (preferably, about 5 nm to 30 nm).

  The second electrode 6006 can be formed using a material and a film thickness that reflect or shield light, and can be formed using a metal, an alloy, an electrically conductive compound, a mixture thereof, or the like with a low work function. Specifically, alkali metals such as Li and Cs, and alkaline earth metals such as Mg, Ca, and Sr, alloys containing these (Mg: Ag, Al: Li, Mg: In, etc.), and compounds thereof ( In addition to calcium fluoride and calcium nitride, rare earth metals such as Yb and Er can be used. In the case where an electron injection layer is provided in the electroluminescent layer 6005, another conductive layer such as Al can be used.

  The electroluminescent layer 6005 is composed of one or more layers. When composed of a plurality of layers, these layers can be classified into a hole injection layer, a hole transport layer, a light emitting layer, an electron transport layer, an electron injection layer, and the like from the viewpoint of carrier transport characteristics. In the case where the electroluminescent layer 6005 includes any of a hole injection layer, a hole transport layer, an electron transport layer, and an electron injection layer in addition to the light emitting layer, the first electrode 6004 to the hole injection layer, A hole transport layer, a light emitting layer, an electron transport layer, and an electron injection layer are laminated in this order. Note that the boundaries between the layers are not necessarily clear, and there are cases where the materials constituting the layers are partially mixed and the interface is unclear. For each layer, an organic material or an inorganic material can be used. As the organic material, any of a high molecular weight material, a medium molecular weight material, and a low molecular weight material can be used. The medium molecular weight material corresponds to a low polymer having a number of repeating structural units (degree of polymerization) of about 2 to 20. The distinction between a hole injection layer and a hole transport layer is not necessarily strict, and these are the same in the sense that hole transportability (hole mobility) is a particularly important characteristic. For convenience, the hole injection layer is a layer in contact with the anode, and the layer in contact with the light emitting layer is referred to as a hole transport layer to be distinguished. The same applies to the electron transport layer and the electron injection layer. The layer in contact with the cathode is referred to as an electron injection layer, and the layer in contact with the light emitting layer is referred to as an electron transport layer. The light emitting layer may also serve as an electron transport layer, and is also referred to as a light emitting electron transport layer.

  In the case of the pixel shown in FIG. 11A, light emitted from the light-emitting element 6003 can be extracted from the first electrode 6004 side as shown by a hollow arrow.

  Next, FIG. 11B is a cross-sectional view of a pixel in the case where the driving transistor 6011 is p-type and light emitted from the light-emitting element 6013 is extracted from the second electrode 6016 side. An electroluminescent layer 6015 and a second electrode 6016 are sequentially stacked over the first electrode 6014.

  The first electrode 6014 is formed using a material and a film thickness that reflect or shield light, and is formed using a material that is suitable for use as an anode. For example, in addition to a single layer film made of one or more of TiN, ZrN, Ti, W, Ni, Pt, Cr, Ag, Al, etc., a laminate of a titanium nitride film and a film containing aluminum as a main component, titanium nitride A three-layer structure of a film, a film containing aluminum as its main component, and a titanium nitride film can be used for the first electrode 6014.

  The second electrode 6016 can be formed using a light-transmitting material or film thickness, and can be formed using a metal, an alloy, an electrically conductive compound, a mixture thereof, or the like with a low work function. Specifically, alkali metals such as Li and Cs, and alkaline earth metals such as Mg, Ca, and Sr, alloys containing these (Mg: Ag, Al: Li, Mg: In, etc.), and compounds thereof ( In addition to calcium fluoride and calcium nitride, rare earth metals such as Yb and Er can be used. In addition, when an electron injection layer is provided, another conductive layer such as Al can be used. Then, the second electrode 6016 is formed with a thickness enough to transmit light (preferably, about 5 nm to 30 nm). Note that other light-transmitting oxide conductive materials such as indium tin oxide (ITO), zinc oxide (ZnO), indium zinc oxide (IZO), and zinc oxide to which gallium is added (GZO) can also be used. Alternatively, indium tin oxide containing ITO and silicon oxide (hereinafter referred to as ITSO) or indium oxide containing silicon oxide mixed with 2 to 20 wt% zinc oxide (ZnO) may be used. In the case of using a light-transmitting oxide conductive material, it is preferable to provide an electron injection layer in the electroluminescent layer 6015.

  The electroluminescent layer 6015 can be formed in a manner similar to that of the electroluminescent layer 6005 in FIG.

  In the case of the pixel shown in FIG. 11B, light emitted from the light-emitting element 6013 can be extracted from the second electrode 6016 side as shown by a hollow arrow.

  Next, FIG. 11C is a cross-sectional view of a pixel in the case where the driving transistor 6021 is p-type and light emitted from the light-emitting element 6023 is extracted from the first electrode 6024 side and the second electrode 6026 side. . An electroluminescent layer 6025 and a second electrode 6026 are sequentially stacked over the first electrode 6024.

  The first electrode 6024 can be formed in a manner similar to that of the first electrode 6004 in FIG. The second electrode 6026 can be formed in a manner similar to that of the second electrode 6016 in FIG. The electroluminescent layer 6025 can be formed in a manner similar to that of the electroluminescent layer 6005 in FIG.

  In the case of the pixel shown in FIG. 11C, light emitted from the light-emitting element 6023 can be extracted from the first electrode 6024 side and the second electrode 6026 side as indicated by white arrows.

  Note that this embodiment can be appropriately combined with the embodiment mode and other embodiments in this specification. In a time-division gray scale method (also referred to as a time gray scale method) which is one of driving methods of a display device, a row writing period is divided into two, and pixels in the first half row writing period (first row writing period). A video signal is written to the pixel, and a signal for forcibly stopping the supply of current to the light-emitting element is written to the pixel in the latter row writing period (second row writing period). A non-display period is provided by writing a signal for forcibly stopping the supply of current to the light-emitting element to the pixel, and the length of the subframe period is shorter than the length of the writing period. By using the scanning line driver circuit having the configuration of the above embodiment, charging and discharging of all scanning lines in the erasing period, which is a period for inputting a signal for forcibly stopping the supply of current to the light emitting element, is repeated. There is no need, and power consumption can be greatly reduced. Further, by using the scan line driver circuit having the structure of the above embodiment mode, it is not necessary to provide a switching circuit or the like. Further, by using the scan line driver circuit having the structure of the above embodiment, the scan line driver circuit can be operated only by being arranged on one side, and the circuit scale can be greatly reduced.

  In addition, since the length of the writing period can be ensured even if the number of subframe periods appearing in one frame period is increased, the number of gradations can be increased while suppressing the driving frequency of the driving circuit. . Further, even when the subframe period is further divided, the length of the writing period can be ensured, so that generation of a pseudo contour can be suppressed while suppressing the driving frequency of the driving circuit.

  In this embodiment, a cross-sectional structure of a pixel in the case where an n-type driving transistor is described with reference to FIG. Note that FIG. 12 illustrates the case where the first electrode is a cathode and the second electrode is an anode, but the first electrode may be an anode and the second electrode may be a cathode.

  FIG. 12A is a cross-sectional view of a pixel in the case where the driving transistor 6031 is n-type and light emitted from the light-emitting element 6033 is extracted from the first electrode 6034 side. An electroluminescent layer 6035 and a second electrode 6036 are stacked over the first electrode 6034 in this order.

  The first electrode 6034 can be formed using a light-transmitting material or film thickness, and can be formed using a metal, an alloy, an electrically conductive compound, a mixture thereof, or the like with a low work function. Specifically, alkali metals such as Li and Cs, and alkaline earth metals such as Mg, Ca, and Sr, alloys containing these (Mg: Ag, Al: Li, Mg: In, etc.), and compounds thereof ( In addition to calcium fluoride and calcium nitride, rare earth metals such as Yb and Er can be used. When an electron injection layer is provided, other conductive layers such as Al can be used. Then, the first electrode 6034 is formed with a thickness enough to transmit light (preferably, about 5 nm to 30 nm). Further, a light-transmitting conductive layer is formed using a light-transmitting oxide conductive material so as to be in contact with or under the conductive layer having a thickness enough to transmit light, and the first electrode 6034 is formed. The sheet resistance may be suppressed. Note that only conductive layers using other light-transmitting oxide conductive materials such as indium tin oxide (ITO), zinc oxide (ZnO), indium zinc oxide (IZO), and zinc oxide added with gallium (GZO) should be used. Is also possible. Alternatively, indium tin oxide containing ITO and silicon oxide (hereinafter referred to as ITSO) or indium oxide containing silicon oxide mixed with 2 to 20 wt% zinc oxide (ZnO) may be used. In the case of using a light-transmitting oxide conductive material, it is preferable to provide an electron injection layer in the electroluminescent layer 6035.

  The second electrode 6036 is formed of a material and a film thickness that reflect or shield light, and is formed using a material that is suitable for use as an anode. For example, in addition to a single layer film made of one or more of TiN, ZrN, Ti, W, Ni, Pt, Cr, Ag, Al, etc., a laminate of a titanium nitride film and a film containing aluminum as a main component, titanium nitride A three-layer structure of a film, a film containing aluminum as its main component, and a titanium nitride film can be used for the second electrode 6036.

  The electroluminescent layer 6035 can be formed in a manner similar to that of the electroluminescent layer 6005 in FIG. However, in the case where the electroluminescent layer 6035 includes any one of a hole injection layer, a hole transport layer, an electron transport layer, and an electron injection layer in addition to the light emitting layer, the first electrode 6034 to the electron injection layer The electron transport layer, the light emitting layer, the hole transport layer, and the hole injection layer are laminated in this order.

  In the case of the pixel shown in FIG. 12A, light emitted from the light-emitting element 6033 can be extracted from the first electrode 6034 side as shown by a hollow arrow.

  Next, FIG. 12B is a cross-sectional view of a pixel in the case where the driving transistor 6041 is an n-type and light emitted from the light-emitting element 6043 is extracted from the second electrode 6046 side. An electroluminescent layer 6045 and a second electrode 6046 are sequentially stacked over the first electrode 6044.

  The first electrode 6044 can be formed using a material and a film thickness that reflect or shield light, and can be formed using a metal, an alloy, an electrically conductive compound, a mixture thereof, or the like with a low work function. Specifically, alkali metals such as Li and Cs, and alkaline earth metals such as Mg, Ca, and Sr, alloys containing these (Mg: Ag, Al: Li, Mg: In, etc.), and compounds thereof ( In addition to calcium fluoride and calcium nitride, rare earth metals such as Yb and Er can be used. When an electron injection layer is provided, other conductive layers such as Al can be used.

  The second electrode 6046 is formed using a light-transmitting material or film thickness, and is formed using a material suitable for use as an anode. For example, another light-transmitting oxide conductive material such as indium tin oxide (ITO), zinc oxide (ZnO), indium zinc oxide (IZO), or zinc oxide added with gallium (GZO) is used for the second electrode 6046. Is possible. In addition, indium tin oxide containing ITO and silicon oxide (hereinafter referred to as ITSO) or indium oxide containing silicon oxide and further mixed with 2 to 20 wt% zinc oxide (ZnO) are used as the second electrode 6046. It may be used. In addition to the light-transmitting oxide conductive material, for example, a single layer film made of one or more of TiN, ZrN, Ti, W, Ni, Pt, Cr, Ag, Al, etc., titanium nitride film and aluminum Alternatively, the second electrode 6046 can be formed using a stack of a film mainly containing silicon, a three-layer structure of a titanium nitride film, a film mainly containing aluminum, and a titanium nitride film. Note that in the case where a material other than the light-transmitting oxide conductive material is used, the second electrode 6046 is formed with a thickness enough to transmit light (preferably, about 5 nm to 30 nm).

  The electroluminescent layer 6045 can be formed in a manner similar to that of the electroluminescent layer 6035 in FIG.

  In the case of the pixel shown in FIG. 12B, light emitted from the light-emitting element 6043 can be extracted from the second electrode 6046 side as shown by a hollow arrow.

  Next, FIG. 12C is a cross-sectional view of a pixel in the case where the driving transistor 6051 is an n-type and light emitted from the light-emitting element 6053 is extracted from the first electrode 6054 side and the second electrode 6056 side. . An electroluminescent layer 6055 and a second electrode 6056 are sequentially stacked over the first electrode 6054.

  The first electrode 6054 can be formed in a manner similar to that of the first electrode 6034 in FIG. The second electrode 6056 can be formed in a manner similar to that of the second electrode 6046 in FIG. The electroluminescent layer 6055 can be formed in a manner similar to that of the electroluminescent layer 6035 in FIG.

  In the case of the pixel shown in FIG. 12C, light emitted from the light-emitting element 6053 can be extracted from the first electrode 6054 side and the second electrode 6056 side as indicated by white arrows.

  Note that this embodiment can be appropriately combined with the embodiment mode and other embodiments in this specification. In a time-division gray scale method (also referred to as a time gray scale method) which is one of driving methods of a display device, a row writing period is divided into two, and pixels in the first half row writing period (first row writing period). A video signal is written to the pixel, and a signal for forcibly stopping the supply of current to the light-emitting element is written to the pixel in the latter row writing period (second row writing period). A non-display period is provided by writing a signal for forcibly stopping the supply of current to the light-emitting element to the pixel, and the length of the subframe period is shorter than the length of the writing period. By using the scanning line driver circuit having the configuration of the above embodiment, charging and discharging of all scanning lines in the erasing period, which is a period for inputting a signal for forcibly stopping the supply of current to the light emitting element, is repeated. There is no need, and power consumption can be greatly reduced. Further, by using the scan line driver circuit having the structure of the above embodiment mode, it is not necessary to provide a switching circuit or the like. Further, by using the scan line driver circuit having the structure of the above embodiment, the scan line driver circuit can be operated only by being arranged on one side, and the circuit scale can be greatly reduced.

  In addition, since the length of the writing period can be ensured even if the number of subframe periods appearing in one frame period is increased, the number of gradations can be increased while suppressing the driving frequency of the driving circuit. . Further, even when the subframe period is further divided, the length of the writing period can be ensured, so that generation of a pseudo contour can be suppressed while suppressing the driving frequency of the driving circuit.

  The light-emitting device of the present invention can be formed by a screen printing method, a printing method typified by an offset printing method, or a droplet discharge method. The droplet discharge method means a method of forming a predetermined pattern by discharging droplets containing a predetermined composition from the pores, and includes an ink jet method and the like in its category. By using the above printing method and droplet discharge method, various wirings typified by signal lines, scanning lines, power supply lines, TFT gates, light emitting element electrodes, etc. can be formed without using an exposure mask. Is possible. However, it is not necessary to use a printing method or a droplet discharge method for all the steps of forming a pattern. Therefore, for example, the light-emitting device according to this embodiment uses a printing method or a droplet discharge method for forming a wiring and a gate, and a lithography method for patterning a semiconductor film. It may be formed using a printing method or a droplet discharge method, and a lithography method may be used in combination. A mask used for patterning may be formed by a printing method or a droplet discharge method.

  FIG. 13 shows, as an example, a cross-sectional view of a light-emitting device of the present invention formed using a droplet discharge method. In FIG. 13, 1301 is a switching transistor, 1302 is a driving transistor, and 1304 is a light emitting element. The driving transistor 1302 is preferably n-type. In this case, the first electrode 1350 is preferably a cathode, and the second electrode 1352 is preferably an anode.

  The switching transistor 1301 functions as a gate 1310, a first semiconductor film 1311 including a channel formation region, a gate insulating film 1317 formed between the gate 1310 and the first semiconductor film 1311, and a source or drain. The semiconductor device includes second semiconductor films 1312 and 1313, a wiring 1314 connected to the second semiconductor film 1312, and a wiring 1315 connected to the second semiconductor film 1313.

  The driving transistor 1302 functions as a source or a drain, a gate 1320, a first semiconductor film 1321 including a channel formation region, a gate insulating film 1317 formed between the gate 1320 and the first semiconductor film 1321. Second semiconductor films 1322 and 1323, a wiring 1324 connected to the second semiconductor film 1322, and a wiring 1325 connected to the second semiconductor film 1323 are included.

  The wiring 1314 corresponds to a signal line, and the wiring 1315 is electrically connected to the gate 1320 of the driving transistor 1302. The wiring 1325 corresponds to a power supply line.

  The wiring 1324 is connected to the first electrode 1350 included in the light-emitting element 1304. Further, an electroluminescent layer 1351 and a second electrode 1352 are sequentially stacked over the first electrode 1350. A light-emitting element 1304 is formed where the first electrode 1350, the electroluminescent layer 1351, and the second electrode 1352 overlap.

  By forming a pattern using a droplet discharge method or a printing method, a series of steps such as photoresist film formation, exposure, development, etching, and peeling performed by a lithography method can be simplified. In the case of the droplet discharge method and the printing method, unlike the lithography method, there is no waste of material that is removed by etching. Further, it is not necessary to use an expensive exposure mask, so that the cost for manufacturing the light-emitting device can be suppressed.

  Further, unlike the lithography method, it is not necessary to perform etching to form the wiring. Therefore, the time spent for the process of forming the wiring can be significantly shortened compared to the case of the lithography method. In particular, when the wiring thickness is 0.5 μm or more, and more desirably 2 μm or more, the wiring resistance can be suppressed. Therefore, the wiring accompanying the increase in the size of the light-emitting device while suppressing the time spent in the wiring manufacturing process. An increase in resistance can be suppressed.

  Note that the first semiconductor films 1311 and 1321 may be either an amorphous semiconductor or a semi-amorphous semiconductor (SAS).

An amorphous semiconductor can be obtained, for example, by glow discharge decomposition of a compound containing silicon. Typical compounds having silicon include SiH ₄ and Si ₂ H ₆ . This compound containing silicon may be diluted with hydrogen, hydrogen and helium.

SAS can also be obtained, for example, by glow discharge decomposition of a compound containing silicon. A typical compound containing silicon is SiH ₄ , and Si ₂ H ₆ , SiH ₂ Cl ₂ , SiHCl ₃ , SiCl ₄ , SiF _{4, and the} like can also be used. In addition, it is easy to form a SAS by diluting and using this silicon-containing compound with hydrogen or a gas obtained by adding one or more kinds of rare gas elements selected from helium, argon, krypton, and neon to hydrogen. Can be. It is preferable to dilute the compound having silicon in a dilution ratio of 2 to 1000 times. Furthermore, a carbon gas such as CH ₄ and C ₂ H ₆ , a germanium gas such as GeH ₄ and GeF ₄ , F _{2, and the} like are mixed in the compound containing silicon, so that the energy bandwidth is 1.5-2. It may be adjusted to .4 eV, or 0.9 to 1.1 eV. A TFT using SAS as the first semiconductor film can obtain a mobility of 1 to 10 cm 2 / Vsec or more.

  The first semiconductor films 1311 and 1321 may be formed using a semiconductor obtained by laser crystallization of an amorphous semiconductor or a semi-amorphous semiconductor (SAS).

  Note that this embodiment can be appropriately combined with the embodiment mode and other embodiments in this specification. In a time-division gray scale method (also referred to as a time gray scale method) which is one of driving methods of a display device, a row writing period is divided into two, and pixels in the first half row writing period (first row writing period). A video signal is written to the pixel, and a signal for forcibly stopping the supply of current to the light-emitting element is written to the pixel in the latter row writing period (second row writing period). A non-display period is provided by writing a signal for forcibly stopping the supply of current to the light-emitting element to the pixel, and the length of the subframe period is shorter than the length of the writing period. By using the scanning line driver circuit having the configuration of the above embodiment, charging and discharging of all scanning lines in the erasing period, which is a period for inputting a signal for forcibly stopping the supply of current to the light emitting element, is repeated. There is no need, and power consumption can be greatly reduced. Further, by using the scan line driver circuit having the structure of the above embodiment mode, it is not necessary to provide a switching circuit or the like. Further, by using the scan line driver circuit having the structure of the above embodiment, the scan line driver circuit can be operated only by being arranged on one side, and the circuit scale can be greatly reduced.

  In addition, since the length of the writing period can be ensured even if the number of subframe periods appearing in one frame period is increased, the number of gradations can be increased while suppressing the driving frequency of the driving circuit. . Further, even when the subframe period is further divided, the length of the writing period can be ensured, so that generation of a pseudo contour can be suppressed while suppressing the driving frequency of the driving circuit.

  In this embodiment, a case will be described in which the potential of the current supply line is corrected to suppress the influence on the luminance due to the change in the current value of the light emitting element due to the change in environmental temperature and the change with time.

  The light-emitting element has a property that its resistance value (internal resistance value) changes depending on the ambient temperature. Specifically, when the room temperature is a normal temperature, the resistance value decreases when the temperature is higher than normal, and the resistance value increases when the temperature is lower than normal. Therefore, when the temperature increases, the current value increases and becomes higher than the desired luminance.When the same voltage is applied when the temperature decreases, the current value decreases and the luminance becomes lower than the desired luminance. Become. Further, the light emitting element has a property that its current value decreases with time. Specifically, when the light emission time and the non-light emission time are accumulated, the resistance value increases with the deterioration of the light emitting element. Therefore, even when the same voltage is applied when the light emission time and the non-light emission time are accumulated, the current value decreases and the luminance becomes lower than desired luminance.

  Due to the above-described properties of the light emitting element, when the environmental temperature changes or changes with time, the luminance varies. In this embodiment, by correcting the potential of the current supply line of the present invention, it is possible to suppress the influence on the luminance due to the change in the current value of the light emitting element due to the change in the environmental temperature and the change over time.

  FIG. 14 shows a circuit configuration. In FIG. 14, a drive transistor 1403 and a light emitting element 1404 are connected between a current supply line 1401 and a counter electrode 1402. Then, a current flows from the current supply line 1401 to the counter electrode 1402. The light emitting element 1404 emits light according to the magnitude of current flowing therethrough.

  In the case of such a pixel configuration, if current continues to flow through the light emitting element 1404, the characteristics deteriorate with time. The characteristics of the light emitting element 1404 vary depending on the temperature.

  Specifically, when a current continues to flow through the light emitting element 1404, the voltage-current characteristic shifts. That is, the resistance value of the light emitting element 1404 increases, and the flowing current value decreases even when the same voltage is applied. Moreover, even if the same magnitude | size electric current flows, luminous efficiency will fall and a brightness | luminance will fall. As the temperature characteristics, when the temperature decreases, the voltage-current characteristics of the light-emitting element 1404 shift, and the resistance value of the light-emitting element 1404 increases.

  Therefore, the influence of deterioration and fluctuation as described above is corrected using a monitoring circuit. In this embodiment, by adjusting the potential of the current supply line 1401, deterioration of the light emitting element 1404 and fluctuation due to temperature are corrected.

  Therefore, the configuration of the monitor circuit will be described. A monitor current source 1408 and a monitor light emitting element 1409 are connected between the first monitor power line 1406 and the second monitor power line 1407. An input terminal of a sampling circuit 1410 for outputting the potential of the monitor light emitting element is connected to a contact point between the monitor light emitting element 1409 and the monitor current source 1408. A current supply line 1401 is connected to the output terminal of the sampling circuit 1410. Therefore, the potential of the current supply line 1401 is controlled by the output of the sampling circuit 1410.

  Next, the operation of the monitor circuit will be described. First, when the light emitting element 1404 emits light with the brightest number of gradations, the monitoring current source 1408 passes a current having a magnitude desired to flow through the light emitting element 1404. The current value at this time is Imax.

  Then, a voltage having a magnitude necessary for flowing a current having a magnitude Imax is added to the voltage across the monitor light emitting element 1409. Even if the voltage-current characteristic of the monitor light emitting element 1409 changes due to deterioration, temperature, or the like, the voltage across the monitor light emitting element 1409 also changes accordingly and becomes an optimum magnitude. Therefore, the influence of fluctuations (deterioration, temperature change, etc.) of the monitor light emitting element 1409 can be corrected.

  The voltage applied to the monitor light emitting element 1409 is input to the input terminal of the sampling circuit 1410. Therefore, the output terminal of the sampling circuit 1410, that is, the potential of the current supply line 1401 is corrected by the monitor circuit, and the light emitting element 1404 is corrected for deterioration and fluctuation due to temperature.

  The sampling circuit may be any circuit that outputs a voltage corresponding to the input voltage. For example, a current amplifier circuit such as a voltage follower circuit may be used, but the present invention is not limited to this. A circuit may be configured by combining any one or more of an operational amplifier, a bipolar transistor, and a MOS transistor.

  Note that the monitor light emitting element 1409 is preferably formed on the same substrate by the same manufacturing method as the pixel light emitting element 1404. This is because if the monitor light-emitting element and the light-emitting element arranged in the pixel have different characteristics, the correction is shifted.

  Note that the light-emitting element 1404 arranged in the pixel has a period in which current is not frequently supplied. Therefore, if the monitor light-emitting element 1409 is continuously supplied with current, the monitor light-emitting element 1409 has a longer period. Deterioration greatly progresses. Therefore, the potential output from the sampling circuit 1410 is a potential that is excessively corrected. Therefore, the monitor light emitting element may be matched with the degree of deterioration in an actual pixel. For example, on average, if the lighting rate of the entire screen is 30%, a current may be supplied to the monitor light emitting element 1409 only during a period corresponding to a luminance of 30%. At that time, a period in which no current flows in the monitor light emitting element 1409 occurs. However, it is only necessary that the voltage is supplied from the output terminal of the sampling circuit 1410 without change. In order to realize this, a capacitor element is provided at the input terminal of the sampling circuit 1410, and the potential when a current is supplied to the monitor light emitting element 1409 may be held there.

  Note that if the monitor circuit is operated in accordance with the brightest number of gradations, a potential that is excessively corrected is output, which causes image sticking (deterioration level for each pixel). Therefore, it is desirable to operate the monitor circuit in accordance with the brightest number of gradations.

  In this embodiment, it is more preferable that the driving transistor 1403 is operated in a linear region. By operating in the linear region, the driving transistor 1403 generally operates as a switch. Therefore, it is possible to make it difficult for the driving transistor 1403 to be affected by the characteristic variation due to deterioration or temperature. When operating only in the linear region, it is often digitally controlled whether or not current flows through the light emitting element 1404. In that case, in order to increase the number of gradations, it is preferable to combine a time gradation method, an area gradation method, or the like.

  Note that this embodiment can be appropriately combined with the embodiment mode and other embodiments in this specification. In a time-division gray scale method (also referred to as a time gray scale method) which is one of driving methods of a display device, a row writing period is divided into two, and pixels in the first half row writing period (first row writing period). A video signal is written to the pixel, and a signal for forcibly stopping the supply of current to the light-emitting element is written to the pixel in the latter row writing period (second row writing period). A non-display period is provided by writing a signal for forcibly stopping the supply of current to the light-emitting element to the pixel, and the length of the subframe period is shorter than the length of the writing period. By using the scanning line driver circuit having the configuration of the above embodiment, charging and discharging of all scanning lines in the erasing period, which is a period for inputting a signal for forcibly stopping the supply of current to the light emitting element, is repeated. There is no need, and power consumption can be greatly reduced. Further, by using the scan line driver circuit having the structure of the above embodiment mode, it is not necessary to provide a switching circuit or the like. Further, by using the scan line driver circuit having the structure of the above embodiment, the scan line driver circuit can be operated only by being arranged on one side, and the circuit scale can be greatly reduced.

  In addition, since the length of the writing period can be ensured even if the number of subframe periods appearing in one frame period is increased, the number of gradations can be increased while suppressing the driving frequency of the driving circuit. . Further, even when the subframe period is further divided, the length of the writing period can be ensured, so that generation of a pseudo contour can be suppressed while suppressing the driving frequency of the driving circuit.

  Since the display device of the present invention can increase the narrowing of the frame while suppressing power consumption, the mobile phone, a portable game machine, a camera such as an electronic book, a video camera, or a digital still camera, and a portable phone that is supported by hand. It is most suitable for use as a display unit included in electronic equipment such as industrial equipment.

  Other electronic devices that can use the display device of the present invention include cameras such as video cameras and digital cameras, goggle-type displays (head mounted displays), navigation systems, sound playback devices (car audio, audio components, etc.), notebooks Image reproducing apparatus (typically, an apparatus having a display capable of reproducing a recording medium such as a DVD: Digital Versatile Disc and displaying the image). Specific examples of these electronic devices are shown in FIGS.

  FIG. 15A illustrates a mobile phone, which includes a main body 2101, a display portion 2102, a voice input portion 2103, a voice output portion 2104, and operation keys 2105. By manufacturing the display portion 2102 using the semiconductor display device of the present invention, a mobile phone which is one of the electronic devices of the present invention can be completed.

  FIG. 15B illustrates a video camera, which includes a main body 2601, a display portion 2602, a housing 2603, an external connection port 2604, a remote control receiving portion 2605, an image receiving portion 2606, a battery 2607, an audio input portion 2608, operation keys 2609, and an eyepiece. Part 2610 and the like. By manufacturing the display portion 2602 using the semiconductor display device of the present invention, a video camera which is one of the electronic devices of the present invention can be completed.

  FIG. 15C illustrates a display device, which includes a housing 2401, a display portion 2402, a speaker portion 2403, and the like. By manufacturing the display portion 2402 using the semiconductor display device of the present invention, a display device which is one of the electronic devices of the present invention can be completed. The display device includes all information display devices for personal computers, TV broadcast reception, advertisement display, and the like.

  As described above, the applicable range of the present invention is so wide that it can be used for electronic devices in various fields.

  Note that this embodiment can be appropriately combined with the embodiment mode and other embodiments in this specification. In a time-division gray scale method (also referred to as a time gray scale method) which is one of driving methods of a display device, a row writing period is divided into two, and pixels in the first half row writing period (first row writing period). A video signal is written to the pixel, and a signal for forcibly stopping the supply of current to the light-emitting element is written to the pixel in the latter row writing period (second row writing period). A non-display period is provided by writing a signal for forcibly stopping the supply of current to the light-emitting element to the pixel, and the length of the subframe period is shorter than the length of the writing period. By using the scanning line driver circuit having the configuration of the above embodiment, charging and discharging of all scanning lines in the erasing period, which is a period for inputting a signal for forcibly stopping the supply of current to the light emitting element, is repeated. There is no need, and power consumption can be greatly reduced. Further, by using the scan line driver circuit having the structure of the above embodiment mode, it is not necessary to provide a switching circuit or the like. Further, by using the scan line driver circuit having the structure of the above embodiment, the scan line driver circuit can be operated only by being arranged on one side, and the circuit scale can be greatly reduced.

  In addition, since the length of the writing period can be ensured even if the number of subframe periods appearing in one frame period is increased, the number of gradations can be increased while suppressing the driving frequency of the driving circuit. . Further, even when the subframe period is further divided, the length of the writing period can be ensured, so that generation of a pseudo contour can be suppressed while suppressing the driving frequency of the driving circuit.

FIG. 4 shows a scanning line driving circuit of the present invention. FIG. 4 is a timing chart of the scanning line driving circuit of the present invention. The figure shown about Example 1 of this invention. The figure shown about Example 1 of this invention. The figure shown about Example 1 of this invention. The figure shown about Example 2 of this invention. The figure shown about Example 3 of this invention. The figure shown about Example 3 of this invention. The figure shown about Example 4 of this invention. The figure shown about Example 5 of this invention. The figure shown about Example 6 of this invention. The figure shown about Example 7 of this invention. The figure shown about Example 8 of this invention. The figure shown about Example 9 of this invention. The figure shown about Example 10 of this invention. The figure which showed the conventional pixel structure. FIG. 10 shows a display device including a conventional scanning line driving circuit. FIG. 4 shows a scanning line driving circuit of the present invention.

Explanation of symbols

10 pixel 11 pixel unit 12 signal line driving circuit 13 scanning line driving circuit 101 shift register 102 flip-flop 103 level shifter 104 buffer circuit 210 signal line 211 scanning line 212 current supply line 213 writing transistor 214 driving transistor 215 capacity 216 light emitting element 217 cathode 301 scanning line driving circuit for writing 302 scanning line driving circuit for erasing 303 switching circuit 304 signal line 305 writing transistor 306 driving transistor 307 light emitting element 310 pixel 311 display area 312 signal line driving circuit 313 scanning line 401 light emitting element 402 for switching Transistor 403 Driving transistor 404 Current control transistor 501 Substrate 1010 Pixel 1011 Switching transistor 1012 Driving transistor 1013 Light emitting element 1 16 Capacitance element 1017 Power source 1018 Power source 1019 Conductive layer 1020 Substrate 1021 Semiconductor layer 1022 Conductive layer 1023 Conductive layer 1024 Conductive layer 1025 Conductive layer 1026 Conductive layer 1027 Conductive layer 1028 Insulating layer 1029 Insulating layer 1030 Insulating layer 1031 Insulating layer 1032 Partition layer 1033 Electric field Light emitting layer 1034 Conductive layer 1035 Width 1037 Width 1038 Width 1301 Switching transistor 1302 Driving transistor 1304 Light emitting element 1310 Gate 1311 Semiconductor film 1312 Semiconductor film 1313 Semiconductor film 1314 Wiring 1314 Wiring 1315 Wiring 1317 Gate insulating film 1320 Gate 1321 Semiconductor film 1322 Semiconductor Film 1323 Semiconductor film 1324 Wiring 1325 Wiring 1350 Electrode 1351 Electroluminescent layer 1352 Electrode 1401 Current supply line 1 02 Counter electrode 1403 Drive transistor 1404 Light emitting element 1406 Monitor power supply line 1407 Monitor power supply line 1408 Monitor current source 1409 Monitor light emitting element 1410 Sampling circuit 2101 Main body 2102 Display unit 2103 Audio input unit 2104 Audio output unit 2105 Operation key 2401 Case 2402 Display unit 2403 Speaker unit 2601 Main body 2602 Display unit 2603 Case 2604 External connection port 2605 Remote control reception unit 2606 Image receiving unit 2607 Battery 2608 Audio input unit 2609 Operation key 2610 Eyepiece unit 4001 Substrate 4002 Pixel unit 4003 Signal line driver circuit 4004 Scanning line Driving circuit 4005 Scanning line driving circuit 4006 Substrate 4007 Filler 4008 Transistor 4009 Driving transistor 4010 Switching transistor Star 4011 emitting element 4012 electrodes 4014 lines 4015 lines 4016 connect terminals 4016 connection terminals 4017 wiring 4018 FPC
4019 Anisotropic conductive film 4020 Sealing material 5011 Monitor light emitting element 5013 Monitor current source 6001 Driving transistor 6003 Light emitting element 6004 Electrode 6005 Electroluminescent layer 6006 Electrode 6007 Interlayer insulating film 6008 Partition 6011 Driving transistor 6013 Light emitting element 6014 Electrode 6015 Electroluminescent layer 6015 Electroluminescent layer 6016 Electrode 6021 Driving transistor 6023 Light emitting element 6024 Electrode 6025 Electroluminescent layer 6026 Electrode 6031 Driving transistor 6033 Light emitting element 6034 Electrode 6035 Electroluminescent layer 6036 Electrode 6041 Driving transistor 6043 Light emitting element 6044 Electrode 6045 Electric field Light emitting layer 6045 Electroluminescent layer 6046 Electrode 6051 Driving transistor 6053 Light emitting element 6054 Electrode 6055 Electroluminescent layer 6 056 electrode

Claims (15)

A display device having a scanning line driving circuit for supplying signals to m scanning lines (m is a natural number),
At least 4k stages (k is a natural number) of flip-flop circuits corresponding to each scanning line are provided in the shift register constituting the scanning line driving circuit,
When a start pulse with different timing is input to the shift register, a first selection signal for selecting the scanning line in the first half period of one scanning line selection period, and the scanning line in the second half period of the one scanning line selection period. A display device, wherein a second selection signal for selecting is output to the scanning line. A display device having a scanning line driving circuit for supplying signals to m scanning lines (m is a natural number of 2 or more),
The shift register constituting the scan line driver circuit includes at least 4k stages (k is a natural number) of flip-flop circuits corresponding to the first to (m−1) th scan lines among the scan lines. And at least one flip-flop circuit corresponding to the mth scanning line is provided,
When a start pulse with different timing is input to the shift register, a first selection signal for selecting the scanning line in the first half period of one scanning line selection period, and the scanning line in the second half period of the one scanning line selection period. A display device, wherein a second selection signal for selecting is output to the scanning line. A display device having a scanning line driving circuit for supplying signals to m scanning lines (m is a natural number),
At least 4k stages (k is a natural number) of flip-flop circuits corresponding to each scanning line are provided in the shift register constituting the scanning line driving circuit,
By inputting start pulses having different timings to the shift register, a signal for inputting video data to pixels connected to the scan line in a first period of one scan line selection period, and the one scan line A display device, wherein a signal for erasing video data input to a pixel connected to the scan line in a second period of the selection period is output to the scan line. A display device having a scanning line driving circuit for supplying signals to m scanning lines (m is a natural number of 2 or more),
The shift register constituting the scan line driver circuit includes at least 4k stages (k is a natural number) of flip-flop circuits corresponding to the first to (m−1) th scan lines among the scan lines. And at least one flip-flop circuit corresponding to the mth scanning line is provided,
By inputting start pulses having different timings to the shift register, a signal for inputting video data to pixels connected to the scan line in a first period of one scan line selection period, and the one scan line A display device, wherein a signal for erasing video data input to a pixel connected to the scan line in a second period of the selection period is output to the scan line. A display device having a scanning line driving circuit for supplying signals to m scanning lines (m is a natural number),
At least 4k stages (k is a natural number) of flip-flop circuits corresponding to each scanning line are provided in the shift register constituting the scanning line driving circuit,
By inputting start pulses having different timings to the shift register, a signal for inputting first video data to pixels connected to the scan line in a first period of one scan line selection period; A display device, wherein a signal for inputting second video data to a pixel connected to the scanning line in a second period of one scanning line selection period is output to the scanning line. A display device having a scanning line driving circuit for supplying signals to m scanning lines (m is a natural number of 2 or more),
The shift register constituting the scan line driver circuit includes at least 4k stages (k is a natural number) of flip-flop circuits corresponding to the first to (m−1) th scan lines among the scan lines. And at least one flip-flop circuit corresponding to the mth scanning line is provided,
By inputting start pulses having different timings to the shift register, a signal for inputting first video data to pixels connected to the scan line in a first period of one scan line selection period; A display device, wherein a signal for inputting second video data to a pixel connected to the scanning line in a second period of one scanning line selection period is output to the scanning line. A display device having a scanning line driving circuit for supplying signals to m scanning lines (m is a natural number),
At least 4k stages (k is a natural number) of flip-flop circuits corresponding to each scanning line are provided in the shift register constituting the scanning line driving circuit,
By inputting start pulses with different timings to the shift register, a signal for selecting the scanning line in the first half period of one scanning line selection period and the scanning line in the second half period of the one scanning line selection period are selected. Signal is output to the scanning line,
A signal output from the scanning line in the first period and the second period is output from any one of the 4k-stage flip-flop circuits corresponding to one of the scanning lines. A display device characterized by being a signal. A display device having a scanning line driving circuit for supplying signals to m scanning lines (m is a natural number of 2 or more),
The shift register constituting the scan line driver circuit includes at least 4k stages (k is a natural number) of flip-flop circuits corresponding to the first to (m−1) th scan lines among the scan lines. And at least one flip-flop circuit corresponding to the mth scanning line is provided,
By inputting start pulses with different timings to the shift register, a signal for selecting the scanning line in the first half period of one scanning line selection period and the scanning line in the second half period of the one scanning line selection period are selected. Signal is output to the scanning line,
A signal output from the scanning line in the first period and the second period is output from any one of the 4k-stage flip-flop circuits corresponding to one of the scanning lines. A display device characterized by being a signal. A display device having a scanning line driving circuit for supplying signals to m scanning lines (m is a natural number),
At least 4k stages (k is a natural number) of flip-flop circuits corresponding to each scanning line are provided in the shift register constituting the scanning line driving circuit,
By inputting start pulses having different timings to the shift register, a signal for inputting video data to pixels connected to the scan line in a first period of one scan line selection period, and the one scan line A signal for erasing video data input to the pixels connected to the scan line in the second period of the selection period is output to the scan line;
A signal output from the scanning line in the first period and the second period is output from any one of the 4k-stage flip-flop circuits corresponding to one of the scanning lines. A display device characterized by being a signal. A display device having a scanning line driving circuit for supplying signals to m scanning lines (m is a natural number of 2 or more),
The shift register constituting the scan line driver circuit includes at least 4k stages (k is a natural number) of flip-flop circuits corresponding to the first to (m−1) th scan lines among the scan lines. And at least one flip-flop circuit corresponding to the mth scanning line is provided,
By inputting start pulses having different timings to the shift register, a signal for inputting video data to pixels connected to the scan line in a first period of one scan line selection period, and the one scan line A signal for erasing video data input to the pixels connected to the scan line in the second period of the selection period is output to the scan line;
A signal output from the scanning line in the first period and the second period is output from any one of the 4k-stage flip-flop circuits corresponding to one of the scanning lines. A display device characterized by being a signal. In any one of Claims 1 to 10,
The display device, wherein the start pulse is input from a flip-flop circuit side corresponding to the first scanning line. In any one of Claims 1 to 11,
In the scanning line driving circuit, at least one flip-flop circuit is further provided in front of the flip-flop circuit corresponding to the first scanning line to which the start pulse is input. . In any one of Claims 1 to 12,
The display device includes a plurality of pixels, a signal line driving circuit, and the scanning line driving circuit,
The display device, wherein the plurality of pixels, the signal line driver circuit, and the scanning line driver circuit are provided over the same substrate. In claim 13,
Each of the plurality of pixels is provided with a light emitting element, a transistor for driving the light emitting element, and a transistor for selecting the pixel.   An electronic apparatus comprising the display device according to claim 1.

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