JP2007194262A - Defect judging system and substrate processing system - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a defect judging system and a substrate processing system with which abnormality in a manufacturing process is detected in an early stage of production, deterioration of an amount of production can be suppressed to be minimum and yield in the manufacturing process can be improved. <P>SOLUTION: A defect cycle estimator in single object 32 and a defect cycle estimator in a plurality of objects 34 estimate periodicity of a defect in the object of inspection with statistical hypothesis to defect information based on defect information on features of the individual defects, picture information on the object of inspection and information on the object of inspection. A manufacturing process abnormality judging part 35 judges abnormality of the manufacture process based on an estimated result. <P>COPYRIGHT: (C)2007,JPO&INPIT

Description

  The present invention performs inspections on FPD (Flat Panel Display) substrates such as LCD (Liquid Crystal Display) and PDP (Plasma Display Panel) and substrates such as semiconductor wafers, and defects found in the inspection. The present invention relates to a defect determination system that determines whether or not a manufacturing process is abnormal based on the above. The present invention also relates to a substrate processing system that manages processing conditions of a manufacturing apparatus used in a manufacturing process based on a determination result by a defect determination system.

In general, in the pre-manufacturing process using a semiconductor wafer, a liquid crystal glass substrate, or the like, a substrate in which a patterned resist is formed on a substrate made of silicon or glass through a film formation layer is formed. FIGS. 34A to 34G show a pre-process for manufacturing a semiconductor. Hereinafter, with reference to FIG. 34, processing performed in a pre-process of semiconductor manufacturing will be described. An oxide film (SiO ₂ ) is formed on the surface of the semiconductor wafer 901 (FIG. 34A), and a silicon nitride thin film 902 is deposited on the oxide film (FIG. 34B). Subsequently, the process proceeds to a photolithography process, and a thin film of photoresist (photosensitive resin) 903 is applied on the surface of the thin film 902 of silicon nitride film (FIG. 34C). At this time, a photoresist solution is dropped onto the surface of the silicon nitride thin film 902 by a coater (coating machine), and the semiconductor wafer 901 is rotated at a high speed, whereby the photoresist 903 is formed on the surface of the silicon nitride thin film 902. Apply a thin film.

  Subsequently, in an exposure machine such as a stepper, the photoresist 903 on the semiconductor wafer 901 is irradiated with ultraviolet rays through a photomask substrate (hereinafter abbreviated as “mask”) 904 (FIG. 34D). As a result, the semiconductor pattern drawn on the mask 904 is transferred (exposed) to the photoresist 903. Subsequently, development is performed to dissolve the photoresist 903 in the exposed portion with a solvent, leaving a resist pattern 903a in the unexposed portion (positive type) (FIG. 34 (e)). On the other hand, the negative type is to leave the photoresist 903 in the exposed portion and dissolve the resist pattern 903a in the unexposed portion.

  When the development is completed, an appearance inspection of the resist pattern 903a formed on the surface of the semiconductor wafer 901 is performed. After the inspection, using the resist pattern 903a remaining on the surface of the semiconductor wafer 901 as a mask, the oxide film and the silicon nitride film on the surface of the semiconductor wafer 901 are successively selectively removed (etched) (FIG. 34 (f) )). Subsequently, the resist pattern 903a on the surface of the semiconductor wafer 901 is removed by ashing (resist peeling) (FIG. 34 (g)). Subsequently, the semiconductor wafer 901 is cleaned to remove impurities.

  Thereafter, the processes from the application of the photoresist 903 to the cleaning of the semiconductor wafer 901 are repeated to form a multi-layer pattern on the surface of the semiconductor wafer 901. The steps from application to development of the photoresist 903 may be performed by a photolithography apparatus in which a coater / developer and an exposure machine are integrated into a system. In addition, the coater, developer, exposure machine, and the like may be composed of a single unit, but are often composed of a plurality of units in consideration of throughput.

  However, in each unit of the systemized photolithography apparatus, a defect due to the following apparatus failure occurs. In a coater in a photolithography apparatus, non-uniformity of photoresist film formation on the surface of a semiconductor wafer occurs due to adhesion of foreign matter, photoresist viscosity, temperature, and rotation conditions. In the exposure machine, defocusing, improper mask transfer of other circuit patterns, the shading area around the mask is too large or too small, the effects of defects on the mask, foreign matter, and pattern abnormalities May cause underexposure or overexposure due to exposure amount or focus abnormality, double exposure of the semiconductor wafer, or unexposed.

  In the developer, development failure occurs depending on the temperature of the developer and the development time. The appearance inspection of the semiconductor wafer for inspecting such a defect is performed as follows. For example, the semiconductor wafer is once carried out of the photolithography apparatus and carried into an appearance inspection apparatus outside the photolithography apparatus for appearance inspection. Further, Patent Document 1 discloses a method for detecting defects in a photolithography apparatus equipped with an inspection unit.

  On the other hand, in order to notify the production management system of the manufacturing factory of information (defect information; for example, the position and area on the substrate) related to the defect found in the inspection of the substrate so as to improve the production efficiency and the yield. A method of using defect information in a production management system is taken. In general, when manufacturing process yield management is performed using defect information, a manufacturing process using a result of inspection relating to one inspection target (substrate) (that is, defect information extracted from only one substrate). To detect and notify the malfunction of the manufacturing process, change the manufacturing conditions of the manufacturing process, etc.

  However, when problems such as defects due to photolithography equipment or scratches on transport system factors occur on the manufacturing process side, the substrate to be inspected is caused by these problems in lot units grouped by type / process. Defects are expected to occur. Specifically, it is expected that defects having the same position, the same size, and the same shape occur periodically on the substrates in the same lot. With conventional yield management methods that use single defect information for a single inspection object, it is difficult to automatically recognize problems on the manufacturing process side, and in fact, it is left to the operator in the field and the management of the manufacturing process. When the person in charge who has been collected collects information, the problem will finally become clear, and the yield will deteriorate for a long time, leading to a decrease in production efficiency.

  Therefore, instead of using defect information of a single substrate (inspection) as it is, there is a method for managing yield by using defect information of multiple (multiple substrates, multiple inspection), and the defect information to be used is the substrate Several proposals have been proposed that focus on the state of distribution of defects. For example, in the technique described in Patent Document 2, the feature amount of the defect distribution density is calculated for each manufacturing apparatus by paying attention to the density of the defect distribution with respect to the substrate to be inspected. Then, the similarity of the feature of the defect distribution density is examined over a plurality of objects inspected in the past, and the periodicity of the feature is analyzed and evaluated based on this to determine the abnormality of the manufacturing apparatus and estimate the cause The configuration is such that measures are taken.

In the technique described in Patent Document 3, attention is paid to the temporal transition of the defect distribution density in the region of interest on the inspection target (substrate), and the state of the defect distribution density (degree of density) that fluctuates with time is determined. In addition, a configuration is adopted in which an abnormality in the manufacturing process is determined.
Republished patent WO2003 / 077291 JP 2003-100825 A JP 2004-63708 A

  A defect that occurs due to the malfunction of the photolithography apparatus as described above may occur only in a specific wafer, but a large number of defective products may be generated by repeatedly manufacturing defective wafers. For this reason, when a defect occurs, it is necessary to stop and repair the manufacturing apparatus as soon as possible. However, when the manufacturing apparatus is stopped for repair, there is a problem that the apparatus operating rate is lowered and the production amount of the factory is reduced. In particular, in a photolithographic apparatus (see Patent Document 1) in which a coater / developer and an exposure machine are integrated into a system (see Patent Document 1), it is necessary to stop all apparatuses even if there are some problems. It gets bigger.

  In Patent Documents 2 and 3, the abnormality of the manufacturing process is determined by paying attention to the distribution of defects on the substrate to be inspected, but in reality, the abnormality of the manufacturing process is determined only by the distribution / number of defects. Not all can be found. Rather, even if there is only one defect, there are many cases where the defect is a fatal defect that cannot exhibit the original function of the substrate. In the methods described in Patent Documents 2 and 3, it is considered that such a small number of fatal defects are overlooked, thereby delaying the determination of abnormality in the manufacturing process and deteriorating the yield. Considering the yield management of the original manufacturing process, the “quality” of defects should be emphasized more than the number of defects (distribution / density) = “quantity”.

  SUMMARY OF THE INVENTION The present invention has been made in view of the above-described problems, and is a defect determination system and a substrate that can detect an abnormality in a manufacturing process and can improve a manufacturing process yield by minimizing a decrease in production amount. An object is to provide a processing system.

  The present invention has been made in order to solve the above-described problems. As the “quality” of defects extracted by inspection, the characteristics of each defect (position on the substrate) regardless of the number of defects and the defect distribution density. , Size, shape, etc.). In the present invention, the “periodicity” of the feature of the defect in the inspection object is automatically checked, and the presence or absence of abnormality in the manufacturing process is determined according to the estimation result of the presence or absence of periodicity. In the present invention, a defect is detected, and information related to the operating conditions of each manufacturing apparatus is collected to identify a manufacturing apparatus in which an abnormality has occurred.

  In view of the above points, the present invention captures an inspection target, generates image information, and extracts defects of the inspection target based on the image information generated by the imaging means. Defect extraction means for generating defect information related to the feature of the defect, and defect period estimation for estimating the periodicity of the defect in the inspection target based on the defect information, the image information, and the information regarding the inspection target A defect determination system comprising: means; and manufacturing abnormality determination means for determining whether there is an abnormality in the manufacturing process based on a result estimated by the defect period estimation means.

  In the defect determination system of the present invention, the defect period estimation means estimates the periodicity of defects that have repeatedly occurred in the same inspection object.

  In the defect determination system of the present invention, the information on the inspection target indicates one or more inspection area sections provided on the inspection object, and the defect period estimation means determines the inspection area section. The defect periodicity is estimated as a unit.

  In the defect determination system of the present invention, the defect period estimation means estimates the periodicity of defects that have repeatedly occurred over the plurality of objects to be inspected.

  In addition, the defect determination system of the present invention further includes a first defect classification unit that classifies the defects using the defect information.

  In the defect determination system of the present invention, the defect information includes the defect information of the defect in the inspection target, the defect information including information on the quality of the defect in the inspection target. To do.

  In the defect determination system of the present invention, the defect information includes a determination result of pass / fail with respect to a section of a minimum inspection area provided on the inspection target.

  The defect determination system according to the present invention further includes a manufacturing apparatus identification information acquisition unit that acquires identification information of a manufacturing apparatus that has processed the inspection target in the manufacturing process and associates the identification information with the defect information of the inspection target. It is characterized by having.

  In the defect determination system of the present invention, the defect period estimation means estimates the defect periodicity using identification information of the manufacturing apparatus associated with arbitrary defect information.

  In the defect determination system of the present invention, the defect period estimation means performs a statistical hypothesis test on the defect information, and determines that there is periodicity when there is information that is not rejected by the test. To do.

  In the defect determination system of the present invention, the manufacturing abnormality determination unit outputs a determination result indicating that there is an abnormality in the manufacturing process when the defect period estimation unit estimates that there is a defect periodicity. It is characterized by doing.

  In addition, the present invention includes the above-described defect determination system, and correlates between the defect to be inspected extracted by the defect extraction unit and the manufacturing apparatus that has processed the object to be inspected in the manufacturing process. In order to avoid the manufacturing apparatus specified by the correlation detecting means, and the correlation detecting means for specifying the manufacturing apparatus in which an abnormality has occurred, based on the detected correlation A substrate processing system comprising processing condition changing means for changing processing conditions assigned to a manufacturing apparatus.

  Further, in the substrate processing system of the present invention, a storage means for storing defect classification information in which a defect feature amount and a defect classification result are associated, and the defect classification based on the defect information and the defect classification information And a correlation detection unit that correlates the defect to be inspected with the manufacturing apparatus based on the defect classification result by the second defect classification unit. The manufacturing apparatus in which an abnormality has occurred is specified based on the detected correlation.

  In addition, the present invention includes the defect determination system described above, the defect of the inspection target extracted by the defect extraction unit, and a component in the manufacturing apparatus that has performed the processing of the inspection target in the manufacturing process. A correlation detecting means for identifying a part in the manufacturing apparatus in which an abnormality has occurred based on the detected correlation, and in the manufacturing apparatus specified by the correlation detecting means A substrate processing system comprising processing condition changing means for changing a processing condition assigned to each manufacturing apparatus so as to avoid the parts.

  In addition, the present invention includes the defect determination system described above, and detects a correlation between the defect to be inspected extracted by the defect extraction unit and the method for processing the object to be inspected in the manufacturing process, Based on the detected correlation, correlation detection means for specifying the processing method in which an abnormality has occurred, and allocation to each manufacturing apparatus so as to avoid the processing method specified by the correlation detection means A substrate processing system comprising processing condition changing means for changing processing conditions.

  According to the present invention, the defect periodicity is estimated based on the defect information regarding the characteristics of each defect, the image information, and the information regarding the inspection target, and the presence or absence of a defect in the manufacturing apparatus is determined from the estimation result. As a result, it is possible to detect an abnormality in the manufacturing process, minimize the decrease in the production amount, and improve the manufacturing process yield.

  Hereinafter, embodiments of the present invention will be described with reference to the drawings. First, a first embodiment of the present invention will be described. FIG. 1 shows an overall configuration of a manufacturing apparatus (substrate processing system) incorporating a defect determination system in a photolithography process of a semiconductor wafer. The photolithography process is a process for transferring a circuit pattern to a resist, which includes processing steps in a manufacturing apparatus of a coater that performs resist coating, a stepper that performs printing (exposure) of a pattern, and a developer that performs development. In FIG. 1, a coater device 2, a stepper device 3, and a developer device 4 are provided as manufacturing apparatuses for the photolithography process. Each manufacturing apparatus has a coater device control unit 2A, a stepper device control unit 3A, and a developer device control unit 4A for controlling each device. Operations such as device status management and information exchange with the outside It is carried out.

  On the other hand, a defect determination system 1 according to an embodiment of the present invention includes a substrate inspection device 6 and a substrate inspection result management unit 7. The substrate inspection apparatus 6 extracts defects when a substrate to be inspected (not shown) is inserted, and outputs defect information generated at that time. The substrate inspection result management unit 7 has a function of receiving defect information and the like from the substrate inspection apparatus 6 and managing inspection results such as defect information for each substrate, and is managed with defect information about one substrate and the same lot. It has a function of judging abnormality of the manufacturing apparatus by estimating the periodicity of defects from defect information on a plurality of substrates, and outputs the result. The operation of each part in each manufacturing apparatus and the defect determination system 1 is managed by the manufacturing process management part 5. The manufacturing process management unit 5 has functions of managing the operation of each apparatus and transferring information between different apparatuses, and controls the entire manufacturing process.

  FIG. 2 shows the configuration of the substrate inspection apparatus 6. In this embodiment, macro inspection is used as a substrate inspection method. In the macro inspection, illumination information is applied in a state inclined with respect to the main surface of the substrate, and the reflected light is received by a one-dimensional line sensor to obtain image information (image data). Specifically, two-dimensional “image information” is generated by arranging image information sequentially acquired from the line sensor while moving the substrate transport system or imaging system such as a stage “relatively”. Then, inspection such as defect extraction is performed on the two-dimensional image information. Note that a two-dimensional imaging device may be used instead of the line sensor.

  First, the apparatus control unit 11 receives the control information aa output from the manufacturing process management unit 5. The device control unit 11 performs internal control of the substrate inspection device 6. The control information aa includes information indicating that the substrate to be inspected is loaded into the apparatus. Based on the control information aa, the apparatus control unit 11 instructs the illumination system control unit 13, the image sensor control unit 14, and the stage control unit 17 to prepare for substrate loading. The device control unit 11 handles bidirectional information such as illumination control information cc with the illumination system control unit 13, imaging sensor control information dd with the imaging sensor control unit 14, and stage control information ee with the stage control unit 17. Control the operation of each part. Each control unit prepares for inspection, and sends information indicating that “inspection preparation is complete” to the apparatus control unit 11.

  After completion of the inspection preparation, the apparatus control unit 11 issues an instruction to the illumination system control unit 13, the imaging sensor control unit 14, and the stage control unit 17 so as to perform processing for acquiring image information. Specifically, the illumination system control unit 13 outputs illumination information ff to the illumination unit 15 so as to specify illumination light quantity and the like so as to irradiate the substrate with illumination light. In addition, the stage control unit 17 outputs the stage drive information hh to the inspection stage 18 so that the inspection stage 18 on which the substrate to be inspected is mounted is one-dimensional that is the arrangement direction of the sensors of the imaging sensor 16. Drive in a direction perpendicular to the direction.

  The stage drive information hh includes the initial speed, acceleration, arrival speed, and the like during driving. Then, the imaging sensor control unit 14 instructs the imaging sensor 16 to perform imaging with the imaging information gg in order to acquire image information for one line from the imaging sensor 16. The imaging information gg includes an exposure time at the time of imaging, a gain, a line transfer timing, and the like.

  The image information for one line acquired by the image sensor 16 is sent to the image capturing unit 19 as line image information jj. The image capturing unit 19 generates two-dimensional image information related to the inspection board by combining the image information of each line. The image capturing unit 19 also performs image processing related to the correction of the imaging system, such as shading correction for correcting brightness and distortion correction for correcting geometric distortion, with respect to the line image information jj.

  While the image information is acquired, the board inspection apparatus 6 receives information relating to the current inspection object, for example, inspection object information bb such as the manufacturing process and product type, from the manufacturing process management unit 5 as “information necessary for the inspection”. , Input to the manufacturing process / product information acquisition unit 12. The manufacturing process / product information acquisition unit 12 converts the inspection object information bb into information that can be used in subsequent defect extraction, for example, information on the product to design information of the semiconductor wafer (the size of the chip or shot of the wafer, (Interval, vertical / horizontal arrangement position, etc.).

  The two-dimensional image information generated by the image capturing unit 19 is sent to the image storage unit 20 as two-dimensional image information kk. In addition to the two-dimensional image information kk, the manufacturing process / product information mm for inspection generated and output by the manufacturing process / product information acquisition unit 12 is input to the image storage unit 20. The image storage unit 20 stores these in an associated state. When the storage of the image information and the like is completed, the image storage unit 20 sends information indicating “image information acquisition completion” to the apparatus control unit 11 as the image storage control information nn. Upon receiving the information, the apparatus control unit 11 outputs control information indicating completion of image acquisition to the illumination system control unit 13, the imaging sensor control unit 14, and the stage control unit 17, and performs an operation for image acquisition. Complete.

  Subsequently, the acquired image is inspected. The apparatus control unit 11 sends information indicating “image inspection start” to the image storage unit 20 as image storage control information nn. The image storage unit 20 receives the information and outputs inspection image information pp in which manufacturing process and type information (inspection manufacturing process / type information mm) necessary for the inspection is added to the two-dimensional image information kk. The inspection image information pp is input to the defect extraction unit 21, and the defect extraction unit 21 performs defect extraction processing.

  The defect extraction process is a known method, for example, a process of preparing a reference image in advance and comparing the inspection image with the reference image (in this case, the reference image is stored in the image storage unit 20 and is used for the inspection manufacturing process / A reference image corresponding to the content of the product type information mm is added to the test image information pp), or an inspection manufacturing process / product type information mm including wafer design information generated by the manufacturing process / product type information acquisition unit 12 Based on the above, a process of comparing adjacent patterns in a certain cycle is performed. The result of the defect extraction process is output as defect extraction result information qq (defect information). The defect extraction result information qq includes information on the amount of defects (defect number and density) when there is a defect and information on the quality of the defect representing the characteristics of a single defect, that is, the position of the defect on the image and the position of the center of gravity. Information about the shape of the defect, area, ferret diameter (width / height of the circumscribed rectangle of the defect), circumference (length of the outline of the defect), roundness (complexity of the shape compared to the circle) Numerical value), non-equal axis degree, principal axis angle (moment), average brightness, maximum and minimum brightness, or variance (or standard deviation), which is information on the brightness of the defect, median brightness that can be calculated from the histogram, and maximum It includes frequency values, luminance values, hues, saturations, and other color system color values for each RGB, which are information relating to defect colors.

  The defect extraction result information qq output from the defect extraction unit 21 is input to the defect classification unit 22. The defect classification unit 22 performs classification processing such as what kind of defect is, using the inspection image information pp and the defect extraction result information qq. In this classification process, the classification rule information rr stored in the defect classification rule storage unit 23 is read out, the fitness of each rule is calculated with respect to the referenced defect, and the classification rule that maximizes the fitness is applied. That's it. The classification rule information rr uses, for example, the area and ferret diameter included in the defect information as a feature representing the classification of “scratches”, and the area is small and the ferret diameter is long (one diameter is longer than the other). It is a quantification of the content of “scratches” in the case of “long”. The smaller the defect area and the narrower the ferret diameter, the greater the “scratch” suitability.

  The classification rule information rr indicates how much the feature amount of defect information is in order to identify such classification. The defect classification is not limited to the method as described above. For example, the contents disclosed in Japanese Patent Application Laid-Open No. 2003-168114 (from the defect information, the classification type is determined for a certain defect in the classification process). This is a method for improving classification accuracy by excluding, and a method such as applying a classification rule using fuzzy inference may be used.

  The defect classification unit 22 receives the classification result, and together with the wafer design information and the defect extraction result information qq included in the inspection image information pp, the classification content and the degree of conformity thereof (there is no limitation to one classification content or multiple classification contents). Classification result information ss indicating “good” is generated and output. Further, the defect classification rule storage unit 23 updates the classification rule based on external information from an operator (not shown) when it becomes necessary to update the classification rule according to the result of the defect classification by the defect classification unit 22. It is possible to send newly updated content (classification content and its fitness) from the defect classification unit 22 to the defect classification rule storage unit 23 as classification rule information rr.

  The classification result information ss is input to the chip / wafer unit defect determination unit 24. The chip / wafer unit defect determination unit 24 determines whether the inspection substrate is OK or NG in the chip unit and the wafer unit based on the classification content and the degree of matching of the classification result information ss and the wafer design information ( Pass / fail judgment processing). Specifically, “whether or not to function as a chip” is determined to be OK or NG for each chip based on the classification content and fitness, and OK / NG determination is performed for each wafer based on the result of the OK / NG determination for each chip. The process is performed as follows. The determination result of the chip unit and the wafer unit is output as chip / wafer unit determination information tt.

  Inspection image information pp, defect extraction result information qq, classification result information ss, and chip / wafer unit determination information tt are input to the inspection information integration unit 25. The inspection information integration unit 25 integrates information so that information related to a single defect can be managed together. For example, as shown in FIG. 3, lot ID, substrate ID, defect number (index assigned to each defect in the order of extraction), defect information (position on image, area in pixel unit), classification content and its conformity Degree (100 is the maximum), judgment result (OK / NG) of chip unit and wafer unit as one line information, and image information is linked with substrate ID. Information on manufacturing process / product type such as wafer design information is lot Organize information such as linking with ID.

  The information to be integrated is not limited to that shown in FIG. 3, and other defect information may be added. The collected information (including not only the information shown in FIG. 3 but also image information and manufacturing process / product type information) is sent to the substrate inspection result management unit 7 as integrated inspection information ww. In addition, when the integrated inspection information ww is output, the inspection information integration unit 25 sends substrate inspection completion information uu indicating that one substrate inspection is completed to the manufacturing process management unit 5.

  Next, with reference to FIG. 4, the flow of processing by the substrate inspection apparatus 6 will be described. First, in accordance with an instruction from the apparatus control unit 11 (inspection preparation instruction), processing is performed to make the illumination system, the imaging sensor, and the stage ready for inspection (step S11). Upon receiving notification from each unit that the illumination system, the imaging sensor, and the stage are each ready for inspection (inspectable state), the apparatus control unit 11 places the inspection substrate to be inspected on the inspection stage 18, and While driving the inspection stage 18 in a plane direction (a direction perpendicular to the one-dimensional direction that is the arrangement direction of the sensors of the image sensor 16), processing for acquiring inspection image information from the image sensor 16 is performed (step S12). .

  When the imaging of the entire wafer as the inspection substrate is completed (image information from the imaging sensor is sent to the image capturing unit 19), the apparatus control unit 11 receives the inspection image information kk and the inspection manufacturing process / Processing for associating the product type mm with the image storage unit 20 is performed (step S13). After the image information is stored, the apparatus control unit 11 reads stored information from the image storage unit 20 and causes the defect extraction unit 21 to perform defect extraction processing (step S14).

  When a defect is extracted by the defect extraction process (the fact that a defect exists is recorded in the defect extraction result information qq), the defect classification unit 22 performs a defect classification process using the classification rule information rr ( Step S15). Subsequently, the chip / wafer unit defect determination unit 24 performs chip unit / wafer unit defect determination (OK / NG) based on the classification result information ss and the defect extraction result information qq generated by the defect classification unit 22. (Step S16).

  When the defect determination process ends, the inspection information integration unit 25 obtains the inspection image information pp (including manufacturing process / product information), defect extraction result information qq, classification result information ss, and chip / wafer unit determination information tt. Integration is performed according to the format shown in FIG. 3 (step S17). The inspection information integration unit 25 transmits the integrated information (integrated inspection information ww) to the substrate inspection result management unit 7 and simultaneously transmits the substrate inspection completion information uu to the manufacturing process management unit 5 (step S18). The above process is repeated for one substrate.

  Next, the configuration of the substrate inspection result management unit 7 will be described with reference to FIG. When the manufacturing process management unit 5 receives the information on the completion of the substrate inspection from the substrate inspection apparatus 6, the periodicity estimation instruction information aaa indicating an instruction to check whether or not there is a defect periodicity with respect to the latest inspection result. Is output to the board inspection result management unit 7. The periodicity estimation instruction information aaa is input to the substrate inspection result management control unit 31 in the substrate inspection result management unit 7. The substrate inspection result management control unit 31 generates substrate inspection result management control information bbb so as to perform a periodicity estimation process using a result of inspection performed immediately before the periodicity estimation instruction information aaa is input.

  The substrate inspection result management control information bbb is input to the defect cycle estimation unit 32 within the single target. The single target defect period estimation unit 32 receives the substrate inspection result management control information bbb, inputs the integrated inspection information ww generated from one piece of image information from the substrate inspection apparatus 6, and performs defect periodicity by a method described later. (The periodicity of defects repeatedly occurring in the same inspection target) is estimated. The estimation result is output as single-substrate periodicity estimation information ddd. The single target defect cycle estimation unit 32 outputs single substrate inspection information ccc in which information related to periodicity estimation is added to the integrated inspection information ww at the same time.

  The single substrate periodicity estimation information ddd is sent to the manufacturing process abnormality determination unit 35. When the single-substrate periodicity estimation information ddd includes information indicating “periodicity”, the manufacturing process abnormality determination unit 35 generates information indicating that there is an abnormality in the manufacturing process, and the manufacturing process abnormality information hhh The result is output to the board inspection result management control unit 31. This manufacturing process abnormality information hhh is further sent from the substrate inspection result management control unit 31 to the manufacturing process management unit 5 as manufacturing process information jjj. Here, the manufacturing process abnormality information hhh indicates a manufacturing process abnormality that periodically occurs on one substrate. In the present embodiment, for example, the manufacturing process abnormality information hhh indicates that there is an abnormality with respect to a stepper process performed in units of shots. .

  The single substrate inspection information ccc is input to the inspection information storage unit 33. The inspection information storage unit 33 has a configuration in which single substrate inspection information ccc is stored for each inspection substrate unit, and at the same time, rearrangement using each information item as a key is possible. Up to this point, the process is executed for one inspection board.

  When the inspection for one lot is completed, the following processing is performed. When the manufacturing process management unit 5 confirms the completion of the inspection for one lot, the manufacturing process management unit 5 outputs periodicity estimation instruction information aaa indicating an instruction for estimating the periodicity regarding defect information for one lot. The board inspection result management control unit 31 receives the periodicity estimation instruction information aaa related to the periodicity estimation of one lot, and receives the board inspection result management control information bbb indicating an instruction to perform the periodicity estimation process, and the inspection information storage unit 33 and the plurality of pieces. It outputs to the defect period estimation part 34 in object.

  The inspection information storage unit 33 receives the substrate inspection result management control information bbb indicating an instruction for estimating the periodicity of one lot, generates lot substrate inspection information eee that integrates the stored single substrate inspection information ccc, Output. Further, the defect cycle estimation unit 34 within the plurality of objects receives the substrate inspection result management control information bbb, and uses the lot substrate inspection information eee to perform a defect cycle in a lot unit (between a plurality of inspection substrates) by a method described later. Estimate gender. The estimation result is output as a plurality of intra-substrate periodicity estimation information ggg. At the same time, the in-subject defect period estimation unit 34 passes lot periodicity estimation completion information fff indicating completion of the lot periodicity estimation process to the substrate inspection result management control unit 31.

  When the manufacturing process abnormality determination unit 35 receives the periodicity estimation information ggg within a plurality of substrates and the information “periodicity” is included in the periodicity estimation information ggg within the plurality of substrates, as in the case of a single substrate, Information indicating that there is an abnormality in the manufacturing process is generated and sent to the substrate inspection result management control unit 31 as manufacturing process abnormality information hhh. The board inspection result management control unit 31 receives the manufacturing process abnormality information hhh and sends the manufacturing process information jjj to the manufacturing process management unit 5. Here, the manufacturing process abnormality information hhh indicates a manufacturing process that periodically occurs on a plurality of substrates. For example, the manufacturing process abnormality information hhh indicates that there is a resist coating abnormality in the coater process or a development defect abnormality in the developer process.

  Next, the flow of processing performed by the substrate inspection result management unit 7 will be described with reference to FIG. Steps S21 to S23 in FIG. 6A indicate estimation of periodicity for one inspection substrate, and steps S24 to S28 in FIG. 6B indicate periodicity for one lot (a plurality of substrates). It shows an estimate. The estimation of the periodicity for one inspection board is performed as follows. Based on the integrated inspection information ww generated by the substrate inspection apparatus 6, the defect cycle estimation unit 32 within the single target estimates the periodicity of the defect in units of shots, and the single substrate periodicity estimation information ddd is abnormal in the manufacturing process. While outputting to the determination part 35, the single board | substrate test | inspection information ccc is output to the test | inspection information storage part 33 (step S21).

  Receiving the single-substrate periodicity estimation information ddd, the manufacturing process abnormality determining unit 35 checks whether or not the defect periodicity can be seen in shot units for the purpose of checking the periodicity in the wafer (step S22). . If “Yes” in the step S22, the manufacturing process abnormality determining unit 35 gives a determination result “abnormal” in the manufacturing process related to the shot because the periodicity of the defect is seen in the shot unit. Then, the manufacturing process abnormality determination unit 35 notifies the manufacturing process management unit 5 via the substrate inspection result management control unit 31 of the manufacturing process information jjj having the content “the manufacturing process is abnormal” (step S23). If “No” in step S22, and when step S23 is completed, the periodicity estimation process for one inspection substrate ends.

  The estimation of periodicity for one lot (a plurality of substrates) is performed as follows. Upon completion of the inspection of one lot of substrates, the inspection information storage unit 33 outputs the lot substrate inspection information eee to the in-target defect period estimation unit 34 in accordance with an instruction from the substrate inspection result management control unit 31 (step S24). ). Subsequently, based on the input lot board inspection information eee, the in-multiple target defect period estimation unit 34 estimates the periodicity of defects in one lot (between a plurality of inspection boards) and estimates the in-multiple board periodicity. The information ggg is output to the manufacturing process abnormality determination unit 35, and the lot periodicity estimation completion information fff is output to the substrate inspection result management control unit 31 (step S25). Receiving the plurality of in-substrate periodicity estimation information ggg, the manufacturing process abnormality determining unit 35 checks whether or not the defect periodicity is seen in the lot (step S26). If periodicity is seen, control is transferred to step S27 as “Yes”, and control is transferred to step S28 as “No” if periodicity is not found.

  If “Yes” in step S26, the manufacturing process abnormality determining unit 35 gives a determination result “abnormal” in the manufacturing process because the periodicity of the defect is seen in the lot. Then, the manufacturing process abnormality determination unit 35 notifies the manufacturing process management unit 5 via the substrate inspection result management control unit 31 of the manufacturing process information jjj having the content “the manufacturing process is abnormal” (step S27). On the other hand, if “No” in step S 26, the manufacturing process abnormality determination unit 35 determines that no defect periodicity is found in the lot, and the manufacturing process management unit 31 via the substrate inspection result management control unit 31. 5 is notified of the manufacturing process information jjj with the content “No manufacturing process abnormality” (step S28).

  Next, the defect periodicity estimation method according to the present embodiment will be described. FIG. 7 shows a configuration of a substrate (semiconductor wafer) used in the present embodiment. The image information stored in the image storage unit 20 is a wafer substrate image 41 obtained by imaging the wafer substrate 41a. The wafer substrate 41a taken up in the present embodiment is configured by a 3 × 3 shot region, and one shot region (for example, the shot region 42 in the drawing) is configured by a 2 × 2 chip. One chip (for example, chip 43 in the figure) is mainly composed of five pattern areas (for example, pattern areas 43a to 43e in the figure). In the wafer substrate 41a, it is assumed that the patterns at the upper left end, the upper right end, the lower left end, and the lower right end are not transferred because they are separated from the wafer.

  FIG. 8 shows a state in which defects are extracted from an image generated when the wafer substrate of FIG. 7 is inspected. Eight defects are extracted in the inspection wafer substrate 41b. The defect information at that time includes the contents shown in the defect information lists 45a and 45b (shot number, chip number, defect centroid position, area, ferret diameter (X direction, Y direction), peripheral length, true length in relation to the defect number. Circularity is presented). When the defect generated in the central shot area 42 is viewed in detail, the defect is a black defect extending over the pattern areas 43 a, 43 d, and 43 e like the chip 43. What is noticed when looking at the wafer image 41 is that defects of almost the same size are always present at the same position of the shot when viewed in units of shots. Considering this, the periodicity of defects is examined on a single substrate basis for each shot.

As a method for examining periodicity, a statistical hypothesis test method is used in the present embodiment. Specifically, the difference between two pieces of defect information, or the difference between one piece of defect information and the reference information follows a normal distribution N (0,1) with an average of 0 and a standard deviation of 1, and the sum of these is The test is performed based on the hypothesis of following the χ ² distribution. If the data to be tested is rejected by this test, it means that there is a difference between the two defect information, or one defect information has a difference from the standard, and it is estimated that there is no periodicity . If not rejected, there is no difference between the two pieces of defect information, or one piece of defect information has no difference from the reference, and it is estimated that there is periodicity. This is because there is no difference between the two defect information (or there is no difference between one defect information and the reference) = there is some relationship between the two defect information (or between one defect information and the reference) It is based on the content of doing.

As an example of the χ ² distribution, FIG. 9 shows a distribution graph when the degrees of freedom are 1, 5, and 10, and FIG. 10 shows a test model when the degrees of freedom is 10. In each graph, the horizontal axis indicates the value to be evaluated (X value), and the vertical axis indicates the value of the χ ² distribution. The X value represents the “sum of differences in defect information” in the present embodiment. The degree of freedom is determined by the number of defect information used for verification. When the number of defect information used for verification is n, the degree of freedom is (n-1).

  As shown in FIG. 9, as the degree of freedom increases, the position of the “mountain” in the graph regarding the horizontal axis shifts to the right (the X value corresponding to the position of the mountain increases). Further, as shown in FIG. 10, the value of X when the rejection rate is 5% in the one-sided test is about 18.3. Therefore, there is no periodicity between the defect information if the evaluated X value, that is, the sum of the differences in the defect information is larger than the X value of the rejection rate of 5%. The estimation result that there is periodicity will be given.

Hereinafter, a specific χ ² test (chi-square test) method will be described. Here, with respect to the case of FIG. 8, a case will be described in which the periodicity of defects in units of shots, which are inspection sections, is estimated. Regarding the position of the center of gravity of the defect, the position of the center of gravity of the defect when viewed in the shot area is calculated. The reference coordinate value of the shot area containing the nth defect when viewed in the coordinate system of the entire image (the lower left corner of the shot is the reference coordinate origin of the shot area) is (XSn, YSn), and the center of gravity of the nth defect When the position is (XCn, YCn), the center of gravity position (XC-Sn, YC-Sn) of the defect in the coordinate system of the shot area is as follows.
XC-Sn = XCn − XSn
YC-Sn = YCn-YSn (Eq-1)

Here, when considering the difference between the n-th defect and the m-th defect as the difference in defect information, as one of the evaluation values used for verification, the difference in the (relative) defect center of gravity position seen from the shot ( ΔXc (n, m), ΔYc (n, m)) is defined as follows (the difference is expressed as an absolute difference).
△ Xc (n, m) = | XC-Sn-XC-Sm |
△ Yc (n, m) = | YC-Sn−YC-Sm | ・ ・ ・ (Eq-2)

Similarly, from the n-th defect area Sn, ferret diameter (FXn, FYn) and the m-th defect area Sm, ferret diameter (FXm, FYm), the difference between the two defect areas ΔS (n, m), ferret diameter The difference (ΔFX (n, m), ΔFY (n, m)) is defined as
△ S (n, m) = | Sn-Sm | ... (Eq-3)
△ FX (n, m) = ｜ FXn − FXm ｜
△ FY (n, m) = | FYn − FYm | (Eq-4)

An evaluation value ΔDif (n, m) for the test, which is the result of adding the defect information differences obtained so far (formulas (Eq-2) to (Eq-4)), is defined by the following formula.
△ Dif (n, m) = △ Xc (n, m) + △ Yc (n, m) + △ S (n, m) + △ FX (n, m) + △ FY (n, m) ・ ・ ・(Eq-5)

Since the evaluation value is defined as the formula (Eq-5) for the difference between the five pieces of defect information, by applying this to the χ ² test with 5-1 = 4 degrees of freedom, The periodicity of the mth defect is estimated. Whether or not there is periodicity is determined based on whether the evaluation value ΔDif (n, m) is larger or smaller than the X value in the rejection area. In this method, the threshold for determining periodicity (X value in the rejection area) dynamically changes depending on the number of differences in defect information when defining the evaluation value ΔDif (n, m). It is possible to estimate the periodicity adaptive to the number.

In the above example, the method of performing the test only from the difference between the two pieces of defect information is shown, but the test method can be further modified. Actually, other defect information (for example, the perimeter, the degree of conformity accompanying the defect classification result) may be added. Further, the present invention may be applied to a plurality of defect information. For example, in the case of FIG. 8, any two defects are extracted from all the defects, and the difference between the two is calculated by the above method. Since the difference information of 28 combinations is calculated, by defining these as evaluation values, it is possible to perform a test on the χ ² distribution with another degree of freedom.

In this case, the presence or absence of periodicity is estimated for all defects. Further, when the difference in defect information does not follow the normal distribution N (0,1), it can be dealt with by normalizing the defect information so as to follow the normal distribution N (0,1). Furthermore, in the above example, different defect information is defined as one evaluation value. However, an evaluation value is defined for each defect information (an evaluation value is defined for each defect position, area, and ferret diameter). ) may also be, these prioritize, for example, performs a chi ² test defect position as a first candidate, chi defect area if it is rejected the second candidate, the Feret's diameter as the third candidate ² For example, an examination may be performed.

  As a defect extraction method in the case shown in FIG. 8, for example, when a defect having a shot period as shown in FIG. 8 is seen in the reference image, the defect may not be extracted in the actual defect extraction process. is there. On the other hand, in comparison by chip unit (comparison with adjacent areas, or by calculating and comparing the average (average chip) of the chip area from the inspection image information itself), a chip having a defect and a chip having no defect in a shot are compared. Since it is divided, it is possible to extract a defect even if it is a new variety of substrates.

  With reference to FIG. 8, the method for estimating the presence / absence of defect periodicity for one inspection board image has been described, but the same applies to the case of estimating the presence / absence of defect periodicity for one lot (between a plurality of inspection board images). Can take the way. 11 and 12 show an inspection wafer image in the inspection of one lot (25 wafers) and defect information extracted from the wafer image.

  In FIG. 11, black defects 52b, 53a, 55a, and 56b are present in the upper right, and thin defects 52a, 54a, and 56a are present in the lower left. However, depending on the inspection wafer, both exist, either one exists, both It can be seen that both do not exist. At this time, the periodicity cannot be determined by using only the substrate alone, and even if the periodicity is estimated using the defect information of all the lots as they are, the periodicity is not seen. However, in FIG. 11, it is expected that the upper right black defect is seen every other wafer and the lower left thin defect is seen every two wafers. These are due to the fact that the manufacturing apparatus differs between wafers even in the same lot.

Therefore, in this embodiment, the periodicity in the lot is estimated after utilizing the defect information in the defect information list of FIG. Specifically, the defect information is sorted on the basis of a certain key item with respect to the defect information in the format shown in FIG. Then, the sorted defect information is clustered based on the key items (processing to divide into several groups), and the grouped defect information is periodic by the χ ² test described with reference to FIG. Presence or absence of is estimated.

For example, when defect information sorting and clustering are performed using the position of the center of gravity of the defect as a key item in FIG. 12, the defect (defect 52b) in the list 57b and the defect (defect 53a) in the list 57c are combined into one group (black defect group: In the group 1), the defect in the list 57a (defect 52a) and the defect in the list 57d (defect 54a) are divided into different groups (thin defect group: group 2). Then, the presence / absence of periodicity is estimated for each group by the χ ² test (sum of differences in defect information belonging to the group) described with reference to FIG.

Here, it is checked whether or not there is a periodicity related to the substrate number with respect to the group in which the defect is estimated to have a periodicity. As described above, this is performed in order to estimate whether or not a defect occurs in a common manufacturing apparatus because the manufacturing apparatus may differ between wafers. Here, the periodicity is considered as “the order (number of wafers) of the wafer follows an arithmetic sequence”. That is, the periodicity satisfies the following formula. Here, a is an initial term, d is a tolerance, and a (n) is a general term.
a (n) = a + (n-1) * d = d * n + (ad) (Eq-6)

  Considering the cases of FIGS. 11 and 12, since the defect of group 1 occurs every other wafer, such as the first, third, fifth,..., 25th wafer, the equation (Eq− When 6) is applied, the tolerance d = 2, the difference between the first term and the tolerance a−d = −1, and the general term a (n) = 2 × n−1. That is, in group 1, it can be estimated that the periodicity of defects is seen for odd-numbered wafers. In addition, since the defect of group 2 occurs every second wafer, the first wafer, the fourth wafer, ..., the 25th wafer, applying equation (Eq-6), tolerance d = 3, first term And tolerance difference a−d = −2, and general term a (n) = 3 × n−2. Regarding Group 2, it can be estimated that the defect periodicity is seen every three wafers. From this, periodicity can be estimated even for defects that are not necessarily present on all wafers.

11 and 12 do not touch on fluctuations in defects within a lot. However, when the abnormality of the manufacturing apparatus is serious, fluctuations in defects (increases with time, even within the same lot. The number of defects increases, the brightness of the defects changes, etc.). In this case, increase the rejection rate of the χ ² test (so that it is difficult to be rejected) to produce an estimation result that there is periodicity, while examining the change in defect information over time in the group Like that. For example, if the area is monotonically increasing or decreasing monotonically in time series, if there is a monotonic increase or monotonic decrease, the periodicity estimation result is used as it is. Change the estimation result of. Thereby, it is possible to estimate the presence or absence of periodicity corresponding to the change of defect information with time.

  As described above, the defect determination system according to the present embodiment provides defect information (defect features such as defect position and area, and defect classification results) for each defect feature in each of a single inspection target and a plurality of inspection targets. , Degree of fit), image information, and information on the object to be inspected (manufacturing process information and information on sections of the inspection area), and the defect periodicity is estimated based on the estimation result. It is determined, and if a problem has occurred, the fact can be notified. As a result, an abnormality in the manufacturing process can be found at an early stage of production, and the yield of the manufacturing process can be improved by minimizing a decrease in the production amount.

  In particular, even when only one defect is found on the inspection target and the defect is a fatal defect that occurs in a plurality of inspection targets, the defect determination system according to the present embodiment has the defect. It is possible to detect defects in the manufacturing apparatus that is the basis of the above. In addition, by providing an inspection section such as a shot on a single object to be inspected and using information on the inspection area for estimating periodicity, it is possible to determine whether there is an abnormality with high accuracy regarding the single object to be inspected. Can do.

  The defect determination system according to the present embodiment may include a defect classification unit, and the defect classification result information output from the defect classification unit may be included in the defect information to determine periodicity. As a method of using the information on the defect classification result, for example, it is determined whether or not the defect is fatal based on the defect classification result, and if the defect is fatal, the periodicity is determined. Good. In the case of this example, by estimating the periodicity of fatal defects that affect the yield of the manufacturing process, it is possible to estimate the periodicity and determine whether there is an abnormality in the manufacturing process efficiently and with high accuracy. Can do. Further, by determining the presence / absence of an abnormality in the manufacturing process using information on the defect classification result, it is possible to more clearly determine an abnormality in the manufacturing process, for example, in what number manufacturing process is abnormal.

  In addition, by estimating the presence or absence of periodicity using a statistical method (testing) for defect information, it is possible to appropriately determine the presence or absence of an abnormality in the manufacturing process according to the number and content of defect information. . In particular, the defect information relating to quality is information that makes it easy to specify the cause of the defect (for example, if there is a single-sided defect in all chips, the defect can be determined to be a defect caused by the exposure machine, etc.). So, when estimating the periodicity, the defect information on the quality such as defect position, area, ferret diameter, defect classification result, etc. is used in combination to improve the judgment accuracy of manufacturing process abnormality, and the contents of abnormality Can be shown more clearly.

  In addition, the defect determination system according to the present embodiment performs pass / fail determination of whether the inspection target is OK (normal) or NG (abnormal) in units of sections (shots, etc.) of the inspection area. As a result, the accuracy of determining whether there is an abnormality in the manufacturing process can be improved, and the content of the abnormality can be made clearer. Furthermore, when there is a periodicity, by outputting a determination result indicating that there is an abnormality, it is possible to notify the occurrence of an abnormality to the system or operator performing production management at an early stage of production.

  Next, a second embodiment of the present invention will be described. In the present embodiment, only portions different from the first embodiment will be described. FIG. 13 shows the overall configuration of the defect determination system and the manufacturing apparatus according to the present embodiment. In this embodiment, a plurality of coater devices 102, stepper devices 103, and developer devices 104 are provided. In addition, sorting units 108 </ b> A to 108 </ b> C that sort the substrates according to instructions from the manufacturing process management unit 105 are provided. The manufacturing process management unit 105 holds ID information unique to a manufacturing apparatus in order to distinguish a plurality of manufacturing apparatuses.

  The defect determination system 101 includes a substrate inspection apparatus 106 with a single substrate determination function that performs the process from acquisition of image information of an inspection substrate to estimation of the periodicity of defects on one substrate, and the periodicity of defects within one lot (between multiple substrates) It consists of a multiple substrate inspection result management / determination unit 107 that performs estimation. With this configuration, it is possible to independently process defect periodicity determination of a single substrate and defect periodicity determination of a plurality of substrates. For example, the multiple substrate inspection result management / determination unit 107 is configured to include a plurality of substrate inspection devices 106. It is possible to make a configuration such as linking.

  Further, by having a plurality of manufacturing apparatuses, for example, when the manufacturing process management unit 105 recognizes that one coater apparatus 102 has failed, the distribution unit 108A of the coater apparatus 102 is controlled, and the broken coater apparatus is detected. It is possible not to turn the substrate. Thereby, it becomes possible to cope with a failure without stopping a series of manufacturing processes. As a result, it is possible to detect the abnormality of the manufacturing process at an early stage without reducing the production efficiency.

  FIG. 14 shows the configuration of the substrate inspection apparatus 106. The difference from the first embodiment is that a single target defect period estimation unit 111 and a single target manufacturing process abnormality determination unit 112 are provided. In this embodiment, since ID information unique to the manufacturing apparatus is used, the inspection object information bb having manufacturing process and product type information holds the ID information of the manufacturing apparatus, and which inspection apparatus is the target inspection board. It can be seen whether it was manufactured in. The ID information of the manufacturing apparatus is also included in the inspection manufacturing process / product information mm and the inspection image information pp.

  The integrated inspection information ww output from the inspection information integration unit 25 is input to the single target defect cycle estimation unit 111, where the same processing as the single target defect cycle estimation unit 32 in the first embodiment is performed. Is called. When the processing of the single object defect cycle estimation unit 111 is completed and it is estimated that there is a defect periodicity, single substrate periodicity estimation information ddd is output as an estimation result. The single-substrate periodicity estimation information ddd includes ID information of the manufacturing apparatus. Regardless of the defect periodicity, the single-object defect period estimation unit 111 outputs single substrate inspection information ccc in which information related to the periodicity estimation is added to the integrated inspection information ww.

  The single target manufacturing process abnormality determination unit 112 receives the estimation result that there is a defect periodicity by the single substrate periodicity estimation information ddd, generates information indicating that the manufacturing process is abnormal, and manufactures The process abnormality / inspection completion information kkk is transmitted to the manufacturing process management unit 105. At this time, since the manufacturing apparatus ID information included in the single-substrate periodicity estimation information ddd indicates which manufacturing apparatus has caused an abnormality, the manufacturing process abnormality / inspection completion information kkk has an abnormality. The ID information of the manufacturing equipment that seems to be present is added. Thereby, it becomes possible to discover abnormality of a manufacturing apparatus at an early stage.

  Next, the flow of processing performed by the substrate inspection apparatus 106 will be described with reference to FIG. In addition, since the process of step S31-S37 is equivalent to the process of step S11-S17 of FIG. 4, description is abbreviate | omitted. The processing after step S37 is performed as follows. The integrated inspection information ww integrated in step S37 is transmitted to the single target defect period estimation unit 111 (step S38).

  Subsequently, the single-in-object defect cycle estimation unit 111 estimates the defect periodicity for each shot, similarly to the first embodiment, based on the integrated inspection information ww of one inspection wafer (step S39). . Receiving the single-substrate periodicity estimation information ddd from the single-object defect period estimation unit 111, the single-object manufacturing process abnormality determination unit 112 determines the periodicity of defects in shot units as the periodicity within the wafer. Whether or not it can be seen is checked (step S40). If periodicity is seen, control is transferred to step S41 as "Yes", and if no periodicity is found, control is passed to step S42.

  If “Yes” in step S40, since the defect periodicity is seen in units of shots, the in-single-object manufacturing process abnormality determining unit 112 gives a determination result “abnormal” in the manufacturing process related to the shot. put out. Then, the in-subject manufacturing process abnormality determination unit 112 notifies the manufacturing process management unit 105 of the manufacturing process abnormality / inspection completion information kkk having the content “the manufacturing process is abnormal” (step S41).

  If “No” in step S40 and when step S41 is completed, the in-subject manufacturing process abnormality determination unit 112 manufactures the inspection completion for one inspection board as the manufacturing process abnormality / inspection completion information kkk. It transmits to the process management part 105 (step S42). When the process of step S41 is performed, the manufacturing process abnormality / inspection completion information kkk includes the ID information of the manufacturing apparatus that is considered to be abnormal.

  Next, the configuration of the multiple substrate inspection result management / determination unit 107 will be described with reference to FIG. The configuration other than the point that single substrate inspection information ccc is output from the substrate inspection apparatus 106 and input to the inspection information storage unit 33 is the same as the configuration of the substrate inspection result management unit 7 according to the first embodiment (FIG. 5). It is. Regarding the inside, the lot board inspection information eee output from the inspection information storage unit 33 includes the ID information of the manufacturing apparatus. Further, when it is estimated that the defect periodicity in the plurality of objects is estimated to have a periodicity of defects, the output is a plurality of in-substrate periodicity estimation information ggg (defect periodicity estimation result) and a manufacturing process abnormality determining unit. The manufacturing process abnormality information hhh output from 35 includes the ID information of the manufacturing apparatus that seems to have caused an abnormality.

  FIG. 17 shows the flow of processing by the multiple substrate inspection result management / determination unit 107. The processing in steps S51 to S55 is equivalent to the processing in steps S24 to S28 in FIG.

  Next, a method for estimating the periodicity of defects using ID information of the manufacturing apparatus will be described. By associating the ID information of the manufacturing apparatus with the defect information, it is possible to accurately determine whether there is an abnormality related to each manufacturing apparatus as follows. FIG. 18 shows the format of the lot board inspection information eee in the present embodiment. The lot substrate inspection information eee is arranged using the ID information of the manufacturing apparatus as a key. For example, when examining the manufacturing apparatus ID “DEV_ABC01” attached to the developer apparatus, the inspection information of every other board ID “AAABBB01”, “AAABBB03”, “AAABBB05” has similar defect positions, defect areas, defect ferret diameters, It turns out that it has classification information (classification contents and fitness).

  From this, it can be seen that the manufacturing apparatus ID “DEV_ABC01” is processing the odd-numbered substrates in the lot ID “AAABBB”, and at the same time, the “defocus” defect found in each substrate is manufactured. It can be estimated that the device ID is “DEV_ABC01”. In addition, for the manufacturing equipment ID “COA_ABC01” attached to the coater, every third substrate is processed in the lot ID “AAABBB”, and the “unevenness” defect is caused by the manufacturing equipment ID “COA_ABC01”. It can be estimated that there is.

  By doing in this way, it becomes easy to recognize that defect information and classification information are similar in the same manufacturing apparatus. In addition, it becomes possible to estimate defect periodicity using defect information and classification information for each ID information of the manufacturing equipment, and the estimation result immediately leads to the presence or absence of abnormality of the manufacturing equipment, thereby shortening the estimation processing time. be able to.

  Further, the periodicity of defects may be estimated as follows using ID information of the manufacturing apparatus. The in-subject defect cycle estimation unit 34 counts the number of occurrences of ID information of the manufacturing apparatus associated with the defect information of an arbitrary substrate included in the lot substrate inspection information eee for each manufacturing apparatus, and the number of the periodicity is estimated. Use for estimation. For example, defect information is extracted using ID information of manufacturing apparatuses associated with more substrate defect information as a key, and the defect periodicity is estimated using the defect information preferentially. Since it is highly possible that a manufacturing apparatus having ID information associated with more defect information on a substrate has an abnormality, it is possible to easily determine whether there is an abnormality in such a manufacturing apparatus by the above method. it can.

  As described above, in this embodiment, a plurality of manufacturing apparatuses are provided, the defect determination system is divided into a processing unit related to one wafer and a processing unit related to one lot (a plurality of wafers), and the periodicity of defects. The difference from the first embodiment is that ID information of the manufacturing apparatus is used for estimation. For this reason, the structure of a defect determination system can be easily changed according to the improvement of production capacity. In addition, when the periodicity of defects is observed, it is possible to easily estimate which manufacturing apparatus has an abnormality based on the ID information of the manufacturing apparatus. Furthermore, even if the manufacturing apparatus causing the abnormality is stopped, the manufacturing can be continued with another manufacturing apparatus. From these points, it is possible to improve production efficiency and yield.

  Next, a third embodiment of the present invention will be described. In the present embodiment, only portions different from the first and second embodiments will be described. FIG. 19 shows the overall configuration of the defect determination system and the manufacturing apparatus according to the present embodiment. In contrast to the second embodiment, a plurality of defect determination systems 201A are provided in a manufacturing process (under the control of one manufacturing process management unit 105). The defect determination system 201A includes a substrate inspection image acquisition device 206A that acquires a substrate image for inspection, and a substrate inspection processing unit 207A that performs a series of image processing from defect extraction, classification, and determination to estimation of periodicity for the substrate image. It consists of and. The substrate inspection processing unit 207A specializes in the image processing function, so that, for example, a plurality of substrate inspection processing units 207A can be provided for one substrate inspection image acquisition device 206A.

  FIG. 20 shows the configuration of the board inspection image acquisition apparatus 206A. Unlike the second embodiment, processing units (defect extraction unit, defect classification unit, chip / wafer unit defect determination unit) related to the image processing function are excluded. Upon receiving “image information acquisition completion” as the image storage control information nn from the image storage unit 20, the apparatus control unit 211 produces substrate inspection completion information uu indicating that acquisition of one piece of inspection image information has been completed. The data is sent to the management unit 105.

  FIG. 21 shows the configuration of the substrate inspection processing unit 207A. When the periodicity estimation instruction information aaa output from the manufacturing process management unit 105 is input to the substrate inspection result management control unit 231, the substrate inspection result management control unit 231 sends the substrate inspection result management control information bbb to the defect extraction unit 221. . The defect extraction unit 221 recognizes the board inspection result management control information bbb as “inspection (image processing) start”, receives the input of the inspection image information pp, and performs the same processing as in the first and second embodiments. . Further, the single target defect cycle estimation unit 232 receives the integrated inspection information ww output from the inspection information integration unit 25, and performs the same processing as in the first and second embodiments (substrate inspection result management control). Information bbb input is not involved).

  In the present embodiment, by having a plurality of defect determination systems, more efficient production (manufacturing / inspection) is possible, and as a result, it is possible to detect the occurrence of defects in the manufacturing process at an early stage. In addition, by separately configuring the substrate image acquisition unit and the image processing unit for inspection, even during inspection when the image size is large (pixel resolution is high), the image processing unit is performing defect extraction. In addition, since the next substrate image can be acquired, it is possible to detect the occurrence of defects in the manufacturing process at an early stage while minimizing the deterioration of the tact time due to the size of the image.

  Next, a fourth embodiment of the present invention will be described. FIG. 22 shows a configuration of a semiconductor manufacturing apparatus (photolithographic manufacturing apparatus 302; substrate processing system) arranged during the photolithography process. The photolithographic manufacturing apparatus 302 according to the present embodiment includes a coater / developer 303 and an exposure machine 304.

  Load ports 305 to 307 are provided at the inlet of the coater / developer 303. The load ports 305 to 307 can be set with cassettes 317 to 319. The cassettes 317 to 319 store a plurality of wafers 301 before the photolithography process and also have a role of storing the wafers 301 that have been subjected to the photolithography process. In the coater / developer 303, coater units 308 and 309, developer units 312 and 313, and inspection units 314 and 315 are provided. Exposure units 310 and 311 are provided in the exposure machine 304.

  A transfer robot 316 is provided in the coater / developer 303. The transfer robot 316 removes the unprocessed wafer 301 from the cassette in accordance with a previously reserved sequence, and sequentially transports the processed wafer 301 to the coater unit, exposure unit, development unit, and inspection unit, and then stores the processed wafer 301 in the cassette. To do. Thus, when the processing of all the wafers stored in the cassette is completed, the cassette is transported to a manufacturing apparatus in another process by a cassette transfer device (not shown), and the cassette containing the next unprocessed wafer is loaded. Installed in the port. During this time, the transfer robot 316 can process the wafers continuously by transferring and processing the wafers 301 in a cassette installed in another load port.

  An exposure control unit 322 that controls exposure processing in the exposure units 310 and 311 is provided in the exposure device 304. The exposure control unit 322 manages the sequence of exposure processing, and usually sets the photomask type, exposure amount, exposure position, etc. in the exposure units 310 and 311 in accordance with a recipe in which inspection conditions are set in advance. The wafers placed in are sequentially processed. However, the sequence can be changed by a notification from the inspection control unit 320.

  The coater / developer 303 is provided with a coater / developer control section 321 for applying and developing a photoresist, and includes coater units 308 and 309, developer units 312 and 313, load ports 305 to 307, In addition, the transport robot 316 is controlled. The coater / developer control unit 321 manages the sequence of the coater / developer / conveyance process, and normally performs control according to a recipe in which inspection conditions are set in advance. However, the sequence can be changed by a notification from the inspection control unit 320. The inspection units 314 and 315 installed in the coater / developer 303 are controlled by the inspection control unit 320, and automatically determine the presence / absence of a defect on the entire processed wafer, and whether or not an abnormality has occurred in the wafer. Inspect. The communication unit 323 is a unit for performing communication between the photolithographic manufacturing apparatus 302 and the factory process management server.

  Next, details of the inspection unit 314 and the inspection control unit 320 will be described with reference to FIG. In FIG. 23, a subject 400 to be inspected is placed on an inspection stage 406 that can move in a one-dimensional direction. The inspection stage 406 is driven by the apparatus driving unit 408. An illumination light source and an optical system are connected to the illumination unit 401. A lamp house having a halogen lamp, a heat ray absorption filter, and a condenser lens is used as the illumination light source, and a light collecting lens and a fiber for converging the luminous flux from the lamp house are used in the illumination optical system. A bundle is used. The illumination unit 401 illuminates the subject 400 with respect to the subject 400 at an incident angle θo (variable), and in the subsequent stage, a cylindrical lens 402 for converging the light beam, and a slit for cutting an unnecessary light beam. 403 are arranged.

  A line sensor camera 405 as an imaging unit and a filter 404 are arranged at a position facing the illumination unit 401, and a linear region in the illuminated subject 400 can be imaged. An image captured by the line sensor camera 405 in synchronization with the movement of the subject 400 by the inspection stage 406 is converted into a two-dimensional image by the imaging control unit 409 and stored in the image storage unit 410. Further, the illumination unit 401 is integrated with the cylindrical lens 402 and the slit 403 and has a structure capable of changing the angle with respect to the surface of the subject 400, and can illuminate the subject 400 with different incident angles. These series of operations are performed by the device driving unit 408 based on an instruction from the device control unit 407.

  In addition, the defect extraction unit 411 that operates in accordance with an instruction from the apparatus control unit 407 reads a subject image captured in synchronization with the movement of the subject 400 from the image storage unit 410, and obtains a difference from the non-defective part. Defects such as coating unevenness, exposure failure, development abnormality, and dust are extracted, and information such as shape, coordinates, and size is measured. Moreover, it has the function which collates those results with the acceptance criteria contained in the inspection conditions, and judges the quality of the to-be-inspected object 400.

  Similarly, the defect classification unit 412 that operates according to an instruction from the apparatus control unit 407 specifies and classifies the types of extracted defects based on the information generated by the defect extraction unit 411. Similarly, the correlation detection unit 413 that operates according to an instruction from the apparatus control unit 407 acquires information on the unit that has performed processing from the coater / developer control unit 321 and the exposure control unit 322 via the communication control unit 414 and the apparatus control unit 407. It has a function to evaluate the relationship between defect occurrence and processing unit. Thereby, it is possible to know whether or not a defect has been continuously generated even in a wafer processed by a unit that has processed a wafer in which a defect has occurred.

Similar to the embodiment described above, the chi-square test using a statistical method is used for the evaluation of the relevance. As described above, the chi-square test is a statistical method for evaluating the relevance of a plurality of groups. In this embodiment, the significance level of each group is evaluated from the chi-square distribution using the difference from the expected value. As shown in FIG. 24, it is assumed that there is a table in which the category of the scale of A is in the row, the category of the scale of B is in the column, and the corresponding result F is filled. In this table, assuming that the B category occurs in the same distribution as the A category, it is possible to obtain the expected value as the value of each cell from the sum of each row and each column. The expectation Gij corresponding to each cell (i, j) in this table is expressed by the following equation.
Gij = (Sai · Sbj) / S ... (Eq-7)

  The chi-square value at this time is expressed by the following equation.

This chi-square statistic approximately follows a chi-square distribution with the following degree of freedom ν. The distribution table of chi-square values and degrees of freedom is as shown in FIG.
ν = (r−1) (s−1) (Eq-9)
In this table, it is determined that there is an association between the scales A and B when the chi-square value that gives an appearance probability of 0.05 or 0.01 or less is taken. However, the criterion for determining the relevance to the appearance rate can be arbitrarily set. The correlation detection unit 413 determines whether there is a defect occurrence relationship between the processing units using the above-described method, and outputs the result to the device control unit 407 and the communication control unit 414. Have the ability to

  The communication control unit 414 controls communication performed between the coater / developer control unit 321, the exposure control unit 322, and the factory process management server. The display unit 415 displays various information based on instructions from the device control unit 407. The operation unit 416 is used by the device manager to input an instruction to the device.

  Next, the operation of the photolithography manufacturing apparatus 302 according to the present embodiment will be described. First, a cassette is carried from a manufacturing apparatus in another process by a cassette conveying apparatus in a factory (not shown), and is installed as a cassette 317 in the load port 305. The situation is notified to the communication unit 323 of the photolithographic manufacturing apparatus 302 using a communication function in the factory. The notified information is sent to the inspection control unit 320, the coater / developer control unit 321 and the exposure control unit 322 in the photolithography manufacturing apparatus 302. This information includes information such as the name of the wafer to be processed, the process name, and the wafer ID. Based on this information, each control unit reads a recipe in which processing conditions are set in advance, and executes a sequence. Control.

  Similarly, in the factory, the cassette 318 and the cassette 319 are sequentially installed in the load ports 306 and 307, respectively. The coater / developer control unit 321 operates the load port 305 in which the cassette is installed to open the cassette so that the wafer 301 accommodated therein can be taken out. Subsequently, the wafer 301 to be processed first is taken out from the cassette 317 by the transfer robot 316 and transferred to the coater unit 308.

  Subsequently, the coater / developer control unit 321 sets the type, coating amount, rotation speed, rotation time, temperature, rinse amount, and the like of the coating solution in the coater unit 308 based on a preset recipe, and the wafer 301 A resist solution is uniformly applied to the substrate. During this time, the wafer to be processed next is taken out from the cassette 317 by the transfer robot 316 and transferred to the coater unit 309. The coater unit 309 also performs processing in parallel.

  When the application of the resist solution is completed, the transfer robot 316 takes out the wafer 301 from the coater unit 308 and transfers the wafer 301 to the exposure unit 311. Further, the coater / developer control section 321 notifies the exposure control section 322 of information indicating that a wafer is mounted on the exposure unit 311. Thereafter, the wafer to be processed next is taken out from the cassette 318 by the transfer robot 316 and transferred to the coater unit 308.

  When the exposure control unit 322 receives information indicating that the wafer 301 is mounted from the coater / developer control unit 321, based on a preset recipe, the type of photomask to be projected, the exposure amount, the focus amount, An exposure range, an exposure time, etc. are set in the exposure unit 311, and a photomask image is projected onto the wafer 301. When the exposure of the entire designated area of the wafer 301 is completed, the exposure control unit 322 sends an exposure completion notification to the coater / developer control unit 321.

  When the coater / developer controller 321 receives an exposure end notification from the exposure controller 322, the transfer robot 316 takes out the wafer 301 from the exposure unit 311 and transfers it to the developer unit 313. Subsequently, the coater / developer control unit 321 sets the baking temperature, the baking time, the type and application amount of the developing solution, the developing time, and the like in the developer unit 313 based on a preset recipe, and the resist on the wafer 301 is registered. Develop and remove.

  When the development is completed, the transfer robot 316 takes out the wafer 301 from the developer unit 313 and transfers it to the inspection unit 314. Also, the coater / developer control unit 321 notifies the inspection control unit 320 of information indicating that a wafer is mounted on the inspection unit 314. The inspection control unit 320 sets the inspection optical system type, light amount value, inspection region, determination reference value, and the like in the inspection unit 314 based on a preset recipe, and inspects the wafer 301.

  When the designated inspection of the wafer 301 is completed, the inspection control unit 320 notifies the coater / developer control unit 321 of the completion of the inspection. When the coater / developer control unit 321 receives an inspection end notification from the inspection control unit 320, the transfer robot 316 takes out the wafer 301 from the inspection unit 314, transfers it to the cassette 317, and stores the wafer 301 at a designated position.

  When processing / inspection is completed for all the wafers in the cassette 317 as described above, the photolithography manufacturing apparatus 302 transmits the ID of the cassette for which processing has been completed, the processing conditions, and the determination result of the stored wafer based on the inspection result to the communication unit. The process management server in the factory is notified via H.323. As a result, the cassette 317 is carried to another process by the cassette carrying device in the factory, and the cassette to be processed next is installed in the load port 305. At this time, depending on the state of the inspection result notified by the photolithographic manufacturing apparatus 302, the resist applied by the photolithographic manufacturing apparatus 302 may be peeled off and performed again without performing the process of the next step.

  Next, an operation when an abnormality occurs in the apparatus will be described. When the communication control unit 414 in FIG. 23 receives information indicating that a wafer is mounted on the inspection unit 314 from the coater / developer control unit 321, the apparatus control unit 407 uses the information stored therein to store the recipe stored therein. A corresponding recipe is selected from the list, and the apparatus driving unit 408 and the imaging control unit 409 are driven according to the contents of the recipe. The device drive unit 408 sets the amount of light of the illumination unit 401 and sets the incident angle thereof. Further, the filter 404 is driven, and the inspection stage 406 is moved by putting the filter to be set in the optical path. At the same time, the imaging control unit 409 captures an image of the wafer generated by the line sensor camera 405 and stores the image in the image storage unit 410.

  Subsequently, in accordance with an instruction from the apparatus control unit 407, the defect extraction unit 411 extracts a defect part from the image stored in the image storage unit 410, along with the defect image, the defect coordinates, size, shape, luminance change amount, and the like. The data is output to the defect classification unit 412. The defect classification unit 412 identifies the type of defect that has occurred based on the output result of the defect extraction unit. Each processing apparatus generates a specific defect shape, and the defect classification unit 412 estimates what kind of defect is generated from the relationship between the position and shape of the defect and the exposure range. Subsequently, the correlation detection unit 413 detects the correlation between the processing unit and the generated defect from the information of the plurality of wafers where the defect has occurred.

  As shown in FIG. 26, consider a case in which each processing unit A or B processes a wafer taken out from a cassette. Assume that the determination result of each wafer by the inspection unit is as shown in FIG. 27 when this sequence is performed. FIG. 28 shows the number of wafers processed by each processing unit for each determination result at the time 701 when the determination result of SLOT05 is “Fail”.

  When the chi-square value is obtained by applying the formula (Eq-7) and the formula (Eq-8) to FIG. 28, the chi-square value for all the processing units excluding the inspection unit is as follows. Although not so large, the value for the exposure unit clearly shows a large value, and it can be seen that there is a relationship between the occurrence of a defect and the exposure unit. The chi-square value of each unit can be obtained in the same manner as in FIG. 28 by using a 2 × 2 table when Pass and Fail are combined for each unit A and B.

  Since there is a relationship between the occurrence of a defect and the exposure unit, the occurrence of a defect can be prevented by processing only with a normal exposure unit. Therefore, the exposure unit A (for example, the exposure unit 310), which is the exposure unit with the highest defect occurrence rate in FIG. 28, is stopped, and the exposure unit B (for example, the exposure unit 311) is started from SLOT08 as indicated by the frame 702 in FIG. ), The wafer determination result can be all set to Pass.

  Next, the above-described processing flow will be described with reference to FIG. First, the coater unit, the exposure unit, and the developer unit sequentially process the wafer (step S61). Subsequently, the inspection unit performs an inspection. The inspection result is notified to the inspection control unit 320, and the defect extraction unit 411 extracts defects in the inspection control unit 320 (step S62). The apparatus control unit 407 receives the result of defect extraction from the defect extraction unit 411, and determines whether or not there is a defect on the wafer (step S63).

  If there is no defect in the wafer, the process proceeds to step S70. When a defect occurs, the defect classification unit 412 identifies the type of defect (step S64). Subsequently, the correlation detection unit 413 performs correlation detection processing (step S65), determines whether or not there is a correlation between the defect occurrence and the processing unit, and notifies the apparatus control unit 407 of the determination result. (Step S66). If there is no correlation, the process proceeds to step S69. When there is a correlation, as described above, the correlation detection unit 413 identifies a unit having a correlation with the occurrence of a defect and notifies the apparatus control unit 407 of the information. The apparatus control unit 407 notifies the coater / developer control unit 321 and the exposure control unit 322 of a request to stop the processing unit, and changes to a sequence in which the subsequent wafers are processed by another unit (step S67).

  In this case, the stopped unit and the defect classification result are notified to the apparatus administrator via the display unit 415 (step S68). Thereby, the apparatus administrator can estimate the cause of the apparatus abnormality from the information of the defect classification result, and can perform repair smoothly. Further, it is notified via the display unit 415 that a defect has occurred in the wafer (step S69). This provides the equipment administrator with the information necessary to determine which part of the wafer has a defect and whether to reprocess the wafer or flow it to the next process according to the size of the generated defect. The Finally, the apparatus control unit 407 determines whether or not processing has been performed for all wafers (step S70), and if unprocessed wafers remain, control is passed to step S61. These processes are repeated until all the wafers have been processed.

  In this way, when all the wafers are processed in the sequence shown in FIG. 26, 13 defective wafers are finally manufactured. However, the exposure unit is stopped and processed by a normal unit. As a result, it is possible to process all wafers while limiting the number of defective wafers to three.

  As described above, the substrate processing system according to the present embodiment specifies a unit having a correlation with the occurrence of a defect, stops the operation of only that unit, and performs processing for removing it from the sequence. As a result, the occurrence of defects can be minimized, and at the same time, the remaining wafers can be processed normally. In addition, the same processing is performed for wafers to be processed thereafter, and by repairing the unit having a correlation with the defect in the meantime, it becomes possible to repair the abnormal unit without stopping the system, thereby reducing productivity. Maintenance can be performed without Further, by continuing the manufacturing process by controlling the flow of the substrate between the units, it is possible to minimize a decrease in the production amount of the factory due to defects, and stable substrate manufacturing can be performed.

  In this embodiment, the chi-square test is used for correlation evaluation, but a determination method equivalent to this may be used. For example, when the number of samples is small, it is possible to simplify the calculation and increase the processing speed by making a judgment based on the difference from the expected value. Also, instead of evaluating one cassette, it is possible to increase the number of samples by performing evaluation on all wafers that are continuously processed, making it possible to make more reliable judgments. Become.

  The inspection unit is not limited to a single type of inspection unit, and the correlation evaluation accuracy may be improved by using a plurality of different inspection methods and inspection units. Furthermore, although the case where each manufacturing apparatus includes two processing units has been described, the effect is the same even if the manufacturing apparatus is configured with more units.

  Next, a modification of this embodiment will be described. In this modification, as correlation evaluation, not only the correlation between the processing unit and the defect, but also the correlation with the defect is evaluated for components used in the processing unit. In addition, each processing unit is equipped with a plurality of parts where there is a possibility of occurrence of defects, and each part can be automatically replaced by each control unit. The part where the defect may occur is, for example, a photomask used in the exposure unit, a liquid injection nozzle used in the coater unit and the developer unit, a recipe, or the like.

  That is, the exposure control unit 322 provides the inspection control unit 320 with information such as the type of photomask, the type of recipe, the exposure amount, the focus amount, the exposure range, and the exposure wavelength in addition to the ID information of the processed exposure unit. To do. The coater / developer control unit 321 includes a load port type, a slot number, a transfer sequence, a recipe type, a resist solution type, a nozzle used, a coater rotation time, a coater in addition to the ID information of the coater unit and the developer unit. Information such as rotation speed, coater temperature, resist coating amount, developing solution type, developing solution amount, developing time, and developing temperature is provided to the inspection control unit 320. The correlation detection unit 413 of the inspection control unit 320 obtains the correlation with the defective wafer from these pieces of information, and specifies the part causing the defect.

  Hereinafter, with reference to FIG. 30, the flow of processing by the photolithographic manufacturing apparatus 302 in this modification will be described. First, the coater unit, the exposure unit, and the developer unit sequentially process the wafer (step S81). Subsequently, the inspection unit performs an inspection. The inspection result is notified to the inspection control unit 320, and the defect extraction unit 411 extracts the defect in the inspection control unit 320 (step S82). The apparatus control unit 407 receives the result of defect extraction from the defect extraction unit 411, and determines whether or not there is a defect on the wafer (step S83).

  If there is no defect in the wafer, the process proceeds to step S100. If a defect occurs, the defect classification unit 412 identifies the type of defect (step S84). Subsequently, the correlation detection unit 413 performs processing for detecting the correlation between the processing sequence, the processing unit, the photomask, the nozzle, the recipe, the slot, and the occurrence of a defect (step S85). The correlation detection unit 413 determines whether or not there is a correlation between the defect occurrence and the processing sequence, and notifies the device control unit 407 of the determination result (step S86).

  If there is a correlation, the correlation detection unit 413 identifies a processing sequence that correlates with the occurrence of a defect, and notifies the apparatus control unit 407 of the information. The device control unit 407 prohibits use of the processing sequence and changes the sequence to a sequence that passes through another route (step S87).

  When it is determined in step S86 that there is no correlation, the correlation detection unit 413 determines whether there is a correlation between the defect occurrence and the processing unit, and notifies the apparatus control unit 407 of the determination result (step). S88). When there is a correlation, the correlation detection unit 413 identifies a unit having a correlation with the occurrence of a defect, and notifies the device control unit 407 of the information. The apparatus control unit 407 performs control to stop the processing unit and prohibit its use, and changes the sequence so that the subsequent wafers are processed by another unit (step S89).

  If it is determined in step S88 that there is no correlation, the correlation detection unit 413 determines whether there is a correlation between the defect occurrence and the photomask (reticle), and notifies the apparatus control unit 407 of the determination result. (Step S90). When there is a correlation, the correlation detection unit 413 identifies a photomask having a correlation with the occurrence of a defect, and notifies the apparatus control unit 407 of the information. The apparatus control unit 407 prohibits the use of the photomask and notifies the exposure control unit 322 to replace the photomask with another photomask. Upon receiving the notification, the exposure control unit 322 causes the exposure unit using the corresponding photomask to replace the photomask (step S91).

  When it is determined in step S90 that there is no correlation, the correlation detection unit 413 determines whether there is a correlation between the defect occurrence and the nozzle for injecting the processing liquid, and the determination result is sent to the apparatus control unit 407. Notification is made (step S92). When there is a correlation, the correlation detection unit 413 identifies a nozzle that has a correlation with the occurrence of a defect, and notifies the apparatus control unit 407 of the information. The apparatus control unit 407 prohibits the use of the nozzle and notifies the coater / developer control unit 321 to replace the nozzle with another nozzle. Upon receiving the notification, the coater / developer control unit 321 causes the coater unit or developer unit using the corresponding nozzle to replace the nozzle (step S93).

  If it is determined in step S92 that there is no correlation, the correlation detection unit 413 determines whether there is a correlation between the defect occurrence and the recipe used by the coater / developer control unit 321 and the exposure control unit 322. And the determination result is notified to the device control unit 407 (step S94). When there is a correlation, the correlation detection unit 413 identifies a recipe that has a correlation with the occurrence of a defect, and notifies the apparatus control unit 407 of the information. The apparatus control unit 407 prohibits the use of the recipe, and notifies the coater / developer control unit 321 and the exposure control unit 322 to change the recipe to another recipe capable of equivalent production. Upon receiving the notification, the coater / developer control unit 321 and the exposure control unit 322 change the recipe (step S95).

  If it is determined in step S94 that there is no correlation, the correlation detection unit 413 determines whether there is a correlation between the defect occurrence and the slot in the cassette in which the wafer is stored, and the determination result is displayed in the apparatus. The control unit 407 is notified (step S96). If there is a correlation, the correlation detection unit 413 identifies a slot having a correlation with the occurrence of a defect, and notifies the apparatus control unit 407 of the information. Thereafter, the apparatus control unit 407 performs control to remove the wafer in the corresponding slot from the inspection target and execute the inspection. Further, the apparatus control unit 407 sends a request for prohibiting the mounting of the wafer to the slot to the system in the factory by communication, and has the other apparatus or the like perform the wafer replacement (step S97).

  When it is determined that there is some correlation, and any one of steps S87, S89, S91, S93, S95, and S97 is executed, the display unit 415 notifies the device administrator of the device according to the control of the device control unit 407. And a display for notifying the defect status of the wafer (steps S98 and S99). If it is determined that there is no correlation, the display unit 415 performs only display for notifying the defect status of the wafer (step S99).

  Finally, the apparatus control unit 407 determines whether or not processing has been performed for all wafers (step S100), and if unprocessed wafers remain, control is transferred to step S81. These processes are repeated until all the wafers have been processed. When the processing is completed, the apparatus control unit 407 notifies the factory process management server of the determination result of the stored wafer based on the ID, processing conditions, and inspection result of the cassette that has been processed. As a result, the cassette 317 is carried to another process by the cassette carrying device in the factory, and the cassette to be processed next is installed in the load port 305. At this time, depending on the state of the inspection result notified by the photolithographic manufacturing apparatus 302, the process of the next step may not be performed, and the resist applied by the photolithographic manufacturing apparatus 302 may be peeled off and started again.

  As described above, by identifying a part that correlates with the occurrence of a defect and removing it from the sequence or using a substitute part, the occurrence of the defect is suppressed to the minimum, and the remaining wafers are processed normally. It becomes possible to execute. In addition, the same processing is performed for wafers to be processed thereafter, and by repairing the unit having a correlation with the defect in the meantime, it becomes possible to repair the abnormal unit without stopping the system, thereby reducing productivity. Maintenance can be performed without In addition, since it is possible to continue processing with alternative parts when parts need to be replaced, it is possible to repair the replacement parts according to the delivery date of the replacement parts and the production convenience in the factory. Of course, this modification is based on the premise that there are a plurality of processing units, but even with a single unit, the same effect can be obtained.

  Next, a fifth embodiment of the present invention will be described. FIG. 31 shows a configuration of the inspection control unit 320 according to the present embodiment. Compared with the fourth embodiment, information on defect classification (similar to the classification rule information rr in the first embodiment), a database storing probability data indicating the correlation between defect classification results and processing units, and the like A portion 419 is provided.

  For example, in the coater unit, defects spreading in the direction of the radius of rotation of the wafer are likely to occur during the process of applying the resist while rotating the wafer. FIG. 32A illustrates defects generated in the coater unit. When the resist coating amount is small, the coating liquid does not reach the periphery sufficiently as in the defect 1001 and unevenness occurs in the radial direction, or in the circumferential direction with the foreign material on the coating surface as the leading edge as in the defect 1002. Unevenness with a tail is generated.

  In the exposure unit, since exposure is repeated in accordance with chips formed on the wafer, defects similar to a single exposure range shape are likely to occur. For example, the entire exposure range 1 section becomes a defect like a defect 1003 in FIG. 32B, or a part of the section becomes a defect like a defect 1004. Further, in the developer unit, when the developer is applied while being scanned in a uniaxial direction, a defect depending on the direction in which the developer is applied occurs. For example, a defect such as a defect 1005 in FIG. 32C occurs in a uniaxial direction (development is performed in the upper right portion of the defect 1005, but development is insufficient toward the lower left).

  As described above, using the fact that each processing unit has a feature in the defect, the information that associates the feature amount that constitutes the feature and the degree of conformity of the defect classification result with the numerical value of the feature amount, and the defect classification result Information on the suitability of the processing unit for (for example, the suitability of the coater unit for the defects 1001 and 1002 in FIG. 32 is high and the suitability of the exposure unit is low) is stored in the database unit 419. A feature amount calculation method is disclosed in Japanese Patent Laid-Open No. 2003-168114 described above.

  The defect classification unit 417 has a defect detected by the defect extraction unit 411. The defect shape, the aspect ratio, the position with respect to the wafer, the direction with respect to the wafer, and the dependency with the chip formed on the wafer. Measure information such as. The defect classification unit 417 calculates the degree of fit (classification probability) for a specific defect based on the measurement information and the empirical rule information stored in advance by the database unit 419. Correlation detection unit 418 also determines the processing unit generating the defect based on the classification result of the defect classified by defect classification unit 417 and the empirical rule information stored in advance by database unit 419. Probability (probability that a processing unit has caused the defect due to an abnormality) is calculated.

  Hereinafter, with reference to FIG. 33, the flow of processing by the photolithography manufacturing apparatus 302 in the present embodiment will be described. First, the coater unit, the exposure unit, and the developer unit sequentially process the wafer (step S111). Subsequently, the inspection unit performs an inspection. The inspection result is notified to the inspection control unit 320, and the defect extraction unit 411 extracts defects in the inspection control unit 320 (step S112). The apparatus control unit 407 receives the result of defect extraction from the defect extraction unit 411, and determines whether or not there is a defect on the wafer (step S113).

  If there is no defect in the wafer, the process proceeds to step S123. When a defect occurs, the defect classification unit 417 performs defect classification processing to calculate a classification probability for a specific defect (step S114). When the defect classification result is input from the defect classification unit 417, the correlation detection unit 418 compares the classification probability with the first threshold value and determines whether the classification probability is equal to or higher than the first threshold value (the classification probability is very high). Whether or not it is high) and notifies the device control unit 407 of the determination result (step S115). If the classification probability is equal to or higher than the first threshold, the process proceeds to step S120.

  If the classification probability is less than the first threshold, the correlation detection unit 418 performs a correlation detection process and calculates the probability of the processing unit that has generated the defect (step S116). Subsequently, the correlation detection unit 418 compares the probability of the processing unit with the second threshold value, and determines whether the probability is equal to or higher than the second threshold value (whether the correlation between the defect and the processing unit is very high). And the determination result is notified to the apparatus control unit 407 (step S117). If the probability is greater than or equal to the second threshold, the process transitions to step S120.

  If the probability is less than the second threshold, the correlation detection unit 418 compares the probability of the processing unit with the third threshold (second threshold> third threshold), and the probability is third. Is determined (whether or not the correlation between the defect and the processing unit is medium), and the determination result is notified to the apparatus control unit 407 (step S118). If the probability is less than the third threshold, the process proceeds to step S122. If the probability is equal to or higher than the third threshold, the correlation detection unit 418 compares the classification probability with the fourth threshold (first threshold> fourth threshold), and the classification probability is the fourth. It is determined whether or not it is equal to or higher than the threshold (whether or not the classification probability is medium), and the determination result is notified to the device control unit 407 (step S119).

  If the classification probability is less than the fourth threshold, the process proceeds to step S120. If the classification probability is equal to or higher than the fourth threshold value, the apparatus control unit 407 performs control to stop the processing unit notified from the correlation detection unit 418 and prohibit its use, and subsequent wafers The sequence is changed so as to be processed by another unit (step S120).

  Subsequently, the display unit 415 notifies the apparatus manager of the abnormality of the apparatus and displays to notify the defect state of the wafer according to the control of the apparatus control unit 407 (steps S121 and S122). Finally, the apparatus control unit 407 determines whether or not processing has been performed for all wafers (step S123), and if unprocessed wafers remain, control is transferred to step S111. These processes are repeated until all the wafers have been processed.

  In the above example, the probability of the processing unit with respect to the defect classification result is used. However, the probability of the processing unit with respect to the result of measurement and determination by a dedicated inspection unit that monitors the state of the processing unit may be used. Absent. For example, a film thickness meter is installed after the coater unit to obtain a measurement result of the resist film thickness. The shape of the defect 1001 or the like in FIG. 32 is detected from the measurement result, and the probability of the processing unit may be calculated based on the detection result.

  In addition, a line width measuring device is installed after the exposure unit, and evaluation is performed based on the line width of the pattern. A spectrometer is installed after the developer unit, and evaluation is performed based on the result of measuring the resist property change due to baking. You may use the method of performing. By installing an inspection unit before or after each processing unit, if that processing unit is the cause of the occurrence of a defect, the probability of that processing unit can be further increased. Moreover, you may identify a defect generation unit from these several test results and the result of correlation evaluation.

  As described above, according to the present embodiment, the detection unit abnormality is detected from both the defect classification result and the correlation evaluation result, thereby improving the reliability of the determination and stopping the abnormal unit at an early stage. Is possible.

  As described above, the embodiments of the present invention have been described in detail with reference to the drawings. However, the specific configuration is not limited to these embodiments, and includes design changes and the like without departing from the gist of the present invention. . For example, although the substrate inspection method is the macro inspection, the invention is not limited to the macro inspection, and can be applied to a micro inspection using a microscope.

It is a block diagram which shows the whole structure of the defect determination system and each manufacturing apparatus by the 1st Embodiment of this invention. It is a block diagram which shows the structure of the board | substrate inspection apparatus with which the defect determination system by the 1st Embodiment of this invention is provided. In the 1st Embodiment of this invention, it is a reference figure which shows the format of the information integrated by the test | inspection information integration part. It is a flowchart which shows the procedure of a process of the board | substrate inspection apparatus with which the defect determination system by the 1st Embodiment of this invention is provided. It is a block diagram which shows the structure of the board | substrate inspection result management part with which the defect determination system by the 1st Embodiment of this invention is provided. It is a flowchart which shows the procedure of the process of the board | substrate inspection result management part with which the defect determination system by the 1st Embodiment of this invention is provided. It is a reference figure for demonstrating the structure of the to-be-inspected object (wafer substrate) in the 1st Embodiment of this invention. FIG. 6 is a reference diagram illustrating an example of occurrence of a defect (a black defect is generated in a shot unit) in the first embodiment of the present invention. It is a graph which shows (chi) ² distribution used for estimation of the periodicity in the 1st Embodiment of this invention. It is a graph which shows the model of (chi) ² test used for estimation of the periodicity in the 1st Embodiment of this invention. It is a reference diagram showing an inspection wafer image in one lot in the first embodiment of the present invention. It is a reference figure which shows the content of the defect information in the 1st Embodiment of this invention. It is a block diagram which shows the whole structure of the defect determination system and each manufacturing apparatus by the 2nd Embodiment of this invention. It is a block diagram which shows the structure of the board | substrate inspection apparatus with which the defect determination system by the 2nd Embodiment of this invention is provided. It is a flowchart which shows the procedure of a process of the board | substrate inspection apparatus with which the defect determination system by the 2nd Embodiment of this invention is provided. It is a block diagram which shows the structure of the multiple substrate test result management and determination part with which the defect determination system by the 2nd Embodiment of this invention is provided. It is a flowchart which shows the procedure of the process of the multiple substrate test result management and determination part with which the defect determination system by the 2nd Embodiment of this invention is provided. It is a reference figure which shows the content of the defect information in the 2nd Embodiment of this invention. It is a block diagram which shows the whole structure of the defect determination system and each manufacturing apparatus by the 3rd Embodiment of this invention. It is a block diagram which shows the structure of the board | substrate inspection image acquisition apparatus with which the defect determination system by the 3rd Embodiment of this invention is provided. It is a block diagram which shows the structure of the board | substrate inspection process part with which the defect determination system by the 3rd Embodiment of this invention is provided. It is a block diagram which shows the structure of the photolitho manufacturing apparatus (substrate processing system) by the 4th Embodiment of this invention. It is a block diagram which shows the structure of the test | inspection unit with which the photolitho manufacturing apparatus by the 4th Embodiment of this invention is provided, and a test | inspection control part. It is a reference figure for demonstrating the statistical method in the 4th Embodiment of this invention. It is a reference figure for demonstrating the statistical method in the 4th Embodiment of this invention. It is a reference figure for demonstrating the method to detect the correlation with the process unit and defect generation | occurrence | production in the 4th Embodiment of this invention. It is a reference figure for demonstrating the method to detect the correlation with the process unit and defect generation | occurrence | production in the 4th Embodiment of this invention. It is a reference figure for demonstrating the method to detect the correlation with the process unit and defect generation | occurrence | production in the 4th Embodiment of this invention. It is a flowchart which shows the procedure of the process of the photolitho manufacturing apparatus by the 4th Embodiment of this invention. It is a flowchart which shows the procedure of the process of the photolitho manufacturing apparatus by the 4th Embodiment of this invention. It is a block diagram which shows the structure of the test | inspection control part with which the photolitho manufacturing apparatus by the 5th Embodiment of this invention is provided. It is a reference figure for demonstrating the classification method of the defect in the 5th Embodiment of this invention. It is a flowchart which shows the procedure of the process of the photolitho manufacturing apparatus by the 5th Embodiment of this invention. It is a schematic process diagram which shows the pre-process of the conventional semiconductor manufacture.

Explanation of symbols

DESCRIPTION OF SYMBOLS 1,101,201A ... Defect determination system, 5,105 ... Manufacturing process management part, 6,106 ... Board inspection apparatus, 7 ... Board inspection result management part, 11, 211, 407 ... Device control unit, 21, 221, 411 ... defect extraction unit, 22, 412, 417 ... defect classification unit, 23 ... defect classification rule storage unit, 32, 111, 232 ... single target Internal defect cycle estimation unit, 34 ... multiple target defect cycle estimation unit, 35 ... manufacturing process abnormality determination unit, 107 ... multiple substrate inspection result management / determination unit, 112 ... single target manufacturing Process abnormality determination unit, 206A ... substrate inspection image acquisition device, 207A ... substrate inspection processing unit, 302 ... photolithography manufacturing device, 312, 313 ... developer unit, 314, 315 ... inspection unit, 320 ...査 control unit, 321 ... coater developer control unit, 322 ··· exposure control unit, 413,418 ... correlation detection unit, 419 ... database unit

Claims (15)

Imaging means for imaging an object to be inspected and generating image information;
A defect extracting means for extracting the defect to be inspected based on the image information generated by the imaging means, and generating defect information relating to the characteristics of the individual defects;
Based on the defect information, the image information, and information on the inspection target, defect period estimation means for estimating the periodicity of defects in the inspection target;
Manufacturing abnormality determining means for determining presence or absence of abnormality in the manufacturing process based on the result estimated by the defect period estimating means;
A defect determination system characterized by comprising:   The defect determination system according to claim 1, wherein the defect period estimation unit estimates a periodicity of defects repeatedly generated in the same inspection target.   The information on the inspection target indicates one or more sections of the inspection area provided on the inspection target, and the defect period estimation means estimates the defect periodicity in units of the section of the inspection area. The defect determination system according to claim 2.   The defect determination system according to claim 1, wherein the defect period estimation unit estimates a periodicity of defects that are repeatedly generated over a plurality of the inspection targets.   The defect determination system according to claim 1, further comprising first defect classification means for classifying the defects using the defect information.   The defect determination system according to claim 5, wherein the defect information includes information on a quality of defects in the inspection target.   The defect determination system according to claim 1, wherein the defect information includes a determination result of pass / fail with respect to a section of a minimum inspection area provided on the inspection target. .   The manufacturing apparatus identification information acquisition means which acquires the identification information of the manufacturing apparatus which processed the said to-be-inspected object in the said manufacturing process, and associates with the said defect information of the to-be-inspected object is characterized by the above-mentioned. The defect determination system according to claim 7.   The defect determination system according to claim 8, wherein the defect period estimation unit estimates defect periodicity using identification information of the manufacturing apparatus associated with arbitrary defect information.   The defect period estimation means performs a statistical hypothesis test on the defect information, and determines that there is periodicity when there is information that is not rejected by the test. A defect determination system according to any of the above sections.   The manufacturing abnormality determination unit outputs a determination result indicating that there is an abnormality in the manufacturing process when the defect period estimation unit estimates that there is a periodicity of defects. The defect determination system according to claim 10. While including the defect determination system according to any one of claims 1 to 11,
The correlation between the defect to be inspected extracted by the defect extraction means and the manufacturing apparatus that has processed the object to be inspected in the manufacturing process is detected, and an abnormality is detected based on the detected correlation. Correlation detecting means for identifying the manufacturing apparatus that is generated;
Processing condition changing means for changing a processing condition assigned to each manufacturing apparatus so as to avoid the manufacturing apparatus specified by the correlation detection means;
A substrate processing system comprising: Storage means for storing defect classification information in which a defect feature amount and a defect classification result are associated;
A second defect classification means for classifying the defect based on the defect information and the defect classification information;
Further comprising
The correlation detection unit detects a correlation between the defect to be inspected and the manufacturing apparatus based on the defect classification result by the second defect classification unit, and based on the detected correlation The substrate processing system according to claim 12, wherein the manufacturing apparatus in which an abnormality has occurred is specified. While including the defect determination system according to any one of claims 1 to 11,
Based on the detected correlation, the correlation between the defect of the inspection target extracted by the defect extraction means and a part in the manufacturing apparatus that has processed the inspection target in the manufacturing process is detected. Correlation detecting means for identifying a part in the manufacturing apparatus in which an abnormality has occurred;
Processing condition changing means for changing processing conditions assigned to each manufacturing apparatus so as to avoid parts in the manufacturing apparatus specified by the correlation detection means;
A substrate processing system comprising: While including the defect determination system according to any one of claims 1 to 11,
Correlation between the defect of the inspection target extracted by the defect extraction means and the processing method of the inspection target in the manufacturing process is detected, and an abnormality has occurred based on the detected correlation Correlation detection means for specifying the processing method;
Processing condition changing means for changing a processing condition assigned to each manufacturing apparatus so as to avoid the processing method specified by the correlation detecting means;
A substrate processing system comprising:

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