JP2007180233A - Wiring board and manufacturing method therefor, and semiconductor device - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a wiring board which can manufacture a reliable semiconductor device, by restraining a disconnection of an outermost conductor wiring attributable to a stress applied to the conductor wiring, in a corner of a semiconductor element upon mounting the semiconductor element onto the wiring board. <P>SOLUTION: The wiring board comprises an insulating substrate 1; a plurality of first conductor wirings 12, aligned and provided along each side of semiconductor element mounting regions 4a on the insulating substrate; and a first projection electrode 13 which is formed astride a region on the both sides for each of the first conductor wirings, and has a sectional shape in the widthwise direction of the conductor wiring which is shaped at a middle height which is larger at the center than on the both sides. At the corner region of the semiconductor element mounting regions 4a, a second conductor wiring 14 is aligned and provided adjacent to the first conductor wiring, and the second conductor wiring 14 is thicker in a conductor wiring width than the first conductor wiring. On the second conductor wiring 14, a second projection electrode 15, which has a smaller dimension than the second conductor wiring in a widthwise direction of the conductor wiring, is formed. <P>COPYRIGHT: (C)2007,JPO&INPIT

Description

  The present invention relates to a wiring substrate such as a tape carrier substrate used for chip-on-film (COF), and a semiconductor device in which the wiring substrate and a semiconductor element are bonded.

  COF (Chip ON Film) is known as a kind of package module using a film substrate. FIG. 3 is a cross-sectional view showing a part of an example of the COF (see, for example, Patent Document 1). The COF has a structure in which a semiconductor element 4 is mounted on a tape carrier substrate formed using a flexible insulating film base material 1 and protected by a sealing resin 5, and is used for driving a flat panel display. It is mainly used as a driver.

  The main elements of the tape carrier substrate include a conductor wiring 2 formed on the surface of the film substrate 1 and a protruding electrode (bump) 3 on the conductor wiring. If necessary, a metal plating film 6 is formed on part of the conductor wiring 2 and the protruding electrode 3, and a layer of a solder resist 7, which is an insulating resin, is formed on the conductor wiring 2 on which the metal plating film 6 is not formed. It is formed. Generally, polyimide is used as the film base 1 and copper is used as the conductor wiring 2. Further, as a method of forming the protruding electrode 3, a method of forming the conductor wiring 2 on the film substrate 1 and then forming it by metal plating is common.

  The conductor wiring 2 is connected to the electrode pad 8 on the semiconductor element 4 via the protruding electrode 3. As a connection method, after applying a sealing resin to the semiconductor mounting portion on the tape carrier substrate, the electrode pad 8 of the semiconductor element 4 and the protruding electrode 3 of the tape carrier substrate are opposed to each other and connected by ultrasonic waves and thermal pressure. It is common. FIG. 4 shows an example of a plan view showing a state in which the electrode pad 8 on the semiconductor element and the protruding electrode 3 on the tape carrier substrate are opposed to each other. The figure is a view from the tape carrier substrate side, but the illustration of the film base 1 is omitted.

  Hereinafter, a conventional method for manufacturing a tape carrier substrate will be described with reference to FIG. FIG. 5 is a diagram showing a conventional tape carrier substrate manufacturing process. FIGS. 5 (a1) to (d1) are plan views of a semiconductor mounting portion of the tape carrier substrate, and FIGS. 5 (a2) to (d2) are diagrams. Corresponding to 5 (a1) to (d1), the cross section at the CC ′ position shown in FIG.

  As shown in FIGS. 5 (a1) and (a2), a film substrate 1 having a plurality of conductor wirings 2 arranged in an aligned manner is used. As shown in FIGS. 5 (b1) and 5 (b2), a film substrate is used. On the surface of the material 1 on which the conductor wiring 2 is provided, a photoresist 9 having openings 10 extending across the respective conductor wirings 2 and extending to regions on both sides of each conductor wiring 2 is formed. Thereby, a part of each conductor wiring 2 is exposed in the opening 10.

  Next, through the opening 10 of the photoresist 9, the conductor wiring 2 exposed in the opening 10 is subjected to metal plating to form the protruding electrode 3 as shown in FIGS. 5 (c1) and 5 (c2). If the photoresist 9 is removed, a tape carrier substrate in which the protruding electrode 3 is formed on the conductor wiring 2 is obtained as shown in FIGS.

  As shown in FIG. 5, a plurality of conductor wirings 2 are arranged on the film substrate 1, and protruding electrodes 3 are formed on the respective conductor wirings 2. The protruding electrodes 3 are formed in regions on both sides of the conductor wiring 2 across the conductor wiring 2.

Further, as shown in FIG. 5 (d2), the protruding electrode 3 has a medium-high shape in which the cross-sectional shape along the width direction of the conductor wiring 2 is higher in the central portion than both sides.
JP 2004-327936 A

  Here, as described above, when a semiconductor element is mounted on the tape carrier substrate, an ultrasonic wave and a thermal pressure are applied. At this time, particularly, the stress due to the ultrasonic wave and the pressure is concentrated on the corner portion of the semiconductor element 4. Therefore, the outermost conductor wiring 2 is particularly easily disconnected. As shown in FIG. 6, the conductor wiring 2 at the corner of the semiconductor element 4 is disconnected to form a disconnected portion 11. In particular, if the width of the conductor wiring 2 is narrowed due to a narrow lead pitch in the future, disconnection is more likely to occur, which becomes a problem.

  The present invention provides a wiring board capable of manufacturing a reliable semiconductor device by suppressing disconnection of the outermost conductor wiring at the corner of the semiconductor element due to stress applied when the semiconductor element is mounted on the wiring board. The purpose is to provide.

  The wiring board of the present invention includes an insulating base, a plurality of first conductor wirings arranged in alignment along each side of the semiconductor element mounting region on the insulating base, and the first conductor wirings. And a first protruding electrode having a middle-high shape in which the cross-sectional shape in the width direction of the conductor wiring is higher than the both sides. A second conductor wiring is provided adjacent to and aligned with the first conductor wiring at a corner region portion of the semiconductor element mounting region, and the second conductor wiring is wider than the first conductor wiring. And a second protruding electrode having a size smaller than that of the second conductor wiring is formed in the conductor wiring width direction on the second conductor wiring.

  The method for manufacturing a wiring board according to the present invention includes an insulating base, a plurality of conductor wirings arranged in alignment along the insulating base, and protruding electrodes formed for each of the conductor wirings. A method for manufacturing a wiring board provided. A plurality of first conductor wirings are provided in alignment along each side of the semiconductor element mounting region on the insulating substrate, and adjacent to the first conductor wiring in a corner region portion of the semiconductor element mounting region. The insulating base material provided with the second conductor wiring that is aligned and has a conductor wiring width wider than the first conductor wiring is used. A photoresist is formed on a surface of the insulating base material on which the first conductor wiring and the second conductor wiring are provided, and the conductor wiring is formed on the photoresist across the aligned first conductor wiring. A first opening having a long hole pattern having a shape including regions on both sides, and a second opening having a smaller dimension in the conductor wiring width direction than the second conductor wiring are provided. A part of the first conductor wiring and the second conductor wiring are respectively exposed in the opening and the second opening, and then the first opening and the second opening of the photoresist. Then, the protruding electrode is formed by performing metal plating on a part of the exposed first conductor wiring and second conductor wiring.

  According to the present invention, since the width of the second conductor wiring arranged in the corner region is thick, disconnection of the outermost conductor wiring during the mounting of the semiconductor element on the wiring board is suppressed, and a highly reliable semiconductor Equipment can be provided.

  In the configuration of the wiring board of the present invention, it is preferable that the height of the second protruding electrode is the same as the height of the first protruding electrode.

  A semiconductor device of the present invention includes a wiring board having the above-described configuration and a semiconductor element mounted on the wiring board, and the electrode pad of the semiconductor element and the conductor wiring are connected via the protruding electrode. It is characterized by.

  Hereinafter, the structure of the wiring board according to the embodiment of the present invention will be described with reference to the drawings. 1A and 1B show a configuration of a semiconductor element mounting portion of a wiring board in the present embodiment, FIG. 1A is a plan view, and FIG. 1B is an AA of FIG. It is sectional drawing along a line.

  The basic configuration of the tape carrier substrate in the present embodiment is the same as that of the conventional example shown in FIG. 3, is configured using a flexible insulating film substrate 1, and is formed on the surface of the film substrate 1. The first conductor wiring 12 formed and the first protruding electrode 13 on the conductor wiring are included. A plurality of first conductor wirings 12 are aligned along each side of the semiconductor element mounting region 4a. The first protruding electrode 13 spans the regions on both sides of the first conductor wiring 12, and the cross-sectional shape in the width direction of the conductor wiring is a medium-high shape with the center portion being higher than both sides.

  In the present embodiment, the second conductor wiring 14 is disposed adjacent to the first conductor wiring 12 in the corner region portion of the semiconductor element 4. The second conductor wiring 14 has a second protruding electrode 15 having a conductor wiring width wider than the first conductor wiring 12 and having a dimension in the conductor wiring width direction smaller than that of the second conductor wiring 14.

  In the case of the configuration as described above, the second conductor wiring 14 at the corner of the semiconductor element mounting region 4a has a large width and thus is difficult to be disconnected. Further, since the second protruding electrode 15 may be designed to have a size that is approximately the same height as the first protruding electrode 13 on the first conductor wiring 12, it is stable when the semiconductor element 4 is mounted. Connection reliability can be obtained.

  Although not shown, the second projecting electrode 15 is placed on the second conductor wiring 14 in order to secure the bonding force between the semiconductor element upper electrode pad and the conductor wiring projecting electrode in the corner region of the semiconductor element mounting region 4a. A plurality may be provided.

  Hereinafter, a method for manufacturing the wiring board will be described. FIG. 2 shows a method of manufacturing a wiring board, FIGS. 2A1 to 2D1 are plan views of a semiconductor mounting portion of the wiring board, and FIGS. 2A2 to 2D2 are FIGS. 2A1 to 2D1, respectively. ) And shows a cross-section at the position BB ′ shown in FIG.

  As shown in FIGS. 2A1 and 2A2, the first conductor wiring 12 is provided as an insulating base material in alignment with a semiconductor element mounting region (not shown). A film substrate 1 is prepared in which a second conductor wiring 14 having a large wiring width is provided adjacent to the first conductor wiring 12 in a corner area portion of the semiconductor element mounting area.

  Next, as shown in FIGS. 2 (b1) and 2 (b2), a photoresist 16 is attached to the surface of the film substrate 1 on which the first conductor wiring 12 and the second conductor wiring 14 are provided, and aligned. The first opening 17 which is a long hole pattern having a shape including regions on both sides of the conductor wiring across the first conductor wiring 12 and the second conductor wiring 14 is smaller in the conductor wiring width direction. 2 openings 18 are formed. Thereby, a part of the first conductor wiring 12 and the second conductor wiring 14 are exposed in the first opening 17 and the second opening 18, respectively.

  Next, as shown in FIGS. 2C1 and 2C2, the exposed first conductor wiring 12 and second conductor wiring 14 are exposed through the first opening 17 and the second opening 18 of the photoresist 16. The first protruding electrode 13 and the second protruding electrode 14 are formed by performing metal plating on a part of the first protruding electrode 13.

  Next, if the photoresist 16 is removed, as shown in FIGS. 2 (d1) and 2 (d2), a wiring board in which protruding electrodes are formed on the conductor wiring can be formed.

  According to the above manufacturing method, since the width of the second conductor wiring 14 at the corner portion of the semiconductor element 4 is large, it is difficult to disconnect. Further, the dimension of the second opening 18 of the photoresist 16 is designed so that the second protruding electrode 15 is formed at the same height as the first protruding electrode 13 on the first conductor wiring 12. Therefore, stable connection reliability can be obtained when the semiconductor element 4 is mounted.

  A semiconductor device having a high reliability can be configured by mounting a semiconductor element in the semiconductor element mounting region of the wiring substrate having the above-described configuration and connecting the electrode pad of the semiconductor element and the conductor wiring through the protruding electrode. .

  According to the present invention, when the wiring board and the semiconductor element are bonded, the outermost conductor wiring can be prevented from being disconnected, and stable bonding can be realized.

The wiring board in Embodiment 1 of this invention is shown, (a) is a top view which shows a part of wiring board, (b) is sectional drawing which shows a part of wiring board The manufacturing process of the wiring board is shown, (a) is a plan view showing a part of the wiring board, and (b) is a sectional view showing a part of the wiring board. Sectional drawing which shows a part of conventional semiconductor device Plan view showing a conventional semiconductor device The conventional manufacturing process of a wiring board is shown, (a) is a plan view showing a part of the wiring board, and (b) is a cross-sectional view showing a part of the wiring board. Plan view of semiconductor device showing disconnection example in conventional example

Explanation of symbols

DESCRIPTION OF SYMBOLS 1 Film base material 2 Conductor wiring 3 Protruding electrode 4 Semiconductor element 4a Semiconductor element mounting area | region 5 Sealing resin 6 Metal plating film 7 Solder resist 8 Electrode pad 9 Photoresist 10 Photoresist opening part 11 Disconnection part 12 1st conductor wiring 13 First Projection Electrode 14 Second Conductor Wiring 15 Second Projection Electrode 16 Photoresist 17 First Opening 18 Second Opening

Claims (4)

Insulating base material, a plurality of first conductor wirings arranged in alignment along each side of the semiconductor element mounting region on the insulating base material, and both sides of each of the first conductor wirings In a wiring board provided with a first projecting electrode that is formed across a region and has a middle-high shape in which a cross-sectional shape in the width direction of the conductor wiring is higher in the center than on both sides,
In the corner area portion of the semiconductor element mounting region, a second conductor wiring is provided adjacent to and aligned with the first conductor wiring;
The second conductor wiring has a conductor wiring width wider than the first conductor wiring,
A wiring board, wherein a second protruding electrode having a size smaller than that of the second conductor wiring is formed on the second conductor wiring in a width direction of the conductor wiring.   The wiring board according to claim 1, wherein a height of the second protruding electrode is the same as a height of the first protruding electrode. In a manufacturing method of a wiring board comprising an insulating base, a plurality of conductor wirings arranged in alignment along the insulating base, and protruding electrodes formed for each of the conductor wirings,
A plurality of first conductor wirings are provided in alignment along each side of the semiconductor element mounting region on the insulating base, and adjacent to the first conductor wiring in a corner region portion of the semiconductor element mounting region. Using the insulating substrate provided with the second conductor wiring that is aligned and has a conductor wiring width wider than the first conductor wiring,
A photoresist is formed on a surface of the insulating base material on which the first conductor wiring and the second conductor wiring are provided, and the conductor wiring is formed on the photoresist across the aligned first conductor wiring. A first opening having a long hole pattern having a shape including regions on both sides, and a second opening having a smaller dimension in the conductor wiring width direction than the second conductor wiring are provided. Exposing the first conductor wiring and a part of the second conductor wiring to the opening and the second opening, respectively,
The protruding electrode is formed by performing metal plating on a part of the exposed first conductor wiring and second conductor wiring through the first opening and the second opening of the photoresist. A method for manufacturing a wiring board.   A wiring board according to claim 1 or 2 and a semiconductor element mounted on the wiring board, wherein the electrode pad of the semiconductor element and the conductor wiring are connected via the protruding electrode. A semiconductor device.

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