JP2007159000A - Semiconductor device - Google Patents

Semiconductor device Download PDF

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Publication number
JP2007159000A
JP2007159000A JP2005354634A JP2005354634A JP2007159000A JP 2007159000 A JP2007159000 A JP 2007159000A JP 2005354634 A JP2005354634 A JP 2005354634A JP 2005354634 A JP2005354634 A JP 2005354634A JP 2007159000 A JP2007159000 A JP 2007159000A
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circuit
transfer
information
semiconductor device
amplifier circuit
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JP2005354634A
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Japanese (ja)
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Yoichi Endo
洋一 遠藤
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Seiko Instruments Inc
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Seiko Instruments Inc
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Abstract

<P>PROBLEM TO BE SOLVED: To improve throughput for adjusting characteristics of an amplifier circuit in a semiconductor device which adjusts the characteristics of the amplifier circuit utilizing information in a nonvolatile memory. <P>SOLUTION: A power supply voltage is detected and simultaneously with power-on, a plurality of kinds of information in a nonvolatile memory are transferred to an amplifier circuit via a volatile memory. <P>COPYRIGHT: (C)2007,JPO&INPIT

Description

本発明は、増幅回路を有する半導体装置に関し、特に増幅回路の特性の調整を不揮発性メモリの情報を利用して行う回路に関する。   The present invention relates to a semiconductor device having an amplifier circuit, and more particularly to a circuit that adjusts characteristics of an amplifier circuit using information in a nonvolatile memory.

増幅回路の特性の調整を不揮発性メモリの情報を利用して行う回路においては、まず不揮発性メモリの情報の転送を外部から、たとえばＣＰＵなど外部回路から通信端子を通じて命令を送信し、その命令によって所定の不揮発性メモリ情報を揮発性メモリに転送したのちに増幅回路の特性を調整している。
特開２００４-４０３５６ In a circuit that adjusts characteristics of an amplifier circuit using information in a nonvolatile memory, first, a command is transmitted from the outside, for example, an external circuit such as a CPU through a communication terminal to transfer information in the nonvolatile memory. After the predetermined nonvolatile memory information is transferred to the volatile memory, the characteristics of the amplifier circuit are adjusted.
JP2004-40356

しかしながら、従来の外部からの制御によって増幅回路の特性を調整する方式では、ＣＰＵとの通信時間や専用の制御シーケンスが必要になり、増幅回路の特性の調整のためのスループットを向上させることができなかった。また、通信途中に通信エラーが起きた場合は、誤った調整値が入力され品質問題が発生する可能性もあった。   However, the conventional method of adjusting the characteristics of the amplifier circuit by external control requires a communication time with the CPU and a dedicated control sequence, and can improve the throughput for adjusting the characteristics of the amplifier circuit. There wasn't. In addition, when a communication error occurs during communication, an incorrect adjustment value may be input and a quality problem may occur.

そこで本発明は、上記課題を解決するもので有り、半導体装置における増幅回路の特性の調整のためのスループットを向上させることを目的としている。   In view of the above, an object of the present invention is to solve the above-described problems and to improve the throughput for adjusting the characteristics of an amplifier circuit in a semiconductor device.

本発明は、電源電圧の供給と同時に転送回路によって自動的に転送できるよう電源電圧レベルを検出する回路からなる転送回路を用い、これによって生成される転送時間を利用して不揮発性メモリの複数の情報を揮発性メモリを介して増幅回路に転送するようにした。   The present invention uses a transfer circuit comprising a circuit for detecting a power supply voltage level so that the transfer circuit can automatically transfer the power supply voltage simultaneously with the supply of the power supply voltage, and a plurality of nonvolatile memories using the transfer time generated thereby. Information is transferred to the amplifier circuit through a volatile memory.

従って、ＣＰＵなど外部回路から通信端子を通じて命令を送信し、その命令によって所定の不揮発性メモリ情報を揮発性メモリに転送する必要がなくなり、通信にかかるスループットが低減することができる。   Therefore, it is not necessary to transmit a command from an external circuit such as a CPU through a communication terminal, and to transfer predetermined nonvolatile memory information to the volatile memory by the command, and the communication throughput can be reduced.

本発明によれば、増幅回路の特性の調整を不揮発性メモリの情報を利用して行う回路において、増幅回路の特性の調整のためのスループットを低減することができる。   According to the present invention, it is possible to reduce the throughput for adjusting the characteristics of the amplifier circuit in a circuit that adjusts the characteristics of the amplifier circuit using information in the nonvolatile memory.

以下、本発明の半導体装置における好適な実施の形態について、図面を参照して詳細に説明する。   DESCRIPTION OF EXEMPLARY EMBODIMENTS Hereinafter, preferred embodiments of a semiconductor device of the invention will be described in detail with reference to the drawings.

図１は、本発明の増幅回路を有する半導体装置の実施例を示すブロック図である。図１の半導体装置は、増幅回路の特性の調整を不揮発性メモリの情報を利用して行う。情報を入力するための端子５、６、７、およびシリアル制御回路８と、入力電圧の値によって転送の制御を行う転送回路９と、情報をデコードするためのデコーダ回路１２と、情報を蓄えるための不揮発性メモリブロック１と、不揮発性メモリブロック１の出力する情報を転送回路９の信号によって制御するビット制御回路２と、情報によって特性が調整される増幅回路３とから構成される。   FIG. 1 is a block diagram showing an embodiment of a semiconductor device having an amplifier circuit of the present invention. The semiconductor device in FIG. 1 adjusts the characteristics of the amplifier circuit using information in a nonvolatile memory. Terminals 5, 6, and 7 for inputting information, and a serial control circuit 8, a transfer circuit 9 for controlling transfer according to the value of the input voltage, a decoder circuit 12 for decoding information, and for storing information , A bit control circuit 2 that controls information output from the nonvolatile memory block 1 by a signal from the transfer circuit 9, and an amplifier circuit 3 whose characteristics are adjusted by the information.

図１に示されるように、転送回路９の出力信号はシリアル制御回路８の出力する情報をＯＲ回路１１によって制御する。転送回路９には電源１０が接続されており、電源１０の投入と同時に転送回路９の出力信号は活性化される。   As shown in FIG. 1, the output signal of the transfer circuit 9 controls information output from the serial control circuit 8 by an OR circuit 11. A power supply 10 is connected to the transfer circuit 9, and an output signal of the transfer circuit 9 is activated simultaneously with turning on the power supply 10.

図２は、本発明の増幅回路を有する半導体装置に電源を投入したときのタイミング図である。転送回路９は、検出電圧値Ｖｈと解除電圧値Ｖiの２つの検出電圧値を有している
。転送回路９は、電源Ｖが投入されてから電圧の上昇に応じて、検出電圧Ｖｈから解除電圧Ｖｉまでの区間dの間、低レベルの転送許可信号をノードａに出力する。 FIG. 2 is a timing chart when the semiconductor device having the amplifier circuit of the present invention is turned on. The transfer circuit 9 has two detection voltage values, that is, a detection voltage value Vh and a release voltage value Vi. The transfer circuit 9 outputs a low-level transfer permission signal to the node a during the interval d from the detection voltage Vh to the release voltage Vi in response to a rise in voltage after the power source V is turned on.

すなわちこの区間dの転送許可信号の間に、ビット制御回路２は不揮発性メモリブロック１から増幅回路３への情報の読み出し動作を行う。不揮発性メモリブロック１から出力された情報は、ラッチ回路などで代表される揮発性回路で構成するビット制御回路２で記憶され、さらに増幅回路３に読み出しされることによって、増幅回路３の状態を決定する。   That is, the bit control circuit 2 performs an operation of reading information from the nonvolatile memory block 1 to the amplifier circuit 3 during the transfer permission signal in the section d. Information output from the nonvolatile memory block 1 is stored in a bit control circuit 2 constituted by a volatile circuit represented by a latch circuit or the like, and further read out to the amplifier circuit 3 to change the state of the amplifier circuit 3. decide.

図３は、本発明の増幅回路を有する半導体装置における不揮発性メモリブロックとビット制御回路の構成を示したブロック図である。不揮発性メモリセル３１は、ワード線mとビット線ｋに接続され、ビット線kには揮発性メモリのラッチ回路３２が接続され、ラッチ回路３２には入力信号oと、出力信号qが接続されている。メモリセル３１の情報はビット線kを経由してラッチ回路３２に転送される。転送された情報は、出力信号ｑから図１の増幅回路３に入力にされる。この情報によって増幅回路３は、オフセットやゲインなどの特性を任意に設定することが出来る。   FIG. 3 is a block diagram showing a configuration of a nonvolatile memory block and a bit control circuit in a semiconductor device having an amplifier circuit of the present invention. The nonvolatile memory cell 31 is connected to the word line m and the bit line k, the volatile memory latch circuit 32 is connected to the bit line k, and the input signal o and the output signal q are connected to the latch circuit 32. ing. Information in the memory cell 31 is transferred to the latch circuit 32 via the bit line k. The transferred information is input from the output signal q to the amplifier circuit 3 of FIG. With this information, the amplifier circuit 3 can arbitrarily set characteristics such as offset and gain.

以上、説明したように本発明の半導体装置によれば、増幅回路の特性の調整を不揮発性メモリの情報を利用して行う回路において、電源電圧の供給と同時に転送回路によって自動的に転送できるよう構成したため、増幅回路の特性の調整のためのスループットを低減することができた。   As described above, according to the semiconductor device of the present invention, in the circuit that adjusts the characteristics of the amplifier circuit using the information in the nonvolatile memory, it can be automatically transferred by the transfer circuit simultaneously with the supply of the power supply voltage. As a result, the throughput for adjusting the characteristics of the amplifier circuit could be reduced.

本発明の増幅回路を有する半導体装置の実施例を示すブロック図である。It is a block diagram which shows the Example of the semiconductor device which has the amplifier circuit of this invention. 本発明の増幅回路を有する半導体装置に電源を投入したときのタイミング図である。FIG. 5 is a timing chart when power is supplied to a semiconductor device having an amplifier circuit of the present invention. 本発明の増幅回路を有する半導体装置における不揮発性メモリブロックとビット制御回路の構成を示したブロック図である。3 is a block diagram showing a configuration of a nonvolatile memory block and a bit control circuit in a semiconductor device having an amplifier circuit of the present invention. FIG.

符号の説明Explanation of symbols

１ 不揮発性メモリブロック
２ ビット制御回路
３ 増幅回路
４ Vout端子
８ シリアル制御回路
９ 転送回路
１０ 電源
１２ デコーダ回路
ｋ ビット線ｋ
ｌ ビット線ｌ
ｍ ワード線ｍ
ｎ ワード線ｎ
ｏ ラッチ入力信号ｏ
ｐ ラッチ出力信号ｐ
ｑ ラッチ出力信号ｑ
ｒ ラッチ回路ｔ
ｓ メモリセルｓ
ｔ ラッチ回路ｔ
ｕ ラッチ回路ｕ DESCRIPTION OF SYMBOLS 1 Nonvolatile memory block 2 Bit control circuit 3 Amplifier circuit 4 Vout terminal 8 Serial control circuit 9 Transfer circuit 10 Power supply 12 Decoder circuit k Bit line k
l Bit line l
m Word line m
n Word line n
o Latch input signal o
p Latch output signal p
q Latch output signal q
r latch circuit t
s memory cell s
t Latch circuit t
u Latch circuit u

Claims (4)

増幅回路と、前記増幅回路の特性を設定する情報を格納した不揮発性メモリと、前記不揮発性メモリの情報を一旦格納する揮発性メモリを有する転送制御回路と、前記転送制御回路に前記情報を前記増幅回路に転送することを許可する転送許可信号を出力する転送回路から成る半導体装置。 An amplifying circuit; a non-volatile memory storing information for setting characteristics of the amplifying circuit; a transfer control circuit having a volatile memory for temporarily storing information of the non-volatile memory; and the information to the transfer control circuit A semiconductor device comprising a transfer circuit that outputs a transfer permission signal permitting transfer to an amplifier circuit. 前記転送回路は、電圧検出回路を有し、電圧が設定された電圧範囲にある間に前記転送許可信号を出力する請求項１記載の半導体装置。 The semiconductor device according to claim 1, wherein the transfer circuit includes a voltage detection circuit and outputs the transfer permission signal while the voltage is within a set voltage range. 前記転送回路の前記電圧範囲は、電源電圧が投入されてから上昇する間に設定された請求項２記載の半導体装置。 3. The semiconductor device according to claim 2, wherein the voltage range of the transfer circuit is set while the voltage range rises after the power supply voltage is turned on. さらに情報入力回路を備え、前記転送許可信号が出力されている間に前記情報入力回路から前記不揮発性メモリへ情報が転送される請求項１記載の半導体装置。 The semiconductor device according to claim 1, further comprising an information input circuit, wherein information is transferred from the information input circuit to the nonvolatile memory while the transfer permission signal is output.
JP2005354634A 2005-12-08 2005-12-08 Semiconductor device Withdrawn JP2007159000A (en)

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Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2004062913A (en) * 2002-07-29 2004-02-26 Samsung Electronics Co Ltd Device for using nand flash memory for system driving and data storage
JP2004172676A (en) * 2002-11-15 2004-06-17 Japan Radio Co Ltd Distortion compensation method
JP2005057480A (en) * 2003-08-04 2005-03-03 Shimada Phys & Chem Ind Co Ltd Distortion compensation amplifying unit
JP2005135112A (en) * 2003-10-29 2005-05-26 Seiko Epson Corp Reference voltage generation circuit and power supply voltage monitoring circuit using this
JP2005250681A (en) * 2004-03-02 2005-09-15 Sanyo Electric Co Ltd Data transfer memory and module

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2004062913A (en) * 2002-07-29 2004-02-26 Samsung Electronics Co Ltd Device for using nand flash memory for system driving and data storage
JP2004172676A (en) * 2002-11-15 2004-06-17 Japan Radio Co Ltd Distortion compensation method
JP2005057480A (en) * 2003-08-04 2005-03-03 Shimada Phys & Chem Ind Co Ltd Distortion compensation amplifying unit
JP2005135112A (en) * 2003-10-29 2005-05-26 Seiko Epson Corp Reference voltage generation circuit and power supply voltage monitoring circuit using this
JP2005250681A (en) * 2004-03-02 2005-09-15 Sanyo Electric Co Ltd Data transfer memory and module

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