JP2007158698A - Image decoding apparatus and image decoding method - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide an image decoding apparatus for decoding variable length encoded image data at high speed while suppressing an increase in a circuit area. <P>SOLUTION: Each of first-third decoding parts 100-300 is provided with a comparator, a decoder and a code word table. The code word table 130 has the MPEG code word table of "RUN=0", and the code word tables 230 and 330 have the MPEG code word table of "RUN≠0". In the first decoding part 100, the comparator 110 compares an input variable length code bit string with the variable length code word of the code word table 130, and the decoder 120 outputs a decoded result corresponding to a matching variable length code word to an output part 30. The second decoding part 200 and the third decoding part 300 decode two variable length code words in one machine cycle by utilizing a shift part 20. <P>COPYRIGHT: (C)2007,JPO&INPIT

Description

  The present invention relates to an image decoding apparatus and an image decoding method for decoding image data subjected to variable length encoding at high speed.

  In a conventional image decoding apparatus that decodes compressed image data, a variable-length encoded bit string is compared with a variable-length code word, a matching variable-length code word is obtained, and assigned to the variable-length code word Output decrypted data. Subsequently, the variable-length encoded bit string is shifted by the code length of the matched variable-length code word, and further compared with the variable-length code word to obtain the next matching variable-length code word, and the next decoding Output data.

  In a variable-length codeword compliant with the MPEG-2 system, the decoded data has values “LEVEL” and “RUN”, and thereby a coefficient value obtained by inverse DCT conversion of image data is obtained.

  In a conventional image decoding apparatus, comparison between an input variable-length encoded bit string and a variable-length codeword and output of decoded data are normally performed in one machine cycle.

  Patent Document 1 matches the means for comparing the variable-length encoded bit string and the variable-length codeword with the means for detecting the code length of the matched variable-length codeword in order to perform higher-speed decoding processing. There is disclosed an image decoding apparatus including a plurality of stages for shifting a variable-length encoded bit string by a code length of a variable-length codeword. Thereby, a plurality of decoded data can be output in one machine cycle.

However, in the image decoding device disclosed in Patent Document 1, it is difficult to implement the above-described decoding process in a plurality of stages in one machine cycle, particularly when used as a device operating with a high-frequency clock. Furthermore, there is a problem that it is difficult to increase the processing speed without increasing the circuit area.
Japanese Patent Laid-Open No. 10-22832

  Therefore, an object of the present invention is to provide an image decoding apparatus that decodes variable length encoded image data at high speed while suppressing an increase in circuit area.

  The image decoding apparatus according to claim 1, wherein a first decoding unit that decodes a variable-length code bit sequence, a shift unit that shifts the variable-length code bit sequence, and a second decoding unit that decodes the variable-length code bit sequence shifted by the shift unit And an output unit that selects the decoding result of the first decoding unit and the decoding result of the second decoding unit and outputs the decoded data. The first decoding unit and the second decoding unit have different decoding reference data To decode the variable-length code bit string.

  According to this configuration, it is possible to realize an image decoding apparatus that can decode various types of variable length encoded image data at high speed.

  In the image decoding device according to claim 2, each of the first decoding unit and the second decoding unit includes a decoding reference unit, a comparator, and a decoder, and the decoding reference unit stores the decoding reference data, The comparator compares the variable length code bit string with the decoded reference data stored in the decoding reference unit to detect matching decoded reference data, and the decoder has a variable length based on the detected decoded reference data. The code bit string is decoded and the decoding result is output.

  According to this configuration, it is possible to provide an image decoding device that decodes a variable-length code bit string using the decoded reference data stored in the decoding reference unit.

  In the image decoding device according to claim 3, the decoding reference unit of the first decoding unit stores the first table as decoding reference data, and the decoding reference unit of the second decoding unit uses the second table as decoding reference data. Is stored.

  In the image decoding apparatus according to claim 4, the first table is a part of the variable length codeword table divided, and the second table is a remaining part of the variable length codeword table divided.

  According to these configurations, for example, in decoding of a variable-length code bit string compliant with the MPEG-2 system, a variable-length codeword of “RUN = 0” is used with a variable-length codeword of “RUN ≠ 0” as the first table. Is set as the second table, it is possible to realize an image decoding apparatus capable of decoding variable-length codewords at high speed.

  In the image decoding device according to the fifth aspect, the variable-length codeword table is divided based on one of the codeword type, the codeword length, and the number of codewords.

  According to this configuration, it is possible to realize the first table and the second table set according to different standards.

In the image decoding device according to claim 6, the first decoding unit performs the first stage decoding on the variable-length code bit string, and simultaneously outputs shift information regarding the bit length of the decoded variable-length code bit string, 8. The image according to claim 7, wherein the shift unit shifts the variable-length code bit sequence based on the shift information, and the second decoding unit performs second-stage decoding on the variable-length code bit sequence shifted by the shift unit. In the decoding apparatus, the first-stage decoding and the second-stage decoding are sequentially executed within the same decoding processing time.

  According to these configurations, it is possible to realize an image decoding apparatus capable of decoding a plurality of variable length codewords in one machine cycle.

  The image decoding apparatus according to claim 8, further comprising a third decoding unit that decodes the variable-length code bit string, wherein the third decoding unit uses the same decoded reference data as the decoded reference data used by the second decoding unit, The first stage decoding is performed on the variable-length code bit string, and at the same time, shift information regarding the bit length of the decoded variable-length code bit string is output, and the shift unit shifts the variable-length code bit string based on the shift information The second decoding unit performs second-stage decoding on the variable-length code bit string shifted by the shift unit, and the output unit outputs the decoding result of the first decoding unit, the decoding result of the second decoding unit, and the second decoding unit. The decoding result of 3 decoding part is selected, and decoding data is output.

  According to this configuration, it is possible to realize an image decoding device that can decode the variable length encoded image data at higher speed in cooperation with the second decoding unit and the output unit third decoding unit.

  In the image decoding device according to the ninth aspect, the first stage decoding and the second stage decoding are sequentially executed within the same decoding processing time.

  According to this configuration, a plurality of variable length codewords can be decoded in one machine cycle.

  The image decoding apparatus according to claim 10, wherein the third decoding unit includes a decoding reference unit, a comparator, and a decoder, and the decoding reference unit of the first decoding unit stores the first table as decoding reference data. The decoding reference unit of the second decoding unit and the decoding reference unit of the third decoding unit store the second table as decoding reference data.

  In the image decoding device according to claim 11, the first table is a part obtained by dividing the variable length codeword table, and the second table is a remaining part obtained by dividing the variable length codeword table.

  According to these configurations, for example, in decoding of a variable-length code bit string compliant with the MPEG-2 system, a variable-length codeword of “RUN = 0” is used with a variable-length codeword of “RUN ≠ 0” as the first table. Is set as the second table, it is possible to realize a high-speed image decoding apparatus that decodes a plurality of codes in one machine cycle for a variable-length codeword of “RUN = 0”.

  13. The image decoding device according to claim 12, wherein the decoding reference data is a variable-length codeword that conforms to at least one of the MPEG-2 system, MPEG-4 (Part 2) system, and MPEG-4 AVC system. It is a table.

  According to this configuration, it is possible to provide an image decoding device capable of decoding image data that has been variable-length encoded in accordance with the MPEG-2 system, the MPEG-4 (Part 2) system, and the MPEG-4 AVC system at high speed. .

  14. The image decoding apparatus according to claim 13, wherein the first decoding unit that decodes the first variable length code bit string, the second variable length code bit string that is input in parallel with the first variable length code bit string, and the first variable length code. A selection unit that selects one of the bit sequences, a shift unit that shifts the variable-length code bit sequence selected by the selection unit, a second decoding unit that decodes the variable-length code bit sequence shifted by the shift unit, An output unit that selects a decoding result of the decoding unit and a decoding result of the second decoding unit and outputs decoded data, and each of the first decoding unit and the second decoding unit stores decoding reference data The first decoding unit and the second decoding unit perform decoding using the decoding reference data stored in the respective decoding reference units.

  According to this configuration, a single variable-length code bit string is decoded in one machine cycle, or a plurality of variable-length code words are decoded, or two types of image data that are variable-length encoded in different ways are stored. At the same time, it is possible to provide an image decoding device that performs high-speed decoding.

  In the image decoding device according to claim 14, when the selection unit selects the first variable length code bit string, the first decoding unit performs the first stage decoding on the first variable length code bit string, and at the same time, Shift information relating to the bit length of the decoded first variable length code bit sequence is output, the shift unit shifts the first variable length code bit sequence based on the shift information, and the second decoding unit includes the first shift length shifted by the shift unit. When the first variable length code bit string is decoded in the second stage and the selection unit selects the second variable length code bit string, the first decoding unit decodes the first variable length code bit string and performs the second decoding. The unit decodes the second variable length code bit string.

  In the image decoding device according to the fifteenth aspect, the first stage decoding and the second stage decoding are sequentially executed within the same decoding processing time.

  According to these configurations, it is possible to realize an image decoding apparatus capable of decoding a plurality of variable length code words in one machine cycle for one variable length code bit string. In addition, it is possible to provide an image decoding apparatus that can simultaneously decode two types of image data variable-length encoded by different methods at high speed.

  According to the present invention, it is possible to provide an image decoding apparatus that decodes variable-length-encoded image data at high speed.

  First, the hierarchical structure of the code bit string used in the description of the embodiment of the present invention will be described.

  The hierarchical structure of the code bit string compliant with the MPEG-2 system (moving picture experts group moving picture coding system established in 1995: ISO / IEC 13818-2) is from the upper layer to the sequence layer, GOP (Group Of Picture). It is composed of a layer, a picture layer, a slice layer, a macroblock layer, and a block layer. The block is a minimum data processing unit in the MPEG-2 system, and is composed of 8 pixels × 8 lines of a luminance signal or a color difference signal.

  The block data is composed of 64 quantized DCT coefficients composed of one DC value and 63 AC values. The MPEG-2 variable length codeword is obtained by encoding the 64 quantized DCT coefficients, and is encoded by a combination of the number of consecutive zeros “RUN” and a non-zero coefficient value “LEVEL”.

  In addition, the hierarchical structure of the code bit string conforming to the MPEG-4 system (part 2) (moving image encoding system established in 1998: ISO / IEC 14496-2) is from the upper layer to VOS (Visual Object Sequence), VOL. (Video Object Layer) and VOP (Video Object Plane). The VOP includes a start code, a header, and a plurality of macro blocks. Further, the macro block is composed of four luminance component blocks and two color difference component blocks.

  The block data is composed of 64 quantized DCT coefficients composed of one DC value and 63 AC values. The MPEG-4 variable length codeword is obtained by encoding the 64 quantized DCT coefficients. The number of consecutive zeros “RUN”, the nonzero coefficient value “LEVEL”, and the subsequent nonzero coefficients. Encoding is performed with a combination of codes “LAST” indicating whether or not there is a numerical value.

  The present invention relates to decoding of the above-described variable length encoded block data. Hereinafter, embodiments of the present invention will be described with reference to the drawings.

(Embodiment 1)
FIG. 1 is a basic block diagram of an image decoding apparatus according to Embodiment 1 of the present invention. The image decoding apparatus according to this embodiment includes a first decoding unit 100, a shift unit 20, a second decoding unit 200, a third decoding unit 300, and an output unit 30. The first decoding unit 100, the second decoding unit 200, and the third decoding unit 300 each store decoding reference data used for decoding. Furthermore, the second decoding unit 200 and the third decoding unit 300 each store the same decoding reference data.

  The variable-length code bit string to be decoded is input from the input terminal 10 to the first decoding unit 100, the third decoding unit 300, and the shift unit 20.

  The first decoding unit 100 decodes the variable length code bit string using the decoded reference data stored therein, and outputs the decoding result to the output unit 30.

  Third decoding section 300 decodes the variable-length code bit sequence using the decoded reference data stored therein, and outputs the first-stage decoding result to output section 30. At the same time, the third decoding unit 300 creates shift information regarding the code length of the codeword obtained from the first-stage decoding result, and sends it to the shift unit 20.

  The shift unit 20 shifts the variable-length code bit string according to the shift information sent from the third decoding unit 300 and outputs the shifted variable-length code bit string to the second decoding unit 200. The second decoding unit 200 decodes the shifted variable-length code bit string and outputs the second-stage decoding result to the output unit 30.

  Usually, since the decoded reference data stored in the first decoding unit 100 and the decoded reference data stored in the second decoding unit 200 and the third decoding unit 300 are in a complementary relationship, the first decoding The decoding reference data stored in the unit 100 is not stored in the second decoding unit 200 and the third decoding unit 300. The reverse is also true. Therefore, when the variable-length code bit string is decoded by the first decoding unit 100, the same bit string is not decoded by the third decoding unit 300. When the variable length code bit string is not decoded by the first decoding unit 100, the variable length code bit string is decoded by the third decoding unit 300.

  Further, the variable length code bit sequence decoded by the third decoding unit 300 is shifted by the decoded bit sequence, and the shifted variable length code bit sequence is decoded by the second decoding unit 200. At this time, if there is data corresponding to the decoded reference data stored in the second decoding unit 200, the shifted variable length code bit string is immediately decoded by the second decoding unit 200 within the same machine cycle. If there is no corresponding data, it is decoded by the first decoding unit 100 in the next machine cycle.

  The output unit 30 selects an effective decoding result obtained by decoding the variable-length code bit string by any of the first decoding unit 100, the second decoding unit 200, and the third decoding unit 300, and outputs it as decoded data to the output terminal 90. Output to.

  Since the first-stage decoding by the third decoding unit 300 and the second-stage decoding by the second decoding unit 200 described above are executed within one machine cycle, the image decoding apparatus according to the present embodiment is a conventional technique. The variable length code bit string can be decoded at higher speed than the image decoding apparatus.

  A more specific example of the image decoding apparatus according to this embodiment will be described below with reference to FIG. The image decoding apparatus according to this embodiment decodes a variable-length code bit string encoded in accordance with the MPEG-2 system at high speed.

  FIG. 2 is a block diagram of the image decoding apparatus according to Embodiment 1 of the present invention. 2, the same components as those in FIG. 1 are denoted by the same reference numerals, and description thereof is omitted.

  As shown in FIG. 2, the first decoding unit 100 according to the present embodiment includes a comparator 110, a decoder 120, and a codeword table 130. The second decoding unit 200 includes a comparator 210, a decoder 220, and a codeword table 230. The third decoding unit 300 includes a comparator 310, a decoder 320, and a codeword table 330.

  The codeword table 130, the codeword table 230, and the codeword table 330 are an aggregate of a plurality of variable length codewords as decoding reference data. The codeword table 230 and the codeword table 330 store decoded reference data having the same contents.

  In the first decoding unit 100, the comparator 110 compares the input variable length code bit string with the variable length code word in the code word table 130, and searches for a matching variable length code word. The decoder 120 outputs a decoding result corresponding to the matched variable length codeword to the output unit 30. The operations of the second decoding unit 200 and the third decoding unit 300 are the same as the operation of the first decoding unit 100.

Now, a variable-length code bit string encoded according to the MPEG-2 system,
Bit string A "010110001010100 ..."
The operation of the image decoding apparatus according to this embodiment will be described by taking as an example the case of decoding.

  The codeword table 130 has only variable-length codewords “RUN ≠ 0” shown in FIG. That is, FIG. 13 is a codeword table of “RUN ≠ 0” of MPEG-2 in Embodiment 1 of the present invention. On the other hand, the codeword table 230 and the codeword table 330 have only the variable-length codeword of “RUN = 0” shown in FIG. That is, FIG. 14 is a codeword table of “RUN = 0” of MPEG-2 in Embodiment 1 of the present invention.

  It should be noted that the variable length codeword shown in FIG. 13 or FIG. 14 (for example, the codeword “0101”) is, more precisely, the code “s” representing the sign of the value “LEVEL” is written after the variable length codeword. (For example, code word “0101s”; “s = 0” or “s = 1”), but in the description of the present invention, the code “s” is omitted and a variable-length code word is described.

  The variable length code bit string A to be decoded is input to the first decoding unit 100, the third decoding unit 300, and the shift unit 20.

  In the first decoding unit 100, the comparator 110 compares the input variable length code bit string A with the codeword table 130. In the third decoding unit 300, the comparator 310 compares the input variable length code bit string A with the codeword table 330.

As a result of the comparison, the comparator 110 finds in the codeword table 130 a variable-length code word that matches the first bit string “0101” of the variable-length code bit string A (left row in FIG. 13, third row from the top). Comparator 110 outputs values “RUN = 2” and “LEVEL = 1” corresponding to the matched variable-length codeword to decoder 120. The decoder 120 outputs three DCT coefficients “0”, “0”, and “1” to the output unit 30 as decoding results. (Details of the conversion method for obtaining the DCT coefficient from the value “RUN” and the value “LEVEL” will be described later with reference to FIG. 11.)
At this time, since there is no corresponding variable-length codeword in the codeword table 230, the third decoding unit 300 does not output a decoding result. The second decoding unit 200 also does not output the decoding result.

  This completes the decoding of the first 4 bits of the variable-length code bit string A to be decoded.

Next, after the fifth bit of the variable length code bit string to be decoded,
Bit string B "001010100 ..."
The same decoding process is performed for.

  As a result of the comparison between the comparator 110 and the comparator 310, the comparator 310 finds a variable-length codeword that matches the bit string “00101” in the codeword table 330 (fourth line from the top in FIG. 14). Comparator 310 outputs values “RUN = 0” and “LEVEL = 3” corresponding to the matched variable-length codeword to decoder 220. The decoder 220 outputs one DCT coefficient “3” to the output unit 30 as the first-stage decoding result.

  At this time, since the variable length codeword corresponding to the variable length code bit string B is not in the codeword table 130, the first decoding unit 100 does not output the decoding result. The second decoding unit 200 also does not output the decoding result.

The third decoding unit 300 outputs the above-described first-stage decoding result, creates shift information (“shift amount is 5 bits”) regarding the decoded bit string, and outputs it to the shift unit 20. The shift unit 20 shifts the variable-length code bit string B by 5 bits based on the shift information,
Bit string C "0100 ..."
Is input to the second decoding unit 200.

  The comparator 210 finds a variable-length codeword that matches the bit string “0100” in the codeword table 230 (third line from the top in FIG. 14). Comparator 210 outputs values “RUN = 0” and “LEVEL = 2” corresponding to the matched variable-length codeword to decoder 220. The decoder 220 outputs one DCT coefficient “2” to the output unit 30 as the second-stage decoding result.

  The output unit 30 outputs DCT coefficients “0”, “0”, “1”, “3”, “3”, which are decoding results output from the first decoding unit 100, the second decoding unit 200, and the third decoding unit 300. 2 ”is output to the output terminal 90 as the decoded data of the bit string A.

  FIG. 11 is a flowchart of the image decoding apparatus according to Embodiment 1 of the present invention. The operation of the image decoding apparatus according to this embodiment will be described with reference to FIG. The codeword table 130 shown in FIG. 2 is an MPEG-2 “RUN ≠ 0” codeword table shown in FIG. 13, and the codeword table 230 and the codeword table 330 are the MPEG-2 codeword table shown in FIG. 14. It is assumed that the code word table is “RUN = 0”.

  Decoding processing is started in step S10 of FIG.

  In step S11, when any one of the first decoding unit 100, the second decoding unit 200, and the third decoding unit 300 illustrated in FIG. 2 decodes one code of the variable length code bit string, the number of zero data “RUN” is obtained. Subsequently, the value “LEVEL” of the non-zero data, or the value “EOB” indicating that there is no non-zero data thereafter is obtained.

  In step S12, it is determined whether or not the decrypted value is the value “EOB”. If the determination result is “Yes”, the control proceeds to step S16. If the determination result is “No”, the control proceeds to step S13.

  In step S13, it is determined whether or not the decrypted value “RUN” is a value “0”. If the determination result is “Yes” (“RUN = 0”), the control proceeds to step S15. If the determination result is “No” (“RUN ≠ 0”), the control proceeds to step S14.

  In step S <b> 14, DCT coefficients “0” are output by the number of values “RUN”.

  In step S15, is output as a DCT coefficient, and control is returned to step S11, and the same decoding is performed for the bit string next to the variable-length code bit string.

  The finally decoded value becomes the value “EOB”, and in step S12, the control shifts to step S16.

  In step S16, DCT coefficients “0” are output for the number of decoded DCT coefficients that is less than 64, and the control shifts to step S17 to complete the decoding process for one block.

  According to the conversion rule as described above, the above-described DCT coefficient can be calculated from the value “RUN” and the value “LEVEL”.

  As described above, the image decoding apparatus according to the present embodiment classifies MPEG-2 variable-length codewords into “RUN = 0” and “RUN ≠ 0”, prepares them separately, and “RUN = 0”. ”Can be decoded at a high speed by using the codeword table 230 and the codeword table 330. That is, the image decoding apparatus according to the present embodiment can decode (value “RUN” +1) DCT coefficients in the first decoding unit 100 in the case of a variable-length codeword of “RUN ≠ 0” in one machine cycle. When two variable-length codewords with “RUN = 0” continue, the third decoding unit 300 and the second decoding unit 200 can decode two DCT coefficients. In addition, when the variable length codeword “RUN = 0” follows the variable length codeword “RUN = 0”, the image decoding apparatus according to the present embodiment decodes one DCT coefficient in the third decoding unit 300. The first decoding unit 100 can always decode a plurality of DCT coefficients in the next machine cycle.

  According to the image decoding apparatus of this embodiment, the codeword table 130 and the codeword table 230 (or the codeword table 330) do not need to store all the variable-length codewords, and are complementary to each other with a small amount of variable. Since a long code word only needs to be stored, the code word table can be designed small. Furthermore, since the first stage decoding of the third decoding unit 300 and the second stage decoding of the second decoding unit 200 can be executed within one machine cycle, the speed of the decoding process can be increased. As described above, according to the image decoding apparatus of the present embodiment, it is possible to increase the speed of the decoding process while suppressing an increase in circuit area.

(Embodiment 2)
The image decoding apparatus according to Embodiment 2 of the present invention decodes a variable-length code bit string encoded according to the MPEG-4 system at high speed.

  The block diagram of the image decoding apparatus of the present embodiment has the same configuration as the image decoding apparatus of the first embodiment of the present invention shown in FIG. However, the codeword table 130 of FIG. 2 is a variable length codeword table of “RUN ≠ 0” of MPEG-4 shown in FIG. 15, and the codeword table 230 and the codeword table 330 are shown in FIG. It is a variable length codeword table of “RUN = 0” of MPEG-4.

  The operation of the image decoding apparatus according to the present embodiment is the same as that of the image decoding apparatus according to the first embodiment of the present invention except for the following points, and a detailed description thereof will be omitted.

  That is, when the comparator 110, the comparator 210, and the comparator 310 find a variable length code word that matches the variable length code bit string, the values “LAST”, “RUN”, and “ LEVEL "is output to the decoder 120, the decoder 220, and the decoder 320, respectively. The decoder 120, the decoder 220, and the decoder 320 decode the DCT coefficient based on the values “LAST”, “RUN”, and “LEVEL”.

  FIG. 12 is a flowchart of the image decoding apparatus according to Embodiment 2 of the present invention. The operation of the image decoding apparatus according to this embodiment will be described with reference to FIG. The codeword table 130 shown in FIG. 2 is an MPEG-4 “RUN ≠ 0” codeword table shown in FIG. 15. The codeword table 230 and the codeword table 330 are “ It is assumed that the code word table is “RUN = 0”.

  Decoding processing is started in step S20 in FIG.

  In step S21, when the first decoding unit 100, the second decoding unit 200, and the third decoding unit 300 shown in FIG. 2 decode one code from the variable-length code bit string, a value “RUN” indicating the number of zero data is set. Subsequently, the value “LEVEL” of the non-zero data and the value “LAST” indicating that there is no non-zero data thereafter are obtained.

  In step S22, it is determined whether or not the decoded value “RUN” is “RUN = 0”. If the determination result is “Yes” (“RUN = 0”), the control proceeds to step S24. If the determination result is “No” (“RUN ≠ 0”), the control proceeds to step S23.

  In step S <b> 23, DCT coefficients “0” are output by the number “RUN”.

  In step S24, the value “LEVEL” is output as a DCT coefficient.

  In step S25, it is determined whether or not the decrypted value “LAST” is “LAST = 1”. If the determination result is “Yes” (“LAST = 1”), the control proceeds to step S26. If the determination result is “No” (“LAST ≠ 1”), control proceeds to step S21, and steps S21 to S25 are repeated to perform similar decoding for the next bit string after the variable-length code bit string. .

  In step S26, DCT coefficients “0” are output for the number of decoded DCT coefficients that is less than 64, and control proceeds to step S27, where the decoding process for one block is completed.

  As described above, the image decoding apparatus of this embodiment classifies MPEG-4 variable length codewords into “RUN = 0” and “RUN ≠ 0” codewords, prepares them separately, and “RUN” = 0 ”variable length codeword is used as the codeword table 130, and the variable length codeword“ RUN = 0 ”is used as the codeword table 230 and the codeword table 330, so that the variable length code bit string can be decoded at high speed. Can do.

  That is, similarly to Embodiment 1 of the present invention, in the case of a variable length codeword of “RUN ≠ 0” in one machine cycle, the image decoding apparatus of the present embodiment uses (value “ RUN ”+1) DCT coefficients can be decoded. When two variable-length codewords with“ RUN = 0 ”continue, the third decoding unit 300 and the second decoding unit 200 can decode two DCT coefficients. . In addition, when the variable length codeword “RUN = 0” follows the variable length codeword “RUN = 0”, the image decoding apparatus according to the present embodiment decodes one DCT coefficient in the third decoding unit 300. The first decoding unit 100 can always decode a plurality of DCT coefficients in the next machine cycle.

  According to the image decoding apparatus of the present embodiment, it is possible to increase the speed of decoding processing while suppressing an increase in circuit area.

(Embodiment 3)
FIG. 3 is a block diagram of an image decoding apparatus according to Embodiment 3 of the present invention. In FIG. 3, the same components as those of FIG.

  As illustrated in FIG. 3, the image decoding apparatus according to the present embodiment includes a first decoding unit 100, a second decoding unit 200, a shift unit 20, and an output unit 30. The first decoding unit 100 includes a comparator 110, a decoder 120, a codeword table 131, a codeword table 132, and a selector 140. Similarly, the second decoding unit 200 includes a comparator 210, a decoder 220, a codeword table 231, a codeword table 232, and a selector 240.

  The first decoding unit 100 generates shift information according to the input variable-length code bit string and sends it to the shift unit 20. The shift unit 20 shifts the variable-length code bit string in accordance with this shift information and sends it to the second decoding unit 200. The second decoding unit 200 decodes the shifted variable length code bit string.

  The image decoding apparatus according to the present embodiment is devised in the codeword table. The device will be described below.

  MPEG-2 variable-length codewords are composed of codewords with a maximum codeword length of 16 bits. On the other hand, the variable length codeword of MPEG-4 is composed of codewords having a maximum codeword length of 12 bits. Therefore, if the MPEG-2 variable-length codeword can be reconfigured to have a maximum codeword length of 12 bits, the first decoding unit 100 and the second decoding unit 200 can be configured as a decoding unit having 12 processing bits. . Then, it is possible to realize an image decoding apparatus that efficiently decodes the MEGP-2 variable length code bit string and the MPEG-4 variable length code bit string in the same manner.

  The image decoding apparatus of the present embodiment has been devised based on the above consideration. As shown in FIG. 17, the codeword table 131 is a codeword table made up of codewords having a codeword length of 12 bits or less among the MPEG-2 variable length codewords. The codeword table 231 is shown in FIG. As shown in FIG. 2, the codeword table is composed of codewords having a codeword length of 13 bits or more among MPEG-2 variable-length codewords. The bit string “0000 0000” is added to the codeword table of FIG. 17 to quote a codeword having a codeword length of 13 bits or more, and the codeword table of FIG. 18 has a codeword length of 13 bits. The codeword table is a codeword table composed of lower bit strings of 9 bits and after, with the upper 8 bits “0000 0000” omitted. Accordingly, among MPEG-2 variable-length codewords, codewords having a codeword length of 12 bits or less are decoded using only the codeword table 131, and codewords having a codeword length of 13 bits or more are codewords. Decoding is performed using the table 131 and the codeword table 231.

  The codeword table 132 and the codeword table 232 are both codeword tables including all MPEG-4 variable length codewords as shown in FIG.

  A case where a variable-length code bit string compliant with MPEG-2 is decoded will be described. In this case, the selector 140 selects the codeword table 131, and the selector 240 selects the codeword table 231.

  When the upper 8 bits of the input variable length code bit string do not have the bit string “0000 0000”, the code word to be decoded is a variable length code word having a maximum word length of 12 bits or less. Are always included in the codeword table 131 shown in FIG. Therefore, in this case, the comparator 110 outputs the values “RUN” and “LEVEL” corresponding to the matched variable length codeword. The decoder 120 decodes the DCT coefficient based on the values “RUN” and “LEVEL” output from the comparator 110 and outputs the result to the output unit 30 as a decoding result.

  When the upper 8 bits of the input variable-length code bit string have the bit string “0000 0000”, the code word to be decoded is a variable-length code word having a maximum word length of 13 bits or more. Are always included in the codeword table 231 shown in FIG. In this case, the comparator 110 retrieves the bit string “0000 0000” and outputs the value “NEXT” to the shift unit 20 as shift information. The shift unit 20 shifts the input variable length code bit string by 8 bits, and then outputs it to the second decoding unit 200. The comparator 210 of the second decoding unit 200 searches the codeword table 231 for the shifted variable-length code bit string (bit string after 9 bits of the original variable-length code bit string), Corresponding values “RUN” and “LEVEL” are output. The decoder 220 decodes the DCT coefficient based on the values “RUN” and “LEVEL” output from the comparator 210, and outputs the result to the output unit 30 as a decoding result.

  As described above, the image decoding apparatus according to the present embodiment is a variable-length codeword compliant with the MPEG-2 system, and those having a maximum word length of 12 bits or less are decoded by the first decoding unit 100, and the maximum word length 13 A bit or more is decoded using the first decoding unit 100 and the second decoding unit 200.

  Next, a case where a variable length code bit string compliant with MPEG-4 is decoded will be described. In this case, the selector 140 selects the codeword table 132 and the selector 240 selects the codeword table 232. The codeword table 132 and the codeword table 232 are the same MPEG-4 variable length codeword table shown in FIG.

  The variable-length code bit string to be decoded is input from the input terminal 10 to the first decoding unit 100 and the shift unit 20.

  For the first bit string of the input variable length code bit string, the comparator 110 searches the code word table 132 and outputs the values “LAST”, “RUN”, and “LEVEL” corresponding to the matched code word. The decoder 120 decodes the DCT coefficients based on the values “LAST”, “RUN”, and “LEVEL” output from the comparator 110, and outputs them to the output unit 30 as the first-stage decoding results. At the same time, the first decoding unit 100 creates the decoded bit length of the input variable length code bit string as shift information, and notifies the shift unit 20 of the decoded bit length.

  The shift unit 20 shifts the input variable-length code bit string based on the notified shift information and inputs it to the second decoding unit 200. The second decoding unit 200 searches the codeword table 232, decodes the next part of the variable length code bit string decoded by the first decoding unit 100, and outputs the decoded result as the second-stage decoding result.

  As described above, the image decoding apparatus according to the present embodiment can output a decoding result twice in one machine cycle with respect to a variable-length code bit string compliant with the MPEG-4 system, so that high-speed decoding can be performed.

In the image decoding apparatus according to the present embodiment, a 12-bit decoding unit can be realized by reconfiguring the MPEG-2 variable-length codeword into a codeword table having a maximum word length of 12 bits. As a result, according to the image decoding apparatus of the present embodiment, the variable length code bit string compliant with the MPEG-2 system and the variable length code bit string compliant with the MPEG-4 system can be decoded equally and efficiently.
(Embodiment 4)
FIG. 4 is a block diagram of an image decoding apparatus according to Embodiment 4 of the present invention. 4, the same components as those in FIG. 3 are denoted by the same reference numerals, and description thereof is omitted.

  The image decoding apparatus of the present embodiment shown in FIG. 4 is obtained by adding a selector 40 to the image decoding apparatus of the third embodiment of the present invention shown in FIG. The input terminal 10 and the output of the shift unit 20 are switched.

  The MPEG-2 variable length codeword is composed of 114 codewords. On the other hand, the variable length codeword of MPEG-4 is composed of 103 codewords. In the image decoding apparatus of the present embodiment, the number of code words of the MPEG-2 variable length code word in the code word table 131 is equal to the number of code words of the MPEG-4 variable length code word in the code word table 132. Two variable length codewords are divided.

  That is, the codeword table 131 is a variable length codeword table (number of codewords = 103) in the first half of MPEG-2 shown in FIG. 20, and the codeword table 231 is a variable in the latter half of MPEG-2 shown in FIG. It is a long codeword table (number of codewords = 11).

  The codeword table 132 and the codeword table 232 are both codeword tables (number of codewords = 103) including all variable length codewords of MPEG-4 shown in FIG.

  Thus, by configuring the code word table 131 and the code word table 132, the logic depth of the circuit of the comparator 110 can be suppressed, and as a result, the search control algorithm is simplified. In addition, since the codeword table 131 and the codeword table 132 can be configured with the same circuit configuration, there is an advantage that the design is simplified.

  The operation of the image decoding apparatus according to this embodiment will be described below with reference to FIG.

  First, a case where a variable-length code bit string compliant with MPEG-2 is decoded will be described. In this case, the selector 140 and the selector 240 select the codeword table 131 and the codeword table 231 respectively. The selector 40 selects a variable length code bit string input from the input terminal 10.

  The input variable length code bit string is decoded in the first decoding unit 100 with reference to the code word table 131. If there is a matching variable length code word, the decoding result is output from the decoder 120 to the output unit 30. Is output. At the same time, the input variable length code bit string is decoded in the second decoding unit 200 with reference to the code word table 231. If there is a matching variable length code word, the decoding result is output from the decoder 220 to the output unit. 30 is output. The input MPEG-2 variable-length code bit string is always decoded by the first decoding unit 100 or the second decoding unit 200, and the decoding result is output to the output unit 30.

  Next, a case where a variable length code bit string compliant with MPEG-4 is decoded will be described. In this case, the selector 140 and the selector 240 select the codeword table 132 and the codeword table 232, respectively. The selector 40 selects the output of the shift unit 20. As described above, the codeword table 132 and the codeword table 232 are the same MPEG-4 variable-length codeword table shown in FIG.

  The variable-length code bit string to be decoded is input from the input terminal 10 to the first decoding unit 100 and the shift unit 20.

  The first decoding unit 100 performs decoding on the first bit string of the input variable length code bit string with reference to the codeword table 132. The decoder 120 outputs the first-stage decoding result to the output unit 30. At the same time, the first decoding unit 100 creates, as shift information, the codeword length of the decoded variable-length codeword from the input variable-length code bit string, and notifies the shift unit 20 of the codeword length.

  The shift unit 20 shifts the input variable-length code bit string based on the notified shift information and inputs it to the second decoding unit 200. The second decoding unit 200 refers to the codeword table 232 and decodes the shifted variable-length code bit sequence (that is, the next part of the variable-length code bit sequence decoded by the first decoding unit 100). The decoder 220 outputs the second-stage decoding result to the output unit 30.

  As described above, the image decoding apparatus according to the present embodiment can output a decoding result twice in one machine cycle with respect to a variable-length code bit string compliant with the MPEG-4 system, so that high-speed decoding can be performed.

(Embodiment 5)
FIG. 5 is a block diagram of an image decoding apparatus according to Embodiment 5 of the present invention. In FIG. 5, the same components as those of FIG.

  As shown in FIG. 5, the image decoding apparatus of the present embodiment includes a first decoding unit 100, a second decoding unit 200, a selector 40 that switches inputs of the second decoding unit 200, and a shift unit that shifts one input of the selector 40. 20 and an output unit 30. The first decoding unit 100 includes a comparator 110, a decoder 120, and a codeword table storage device 150. Similarly, the second decoding unit 200 includes a comparator 210, a decoder 220, and a codeword table storage device 250.

  The codeword table storage device 150 and the codeword table storage device 250 are storage devices that can write a codeword table according to the encoding method of the variable-length code bit string to be decoded as needed.

  The codeword table handled by the first decoding unit 100 and the second decoding unit 200 of this embodiment has a maximum number of codewords of 103 and a maximum number of bits of each codeword of 12 bits in accordance with the MPEG-4 variable length codeword. .

  When decoding a variable-length code bit string conforming to MPEG-2, a codeword table having a maximum word length of 12 bits or less of MPEG-2 shown in FIG. Can be read. A codeword table (only the lower 8 bits) having a maximum word length of 13 bits or more of MPEG-2 shown in FIG. 18 can be written into the codeword table storage device 250, and the comparator 210 can read it out.

  The operation when the image decoding apparatus according to the present embodiment decodes a variable-length code bit string compliant with MPEG-2 will be described below.

  The selector 40 selects the output of the shift unit 20. If the upper 8 bits of the input variable-length code bit string do not have the bit string “0000 0000”, the code word to be decoded is a variable-length code word having a maximum word length of 12 bits or less, and the code word It is stored in the table storage device 150. Therefore, in this case, the comparator 110 outputs the values “RUN” and “LEVEL” corresponding to the matched variable length codeword. The decoder 120 decodes the DCT coefficient based on the values “RUN” and “LEVEL” output from the comparator 110 and outputs the result to the output unit 30 as a decoding result.

  If the upper 8 bits of the input variable-length code bit string have the bit string “0000 0000”, the code word to be decoded is a variable-length code word having a maximum word length of 13 bits or more, Decoding is performed using the decoding unit 100 and the second decoding unit 200. That is, in this case, the comparator 110 searches the codeword table storage device 150 for the bit string “0000 0000” and outputs the value “NEXT” to the shift unit 20 as shift information. The shift unit 20 shifts the input variable length code bit string by 8 bits and outputs the result to the second decoding unit 200. The comparator 210 of the second decoding unit 200 searches the codeword table storage device 250 for the shifted variable length code bit string, and outputs the values “RUN” and “LEVEL” corresponding to the matched variable length codeword. . The decoder 220 decodes the DCT coefficient based on the values “RUN” and “LEVEL” output from the comparator 210, and outputs the result to the output unit 30 as a decoding result.

  As described above, the image decoding apparatus according to the present embodiment is a variable-length codeword compliant with the MPEG-2 system, and those having a maximum word length of 12 bits or less are decoded by the first decoding unit 100, and the maximum word length 13 A bit or more is decoded using the first decoding unit 100 and the second decoding unit 200.

  Next, a case where the image decoding apparatus according to the present embodiment decodes a variable-length code bit string compliant with MPEG-4 will be described. In this case, the same MPEG-4 codeword table shown in FIG. 19 is written in the codeword table storage device 150 and the codeword table storage device 250, and the comparator 110 and the comparator 210 read them out. The selector 40 selects the variable length code bit string input to the input terminal 10.

  The variable-length code bit string to be decoded is input from the input terminal 10 to the first decoding unit 100 and the shift unit 20.

  For the first bit string of the input variable-length code bit string, the comparator 110 searches the code word table storage device 150 and outputs the values “LAST”, “RUN”, and “LEVEL” corresponding to the matched code word. . The decoder 120 decodes the DCT coefficients based on the values “LAST”, “RUN”, and “LEVEL” output from the comparator 110, and outputs them to the output unit 30 as the first-stage decoding results. At the same time, the first decoding unit 100 creates shift information related to the codeword length of the decoded variable length codeword from the input variable length code bit string, and notifies the shift unit 20 of the shift information.

  The shift unit 20 shifts the input variable-length code bit string based on the notified shift information and inputs it to the second decoding unit 200. The second decoding unit 200 searches the codeword table storage device 250 to decode the shifted variable-length code bit sequence (that is, the next portion of the variable-length code bit sequence decoded by the first decoding unit 100). Output as a two-stage decoding result.

  As described above, the image decoding apparatus according to the present embodiment can output a decoding result twice in one machine cycle with respect to a variable-length code bit string compliant with the MPEG-4 system, so that high-speed decoding can be performed.

  In the image decoding apparatus of the present embodiment described above, when decoding a variable-length code bit string compliant with MPEG-2, the variable-length codeword table of FIG. The variable length codeword table of FIG. 18 was stored in the codeword table storage device 250. When decoding a variable-length code bit string compliant with MPEG-4, the variable-length code word shown in FIG. 19 having a maximum bit length of 12 bits is stored in the code word table storage device 150 and the code word table storage device 250. did.

  In the image decoding apparatus according to the present embodiment, when decoding a variable-length code bit string compliant with MPEG-2, the variable-length codeword in the first half of MPEG-2 shown in FIG. When the variable length codeword of the latter half of MPEG-2 shown in FIG. 21 is stored in the codeword table storage device 250 and stored in the table storage device 150, and a variable length code bit string compliant with MPEG-4 is decoded, FIG. 19 is stored in the codeword table storage device 150 and the codeword table storage device 250, the image decoding apparatus according to the present embodiment is configured as shown in FIG. It operates as a decoding apparatus having the same function as that of the fourth embodiment of the present invention shown.

  That is, when decoding a variable length code bit string compliant with MPEG-2, the selector 40 selects a variable length code bit string input from the input terminal 10, and the input variable length code bit string is the first decoding unit 100. Or the second decoding unit 200, and the decoding result is output to the output unit 30.

  When decoding a variable length code bit string compliant with MPEG-4, the selector 40 selects the output of the shift unit 20, and the input variable length code bit string is obtained by the first decoding unit 100 as a result of the first stage decoding. The second decoding unit 200 outputs the second-stage decoding result to the output unit 30 for the variable-length code bit sequence that is output to the output unit 30 and based on the shift information from the first decoding unit 100. The That is, two stages of decoding can be performed in one machine cycle.

  As described above, the image decoding apparatus according to the present embodiment takes various decoding forms by changing the format of the variable-length codeword table stored in the codeword table storage apparatus 150 and the codeword table storage apparatus 250. be able to.

(Embodiment 6)
FIG. 6 is a block diagram of an image decoding apparatus according to Embodiment 6 of the present invention. In FIG. 6, the same components as those of FIG.

  The image decoding apparatus according to this embodiment includes two input terminals 10 and 11, a first decoding unit 100, a second decoding unit 200, a selector 40, a selector 50, a shift unit 20, and an output unit 30. The first decoding unit 100 includes a comparator 110, a decoder 120, and a codeword table 130. The second decoding unit 200 includes a comparator 210, a decoder 220, and a codeword table 230.

  A first variable length code bit string is input to the input terminal 10 and a second variable length code bit string is input to the input terminal 11.

  The operation of the image decoding apparatus according to this embodiment will be described below in two cases.

  (Case 1) The first variable length code bit string and the second variable length code bit string are input in parallel.

  The selector 50 selects the second variable length code bit string input from the input terminal 11, and the selector 40 selects the output of the selector 50. The code word table 130 is a variable length code word table (for example, all MPEG-2 variable length code words combining FIG. 13 and FIG. 14) of an encoding system to which the first variable length code bit string is compliant. The codeword table 230 is set with a variable length codeword table (for example, all of the MPEG-4 variable length codewords in FIG. 19) of an encoding scheme in which the second variable length code bit string is compliant. ing.

  By setting in this way, the image decoding apparatus of the present embodiment decodes the first variable length code bit string compliant with MPEG-2, which is input to the input terminal 10, by the first decoding unit 100, and The input second variable length code bit string compliant with MPEG-4 can be decoded by the second decoding unit 200. That is, two variable length code bit strings encoded by different image compression methods can be simultaneously decoded in parallel.

  Alternatively, if the same variable-length codeword table (for example, all of the MPEG-4 variable-length codewords in FIG. 19) is set in the codeword table 130 and the codeword table 230, the image decoding apparatus of this embodiment can input The first variable length code bit string compliant with MPEG-4 inputted to the terminal 10 is decoded by the first decoding unit 100 and the second variable length code bit string compliant with MPEG-4 inputted to the input terminal 11. Can be decoded by the second decoding unit 200. That is, two variable length code bit strings encoded by the same image compression method can be simultaneously decoded in parallel.

  (Case 2) When only the first variable length code bit string is input.

  The selector 50 selects the first variable length code bit string input from the input terminal 10, and the selector 40 selects the output of the shift unit 20. The codeword table 130 and the codeword table 230 are set with variable length codeword tables (for example, all of the MPEG-4 variable length codewords in FIG. 19) of an encoding scheme in which the first variable length code bit string is compliant. ing.

  By setting in this way, in the image decoding apparatus of the present embodiment, the first decoding unit 100 causes the first variable length codeword of the first variable length code bit string that is input to the input terminal 10 and conforms to MPEG-4. And the first stage decoding result is output to the output unit 30. At the same time, the first decoding unit 100 outputs shift information related to the codeword length of the decoded variable length codeword to the shift unit 20. Based on the shift information, the shift unit 20 shifts the input first variable length code bit string that conforms to MPEG-4, and sends it to the second decoding unit 200 via the selector 40. Second decoding section 200 performs decoding on the shifted first variable length code bit string, and outputs the second stage decoding result to output section 30.

  As described above, the image decoding apparatus according to the present embodiment is configured so that (a) two variable length code bit strings of different encoding schemes are set according to the settings of the selector 40 and the selector 50 and the settings of the codeword table 130 and the codeword table 230. Select one of parallel decoding, (b) parallel decoding of two variable-length code bit strings using the same encoding method, and (c) two codeword decoding within one machine cycle of one variable-length code bit string. it can.

(Embodiment 7)
FIG. 7 is a block diagram of an image decoding apparatus according to Embodiment 7 of the present invention. In FIG. 7, the same components as those in FIG. 6 are denoted by the same reference numerals, and the description thereof is omitted.

  The configuration of the first decoding unit 100 and the second decoding unit 200 is different from that of the image decoding device according to the sixth embodiment of the present invention shown in FIG. That is, the first decoding unit 100 of the present embodiment includes a comparator 110, a decoder 120, a codeword table 131, a codeword table 132, and a selector 140, and the second decoding unit 200 includes a comparator 210, a decoding , A codeword table 231, a codeword table 232, and a selector 240.

  In the image decoding apparatus of the present embodiment, the codeword table 131 and the codeword table 231 are a variable length codeword table (for example, MPEG-2 variable length codeword combining FIG. 13 and FIG. The codeword table 132 and the codeword table 232 are set to the variable-length codeword table of the second encoding method (for example, all of the MPEG-4 variable-length codewords in FIG. 19). Has been.

  Hereinafter, the operation of the image decoding apparatus according to this embodiment will be described on the assumption that the first encoding method is the MPEG-2 method and the second encoding method is the MPEG-4 method.

  (Case 1) The case where the first variable length code bit string of the first encoding method and the second variable length code bit string of the second encoding method are inputted in parallel.

  The selector 50 selects the second variable length code bit string input from the input terminal 11, and the selector 40 is set to select the output of the selector 50. The selector 140 selects the codeword table 131 and the selector 240 is set to select the codeword table 232.

  Under such a setting, the first variable length code bit string of the first encoding method (MPEG-2 method) input to the input terminal 10 is referred to the codeword table 131 in the first decoding unit 100. Decoding is performed, and the decoding result is output to the output unit 30. At the same time, the second variable length code bit string of the second encoding method (MPEG-4 method) input to the input terminal 11 is decoded by the second decoding unit 200 with reference to the codeword table 232, and the decoding result is obtained. Are output to the output unit 30. That is, two variable length code bit strings encoded by different encoding methods can be simultaneously decoded in parallel.

  (Case 2) A case where the first variable length code bit string of the first encoding method and the second variable length code bit sequence of the first encoding method are inputted in parallel.

  The selector 50 selects the second variable length code bit string input from the input terminal 11, and the selector 40 is set to select the output of the selector 50. The selector 140 selects the codeword table 131 and the selector 240 is set to select the codeword table 231.

  Under such a setting, the first variable length code bit string of the first encoding method (MPEG-2 method) input to the input terminal 10 is referred to the codeword table 131 in the first decoding unit 100. Decoding is performed, and the decoding result is output to the output unit 30. At the same time, the second variable length code bit string of the same encoding method input to the input terminal 11 is decoded by the second decoding unit 200 with reference to the codeword table 231, and the decoding result is output to the output unit 30. The That is, two variable length code bit strings encoded by the same encoding method can be simultaneously decoded in parallel.

  When the first variable length code bit string of the second encoding method and the second variable length code bit string of the second encoding method are input in parallel, the selector 140 selects the code word table 132 and selects the selector 240. If the codeword table 232 is set to be selected, two variable-length code bit strings encoded by the same encoding method can be simultaneously decoded in parallel.

  (Case 3) When only the first variable length code bit string is input.

  The selector 50 selects the first variable length code bit string input from the input terminal 10, and the selector 40 selects the output of the shift unit 20. The selector 140 and the selector 240 select a variable-length codeword table of an encoding scheme that the input first variable-length code bit string is compliant with. That is, when the first variable length code bit string conforms to the first encoding method, the selector 140 selects the codeword table 131 and the selector 240 selects the codeword table 231. When the first variable length code bit string conforms to the second encoding method, the selector 140 selects the codeword table 132 and the selector 240 selects the codeword table 232.

  With this setting, in the image decoding apparatus according to the present embodiment, the first decoding unit 100 performs decoding on the first variable length codeword of the first variable length code bit string input to the input terminal 10. The first-stage decoding result is output to the output unit 30. At the same time, the first decoding unit 100 outputs shift information related to the codeword length of the decoded variable length codeword to the shift unit 20. The shift unit 20 shifts the input first variable length code bit string based on the shift information, and sends it to the second decoding unit 200 via the selector 40. Second decoding section 200 performs decoding on the shifted first variable length code bit string, and outputs the second stage decoding result to output section 30.

  As described above, the image decoding apparatus according to the present embodiment can perform (a) parallel decoding of two variable-length code bit strings using different encoding schemes according to the settings of the selector 40 and the selector 50 and the settings of the selector 140 and the selector 240. It is possible to select and execute either b) parallel decoding of two variable-length code bit strings using the same encoding method, or (c) two-codeword decoding within one machine cycle of one variable-length code bit string. Also, the image decoding apparatus according to the present embodiment is highly convenient because the codeword table can be switched at the time of decoding in accordance with an encoding method to which the input variable-length code bit string is based.

(Embodiment 8)
FIG. 8 is a block diagram of an image decoding apparatus according to Embodiment 8 of the present invention. 8, the same components as those in FIG. 7 are denoted by the same reference numerals, and the description thereof is omitted.

  The configuration of the first decoding unit 100 and the second decoding unit 200 is different from that of the image decoding device according to the seventh embodiment of the present invention shown in FIG. That is, the first decoding unit 100 of the present embodiment includes a comparator 110, a decoder 120, and a writable codeword table storage device 150, and the second decoding unit 200 includes a comparator 210, a decoder 220, And a writable codeword table storage device 250.

  In the image decoding apparatus according to the present embodiment, a first variable length code bit string conforming to the first encoding scheme is input to the input terminal 10 and a second variable length code bit string conforming to the second encoding scheme is input to the input terminal 11. Assume that

  Further, it is assumed that the first encoding method is the MPEG-2 method and the second encoding method is the MPEG-4 method.

  The operation of the image decoding apparatus according to this embodiment will be described below.

  (Case 1) The case where the first variable length code bit string of the first encoding method and the second variable length code bit string of the second encoding method are inputted in parallel.

  The selector 50 selects the second variable length code bit string input from the input terminal 11, and the selector 40 is set to select the output of the selector 50. The codeword table storage device 150 stores a variable-length codeword table (for example, all MPEG-2 variable-length codewords combining FIG. 13 and FIG. 14) of the first encoding method, and stores the codeword table. The apparatus 250 stores a variable-length codeword table (for example, all of the MPEG-4 variable-length codewords in FIG. 19) of the second encoding method.

  Under such a setting, the first variable length code bit string of the first encoding method (MPEG-2 method) input to the input terminal 10 is referred to the codeword table storage device 150 in the first decoding unit 100. Then, the decoding result is output to the output unit 30. At the same time, the second variable length code bit string of the second encoding method (MPEG-4 method) input to the input terminal 11 is decoded by the second decoding unit 200 with reference to the codeword table storage device 250 and decoded. The result is output to the output unit 30. That is, two variable length code bit strings encoded by different encoding methods can be simultaneously decoded in parallel.

  (Case 2) A case where the first variable length code bit string of the first encoding method and the second variable length code bit sequence of the first encoding method are inputted in parallel.

  The selector 50 selects the second variable length code bit string input from the input terminal 11, and the selector 40 is set to select the output of the selector 50. The codeword table storage device 150 and the codeword table storage device 250 store the variable length codeword table of the first encoding method (for example, all of the MPEG-2 variable length codewords combining FIG. 13 and FIG. 14). Storing.

  Under such a setting, the first variable length code bit string of the first encoding method (MPEG-2 method) input to the input terminal 10 is referred to the codeword table storage device 150 in the first decoding unit 100. Then, the decoding result is output to the output unit 30. At the same time, the second variable length code bit string of the same encoding method input to the input terminal 11 is decoded by the second decoding unit 200 with reference to the codeword table storage device 250, and the decoding result is output to the output unit 30. Is output. That is, two variable length code bit strings encoded by the same encoding method can be simultaneously decoded in parallel.

  When the first variable length code bit string of the second coding method and the second variable length code bit string of the second coding method are input in parallel, the code word table storage device 150 and the code word table storage device 250 If the variable-length codeword table (for example, all of the MPEG-4 variable-length codewords in FIG. 19) of the second encoding method is stored, the two encoded by the same encoding method are similarly used. Variable length code bit strings can be simultaneously decoded in parallel.

  (Case 3) When only the first variable length code bit string is input.

  The selector 50 selects the first variable length code bit string input from the input terminal 10, and the selector 40 selects the output of the shift unit 20. The codeword table storage device 150 and the codeword table storage device 250 store a variable-length codeword table of an encoding scheme that is compliant with the input first variable-length code bit string. That is, when the first variable-length code bit string conforms to the first encoding method, the codeword table storage device 150 and the codeword table storage device 250 store the variable-length codeword table of the first encoding method. To do. When the first variable length code bit string conforms to the second encoding method, the codeword table storage device 150 and the codeword table storage device 250 store the variable length codeword table of the second encoding method.

  With this setting, in the image decoding apparatus according to the present embodiment, the first decoding unit 100 performs decoding on the first variable length codeword of the first variable length code bit string input to the input terminal 10. The first-stage decoding result is output to the output unit 30. At the same time, the first decoding unit 100 outputs shift information related to the codeword length of the decoded variable length codeword to the shift unit 20. The shift unit 20 shifts the input first variable length code bit string based on the shift information, and sends it to the second decoding unit 200 via the selector 40. Second decoding section 200 performs decoding on the bit string next to the shifted first variable length code bit string, and outputs the second-stage decoding result to output section 30.

  As described above, the image decoding apparatus according to the present embodiment is configured by (a) by setting the selector 40 and the selector 50 and selecting the variable length codeword table stored in the codeword table storage apparatus 150 and the codeword table storage apparatus 250. (B) parallel decoding of two variable-length code bit strings using the same encoding system, and (c) 2 in one machine cycle of one variable-length code bit string. Either codeword decoding can be selected and executed. In addition, since the image decoding apparatus according to the present embodiment can store the codeword table in the writable codeword table storage device 150 and the codeword table storage device 250, it can be used in various encoding methods without changing hardware. It is compatible and highly flexible.

(Embodiment 9)
FIG. 9 is a block diagram of an image decoding apparatus according to Embodiment 9 of the present invention.

  The image decoding apparatus according to this embodiment includes decoders 400 to 403, selectors 51 to 53, shift units 21 to 23, selectors 41 to 43, an output unit 30, an input terminal 10, and an output terminal 90. Two selectors connected in cascade, a shift unit, and a decoder (for example, the selector 52, the shift unit 22, the selector 42, and the decoder 402) constitute a basic unit A500. The image decoding apparatus of the present embodiment further develops the image decoding apparatus of FIGS. 1 to 5 described in Embodiments 1 to 5 of the present invention and those by connecting a plurality of basic units A500 repeatedly. An image decoding apparatus having the above configuration can be realized. An application example of the image decoding apparatus according to this embodiment will be outlined below.

  The image decoding apparatus according to Embodiment 1 of the present invention shown in FIG. 1 can be realized by a configuration in which two basic units A500 are connected in the image decoding apparatus of FIG. That is, the selector 41 selects the input terminal 10 (as a result, the selector 51 and the shift unit 21 are invalidated), the selector 52 selects the input terminal 10, and the selector 42 selects the output of the shift unit 22. Set to Further, the decoder 400 functions as the first decoding unit 100, the decoder 401 functions as the third decoding unit 300, and the decoder 402 functions as the second decoding unit 200.

  With this setting, the decoder 401 outputs the first-stage decoding result for the input variable-length code bit string, and simultaneously outputs the shift information to the shift unit 22, and the decoder 402 The decoding result of the second stage is output for the variable length code bit string shifted based on the information. That is, the image decoding apparatus according to Embodiment 1 that decodes two variable-length codewords in one machine cycle can be realized.

  Now, the decoder 400 has the configuration of the first decoding unit 100 shown in FIG. 2, and the codeword table of “RUN ≠ 0” of MPEG-2 shown in FIG. Both the decoder 401 and the decoder 402 have the configuration of the second decoding unit 200 shown in FIG. 2, and the codeword table 230 and the codeword table 330 contain “RUN = 0” of MPEG-2 shown in FIG. ”Is set, the image decoding apparatus according to the present embodiment has the same decoding function as the image decoding apparatus according to the first embodiment of the present invention shown in FIG.

  As a result, similar to the image decoding apparatus according to the first embodiment of the present invention shown in FIG. 2, the image decoding apparatus according to the present embodiment has a variable length codeword of “RUN ≠ 0” in one machine cycle. The value “RUN” +1) DCT coefficients can be decoded. When two variable-length codewords with “RUN = 0” continue, two DCT coefficients can be decoded. In addition, when the variable length codeword “RUN = 0” is followed by the variable length codeword “RUN = 0”, the image decoding apparatus according to the present embodiment always includes one DCT coefficient and the next machine cycle. A plurality of DCT coefficients can be decoded.

  In FIG. 9, if one more stage of the basic unit A 500 is connected and a function similar to that of the decoder 401 is given to the decoder 403, a further developed image decoding apparatus can be realized. That is, in the case of a variable length codeword of “RUN ≠ 0” in one machine cycle, the image decoding apparatus developed in this embodiment can decode (value “RUN” +1) DCT coefficients, and “RUN = If two "0" variable-length codewords continue, two DCT coefficients and a plurality of subsequent DCT coefficients can be decoded. If three "RUN = 0" variable-length codewords continue, three Can be decoded. That is, the developed image decoding apparatus can decode a maximum of three variable length codewords in one machine cycle, and can further decode a variable length code bit string.

  Other application examples are briefly described. The image decoding apparatus according to the third embodiment of the present invention shown in FIG. 3 can be realized by using one basic unit A500 and setting the selector 41 to select the output of the shift unit 21 in FIG. Also, the image decoding apparatus according to the fourth embodiment of the present invention shown in FIG. 4 and the image decoding apparatus according to the fifth embodiment of the present invention shown in FIG. 5 both use the single basic unit A500 in FIG. It was. In these application examples, the decoder 400 and the decoder 401 have the configurations of the first decoding unit 100 and the second decoding unit 200 in the respective embodiments. By doing so, the image decoding apparatus according to the present embodiment can function as the image decoding apparatuses according to the third to fifth embodiments of the present invention. It should be noted that the above-described image decoding apparatus can be realized by building a codeword table in which variable-length codewords are classified in a complementary manner in the decoders 400 to 403.

  Furthermore, it can be easily understood from the above description that the number of decoding of variable-length codewords in one machine cycle can be further increased by further developing these application examples and further increasing the basic unit A500 of FIG.

  As a further development example, in the image decoding apparatus of FIG. 9, if a decoder 400 and two or more basic units A500 are provided, and different variable length codeword tables are set in the respective decoders, three or more images It is possible to realize an image decoding apparatus that decodes variable-length code bit strings in a compression method in parallel.

  As described above, the image decoding apparatus according to the present embodiment can be applied in various ways according to the purpose of use by developing one basic unit A500.

(Embodiment 10)
FIG. 10 is a block diagram of an image decoding apparatus according to Embodiment 10 of the present invention.

  The image decoding apparatus according to this embodiment includes decoders 400 to 403, selectors 51 to 53, shift units 21 to 23, selectors 41 to 43, an output unit 30, input terminals 10 to 13, and an output terminal 90. Two selectors connected in cascade, a shift unit, and a decoder (for example, the selector 52, the shift unit 22, the selector 42, and the decoder 402) constitute a basic unit B600. The image decoding apparatus according to the present embodiment is a further development of the image decoding apparatus illustrated in FIGS. 6 to 8 described in Embodiments 6 to 8 of the present invention by repeatedly connecting a plurality of basic units B600. An image decoding device having a multi-input configuration can be realized. An application example of the image decoding apparatus according to this embodiment will be outlined below.

  Each of the image decoding apparatuses according to Embodiments 6 to 8 of the present invention shown in FIGS. 6 to 8 uses one basic unit B600 in FIG. In these application examples, the decoder 400 and the decoder 401 are configured to have the configurations of the first decoding unit 100 and the second decoding unit 200 in the respective embodiments. By doing so, the image decoding apparatus according to the present embodiment can function as the image decoding apparatuses according to the sixth to eighth embodiments of the present invention.

  Further, by developing these application examples, the number of basic units B600 in FIG. 9 is further increased, and the developed image decoding apparatus includes settings of selectors 41 to 43 and selectors 51 to 53, and decoders 400 to 403. Depending on the setting of the codeword table that each has, (a) parallel decoding of two or more variable-length code bit sequences by different encoding methods, (b) parallel decoding of two or more variable-length code bit sequences by the same encoding method, And (c) one of decoding of two or more codewords in one machine cycle of one variable length code bit string can be selected and executed.

  The developed image decoding apparatus described above can be realized by constructing codeword tables in which variable-length codewords are complementarily classified in the decoders 400 to 403.

  As described above, the image decoding apparatus according to the present embodiment can be applied in various ways according to the purpose of use by developing one basic unit B600.

  As described above, the gist of the present invention is to provide an image decoding apparatus that decodes variable-length-encoded image data at a high speed while suppressing an increase in circuit area. Various modifications are possible without departing from the above.

  The image decoding apparatus according to the present invention can be used in an image processing apparatus that requires high-speed decoding of encoded image data, such as a mobile phone, and its application field.

Basic block diagram of image decoding apparatus according to Embodiment 1 of the present invention Block diagram of an image decoding apparatus according to Embodiment 1 and Embodiment 2 of the present invention The block diagram of the image decoding apparatus in Embodiment 3 of this invention The block diagram of the image decoding apparatus in Embodiment 4 of this invention Block diagram of an image decoding apparatus in Embodiment 5 of the present invention Block diagram of an image decoding apparatus according to Embodiment 6 of the present invention Block diagram of an image decoding apparatus according to Embodiment 7 of the present invention The block diagram of the image decoding apparatus in Embodiment 8 of this invention The block diagram of the image decoding apparatus in Embodiment 9 of this invention The block diagram of the image decoding apparatus in Embodiment 10 of this invention Flowchart of image decoding apparatus in Embodiment 1 of the present invention Flowchart of image decoding apparatus in Embodiment 2 of the present invention MPEG-2 “RUN ≠ 0” codeword table in Embodiment 1 of the present invention MPEG-2 “RUN = 0” codeword table in Embodiment 1 of the present invention MPEG-4 “RUN ≠ 0” codeword table in Embodiment 2 of the present invention MPEG-4 “RUN = 0” codeword table in Embodiment 2 of the present invention Codeword table with maximum word length of 12 bits or less of MPEG-2 in Embodiment 3 of the present invention Codeword table having a maximum word length of 13 bits or more in MPEG-2 according to Embodiment 3 of the present invention MPEG-4 variable length codeword table in Embodiment 3 of the present invention Variable length codeword table in the first half of MPEG-2 in Embodiment 4 of the present invention Variable-length codeword table in the latter half of MPEG-2 in Embodiment 4 of the present invention

Explanation of symbols

10, 11 Input terminal 20, 21, 22, 23 Shift unit 30 Output unit 40, 41, 42, 43, 50, 51, 52, 53, 140, 240 Selector 90 Output terminal 100 First decoding unit 110, 210, 310 Comparator 120, 220, 320, 400, 401, 402, 403 Decoder 130, 131, 132, 230, 231, 232, 330 Codeword table 150, 250 Codeword table storage device 200 Second decoding unit 300 Third decoding 500 Basic unit A
600 Basic unit B

Claims (21)

A first decoding unit for decoding a variable-length code bit string;
A shift unit for shifting the variable-length code bit string;
A second decoding unit for decoding the variable length code bit sequence shifted by the shift unit;
An output unit that selects a decoding result of the first decoding unit and a decoding result of the second decoding unit and outputs decoded data;
The image decoding device, wherein the first decoding unit and the second decoding unit decode the variable-length code bit string using different decoding reference data. The first decoding unit and the second decoding unit each include a decoding reference unit, a comparator, and a decoder,
The decoding reference unit stores the decoding reference data,
The comparator compares the variable-length code bit string with the decoded reference data stored in the decoding reference unit to detect matching decoded reference data;
The image decoding device according to claim 1, wherein the decoder decodes the variable-length code bit string based on the detected decoding reference data and outputs a decoding result. The decoding reference unit of the first decoding unit stores a first table as the decoding reference data,
The image decoding device according to claim 2, wherein the decoding reference unit of the second decoding unit stores a second table as the decoding reference data. The image decoding apparatus according to claim 3, wherein the first table is a part obtained by dividing the variable-length codeword table, and the second table is a remaining part obtained by dividing the variable-length codeword table. The image decoding device according to claim 4, wherein the variable-length codeword table is divided based on any one of a codeword type, a codeword length, and the number of codewords. The first decoding unit performs first-stage decoding on the variable-length code bit sequence, and simultaneously outputs shift information regarding the bit length of the decoded variable-length code bit sequence,
The shift unit shifts the variable-length code bit string based on the shift information,
The image decoding apparatus according to claim 1, wherein the second decoding unit performs second-stage decoding on the variable length code bit string shifted by the shift unit. The image decoding apparatus according to claim 6, wherein the first stage decoding and the second stage decoding are sequentially executed within the same decoding processing time. A third decoding unit for decoding the variable-length code bit string;
The third decoding unit performs first-stage decoding on the variable length code bit sequence using the same decoding reference data as the decoding reference data used by the second decoding unit, and simultaneously decodes the variable length Outputs shift information regarding the bit length of the sign bit string,
The shift unit shifts the variable length code bit string based on the shift information,
The second decoding unit performs second-stage decoding on the variable length code bit string shifted by the shift unit,
The image decoding according to claim 1, wherein the output unit selects a decoding result of the first decoding unit, a decoding result of the second decoding unit, and a decoding result of the third decoding unit, and outputs decoded data. apparatus. The image decoding apparatus according to claim 8, wherein the first-stage decoding and the second-stage decoding are sequentially executed within the same decoding processing time. The third decoding unit includes a decoding reference unit, a comparator, and a decoder,
The decoding reference unit of the first decoding unit stores a first table as the decoding reference data,
The image decoding apparatus according to claim 8, wherein the decoding reference unit of the second decoding unit and the decoding reference unit of the third decoding unit store a second table as the decoding reference data. The image decoding apparatus according to claim 10, wherein the first table is a part obtained by dividing the variable-length codeword table, and the second table is a remaining part obtained by dividing the variable-length codeword table. The decoding reference data is a variable-length codeword table that conforms to at least one encoding method among MPEG-2, MPEG-4 (Part 2), and MPEG-4 AVC. Image decoding device. A first decoding unit for decoding the first variable length code bit string;
A selection unit that selects one of the second variable length code bit string input in parallel with the first variable length code bit string and the first variable length code bit string;
A shift unit for shifting the variable-length code bit string selected by the selection unit;
A second decoding unit for decoding the variable length code bit string shifted by the shift unit;
An output unit that selects a decoding result of the first decoding unit and a decoding result of the second decoding unit and outputs decoded data;
The first decoding unit and the second decoding unit each have a decoding reference unit that stores decoding reference data;
The first decoding unit and the second decoding unit are image decoding devices that perform decoding using decoding reference data stored in respective decoding reference units. When the selection unit selects the first variable length code bit string,
The first decoding unit performs first-stage decoding on the first variable length code bit string, and simultaneously outputs shift information regarding the bit length of the decoded first variable length code bit string,
The shift unit shifts the first variable length code bit string based on the shift information,
The second decoding unit performs second-stage decoding on the first variable length code bit string shifted by the shift unit,
When the selection unit selects the second variable length code bit string,
The first decoding unit decodes the first variable length code bit string,
The image decoding device according to claim 13, wherein the second decoding unit decodes the second variable length code bit string. The image decoding device according to claim 14, wherein the first-stage decoding and the second-stage decoding are sequentially executed within the same decoding processing time. A first decoding step of decoding the variable-length code bit string;
A shift step of shifting the variable length code bit string;
A second decoding step of decoding the variable length code bit string shifted by the shift step;
Selecting a decoding result in the first decoding step and a decoding result in the second decoding step and outputting decoded data;
In the first decoding step, the variable length code bit string is decoded with reference to a first decoding reference table,
In the second decoding step, an image decoding method for decoding the variable-length code bit string with reference to a second decoding reference table. The image decoding method according to claim 16, wherein the first decoding reference table is a part obtained by dividing the variable length codeword table, and the second decoding reference table is a remaining part obtained by dividing the variable length codeword table. . In the first decoding step, first stage decoding is performed on the variable-length code bit string, and simultaneously, shift information regarding the bit length of the decoded variable-length code bit string is output,
In the shifting step, the variable length code bit string is shifted based on the shift information,
The image decoding method according to claim 16, wherein in the second decoding step, second-stage decoding is performed on the variable length code bit string shifted in the shift step. The image decoding method according to claim 18, wherein the first-stage decoding and the second-stage decoding are sequentially executed within the same decoding processing time. A third decoding step of decoding the variable length code bit string;
In the third decoding step, referring to the second decoding reference table, first stage decoding is performed on the variable length code bit string, and simultaneously, shift information relating to the bit length of the decoded variable length code bit string Output
In the shifting step, the variable length code bit string is shifted based on the shift information,
The image decoding method according to claim 18, wherein in the second decoding step, second-stage decoding is performed on the variable length code bit string shifted in the shift step. 21. The image decoding method according to claim 20, wherein the first stage decoding and the second stage decoding are sequentially executed within the same decoding processing time.

Images