JP2007156914A - Electronic device and control program transfer method - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To improve the speed of rewriting a control program of each of the modules comprising an electronic device without providing a dedicated interface, and ensure reliability of the program transfer between the modules. <P>SOLUTION: First and second controllers connected to a first bus that can communicate bidirectionally are connected by a plurality of second buses for data transfer only from the first controller to the second controller at a speed higher than the first bus. When a new control program for the second controller is inputted from the outside, the first controller notifies the second controller of the start of the transfer, through the first bus, and then transmits the control program to each of the plurality of the second buses. When receiving the notification, the second controller compares the control program received through each of the plurality of the second buses, and when the number of the same control program is a predetermined threshold value or more, stores the control program. <P>COPYRIGHT: (C)2007,JPO&INPIT

Description

  The present invention relates to a technique for rewriting a control program for performing drive control of an electronic device.

  In recent years, as the performance and functionality of image processing apparatuses have increased, the program structure of a control program for performing drive control has become complicated, and the program scale has also increased. On the other hand, the introduction cycle of new products to the market tends to be shortened, and the development period of the control program tends to be shortened. For this reason, it is not possible to spend a sufficient amount of time for the program test at the development stage of the control program, and a defect (so-called bug) of the control program becomes apparent after the product is shipped, and the frequency of rewriting the control program after the product is shipped increases. ing. Further, with the increase in the program size of the control program, the time required for the rewriting work has become longer.

By the way, the image processing apparatus includes a plurality of modules such as a system controller that performs drive control of the entire image processing apparatus and external data input / output, and an engine controller that performs drive control of the image processing engine under the control of the system controller In general, each module includes a CPU and a memory in which a control program to be executed by the CPU is written.
In such an image processing apparatus, when a control program for an engine controller is rewritten after the product is shipped, for example, a new control program is acquired from the outside by the system controller, and the control program is transferred to the engine controller (hereinafter referred to as “the engine controller”). (It is also called “download”) and it is rewritten. For transferring the control program from the system controller to the engine controller, a serial bus capable of bidirectional communication and capable of detecting occurrence of garbled data by parity check or the like is generally used.

However, in the aspect using the serial bus for the transfer of the control program, there is a problem that the transfer speed of the serial bus is slower than the write speed of the control program to the memory, and it is difficult to speed up the rewrite process of the control program. In order to solve such problems, it has been proposed to improve the transfer speed of the serial bus (see Patent Document 1), but a check for checking whether or not the transfer data is garbled. Work becomes a bottleneck, and eventually rewriting of the control program cannot be accelerated.
Therefore, various techniques for speeding up the rewriting of the control program have been proposed, and examples thereof include the techniques disclosed in Patent Document 2 and Patent Document 3. Patent Document 2 discloses a technique for using an image data bus, which is a parallel bus faster than a serial bus, when transferring a control program between modules constituting an image processing apparatus. Patent Document 3 discloses a technique for speeding up rewriting of a control program by providing a dedicated interface for downloading the control program.
JP 2001-318800 A JP 2001-313767 A JP 2002-247256 A

  However, since the image data bus generally supports only one-way communication (that is, data transfer from the system controller to the engine controller), it is impossible to detect data corruption by parity check or the like. As compared with the data transfer via the serial bus, there is a problem that the reliability of the data transfer is significantly lowered.

  Further, if a dedicated interface for program transfer is provided as in the technique disclosed in Patent Document 3, the transfer speed can be improved while ensuring the reliability of data transfer. Providing such a dedicated interface increases the manufacturing cost of the image processing apparatus and is not preferable. Each of the above problems is not limited to the image processing apparatus, but is a problem common to electronic devices that are configured by a plurality of modules and in which drive control of each module is performed according to a control program.

  The present invention has been made in view of the above problems, and speeds up rewriting of a control program for performing drive control of each module constituting an electronic device without providing a dedicated interface for program transfer. At the same time, an object of the present invention is to provide a technology that makes it possible to ensure the reliability of program transfer between modules.

In order to solve the above-described problems, the present invention provides a CPU, a memory in which a control program for causing the CPU to execute drive control of the control target is written in advance, and external input means for receiving external data input A second controller including a first controller including: a CPU; and a memory in which a control program for causing the CPU to execute drive control of the control target is written in advance. A first bus that bidirectionally mediates data transfer between the controller and the second controller, and a second bus that mediates data transfer from the first controller to the second controller; In the electronic apparatus having a plurality of second buses faster than the first bus, the first controller is a new one for the second controller. When a control program is input via the external input means, a control signal for starting transfer of the new control program is transmitted to the first controller via the first bus, and then The new control program is sent to each of the plurality of second buses, and when the second controller receives the control signal via the first bus, the plurality of second control programs are thereafter transmitted. The control programs received via each of the two buses are compared with each other, and when the number of identical control programs is equal to or greater than a predetermined threshold, the stored contents of the memory are updated with the same control program. An electronic device characterized by the above is provided.
According to such an aspect, the control program for the second controller input via the external input means is the first through the plurality of second buses that are faster than the first bus. Transfer from the controller to the second controller. Then, as a result of comparing the control programs received via each of the plurality of second buses with each other, if the number of the same control programs is equal to or greater than a predetermined threshold, the same control program The content stored in the memory of the second controller is updated. On the other hand, if the error occurrence frequency such as data corruption in the transfer process via the second bus is high, the number of the same control programs does not reach the threshold value and the control program is not rewritten. As a result, it is possible to avoid the influence of data corruption and maintain the reliability of data transfer.

  In a more preferred aspect, the first controller sends a response signal for requesting retransmission after the new control program is sent to each of the plurality of second buses. When receiving from the second controller via the second controller, the second controller retransmits the new control program via either the plurality of second buses or the first bus, and the second controller When the control programs received via each of the plurality of second buses are compared with each other and the number of identical control programs is less than the predetermined threshold, the response signal is It returns to the said 1st controller via 1 bus | bath, It is characterized by the above-mentioned.

In a further preferred embodiment. When the second controller returns the response signal, the second controller detects an error occurrence state of communication via the plurality of second buses or a write state to the memory of the second controller, and the detection The result is added to the response signal and returned, and the first controller re-executes the new control program according to the detection result added to the response signal received via the first bus. It is characterized by switching the bus used for transmission.
In each of the above aspects, it is needless to say that a plurality of the second controllers may be provided.

  In order to solve the above problem, the present invention provides a CPU, a memory in which a control program for causing the CPU to execute drive control of the control target is written in advance, and an external input for receiving external data input A second controller including a first controller including: a CPU; and a memory in which a control program for causing the CPU to execute drive control of the control target is written in advance. A first bus that bidirectionally transfers data between the second controller and the second controller, and a second bus that mediates data transfer from the first controller to the second controller. The first controller acquired by the external input means in an electronic device having a plurality of second buses faster than the first bus. In a control program transfer method for transferring a control program for two controllers from the first controller to the second controller, the first controller sends a control signal to start transfer of the new control program. A first step of transmitting the new control program to each of the plurality of second buses after being transmitted to the first controller via the first bus; and A threshold value in which the number of control programs that are identical by comparing the control programs received via each of the plurality of second buses after receiving the control signal via the first bus is predetermined. And a second step of updating the stored contents of the memory with the same control program. Your program transfer method, to provide.

  According to the present invention, it is possible to speed up rewriting of a control program for performing drive control of each module constituting an electronic device without providing a dedicated interface for program transfer, and to improve reliability of program transfer between modules. There is an effect that it becomes possible to ensure the sex.

Hereinafter, embodiments of the present invention will be described with reference to the drawings.
(A. Configuration)
FIG. 1 is a block diagram illustrating a configuration example of an image forming apparatus which is an embodiment of an electronic apparatus according to the present invention. The image forming apparatus includes a plurality of modules. Specifically, an image forming unit that performs image formation (image printing) on a recording material such as printing paper by an electrophotographic method, It has an engine controller 200 that performs drive control, and a system controller 100 that performs drive control of the engine controller 200 and exchanges data with the outside.
As shown in FIG. 1, the system controller 100 and the engine controller 200 send a serial bus 300, which is a first bus capable of bidirectional communication, and image data corresponding to each color of R, G, and B to the system controller 100. Are connected to image data buses 400R, 400G, and 400B that function as a second bus for transferring data to the engine controller 200. Each of the image data buses is a parallel bus, and can transfer data at a higher speed than the serial bus 300.

  As shown in FIG. 1, the system controller 100 includes a CPU 110, a nonvolatile memory 120, a volatile memory 130, an external input unit 140, a hard disk drive (HDD in FIG. 1) 150, and an image processing unit 160.

The nonvolatile memory 120 is, for example, an EEPROM (Electronically Erasable and Programmable Read Only Memory). In the nonvolatile memory 120, a control program for performing drive control of the engine controller 200 which is a control target of the system controller 100 and data exchange with the outside of the image forming apparatus is written in advance when the image forming apparatus is shipped from the factory. It is. In the present embodiment, the case where the nonvolatile memory 120 is an EEPROM will be described. However, any memory can be used as long as it can rewrite data and stores data in a nonvolatile manner. Also good.
The volatile memory 130 is a RAM (Random Access Memory), for example, and is used as a work area when the CPU 110 executes the control program.

  The external input unit 140 is a NIC (Network Interface Card), for example, and is connected to a communication network such as a LAN (Local Area Network) or the Internet. The external input unit 140 passes the data received via the communication network to the CPU 110. In this embodiment, a new control program for the system controller 100 and the engine controller 200 and image data representing an image to be formed on a recording material such as printing paper by the image forming unit are formed via the external input unit 140. Input from outside the device. In this embodiment, the case where the external input unit 140 for inputting image data and a control program to the image forming apparatus is a NIC has been described. However, a computer apparatus such as a CD-ROM (Compact Disk-Read Only Memory) is used. Of course, it may be a recording medium reading means (for example, a CD-ROM drive) for reading image data or a control program written in a readable recording medium from the recording medium.

  As shown in FIG. 1, the image processing unit 160 includes a distribution unit 160a and a FIFO 160b, and the FIFO 160b is connected to the image data buses 400R, 400G, and 400B described above. When the image data is delivered under the control of the CPU 110, the distribution unit 160a sends the image data to the image data bus corresponding to each color component via the FIFO 160b, and the new data for the engine controller 200 is sent. When the control program is delivered, the control program is duplicated by the number of the image data buses, and each of them is sent one by one to each of the image data buses.

  On the other hand, the engine controller 200 includes a CPU 210, a non-volatile memory 220, a volatile memory 230, an engine control unit 240, and an image processing unit 260, as shown in FIG. The non-volatile memory 220 is an EEPROM, like the non-volatile memory 120, and a control program for causing the CPU 210 to execute drive control of the image forming unit to be controlled by the engine controller 200 is shipped from the factory of the image forming apparatus. Pre-written at the time. The volatile memory 230 is a RAM, like the volatile memory 130, and is used as a work area by the CPU 210 during the execution of the control program.

The engine control unit 240 performs drive control of the image forming unit under the control of the CPU 210.
As shown in FIG. 1, the image processing unit 260 includes a comparison unit 260a and a FIFO 260b. The FIFO 260b is connected to the three image data buses in the same manner as the FIFO 160b. The comparison unit 260a compares the control programs received via the three image data buses with each other under the control of the CPU 210, determines whether or not they match each other, and sends the determination result to the CPU 210. hand over. Although details will be described later, in the present embodiment, the CPU 210 operates the comparison unit 260a only when the control signal indicating that the control program is transmitted is received via the serial bus 300, and the comparison by the comparison unit 260a is performed. As a result, when the number of identical control programs is equal to or greater than a predetermined threshold (2 in this embodiment), the control program written in the nonvolatile memory 220 is updated with the control program.

  In the image forming apparatus shown in FIG. 1, when power (not shown) is turned on, the CPU 110 reads the control program from the nonvolatile memory 120 and writes it in the volatile memory 130 (hereinafter referred to as “control program volatile”). The control program loaded into the volatile memory 130 is executed. On the other hand, the CPU 210 loads the control program stored in the nonvolatile memory 220 into the volatile memory 230 and executes it.

  The CPU 110 operating according to the control program loaded in the volatile memory 130 temporarily stores the data delivered from the external input unit 140 in the HDD 150, then reads the data from the HDD 150 and sends it to the image processing unit 160. And a control signal indicating the type of the data and the size of the data is transmitted via the serial bus 300 to the engine controller 200 which is the recipient of the data.

On the other hand, when a control signal for transmitting image data is transmitted via the serial bus 300, the CPU 210 operating according to the control program loaded in the volatile memory 230 follows the control signal. Then, each image data transmitted via the three image data buses is received by the image processing unit 260, and the drive control of the engine control unit 240 is performed so as to form an image corresponding to the image data. When the CPU 210 operating according to the control program loaded in the volatile memory 230 receives a control signal for transmitting a new control program via the serial bus 300, the CPU 210 follows the control signal. Then, each control program transmitted via the three image data buses is received by the image processing unit 260, and the control program is compared by the comparison means 260a, so that data garbled in the transfer process of these control programs. It is determined whether or not an error has occurred, and if it is determined that no error has occurred, the control program stored in the nonvolatile memory 220 is updated with the new control program.
The above is the configuration of the image forming apparatus according to the present embodiment.

(B. Operation)
Next, operations performed by the CPU 110 and the CPU 210 when the control program of the engine controller 200 of the image forming apparatus according to the present embodiment is rewritten will be described with reference to the drawings. In the operation example described below, it is assumed that the CPU 110 operates according to the control program loaded into the volatile memory 130 and the CPU 210 operates according to the control program loaded into the volatile memory 230. .

For example, when a new control program for the engine controller 200 is transmitted via a communication network to which the image forming apparatus shown in FIG. 1 is connected, the new control program is input to the external input unit 140. The CPU 110 executes the control program transmission operation shown in FIG. 3 according to the control program loaded in the volatile memory 130.
As shown in FIG. 3, the CPU 110 first transmits a control signal for transmitting a new control program to the CPU 210 via the serial bus 300 (step SA100), and then transmits the new control program to the image processing unit. Then, the control program is delivered to each of the three image data buses (step SA110).

  On the other hand, when the CPU 210 operating according to the control program loaded in the volatile memory 230 receives a control signal sent from the CPU 110 via the serial bus 300 (step SB100), as shown in FIG. Then, it is determined from the contents of the control signal whether the data sent via the image data bus following the control signal is a control program (step SB110).

When the determination result in step SB110 is “No” (that is, when it is determined that the data sent via the image data bus is image data), the CPU 210 receives the image received by the image processing unit 260. The data is transferred to the engine control unit 240, and an image forming process is executed (step SB120). Specifically, the CPU 210 performs drive control of the engine control unit 240 so that an image according to the image data is formed.
Conversely, if the determination result in step SB110 is “Yes”, the control programs received via the image data buses are compared with each other (step SB130), and the same control program (that is, the bit arrangement is the same). It is determined whether the number of control programs is equal to or greater than a predetermined threshold (2 in the present embodiment) (step SB140).

If the determination result in step SB140 is “Yes”, the CPU 210 updates the control program stored in the nonvolatile memory 220 with any of the same control programs (step SB150). A response signal indicating correct reception is returned to the CPU 110 via the serial bus 300 (step SB160). Thereafter, the CPU 210 loads the updated control program (that is, a new control program) into the volatile memory 230 and executes the new control program.
On the other hand, if the determination result in step SB140 is “No”, the CPU 210 considers that data corruption has occurred in the transfer process of the control program, and sends a serial response signal indicating that the control program is to be retransmitted. A reply is sent to the CPU 110 via the bus 300 (step SB170).

Returning to FIG. 2, when CPU 110 receives a response signal sent back from CPU 210 via serial bus 300 (step SA120), whether the response signal is a response signal for requesting retransmission of the control program. It is determined whether or not (step SA130).
Then, if the determination result in step SA110 is “Yes”, CPU 110 re-transmits a new control program for engine controller 200 by re-executing the processes in and after step SA100.

  As a result of the operation described above, in the image forming apparatus according to the present embodiment, the control program is transferred via the image data bus, which is a high-speed parallel bus compared to the serial bus. Compared to the conventional technique for transferring a program, the transfer speed can be improved.

  In addition, since the image data bus supports only one-way communication, the conventional technology for transferring a control program via the image data bus uses a serial bus that supports bidirectional communication. Although reliability could not be ensured as compared with the case of performing transfer, in the image forming apparatus according to the present embodiment, the transfer process is performed by comparing the control programs received via the image data buses. If it is determined whether or not data corruption has occurred and it is determined that data corruption has occurred (that is, if the determination result in step SB140 is “No”), the control program is requested to be retransmitted. A response signal is returned from the engine controller 200 to the system controller 100 via the serial bus 300, and the control program is retransmitted. There is executed. Thereby, it is possible to avoid a decrease in reliability due to data corruption.

  That is, according to the image forming apparatus according to the present embodiment, when a new control program is transferred from the system controller 100 which is a component thereof to the engine controller 200, the transfer speed is increased while ensuring the reliability of data transfer. It becomes possible to improve.

(C. deformation)
Although one embodiment of the present invention has been described above, it is needless to say that the embodiment may be modified as described below.
(1) In the above-described embodiment, the case where the present invention is applied to the image forming apparatus has been described. However, the present invention may be applied to a decoder having an image reading function and an image forming function. Specifically, as shown in FIG. 4, a multifunction peripheral (having a scanner controller for controlling the engine controller 200 and a scanner (not shown)) and controlling the driving of the engine controller 200 and the scanner controller by the system controller 100 ( That is, of course, the present invention may be applied to an image processing apparatus having an image reading function and an image forming function. In short, the present invention can be applied to any module as long as each module is configured to be able to communicate via an image data bus faster than the serial bus in addition to the serial bus. Is possible.

  The application target of the present invention is not limited to an image processing apparatus such as an image forming apparatus or a decoder, but a nonvolatile memory in which a CPU and a control program for causing the CPU to execute drive control of the control target are written. One or a plurality of sub-controllers including a non-volatile memory, a CPU, a non-volatile memory in which a control program for causing the CPU to perform drive control of each sub-controller is written, and an external input unit that receives external data input A first bus that mediates bidirectional communication between each sub-controller and the main controller, and a plurality that mediate data transfer from the main controller to each sub-controller at a higher speed than the first bus. The present invention can be applied to any electronic device having the second bus.

(2) In the above-described embodiment, the number of identical control programs among the control programs received via each of the three image data buses is less than a predetermined threshold (2 in the above-described embodiment). In this case, it was determined that data corruption occurred and the control program was transferred again. However, the value of the threshold value is not limited to 2, and may be appropriately determined according to the degree of reliability to be ensured. For example, when 3 (that is, the number of image data buses) is set as the threshold value, data corruption does not occur only when all the control programs received via each of the image data buses are the same. Will be determined.

  In the above-described embodiment, the case where three image data buses corresponding to the respective colors R, G, and B are provided between the system controller 100 and the engine controller 200 has been described. The number of image data buses provided between the controllers 200 is not limited to three, and may be four corresponding to each of Y, M, C, and K colors. If the number of image data buses is four, data corruption does not occur when all four control programs received via each of the four image data buses match. In addition, it may be determined that data corruption has not occurred when any three or two of the four control programs match.

(3) In the above-described embodiment, the control program for the engine controller 200 is duplicated by the number of image data buses in the distribution unit 160a of the system controller 100, and each is distributed and transferred to each image data bus. Explained. However, each control program copied by the number of image data buses is divided into data blocks having a predetermined data size, sent to each image data bus in units of the data blocks, and data garbled in units of the data blocks. The presence / absence determination and retransmission may be executed.

(4) In the above-described embodiment, the response signal indicating that the control program is requested to be retransmitted or the response indicating that the control program is correctly received according to the comparison result of the control program received via each image data bus. The case where any one of the signals is returned to the CPU 210 has been described. However, when a response signal for requesting retransmission of the control program is returned, the CPU 210 detects an error occurrence state of communication via a plurality of image data buses or a write state to the nonvolatile memory 220, and the detection is performed. The CPU 110 uses a bus used when a new control program is retransmitted in accordance with the detection result added to the response signal received via the serial bus 300. You may make it switch to. Specifically, when the frequency of error in communication via the image data bus exceeds a predetermined threshold, the new control program is transmitted via the serial bus instead of the image data bus. Also good.

(5) In the above-described embodiment, a case has been described in which a control signal for transmitting a new control program is transmitted to the CPU 110, and then the new control program is immediately transmitted to the CPU 110. A response signal (for example, a response signal indicating that the engine controller 200 is ready to accept a new control program) is returned from the CPU 210 via the serial bus 300, and the response signal is received. In this case, it is of course possible to cause the CPU 110 to transmit a new control program. This makes it possible to reliably avoid sending a new control program even though the engine controller 200 is in a state where it cannot accept the new control program. In addition, when the new control program is transmitted to the CPU 110 via each image data bus, it is transmitted after being compressed by a predetermined compression algorithm, while the CPU 210 has a decompression algorithm corresponding to the compression algorithm. You may make it perform the decompression | decompression process by.

(6) In the embodiment described above, the CPU 110 is caused to execute the operation shown in FIG. 2 according to the control program written in the nonvolatile memory 120, while the CPU 210 executes the operation shown in FIG. 2 according to the control program written in the nonvolatile memory 220. The case where the operation shown in FIG. However, a program for causing the CPU 110 to execute the operation shown in FIG. 2 is executed separately from the control program for causing the CPU 110 to perform drive control of the control target (in the above-described embodiment, the engine controller 200). The operation shown in FIG. 2 may be executed by the CPU 110 by writing in 120 and causing the CPU 110 to execute the program. Similarly, a program for causing the CPU 210 to execute the operation shown in FIG. 3 is nonvolatile, separately from a control program for causing the CPU 210 to execute drive control of the control target (in the above-described embodiment, the image forming unit). The operation shown in FIG. 3 may be executed by the CPU 210 by writing in the memory 120 and causing the CPU 210 to execute the program.

1 is a diagram illustrating a configuration example of an image forming apparatus which is an embodiment of an electronic apparatus according to the present invention. 3 is a flowchart showing a flow of operations performed by a CPU 110 of a system controller 100 constituting the image forming apparatus according to a control program stored in a nonvolatile memory 120. 3 is a flowchart showing a flow of operations performed by a CPU 210 of the engine controller 200 according to a control program stored in a nonvolatile memory 220. It is a figure which shows the structural example of the image processing apparatus which concerns on the modification 1. As shown in FIG.

Explanation of symbols

  DESCRIPTION OF SYMBOLS 100 ... System controller, 200 ... Engine controller, 110, 210 ... CPU, 120, 220 ... Non-volatile memory, 130, 230 ... Volatile memory, 140 ... External input part, 150 ... Hard disk, 240 ... Engine control part, 160, 260: Image processing unit, 300: Serial bus, 400, 400R, 400G, 400B: Image data bus.

Claims (5)

A first controller including a CPU, a memory in which a control program for causing the CPU to execute drive control of the control target is written in advance, and external input means for receiving external data input;
A second controller including a CPU and a memory in which a control program for causing the CPU to execute drive control of the control target is written in advance;
A first bus that bidirectionally mediates data transfer between the first controller and the second controller;
In an electronic device having a plurality of second buses that mediate data transfer from the first controller to the second controller and that are faster than the first bus,
The first controller includes:
When a new control program for the second controller is input via the external input means, a control signal for starting transfer of the new control program is transmitted via the first bus. And then sending the new control program to each of the plurality of second buses,
The second controller is
When the control signal is received via the first bus, the control programs received via each of the plurality of second buses are compared with each other, and the number of identical control programs is determined in advance. An electronic device characterized in that, when the threshold value is equal to or greater than the threshold value, the stored contents of the memory are updated by the same control program. The first controller includes:
When a response signal for requesting retransmission is received from the second controller via the first bus after sending out the new control program to each of the plurality of second buses. Retransmits the new control program via either the plurality of second buses or the first bus,
The second controller is
When the control programs received via each of the plurality of second buses are compared with each other and the number of identical control programs is less than the predetermined threshold, the response signal is sent to the first bus. The electronic apparatus according to claim 1, wherein the electronic apparatus returns a response to the first controller via the bus. The second controller is
When returning the response signal, an error occurrence state of communication via the plurality of second buses or a write state to the memory of the second controller is detected, and the detection result is added to the response signal. And reply
The first controller includes:
The bus used when retransmitting the new control program is switched according to the detection result added to the response signal received via the first bus. Electronic equipment.   The electronic apparatus according to claim 1, comprising a plurality of the second controllers. A first controller including a CPU, a memory in which a control program for causing the CPU to execute drive control of the control target is written in advance, and external input means for receiving external data input;
A second controller including a CPU and a memory in which a control program for causing the CPU to execute drive control of the control target is written in advance;
A first bus that bidirectionally mediates data transfer between the first controller and the second controller;
An electronic device comprising: a second bus that mediates one-way data transfer from the first controller to the second controller, the plurality of second buses being faster than the first bus. In the control program transfer method for transferring the control program for the second controller acquired by the first controller by the external input means from the first controller to the second controller,
After the first controller transmits a control signal for starting transfer of the new control program to the first controller via the first bus, the new control program is transferred to the plurality of control programs. A first step of sending to each of the second buses;
The second controller compares the control programs received via each of the plurality of second buses after receiving the control signal via the first bus, and the number of control programs that are the same A second step of updating the stored contents of the memory with the same control program when the threshold is equal to or greater than a predetermined threshold;
A control program transfer method comprising:

Images