JP2007156824A - プロセッサシステム、タスク制御方法 - Google Patents

プロセッサシステム、タスク制御方法 Download PDF

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Publication number
JP2007156824A
JP2007156824A JP2005351012A JP2005351012A JP2007156824A JP 2007156824 A JP2007156824 A JP 2007156824A JP 2005351012 A JP2005351012 A JP 2005351012A JP 2005351012 A JP2005351012 A JP 2005351012A JP 2007156824 A JP2007156824 A JP 2007156824A
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JP
Japan
Prior art keywords
processor
general
processing
task
processor system
Prior art date
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Pending
Application number
JP2005351012A
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English (en)
Japanese (ja)
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JP2007156824A5 (enExample
Inventor
Tetsuya Minagami
徹也 皆上
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Electronics Corp
Original Assignee
NEC Electronics Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Electronics Corp filed Critical NEC Electronics Corp
Priority to JP2005351012A priority Critical patent/JP2007156824A/ja
Priority to US11/607,888 priority patent/US20070130446A1/en
Priority to KR1020060122423A priority patent/KR20070058995A/ko
Priority to GB0624331A priority patent/GB2432937B/en
Publication of JP2007156824A publication Critical patent/JP2007156824A/ja
Publication of JP2007156824A5 publication Critical patent/JP2007156824A5/ja
Priority to KR1020090024095A priority patent/KR20090046761A/ko
Pending legal-status Critical Current

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    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
    • G06F9/3877—Concurrent instruction execution, e.g. pipeline or look ahead using a slave processor, e.g. coprocessor
    • G06F9/3879—Concurrent instruction execution, e.g. pipeline or look ahead using a slave processor, e.g. coprocessor for non-native instruction execution, e.g. executing a command; for Java instruction set
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F15/00—Digital computers in general; Data processing equipment in general
    • G06F15/16—Combinations of two or more digital computers each having at least an arithmetic unit, a program unit and a register, e.g. for a simultaneous processing of several programs
    • G06F15/177—Initialisation or configuration control
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F15/00—Digital computers in general; Data processing equipment in general
    • G06F15/76—Architectures of general purpose stored program computers
    • G06F15/78—Architectures of general purpose stored program computers comprising a single central processing unit
    • G06F15/7839—Architectures of general purpose stored program computers comprising a single central processing unit with memory
    • G06F15/7842—Architectures of general purpose stored program computers comprising a single central processing unit with memory on one IC chip (single chip microcontrollers)
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/46—Multiprogramming arrangements
    • G06F9/48—Program initiating; Program switching, e.g. by interrupt
    • G06F9/4806—Task transfer initiation or dispatching
    • G06F9/4843—Task transfer initiation or dispatching by program, e.g. task dispatcher, supervisor, operating system
    • G06F9/485—Task life-cycle, e.g. stopping, restarting, resuming execution
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02D—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
    • Y02D10/00—Energy efficient computing, e.g. low power processors, power management or thermal management

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  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Software Systems (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Memory System Of A Hierarchy Structure (AREA)
  • Advance Control (AREA)
  • Memory System (AREA)
JP2005351012A 2005-12-05 2005-12-05 プロセッサシステム、タスク制御方法 Pending JP2007156824A (ja)

Priority Applications (5)

Application Number Priority Date Filing Date Title
JP2005351012A JP2007156824A (ja) 2005-12-05 2005-12-05 プロセッサシステム、タスク制御方法
US11/607,888 US20070130446A1 (en) 2005-12-05 2006-12-04 Processor apparatus including specific signal processor core capable of dynamically scheduling tasks and its task control method
KR1020060122423A KR20070058995A (ko) 2005-12-05 2006-12-05 태스크를 동적으로 스케줄링할 수 있는 전용 신호 프로세서코어를 포함하는 프로세서 장치 및 그 태스크 제어 방법
GB0624331A GB2432937B (en) 2005-12-05 2006-12-05 Processor Apparatus, Including Specific Signal Processor Core Capable of Dynamically Scheduling Tasks, and Task Control Method Therefor
KR1020090024095A KR20090046761A (ko) 2005-12-05 2009-03-20 태스크를 동적으로 스케줄링할 수 있는 전용 신호 프로세서코어를 포함하는 프로세서 장치 및 그 태스크 제어 방법

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2005351012A JP2007156824A (ja) 2005-12-05 2005-12-05 プロセッサシステム、タスク制御方法

Publications (2)

Publication Number Publication Date
JP2007156824A true JP2007156824A (ja) 2007-06-21
JP2007156824A5 JP2007156824A5 (enExample) 2008-04-17

Family

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Family Applications (1)

Application Number Title Priority Date Filing Date
JP2005351012A Pending JP2007156824A (ja) 2005-12-05 2005-12-05 プロセッサシステム、タスク制御方法

Country Status (4)

Country Link
US (1) US20070130446A1 (enExample)
JP (1) JP2007156824A (enExample)
KR (2) KR20070058995A (enExample)
GB (1) GB2432937B (enExample)

Cited By (1)

* Cited by examiner, † Cited by third party
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JP2015532990A (ja) * 2012-09-27 2015-11-16 インテル・コーポレーション 複数のコアを有するプロセッサ、共有コア拡張ロジック及び複数の共有コア拡張使用命令

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US8074248B2 (en) 2005-07-26 2011-12-06 Activevideo Networks, Inc. System and method for providing video content associated with a source image to a television in a communication network
WO2008088741A2 (en) 2007-01-12 2008-07-24 Ictv, Inc. Interactive encoded content system including object models for viewing on a remote device
US9826197B2 (en) 2007-01-12 2017-11-21 Activevideo Networks, Inc. Providing television broadcasts over a managed network and interactive content over an unmanaged network to a client device
US9772853B1 (en) * 2007-09-17 2017-09-26 Rocket Software, Inc Dispatching a unit of work to a specialty engine or a general processor and exception handling including continuing execution until reaching a defined exit point or restarting execution at a predefined retry point using a different engine or processor
WO2009043043A1 (en) 2007-09-27 2009-04-02 Hilton Ronald N Apparatus, system, and method for cross-system proxy-based task offloading
US20090133022A1 (en) * 2007-11-15 2009-05-21 Karim Faraydon O Multiprocessing apparatus, system and method
CN101471810B (zh) * 2007-12-28 2011-09-14 华为技术有限公司 一种在集群环境下实现任务的方法、装置及系统
WO2010107954A2 (en) * 2009-03-17 2010-09-23 Activevideo Networks, Inc. Apparatus and methods for syndication of on-demand video
JP5578811B2 (ja) * 2009-06-30 2014-08-27 キヤノン株式会社 情報処理装置、情報処理装置の制御方法及びプログラム
US7959061B2 (en) 2009-09-25 2011-06-14 Multi Packaging Solutions, Inc. Folded pot cover
US9676511B2 (en) 2009-09-25 2017-06-13 Multi Packaging Solutions, Inc. Foldable packaging container
KR101126177B1 (ko) * 2009-11-06 2012-03-22 서강대학교산학협력단 사용기록 기반의 동적 스케줄링 방법, 장치 및 그 기록 매체
KR101653204B1 (ko) * 2010-03-16 2016-09-01 삼성전자주식회사 멀티 코어 시스템에서 데이터 병렬 처리를 위한 동적 태스크 관리 시스템 및 방법
US9021541B2 (en) 2010-10-14 2015-04-28 Activevideo Networks, Inc. Streaming digital video between video devices using a cable television system
US9204203B2 (en) 2011-04-07 2015-12-01 Activevideo Networks, Inc. Reduction of latency in video distribution networks using adaptive bit rates
EP2815582B1 (en) 2012-01-09 2019-09-04 ActiveVideo Networks, Inc. Rendering of an interactive lean-backward user interface on a television
US9800945B2 (en) 2012-04-03 2017-10-24 Activevideo Networks, Inc. Class-based intelligent multiplexing over unmanaged networks
US9123084B2 (en) 2012-04-12 2015-09-01 Activevideo Networks, Inc. Graphical application integration with MPEG objects
WO2014145921A1 (en) 2013-03-15 2014-09-18 Activevideo Networks, Inc. A multiple-mode system and method for providing user selectable video content
US9219922B2 (en) 2013-06-06 2015-12-22 Activevideo Networks, Inc. System and method for exploiting scene graph information in construction of an encoded video sequence
US9294785B2 (en) 2013-06-06 2016-03-22 Activevideo Networks, Inc. System and method for exploiting scene graph information in construction of an encoded video sequence
EP3005712A1 (en) 2013-06-06 2016-04-13 ActiveVideo Networks, Inc. Overlay rendering of user interface onto source video
CN103336756B (zh) * 2013-07-19 2016-01-27 中国人民解放军信息工程大学 一种数据计算节点的生成装置
US9788029B2 (en) 2014-04-25 2017-10-10 Activevideo Networks, Inc. Intelligent multiplexing using class-based, multi-dimensioned decision logic for managed networks

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JPH11259318A (ja) * 1998-03-13 1999-09-24 Hitachi Ltd ディスパッチ方式
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JP2002202893A (ja) * 2000-10-24 2002-07-19 Texas Instruments Inc 多重タスクの実行を制御する方法と処理回路

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JP2002183750A (ja) * 2000-10-04 2002-06-28 Terarikon Inc レンダリングシステム及びレンダリング方法
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Cited By (8)

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Publication number Priority date Publication date Assignee Title
JP2015532990A (ja) * 2012-09-27 2015-11-16 インテル・コーポレーション 複数のコアを有するプロセッサ、共有コア拡張ロジック及び複数の共有コア拡張使用命令
US9582287B2 (en) 2012-09-27 2017-02-28 Intel Corporation Processor having multiple cores, shared core extension logic, and shared core extension utilization instructions
JP2017224342A (ja) * 2012-09-27 2017-12-21 インテル・コーポレーション プロセッサ及び装置
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Also Published As

Publication number Publication date
GB2432937A (en) 2007-06-06
KR20070058995A (ko) 2007-06-11
KR20090046761A (ko) 2009-05-11
GB0624331D0 (en) 2007-01-17
GB2432937B (en) 2010-03-24
US20070130446A1 (en) 2007-06-07

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