JP2007154288A - Method of manufacturing built-up multilayer printed circuit board - Google Patents

Method of manufacturing built-up multilayer printed circuit board Download PDF

Info

Publication number
JP2007154288A
JP2007154288A JP2005354279A JP2005354279A JP2007154288A JP 2007154288 A JP2007154288 A JP 2007154288A JP 2005354279 A JP2005354279 A JP 2005354279A JP 2005354279 A JP2005354279 A JP 2005354279A JP 2007154288 A JP2007154288 A JP 2007154288A
Authority
JP
Japan
Prior art keywords
film
metal compound
metal
passivation
resist mask
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Withdrawn
Application number
JP2005354279A
Other languages
Japanese (ja)
Inventor
Hideo Honma
英夫 本間
Ichiro Koiwa
一郎 小岩
Akira Hashimoto
晃 橋本
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Kanto Gakuin University Surface Engineering Research Institute
Original Assignee
Kanto Gakuin University Surface Engineering Research Institute
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Kanto Gakuin University Surface Engineering Research Institute filed Critical Kanto Gakuin University Surface Engineering Research Institute
Priority to JP2005354279A priority Critical patent/JP2007154288A/en
Publication of JP2007154288A publication Critical patent/JP2007154288A/en
Withdrawn legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • H01L2224/161—Disposition
    • H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/16225—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/16227—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation the bump connector connecting to a bond pad of the item

Landscapes

  • Chemically Coating (AREA)
  • Production Of Multi-Layered Print Wiring Board (AREA)
  • Wire Bonding (AREA)

Abstract

<P>PROBLEM TO BE SOLVED: To provide a method of manufacturing a built-up multilayer printed circuit board, by which a bump or an under-barrier metal (UBM) can be formed by electroless plating and the manufacturing process can be made short, and in which the surface state of a base wiring metal gives little influence on the bump or the UBM. <P>SOLUTION: The method of manufacturing the built-up multilayer printed circuit board comprises: forming a coating film of a metal compound before peeling a resist mask on a substrate after completion of predetermined wiring and pattern etching of a passivation; then (a) reducing the coating film of the metal compound formed on a wiring part after peeling and removing the resist mask and the coating film of the metal compound on the passivation or (b) peeling and removing the resist mask and the coating film of the metal compound on the passivation after reducing the coating film of the metal compound formed on the wiring part; and forming the bump or the UBM by electroless plating on the obtained metal film while utilizing the obtained metal film as an activation catalyst film for electroless plating and an intermediate film. <P>COPYRIGHT: (C)2007,JPO&INPIT

Description

この発明は、大規模集積回路（ＬＳＩ）等の実装において、基板の所定の配線部上に金属の中間膜を形成し、この中間膜を無電解めっきのための活性化触媒膜として利用して、この中間膜上に無電解めっきでバンプ又はアンダーバリアメタル（以下ＵＢＭという）を形成させてビルトアップを行うビルトアップ多層プリント配線基板の製造方法に関するものである。 The present invention forms a metal intermediate film on a predetermined wiring portion of a substrate and mounts the intermediate film as an activation catalyst film for electroless plating in mounting a large scale integrated circuit (LSI) or the like. The present invention relates to a method for manufacturing a built-up multilayer printed wiring board in which bumps or under-barrier metal (hereinafter referred to as UBM) are formed on the intermediate film by electroless plating and built-up is performed.

近年、多層プリント配線基板においては、各層内に形成された回路同士、又は外部の回路と接続するための端子を半導体チップ周囲に電極パッドとして引き出し、ワイヤボンディングなどにより外部リードと接続するように形成されている。そして、最近では、電子部品の小形化、組立の省力化などの点から、高密度実装の必要性が益々高まっており、ワイヤボンディングを使用しないで、電極パッドにバンプを形成し、バンプを直接相手の端子又はリードなどと接続する構造が採られている。バンプを用いてＩＣチップをフェースダウンで実装するフリップチップ方式は理想に近い高密度実装方式であり、その重要性は益々高まっている。   In recent years, multilayer printed wiring boards are formed so that terminals formed in each layer or terminals for connection to external circuits are drawn out as electrode pads around the semiconductor chip and connected to external leads by wire bonding or the like. Has been. Recently, the need for high-density mounting has increased more and more from the viewpoint of miniaturization of electronic parts and labor saving of assembly, and bumps are formed directly on electrode pads without using wire bonding. A structure for connecting to a counterpart terminal or lead is adopted. The flip chip method of mounting IC chips face down using bumps is a high density mounting method that is close to ideal, and its importance is increasing more and more.

図１にバンプ形成方式の代表例を示す。最も一般的な方法は、電解めっき法により、形成する方法であり、図１の(1)に示すように、基板全面に、主にスパッタリング法により、バリアメタルを形成する。このバリアメタルは電極パッドとバンプとの密着力の確保とバンプと電極パッドの相互拡散を防止するために用いる。続いて、レジストを塗布してレジストパターンを形成して、電極パッドの部分のみ開口する。開口部に、電解めっきによりバンプを形成する。その後レジストマスクを除去して、最後にレジストマスクで保護されていた非めっき部分のバリアメタルを除去して、電解めっき法によりバンプが形成される。   FIG. 1 shows a typical example of the bump formation method. The most common method is a method of forming by an electrolytic plating method. As shown in FIG. 1 (1), a barrier metal is formed on the entire surface of the substrate mainly by a sputtering method. This barrier metal is used to ensure adhesion between the electrode pad and the bump and to prevent mutual diffusion between the bump and the electrode pad. Subsequently, a resist is applied to form a resist pattern, and only the electrode pad portion is opened. Bumps are formed in the openings by electrolytic plating. Thereafter, the resist mask is removed, and finally, the barrier metal of the non-plated portion protected by the resist mask is removed, and bumps are formed by electrolytic plating.

一方、無電解めっき法では、図１の(2)に示すように、配線がアルミニウム（Ａｌ）又は銅（Ｃｕ）により異なってくる。配線がＡｌの場合は、Ａｌの電極パッド上にジンケート処理を行う。これは、Ａｌの一部を亜鉛の置換めっきにより変えることにより、めっきの析出核にするためである。Ａｌは次亜リン酸の触媒活性が低いので、Ａｌには直接無電解Ｎｉ-Ｐめっきができない。また、Ａｌの表面には酸化膜が形成されているので、このようなジンケート処理が有効である。次いで、無電解Ｎｉ-Ｐめっきを行い、その無電解Ｎｉ-Ｐめっきの上に金のフラッシュめっきを行ってバンプを形成している。   On the other hand, in the electroless plating method, as shown in (2) of FIG. 1, the wiring differs depending on aluminum (Al) or copper (Cu). When the wiring is Al, a zincate process is performed on the Al electrode pad. This is because a part of Al is changed by zinc substitution plating to form plating nuclei. Since Al has low catalytic activity of hypophosphorous acid, electroless Ni—P plating cannot be applied directly to Al. In addition, since an oxide film is formed on the surface of Al, such a zincate treatment is effective. Next, electroless Ni—P plating is performed, and gold flash plating is performed on the electroless Ni—P plating to form bumps.

配線がＣｕの場合は、Ｃｕ電極パッドの上に、Ｐｄ処理を行い、無電解めっきの触媒核であるパラジウムをつけて、無電解Ｎｉ-Ｐめっきを行い、その無電解Ｎｉ-Ｐめっきの上に、Ａｕフラッシュめっきを行ってバンプを形成している。   When the wiring is Cu, Pd treatment is performed on the Cu electrode pad, palladium as a catalyst core of electroless plating is applied, electroless Ni-P plating is performed, and the electroless Ni-P plating is applied. Further, Au flash plating is performed to form bumps.

図１より明らかなように、電解めっき法に比して、無電解めっき法でバンプを形成する方が、工程数が少なく、特に、レジストパターンを使用していないので、製造段階では、納期やコストの面から有望であることが分かる。
これらのことがらは、非特許文献１に記載されている。 As is apparent from FIG. 1, the bumps are formed by the electroless plating method compared to the electroplating method because the number of processes is small, and in particular, the resist pattern is not used. It turns out that it is promising in terms of cost.
These matters are described in Non-Patent Document 1.

しかしながら、無電解めっき法によるバンプ形成が主流にならない理由は、電極パッド表面の多様性にある。例えば、Ａｌ配線の場合は、電極バッドの表面状態がＡｌ、Ａｌ-Ｃｕ、Ａｌ-Ｓｉ-Ｃｕなどであり、また、形成温度も、常温や４００℃や５００℃など、まちまちであり、かつ、パッシベーションのエッチングなどにより、表面にフッ化物や酸化物が形成されている（例えば、フッ素系のエッチングガスを用いると表面にアルミニウムのフッ化物が生じる）。このように、電極パッドの表面状態が種々様々であり、表面状態に大きな悪影響を受ける無電解めっきでは、その度に表面処理の最適化が必要になり、実用性が低くなる。   However, the reason why bump formation by electroless plating does not become mainstream is the diversity of electrode pad surfaces. For example, in the case of Al wiring, the surface state of the electrode pad is Al, Al—Cu, Al—Si—Cu, etc., and the formation temperature is various such as normal temperature, 400 ° C., 500 ° C., and Fluoride or oxide is formed on the surface by passivation etching or the like (for example, when a fluorine-based etching gas is used, aluminum fluoride is generated on the surface). As described above, in the electroless plating in which the surface state of the electrode pad is various and greatly affects the surface state, it is necessary to optimize the surface treatment each time and the practicality is lowered.

他方電解めっき方式においては、バリアメタルを形成するために、電極パッドの表面状態には大きな影響を受けない。   On the other hand, in the electrolytic plating method, since the barrier metal is formed, the surface state of the electrode pad is not greatly affected.

畑田謙造、“無電解めっき方式によるバンプ、ＵＢＭ形成技術の現状と動向”、エレクトロニクス実装学会誌 Vol.8、No.4、pp.330-338（2005）Kenzo Hatada, “Current Status and Trends of Electroless Plating Bump and UBM Formation Technology”, Journal of Japan Institute of Electronics Packaging Vol.8, No.4, pp.330-338 (2005)

このような状況に鑑み、この発明は、無電解めっきでバンプ又はＵＢＭを形成することができて、製造工程を短縮できて、下地配線金属の表面状態の影響を小さくすることができるビルトアップ多層プリント配線基板の製造方法を提供することを目的とする。   In view of such circumstances, the present invention is capable of forming bumps or UBM by electroless plating, shortening the manufacturing process, and reducing the influence of the surface state of the underlying wiring metal. It aims at providing the manufacturing method of a printed wiring board.

前記課題を解決するための、請求項１の発明は、所定の配線を終えてパッシベーションのパターンエッチングが終了した後、パッシベーション上のレジストマスクを剥離する前に、基板上に塗布法により金属化合物の被膜を形成し、（ａ）パッシベーション上のレジストマスク及び金属化合物の被膜を剥離除去した後、所定の配線部上に形成された金属化合物の被膜を還元し、又は（ｂ）所定の配線部上に形成された金属化合物の被膜を還元した後、パッシベーション上のレジストマスク及び金属化合物の被膜を剥離除去し、前記金属化合物の被膜を還元して得られる金属膜を無電解めっきのための活性化触媒膜として利用すると共に中間膜として、この中間膜上に無電解めっきでバンプ又はアンダーバリアメタル（ＵＢＭ）を形成することを特徴とするビルトアップ多層プリント配線基板の製造方法である。
請求項２の発明は、金属化合物が亜鉛化合物であることを特徴とする請求項１記載のビルトアップ多層プリント配線基板の製造方法である。
請求項３の発明は、金属化合物がパラジウム化合物であることを特徴とする請求項１記載のビルトアップ多層プリント配線基板の製造方法である。 In order to solve the above-mentioned problem, the invention according to claim 1 is characterized in that after a predetermined wiring is finished and the passivation pattern etching is finished, before the resist mask on the passivation is removed, the metal compound is applied onto the substrate by a coating method. Forming a film, (a) peeling and removing the resist mask and metal compound film on the passivation, and then reducing the metal compound film formed on the predetermined wiring part, or (b) on the predetermined wiring part After the metal compound film formed on the metal film is reduced, the resist mask on the passivation and the metal compound film are peeled and removed, and the metal film obtained by reducing the metal compound film is activated for electroless plating. A bump or under barrier metal (UBM) is formed on the intermediate film by electroless plating as an intermediate film as well as a catalyst film. A build-up multilayer printed wiring board manufacturing method characterized.
The invention of claim 2 is the method for producing a built-up multilayer printed wiring board according to claim 1, wherein the metal compound is a zinc compound.
The invention of claim 3 is the method for producing a built-up multilayer printed wiring board according to claim 1, wherein the metal compound is a palladium compound.

この発明は、前記のように構成されているので、所定の配線部（電極パッド）の上に金属の中間膜を形成させて、これを利用してこの中間膜上に無電解めっきを施してバンプ又はＵＢＭを形成するので、ビルトアップ多層プリント配線基板の製造工程を少なくすることができて、バンプ又はＵＢＭが下地となる金属の表面状態に影響されることがなく形成できる。   Since the present invention is configured as described above, a metal intermediate film is formed on a predetermined wiring portion (electrode pad), and electroless plating is performed on the intermediate film using this metal film. Since the bumps or UBM are formed, the manufacturing process of the built-up multilayer printed wiring board can be reduced, and the bumps or UBM can be formed without being affected by the surface state of the underlying metal.

以下、本発明を詳細に説明する。
１．まず、多層プリント基板の製造において、所定の配線を終え、パッシベーションのエッチングが終了した後、所定の配線部上、例えば電極パッド上に塗布法により中間膜を形成し、バンプ又はＵＢＭを形成する方法について述べる。 Hereinafter, the present invention will be described in detail.
1. First, in the manufacture of a multilayer printed board, a method of forming a bump or UBM by forming an intermediate film by a coating method on a predetermined wiring portion, for example, an electrode pad after finishing predetermined wiring and completing passivation etching Is described.

(1) 配線材料がＡｌの場合
図２に示すように、所定の配線が終了した基板上に気相成膜法（プラズマ・Chemical Vapor Deposition：CVD）で、パッシベーション(不動態処理）層として通常シリコン窒化膜を形成する。そして、パッシベーション上にレジスト膜を形成し、パターニングし、フッ素系のガスを用いてパッシベーションの非レジストマスク部をエッチング処理して、図３に示すようにＡｌ配線上の所定部位、例えばＡｌ電極パッドを開口露出させる。その後、図４に示すように、基板上に塗布法により金属化合物の被膜を形成させる。そして、（ａ）パッシベーション上のレジストマスク及び金属化合物の被膜を剥離除去し、Ａｌ電極パッド上の金属化合物の被膜を還元処理するか、（ｂ）Ａｌ電極パッド上の金属化合物の被膜を還元処理した後、パッシベーション上のレジストマスク及び金属化合物の被膜を剥離除去する。そして前記金属化合物の被膜を還元処理して金属化して得られた金属膜を無電解めっきのための活性化触媒膜として利用すると共に中間膜として、この中間膜上に無電解めっきでバンプ又はＵＢＭを形成する。 (1) When the wiring material is Al As shown in Fig. 2, it is usually used as a passivation layer by a vapor deposition method (plasma / chemical vapor deposition (CVD)) on a substrate on which predetermined wiring has been completed. A silicon nitride film is formed. Then, a resist film is formed and patterned on the passivation, and the non-resist mask portion of the passivation is etched using a fluorine-based gas, so that a predetermined portion on the Al wiring, for example, an Al electrode pad, as shown in FIG. To expose the opening. Thereafter, as shown in FIG. 4, a metal compound film is formed on the substrate by a coating method. Then, (a) the resist mask and metal compound film on the passivation are peeled and removed, and the metal compound film on the Al electrode pad is reduced, or (b) the metal compound film on the Al electrode pad is reduced. After that, the resist mask and the metal compound film on the passivation are peeled and removed. A metal film obtained by metallizing the metal compound film by reduction treatment is used as an activation catalyst film for electroless plating, and as an intermediate film, bumps or UBM are formed on the intermediate film by electroless plating. Form.

図５には、Ａｌ電極パッド上に塗布法で金属化合物の被膜を形成させ、パッシベーション上のレジストマスク及び金属化合物の被膜を剥離除去し、Ａｌ電極パッド上の金属化合物の被膜にＵＶを照射して光分解、還元して金属の中間膜を得る工程が示されている。そして還元前の金属化合物の被膜は酸化亜鉛化合物で形成されていて、Ａｌ電極パッド上のこの酸化亜鉛化合物の被膜はＵＶを照射して光分解、還元して金属化し、金属亜鉛の中間膜を形成する。
図６にはバンプ形成工程を示す。上記のようにして得られた金属亜鉛の中間膜上に無電解めっきにより、Ｎｉ−Ｐめっきを施し、上部を置換金により、フラッシュ金めっきを行い、バンプを形成させた。 In FIG. 5, a metal compound film is formed on the Al electrode pad by a coating method, the resist mask on the passivation and the metal compound film are peeled off, and the metal compound film on the Al electrode pad is irradiated with UV. A process for obtaining a metal intermediate film by photolysis and reduction is shown. The metal compound film before the reduction is formed of a zinc oxide compound, and the zinc oxide compound film on the Al electrode pad is irradiated with UV to be photolyzed, reduced and metallized, and an intermediate film of metal zinc is formed. Form.
FIG. 6 shows a bump forming process. On the metallic zinc intermediate film obtained as described above, Ni-P plating was performed by electroless plating, and the upper part was subjected to flash gold plating with substitutional gold to form bumps.

(2) 配線材料がＣｕの場合
上記(1)の場合は、配線材料がＡｌの場合について述べたが配線材料がＣｕの場合について述べる。
この場合は、亜鉛化合物を含有する塗布液でなく、Ｐｄ化合物を含有する塗布液を用いる。Ｃｕ電極パッド上に形成されたＰｄ化合物の被膜はＵＶ照射、光加熱、高周波加熱等により、還元されて金属化してＰｄの中間膜を形成する。Ｐｄは白金族であるために、ＵＶ照射により還元、金属化され易い。Ｃｕ電極パッド上に、Ｐｄからなる中間膜がアイランド状又は被膜状に形成されていると、無電解Ｎｉ−Ｐめっきが中間膜上に形成されてバンプを形成する。そして、Ｃｕ電極パッドとバンプの間に、Ｐｄの金属核や膜が介在するので、Ｃｕ電極パッドの表面状態に依存しないで、バンプが形成されることになり、積層基板製造プロセスの自由度が高まる。 (2) When the wiring material is Cu In the case of (1) above, the case where the wiring material is Al has been described, but the case where the wiring material is Cu will be described.
In this case, a coating solution containing a Pd compound is used instead of a coating solution containing a zinc compound. The Pd compound film formed on the Cu electrode pad is reduced and metallized by UV irradiation, light heating, high-frequency heating or the like to form an intermediate film of Pd. Since Pd is a platinum group, it is easily reduced and metallized by UV irradiation. When the intermediate film made of Pd is formed in an island shape or a film shape on the Cu electrode pad, an electroless Ni—P plating is formed on the intermediate film to form a bump. And since the metal nucleus and film | membrane of Pd intervene between Cu electrode pad and bump, a bump will be formed without being dependent on the surface state of Cu electrode pad, and the freedom degree of a multilayer substrate manufacturing process is obtained. Rise.

(3) 上記(1)又は(2)と同様にして形成された中間膜上に無電解めっきを施してＵＢＭ（Under Barrier Metal）として使用する。無電解めっきを行う際、めっきの厚さを１〜５μｍと薄くしてＵＢＭとする。例えば、前記(1)配線材料がＡｌの場合と同様にして、中間膜を形成し、その中間膜上に、無電解Ｎｉ−Ｐめっきをパッシベーション層と同じ程度の高さまで形成してＵＢＭを形成し、その上にはんだ端子を形成する。Ａｌ電極パッドの上に亜鉛金属層、無電解Ｎｉ-Ｐめっき層、その上にはんだ層が形成されていて、このように形成されていることにより、無電解Ｎｉ−Ｐめっき膜が、ＵＢＭとして作用するので、はんだと電極パッド間の拡散が抑制され、かつ、十分な密着力が得られる。はんだ端子の形成は、はんだボールを載せて形成しても、はんだクリームをスクリーン印刷法により、形成してもよい。 (3) The intermediate film formed in the same manner as in (1) or (2) above is subjected to electroless plating and used as UBM (Under Barrier Metal). When performing electroless plating, the thickness of the plating is reduced to 1 to 5 μm to obtain UBM. For example, (1) an intermediate film is formed in the same way as when the wiring material is Al, and an electroless Ni-P plating is formed on the intermediate film to the same height as the passivation layer to form a UBM. Then, a solder terminal is formed thereon. A zinc metal layer, an electroless Ni-P plating layer, and a solder layer are formed on the Al electrode pad. By forming in this way, an electroless Ni-P plating film is formed as UBM. Since it acts, the diffusion between the solder and the electrode pad is suppressed, and sufficient adhesion can be obtained. The solder terminals may be formed by placing solder balls or solder cream by screen printing.

２．次に、塗布法によって中間膜を形成する方法について説明する。
(1) 第一の方法（ＵＶ照射還元法）
塗布液は、基本的には、金属化合物、バインダー及び溶剤からなり、該塗布液を所定の部位に塗布し、乾燥、焼成し、金属化合物の被膜を形成させ、被膜の所定部位にＵＶを直接照射して金属化合物を還元して金属化して中間膜をアイランド状又は被膜状に形成させる。
塗布液の成分割合は重量％で金属化合物：バインダー：水溶剤＝２０〜０．１：２０〜０．１：９６〜３０、好ましくは１０〜０．５：１０〜０．２：８０〜９５とする。
また、塗布方法としては、スピン塗布、ディップ塗布、スプレイ塗布、インクジェット塗布などが挙げられ、スピン塗布が好ましい。
スピン塗布の例を次に示す。
塗布条件は、１００ｒｐｍ〜２０００ｒｐｍ、１０秒〜９０秒間で行う。塗布膜の乾燥条件は、オーブン、ホットプレート乾燥では、１〜３段の４０℃〜２００℃で５秒〜３０分間行う。乾燥後の塗布膜の焼成条件は、オーブン、ホットプレート、ファーネス等で、真空、窒素、不活性ガス等の雰囲気で、できるだけ酸化をさせない雰囲気で行うのが好ましく、２００℃〜４００℃、３分〜３０分間行う。その後得られた金属化合物にＵＶ照射して還元する。ＵＶ照射は、低圧水銀灯、キセノン・エキシマランプ、ＵＶレーザー等の紫外線を照射する。照射時間は数秒〜６０分間行う。 2. Next, a method for forming an intermediate film by a coating method will be described.
(1) First method (UV irradiation reduction method)
The coating solution is basically composed of a metal compound, a binder, and a solvent. The coating solution is applied to a predetermined portion, dried and baked to form a metal compound coating, and UV is directly applied to the predetermined portion of the coating. Irradiation reduces the metal compound and metallizes it to form an intermediate film in the form of an island or film.
The component ratio of the coating solution is% by weight, metal compound: binder: aqueous solvent = 20 to 0.1: 20 to 0.1: 96 to 30, preferably 10 to 0.5: 10 to 0.2: 80 to 95. And
Examples of the coating method include spin coating, dip coating, spray coating, and inkjet coating, and spin coating is preferable.
An example of spin coating is shown below.
The coating conditions are 100 rpm to 2000 rpm, 10 seconds to 90 seconds. The drying condition of the coating film is 1 to 3 steps of 40 ° C. to 200 ° C. for 5 seconds to 30 minutes in oven and hot plate drying. The baking conditions of the coating film after drying are preferably performed in an atmosphere such as vacuum, nitrogen, inert gas, etc. in an oven, a hot plate, a furnace, etc., in an atmosphere that does not oxidize as much as possible. Perform for ~ 30 minutes. Thereafter, the obtained metal compound is reduced by UV irradiation. UV irradiation irradiates ultraviolet rays such as a low-pressure mercury lamp, a xenon / excimer lamp, and a UV laser. The irradiation time is several seconds to 60 minutes.

(2) 第二の方法（ＵＶ照射還元法、光加熱還元法、高周波加熱還元法）
塗布液は基本的には、金属化合物、カーボン化合物（光吸収剤と還元剤の兼用）、バインダー及び水溶剤よりなり、該塗布液を、所定の部位に塗布し、乾燥、焼成し、金属化合物の被膜を形成させ、得られた被膜を構成している金属化合物を還元して金属化して中間膜をアイランド状又は被膜状に形成させる。
塗布液の成分割合は重量％で金属化合物：カーボン化合物：バインダー：水溶剤＝０．１〜２０：０．１〜２０：０〜２０：６０〜９８、好ましくは５〜１０：５〜１０：１０〜５：９５〜８０とする。
塗布方法としては、スピンコート、ディップコート、スプレイコート等の方法が挙げられ、スピン塗布が好ましく、スピン塗布は、１００ｒｐｍ〜２０００ｒｐｍ、１０秒〜６０秒間とするのが好ましい。
得られた塗布膜の乾燥条件は、オーブン、ホットプレート乾燥で、１〜３段の４０℃〜２００℃、５秒〜３０分間とするのが好ましい。乾燥した塗布膜の焼成条件は、オーブン、ホットプレート、ファーネスで、真空、窒素、空気中で、２００℃〜４００℃、３分〜３０分間行うのが好ましい。
金属化合物を還元するためには、低圧・高圧水銀灯、キセノンランプ、キセノン・エキシマランプ、熱線、各種レーザー光を照射する。照射条件は、１分〜６０分間行い、レーザーの場合は極短時間でもよい。特に、カーボン化合物が添加されている場合は、紫外線照射還元でなくても、長波長の光照射により、熱線で、自己局部加熱により、短時間で高温化が起こり、高温の炭素が金属化合物を“還元化”させる、還元雰囲気になる。 (2) Second method (UV irradiation reduction method, light heating reduction method, high-frequency heating reduction method)
The coating solution is basically composed of a metal compound, a carbon compound (a combination of a light absorber and a reducing agent), a binder, and an aqueous solvent. The coating solution is applied to a predetermined site, dried and fired, and then the metal compound. Then, the metal compound constituting the obtained film is reduced and metallized to form the intermediate film in an island shape or a film shape.
The component ratio of the coating solution is% by weight: metal compound: carbon compound: binder: aqueous solvent = 0.1-20: 0.1-20: 0-20: 60-98, preferably 5-10: 5-10: 10 to 5: 95 to 80.
Examples of the coating method include spin coating, dip coating, spray coating, and the like. Spin coating is preferable, and spin coating is preferably performed at 100 rpm to 2000 rpm for 10 seconds to 60 seconds.
The drying condition of the obtained coating film is preferably 1 to 3 steps of 40 ° C. to 200 ° C. and 5 seconds to 30 minutes by oven and hot plate drying. As for the baking conditions of the dried coating film, it is preferable to carry out in an oven, a hot plate, and a furnace in a vacuum, nitrogen, and air at 200 ° C. to 400 ° C. for 3 minutes to 30 minutes.
In order to reduce metal compounds, low-pressure / high-pressure mercury lamps, xenon lamps, xenon / excimer lamps, heat rays, and various types of laser light are irradiated. Irradiation is performed for 1 to 60 minutes, and in the case of a laser, it may be an extremely short time. In particular, when a carbon compound is added, even if it is not UV irradiation reduction, high temperature occurs in a short time by heat irradiation, self-local heating by long-wavelength light irradiation, and the high-temperature carbon converts the metal compound. A “reducing” atmosphere is created.

（3） 塗布液
上記(1)第一の方法及び(2)第二の方法において、塗布液に用いられる金属化合物としては、水溶性又は水分散性の亜鉛化合物、水溶性又は水分散性のパラジウム化合物が用いられ、亜鉛化合物としては、Ｚｎ・ハロゲン化合物（Ｂｒ，Ｉ）、酢酸亜鉛、硝酸亜鉛化合物、グルコン酸亜鉛、乳酸亜鉛、ＺｎＯ・微粒子等が挙げられる。
また、パラジウム化合物としては、パラジウムのハロゲン化合物（Ｂｒ、Ｉ）、酢酸パラジウム、パラジウムの硝酸化合物、Ｐｄ・アミン化合物、Ｐｄ・微粒子、Ｐｄ−Ａｇ微粒子等が挙げられる。 (3) Coating solution In the above (1) first method and (2) second method, the metal compound used in the coating solution is a water-soluble or water-dispersible zinc compound, water-soluble or water-dispersible. A palladium compound is used, and examples of the zinc compound include Zn / halogen compounds (Br, I), zinc acetate, zinc nitrate compounds, zinc gluconate, zinc lactate, ZnO / fine particles, and the like.
Examples of the palladium compound include palladium halogen compounds (Br, I), palladium acetate, palladium nitrate compounds, Pd / amine compounds, Pd / fine particles, and Pd—Ag fine particles.

さらに、バインダーとその溶媒について述べると、バインダーはそれを溶解する溶媒と共に用いられる。水溶性バインダーとしては、ＰＶＡ（ポリビニルアルコール）、ＰＶＰ（ポリビニルピロリドン）等が挙げられ、界面活性剤としても使用されているポリ・グリコール系の樹脂、ポリ・エーテル系樹脂等も用いられる。アルコール可溶性バインダーとしては、ＰＶＰ、ブチラール樹脂、ポリヒドロキシアクリル酸、ポリメタアクリル酸等が挙げられる。アルコール可溶性バインダーとしては、最も広く使え、燃焼性、接着性の良いバインダーであり、中でもポリヒドロキシプロピルメタアクリレートは、合成も容易であり、好適に用いられる。さらにエステル可溶性バインダーとしては、ＰＭＭＡ（ポリメチルメタアクリレート）、ポリ酢酸ビニル、アクリル酸−メタアクリル酸樹脂等の単独あるいは共重合体が挙げられる。ケトン類可溶性バインダーとしては、ＰＭＭＡ、アクリル・メタアクリル樹脂等の単独あるいは共重合体が用いられ、キシレン、トルエン、リモネン（ポジ型フォトレジストを侵さない）可溶性バインダーとしては、ポリスチレン、ポリメチルスチレン等が挙げられる。これらのバインダー樹脂は、２５０℃、酸素無しで、解重合分解する。なお、溶剤は、上記のようにバインダーと対応したものを主成分として使用し、塗布条件により、複数種の溶剤を組み合わせてもよい。   Further, regarding the binder and its solvent, the binder is used together with a solvent for dissolving it. Examples of the water-soluble binder include PVA (polyvinyl alcohol) and PVP (polyvinyl pyrrolidone). Poly-glycol resins and poly-ether resins that are also used as surfactants are also used. Examples of the alcohol-soluble binder include PVP, butyral resin, polyhydroxyacrylic acid, and polymethacrylic acid. As the alcohol-soluble binder, it is the binder that is most widely used and has good flammability and adhesiveness. Among them, polyhydroxypropyl methacrylate is easy to synthesize and is preferably used. Furthermore, examples of the ester-soluble binder include PMMA (polymethyl methacrylate), polyvinyl acetate, acrylic acid-methacrylic acid resin, and the like alone or a copolymer. As the ketone-soluble binder, a single or copolymer such as PMMA, acrylic / methacrylic resin or the like is used, and as xylene, toluene, limonene (which does not attack positive photoresist), the soluble binder includes polystyrene, polymethylstyrene, and the like. Is mentioned. These binder resins are depolymerized and decomposed at 250 ° C. and without oxygen. In addition, a solvent corresponding to a binder as described above is used as a main component, and a plurality of types of solvents may be combined depending on coating conditions.

また、電極パッドを露出させるためのパッシベーション上に形成されるレジスト被膜は感光性樹脂よりなり、ゴム系、ナフトキノン系、化学増感系の樹脂等多種類のものから選ぶことができる。感光性樹脂は有機溶媒に溶解する樹脂よりなるので、中間膜を形成するための塗布液に有機溶剤可溶性のバインダーを用いた場合、塗布液に使用する有機溶剤が、レジストマスクを侵すことがある。したがって塗布液に用いるバインダーは、レジストマスクを侵すことがない溶剤を用いる水溶性バインダーであるＰＶＡ系、セルロース系とすることが好ましい。
実用上、後述の実施例においては、パッシベーション上に形成されるレジストマスクは、フェノール・ノボラック樹脂等のナフトキノンのポジ型レジストを使用していて、アルコール系溶剤、ケトン系溶剤、エステル系溶剤、Ｎ−メチルピロリドン等の窒素系溶剤に可溶であるので、塗布液のバインダーを「水系の溶剤に可溶な樹脂」に絞って使用した。しかし、経済性、実用性を無視して作成するのであれば、レジストとしてベンゼン、キシレン系溶媒以外の溶剤に耐えうる「ネガ型のゴム系感光性樹脂」を用い、塗布液をアルコール可溶性の樹脂と金属化合物及びアルコールの組み合わせも考えうる。 Further, the resist film formed on the passivation for exposing the electrode pads is made of a photosensitive resin, and can be selected from various types such as rubber-based, naphthoquinone-based, and chemically sensitized-based resins. Since the photosensitive resin is made of a resin that dissolves in an organic solvent, when an organic solvent-soluble binder is used in the coating solution for forming the intermediate film, the organic solvent used in the coating solution may attack the resist mask. . Accordingly, the binder used in the coating solution is preferably a PVA-based or cellulose-based binder that is a water-soluble binder using a solvent that does not attack the resist mask.
In practice, in the examples described later, the resist mask formed on the passivation uses a positive type resist of naphthoquinone such as phenol and novolak resin, and alcohol solvent, ketone solvent, ester solvent, N -Because it is soluble in nitrogen-based solvents such as methylpyrrolidone, the binder of the coating solution was limited to “resin soluble in aqueous solvents”. However, if it is made ignoring economy and practicality, “negative rubber-type photosensitive resin” that can withstand solvents other than benzene and xylene solvents is used as a resist, and the coating solution is an alcohol-soluble resin. A combination of a metal compound and an alcohol is also conceivable.

また、前記金属化合物のうち、金属硝酸化合物、ハロゲン化物、カルボン酸化物、アミン化合物の多くは水、アルコール可溶性である。そして、金属硝酸化合物の多くはアルコール可溶性であり、有機溶剤中では、自己分解しやすいので、β−ジケトン類、グリコール類を塗布液に１〜数モル添加し、配位・錯体化させると、塗布液の保存性が上がるので、添加しておくことが好ましい。   Of the metal compounds, many of metal nitrate compounds, halides, carboxyl oxides, and amine compounds are soluble in water and alcohol. And most of the metal nitrate compounds are alcohol-soluble, and in organic solvents, they are easily self-decomposing, so adding 1-several moles of β-diketones and glycols to the coating solution, and coordinating and complexing, Since the storage stability of the coating solution is improved, it is preferable to add it.

また、上記(2)第二の方法において、塗布液には光吸収剤及び還元剤が用いられる。光吸収剤としては、カーボン化合物、染料、顔料が用いられる。カーボン化合物は光吸収剤及び還元剤として作用する。カーボン化合物としてはカーボンの微粉末、フラーレン、カーボンナノ粒子、グラファイト類が用いられ、親水化処理されたカーボンが好ましい。   In the second method (2), a light absorber and a reducing agent are used for the coating solution. As the light absorber, a carbon compound, a dye, and a pigment are used. The carbon compound acts as a light absorber and a reducing agent. As the carbon compound, carbon fine powder, fullerene, carbon nanoparticles, and graphites are used, and carbon subjected to hydrophilic treatment is preferable.

前述のように、Ａｌ電極パッドとバンプの間にＺｎの中間膜が、Ｃｕ電極パッドとバンプの間にＰｄの中間膜が形成させると、パッシベーションエッチングでのパターンを利用することができるので、新たなパターニング工程を加えること無く（無電解めっき方式の利点を維持したまま）、また、電極パッドの表面状態に影響されること無くバンプ又はＵＢＭが形成できる。
次に本発明を具体的に説明する。 As described above, if the intermediate film of Zn is formed between the Al electrode pad and the bump and the intermediate film of Pd is formed between the Cu electrode pad and the bump, the pattern in the passivation etching can be used. A bump or UBM can be formed without adding a simple patterning process (while maintaining the advantages of the electroless plating method) and without being affected by the surface state of the electrode pad.
Next, the present invention will be specifically described.

配線材料がＡｌで、所定の配線を終えてパッシベーションのエッチングが終了した後、パッシベーション上のレジストマスクを剥離する前に、下記組成の塗布液を基板上に塗布し、乾燥、焼成して金属化合物の被膜を形成させ、Ａｌ電極パッド上の金属化合物の被膜にＵＶ照射して還元、分解して中間膜としての金属亜鉛膜を形成し、続いてメチルエチルケトンにてレジストマスク部を「リフトオフ剥離」し、イソプロピルアルコールにてリンス洗浄し、中間膜上に無電解Ｎｉ−Ｐめっきでバンプを形成した［ ／Ａｌパッド／Ｚｎ／無電解Ｎｉ−Ｐ ］。ここで用いたレジストマスクはナフトキノン型のポジレジストを使用したので、メチルエチルケトンでレジストマスク部を容易にリフトオフ剥離できた。
このときの中間膜形成のための各種条件を下に示す。
１．塗布液組成：ヨー化Ｚｎ３重量％＋ＰＶＡ１．５重量％＋水９５．５重量％
２．塗布方法：スピン塗布 １０００ｒｐｍ、３０秒間
３．乾燥条件：オーブン、Ａｉｒ中、８０℃、３０分間
４．焼成条件：ファーネス、Ｎ２中、２５０℃、１５分間
５．還元条件：ＵＶ照射［キセノンエキシマランプ（誘電体バリア放電の１７２ｎｍに発光中心波長を持つ）］、Ｎ２ガス雰囲気中、２分〜８分間 After the wiring material is Al and the predetermined wiring is finished and the passivation etching is finished, before the resist mask on the passivation is peeled off, a coating liquid having the following composition is applied onto the substrate, dried and fired to obtain a metal compound. Then, the metal compound film on the Al electrode pad is irradiated with UV to reduce and decompose to form a metal zinc film as an intermediate film, followed by “lift-off peeling” of the resist mask with methyl ethyl ketone. Then, rinsing with isopropyl alcohol was performed, and bumps were formed on the intermediate film by electroless Ni—P plating [/ Al pad / Zn / electroless Ni—P]. Since a naphthoquinone type positive resist was used as the resist mask used here, the resist mask portion could be easily lifted off with methyl ethyl ketone.
Various conditions for forming the intermediate film at this time are shown below.
1. Coating solution composition: Zn iodide 3 wt% + PVA 1.5 wt% + water 95.5 wt%
2. Coating method: Spin coating 1000 rpm, 30 seconds 3. Drying conditions: oven, Air, 80 ° C., 30 minutes 4. Firing conditions: furnace, in N 2 , 250 ° C., 15 minutes 5. Reduction conditions: UV irradiation [xenon excimer lamp (dielectric barrier discharge has an emission center wavelength at 172 nm)], N 2 gas atmosphere, 2 minutes to 8 minutes

配線材料がＡｌで、所定の配線を終えてパッシベーションのエッチングが終了した後、パッシベーション上のレジストマスクを剥離する前に、下記組成の塗布液を基板上に塗布し、乾燥、焼成して金属化合物の被膜を形成させ、パッシベーション上のレジストマスク及び金属化合物の被膜を剥離除去した。そして、Ａｌ電極パッド上の金属化合物の被膜にＵＶ照射して還元して中間膜としての亜鉛膜を形成し、その上に無電解Ｎｉ−Ｐめっきでバンプを形成した［ ／Ａｌパッド／Ｚｎ／無電解Ｎｉ−Ｐ ］。
このときの中間膜形成のための各種条件を次に示す。
１．塗布液組成：酢酸Ｚｎ１重量％＋硝酸Ｚｎ１重量％＋エチレングリコール０．５重量％＋ＰＶＡ２重量％＋水９５．５重量％
２．塗布方法：スピン塗布２０００ｒｐｍ、４０秒間
３．乾燥条件：オーブン、Ａｉｒ中、８０℃、３０分間
４．焼成条件：ファーネス、Ｎ２中、２５０℃、１５分間
５．還元条件：ＵＶ照射［キセノンエキシマランプ（誘電体バリア放電の１７２ｎｍに発光中心波長を持つ）］、Ｎ２ガス雰囲気中、２分〜８分間 After the wiring material is Al and the predetermined wiring is finished and the passivation etching is finished, before the resist mask on the passivation is peeled off, a coating liquid having the following composition is applied onto the substrate, dried and fired to obtain a metal compound. Then, the resist mask and the metal compound film on the passivation were peeled and removed. Then, the metal compound film on the Al electrode pad was reduced by UV irradiation to form a zinc film as an intermediate film, and a bump was formed thereon by electroless Ni-P plating. [/ Al pad / Zn / Electroless Ni-P].
Various conditions for forming the intermediate film at this time are shown below.
1. Composition of coating solution: Zn acetate 1 wt% + Zn nitrate 1 wt% + ethylene glycol 0.5 wt% + PVA 2 wt% + water 95.5 wt%
2. Coating method: Spin coating 2000 rpm, 40 seconds 3. Drying conditions: oven, Air, 80 ° C., 30 minutes 4. Firing conditions: furnace, in N 2 , 250 ° C., 15 minutes 5. Reduction conditions: UV irradiation [xenon excimer lamp (dielectric barrier discharge has an emission center wavelength at 172 nm)], N 2 gas atmosphere, 2 minutes to 8 minutes

配線材料がＡｌで、所定の配線を終えてパッシベーションのエッチングが終了した後、パッシベーション上のレジストマスクを剥離する前に、下記組成の塗布液を基板上に塗布し、乾燥、焼成して金属化合物の被膜を形成させ、パッシベーション上のレジストマスク及び金属化合物の被膜を剥離除去した。そして、Ａｌ電極パッド上の金属化合物の被膜に高周波・レーザーを照射して還元して中間膜としての亜鉛膜を形成し、その上に無電解Ｎｉ−Ｐめっきでバンプを形成した［ ／Ａｌパッド／Ｚｎ／無電解Ｎｉ−Ｐ ］。
このときの中間膜形成のための各種条件を次に示す。
１．塗布液組成：乳酸Ｚｎ２重量％＋ＰＶＡ１重量％＋カーボン２重量％＋水９５重量％
２．塗布方法：スピン塗布１０００ｒｐｍ、６０秒間
３．乾燥条件：オーブン、Ａｉｒ中、８０℃、３０分間
４．焼成条件：ファーネス、Ｎ２中、２５０℃、１５分間
５．還元条件：ＹＡＧ４次高周波・レーザー（ＹＡＧ−ＦＨＧ、２６６ｎｍ、標準光学系による収束スポット径は１５ｕｍ）照射、３秒間 After the wiring material is Al and the predetermined wiring is finished and the passivation etching is finished, before the resist mask on the passivation is peeled off, a coating liquid having the following composition is applied onto the substrate, dried and fired to obtain a metal compound. Then, the resist mask and the metal compound film on the passivation were peeled and removed. Then, the metal compound film on the Al electrode pad was reduced by irradiating a high frequency / laser to form a zinc film as an intermediate film, and a bump was formed thereon by electroless Ni-P plating. / Zn / electroless Ni-P].
Various conditions for forming the intermediate film at this time are shown below.
1. Composition of coating solution: Zn lactate 2% by weight + PVA 1% by weight + carbon 2% by weight + water 95% by weight
2. Coating method: Spin coating 1000 rpm, 60 seconds Drying conditions: oven, Air, 80 ° C., 30 minutes 4. Firing conditions: furnace, in N 2 , 250 ° C., 15 minutes 5. Reduction conditions: YAG fourth-order high frequency laser (YAG-FHG, 266 nm, convergent spot diameter by standard optical system is 15 μm) irradiation, 3 seconds

配線材料がＣｕで、所定の配線を終えてパッシベーションのエッチングが終了した後、パッシベーション上のレジストマスクを剥離する前に、下記組成の塗布液を基板上に塗布し、乾燥、焼成して金属化合物の被膜を形成させ、パッシベーション上のレジストマスク及び金属化合物の被膜を剥離除去した。そして、Ｃｕ電極パッド上の金属化合物の被膜にＵＶ照射して還元して中間膜としてのＰｄ膜を形成し、その上に無電解Ｎｉ−Ｐめっきでバンプを形成した［ ／Ｃｕパッド／Ｐｄ／無電解Ｎｉ−Ｐ ］。
このときの中間膜形成のための各種条件を次に示す。
１．塗布液組成：硝酸Ｐｄ１重量％＋プロピレングリコール０．５重量％＋ＰＶＡ１．０
重量％＋水９７．５重量％
２．塗布方法：スピン塗布２０００ｒｐｍ、３０秒間
３．乾燥条件：オーブン、Ａｉｒ中、８０℃、３０分間
４．焼成条件：ファーネス、Ｎ２中、２５０℃、１５分間
５．還元条件：ＵＶ照射［キセノンエキシマランプ（誘電体バリア放電の１７２ｎｍに発光中心波長を持つ）］、Ｎ２ガス雰囲気中、２分〜８分間 After the wiring material is Cu and the predetermined wiring is finished and the passivation etching is finished, before the resist mask on the passivation is peeled off, a coating liquid having the following composition is applied onto the substrate, dried and fired to obtain a metal compound. Then, the resist mask and the metal compound film on the passivation were peeled and removed. Then, the metal compound film on the Cu electrode pad was reduced by UV irradiation to form a Pd film as an intermediate film, and a bump was formed thereon by electroless Ni—P plating [/ Cu pad / Pd / Electroless Ni-P].
Various conditions for forming the intermediate film at this time are shown below.
1. Coating composition: Pd nitrate 1% by weight + propylene glycol 0.5% by weight + PVA 1.0
Wt% + water 97.5 wt%
2. Coating method: Spin coating 2000 rpm, 30 seconds 3. Drying conditions: oven, Air, 80 ° C., 30 minutes 4. Firing conditions: furnace, in N 2 , 250 ° C., 15 minutes 5. Reduction conditions: UV irradiation [xenon excimer lamp (dielectric barrier discharge has an emission center wavelength at 172 nm)], N 2 gas atmosphere, 2 minutes to 8 minutes

配線材料がＣｕで、所定の配線を終えてパッシベーションのエッチングが終了した後、パッシベーション上のレジストマスクを剥離する前に、下記組成の塗布液を基板上に塗布し、乾燥、焼成して金属化合物の被膜を形成させ、パッシベーション上のレジストマスク及び金属化合物の被膜を剥離除去した。そして、Ｃｕ電極パッド上の金属化合物の被膜にＵＶ照射して還元して中間膜としてのＰｄ膜を形成し、その上に無電解Ｎｉ−Ｐめっきでバンプを形成した［ ／Ｃｕパッド／Ｐｄ／無電解Ｎｉ−Ｐ ］。
このときの中間膜形成のための各種条件を次に示す。
１．塗布液組成：ヨー化Ｐｄ１．０重量％＋ＰＶＡ０．５重量％＋カーボン０．５重量％＋水９８重量％
２．塗布方法：スピン塗布１０００ｒｐｍ、４０秒間
３．乾燥条件：オーブン、Ａｉｒ中、８０℃、３０分間
４．焼成条件：ファーネス、Ｎ２中、２５０℃、１５分間
５．還元条件：ＵＶ照射［低圧水銀ランプ（寄与する主な波長は１８５ｎｍ、と２５４ｎｍ、２５０Ｗ）］、Ｎ２ガス雰囲気中、１０分〜３０分間 After the wiring material is Cu and the predetermined wiring is finished and the passivation etching is finished, before the resist mask on the passivation is peeled off, a coating liquid having the following composition is applied onto the substrate, dried and fired to obtain a metal compound. Then, the resist mask and the metal compound film on the passivation were peeled and removed. Then, the metal compound film on the Cu electrode pad was reduced by UV irradiation to form a Pd film as an intermediate film, and a bump was formed thereon by electroless Ni—P plating [/ Cu pad / Pd / Electroless Ni-P].
Various conditions for forming the intermediate film at this time are shown below.
1. Coating composition: Iodinated Pd 1.0 wt% + PVA 0.5 wt% + Carbon 0.5 wt% + Water 98 wt%
2. Coating method: Spin coating 1000 rpm, 40 seconds Drying conditions: oven, Air, 80 ° C., 30 minutes 4. Firing conditions: furnace, in N 2 , 250 ° C., 15 minutes 5. Reduction conditions: UV irradiation [low-pressure mercury lamp (contributing main wavelengths are 185 nm, 254 nm, 250 W)], N 2 gas atmosphere, 10 to 30 minutes

配線材料がＣｕで、所定の配線を終えてパッシベーションのエッチングが終了した後、パッシベーション上のレジストマスクを剥離する前に、下記組成の塗布液を基板上に塗布し、乾燥、焼成して金属化合物の被膜を形成させ、パッシベーション上のレジストマスク及び金属化合物の被膜を剥離除去した。そして、Ｃｕ電極パッド上の金属化合物の被膜に高周波・レーザーを照射して還元して中間膜としてのＰｄ膜を形成し、その上に無電解Ｎｉ−Ｐめっきでバンプを形成した［ ／Ｃｕパッド／Ｐｄ／無電解Ｎｉ−Ｐ ］。
このときの中間膜形成のための各種条件を次に示す。
１．塗布液組成：酢酸Ｐｄ０．５重量％＋ＰＶＡ０．５重量％＋カーボン０．５重量％＋水９８．５重量％
２．塗布方法：スピン塗布１０００ｒｐｍ、３０秒間
３．乾燥条件：オーブン、Ａｉｒ中、８０℃、３０分間
４．焼成条件：ファーネス、Ｎ２中、２５０℃、１５分間
５．還元条件：ＹＡＧ４次高周波・レーザー（ＹＡＧ−ＦＨＧ、２６６ｎｍ、標準光学系による収束スポット径は１５ｕｍ）照射、５秒間 After the wiring material is Cu and the predetermined wiring is finished and the passivation etching is finished, before the resist mask on the passivation is peeled off, a coating liquid having the following composition is applied onto the substrate, dried and fired to obtain a metal compound. Then, the resist mask and the metal compound film on the passivation were peeled and removed. Then, the metal compound film on the Cu electrode pad was reduced by irradiating a high frequency / laser to form a Pd film as an intermediate film, and a bump was formed thereon by electroless Ni-P plating [/ Cu pad / Pd / electroless Ni-P].
Various conditions for forming the intermediate film at this time are shown below.
1. Coating composition: Pd acetate 0.5 wt% + PVA 0.5 wt% + carbon 0.5 wt% + water 98.5 wt%
2. Coating method: Spin coating 1000 rpm, 30 seconds Drying conditions: oven, Air, 80 ° C., 30 minutes 4. Firing conditions: furnace, in N 2 , 250 ° C., 15 minutes 5. Reduction conditions: YAG fourth-order high frequency laser (YAG-FHG, 266 nm, convergent spot diameter by standard optical system is 15 μm) irradiation, 5 seconds

各種バンプの形成方法を示す概略図である。It is the schematic which shows the formation method of various bumps. 所定の配線が終了した基板上にパッシベーションを形成させた図である。It is the figure which formed the passivation on the board | substrate where predetermined wiring was complete | finished. レジストでパターニングして、パッシベーション層をエッチング処理してＡｌ電極パッドを開口露出させた後の基板の断面図である。It is sectional drawing of the board | substrate after patterning with a resist and carrying out the etching process of the passivation layer, and exposing Al electrode pad opening. 基板の最上層に亜鉛化合物を含有する塗布液を塗布して金属化合物の被膜を形成させた図である。It is the figure which apply | coated the coating liquid containing a zinc compound to the uppermost layer of a board | substrate, and formed the film of the metal compound. 金属化合物の被膜にＵＶ照射して、還元して中間膜としての金属亜鉛被膜を形成させた図である。It is the figure which formed the metal zinc film as an intermediate film by reducing with UV irradiation to the metal compound film. 中間膜（金属亜鉛被膜）上に無電解Ｎｉ−Ｐめっき形成させ、その上に金膜を形成してバンプを形成した図である。It is the figure which formed electroless Ni-P plating on the intermediate film (metal zinc film), formed the gold film on it, and formed the bump.

Claims (3)

所定の配線を終えてパッシベーションのパターンエッチングが終了した後、パッシベーション上のレジストマスクを剥離する前に、基板上に塗布法により金属化合物の被膜を形成し、（ａ）パッシベーション上のレジストマスク及び金属化合物の被膜を剥離除去した後、所定の配線部上に形成された金属化合物の被膜を還元し、又は（ｂ）所定の配線部上に形成された金属化合物の被膜を還元した後、パッシベーション上のレジストマスク及び金属化合物の被膜を剥離除去し、前記金属化合物の被膜を還元して得られる金属膜を無電解めっきのための活性化触媒膜として利用すると共に中間膜として、この中間膜上に無電解めっきでバンプ又はアンダーバリアメタル（ＵＢＭ）を形成することを特徴とするビルトアップ多層プリント配線基板の製造方法。   After finishing the predetermined wiring and finishing the passivation pattern etching, before the resist mask on the passivation is peeled off, a metal compound film is formed on the substrate by a coating method. (A) The resist mask and metal on the passivation After stripping and removing the compound film, the metal compound film formed on the predetermined wiring part is reduced, or (b) the metal compound film formed on the predetermined wiring part is reduced, and then on the passivation. The resist mask and the metal compound film are peeled and removed, and the metal film obtained by reducing the metal compound film is used as an activation catalyst film for electroless plating and is used as an intermediate film on the intermediate film. Built-up multilayer printed wiring board characterized by forming bumps or under barrier metal (UBM) by electroless plating Manufacturing method. 金属化合物が亜鉛化合物であることを特徴とする請求項１記載のビルトアップ多層プリント配線基板の製造方法。   2. The method for producing a built-up multilayer printed wiring board according to claim 1, wherein the metal compound is a zinc compound. 金属化合物がパラジウム化合物であることを特徴とする請求項１記載のビルトアップ多層プリント配線基板の製造方法。   The method for producing a built-up multilayer printed wiring board according to claim 1, wherein the metal compound is a palladium compound.
JP2005354279A 2005-12-08 2005-12-08 Method of manufacturing built-up multilayer printed circuit board Withdrawn JP2007154288A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2005354279A JP2007154288A (en) 2005-12-08 2005-12-08 Method of manufacturing built-up multilayer printed circuit board

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2005354279A JP2007154288A (en) 2005-12-08 2005-12-08 Method of manufacturing built-up multilayer printed circuit board

Publications (1)

Publication Number Publication Date
JP2007154288A true JP2007154288A (en) 2007-06-21

Family

ID=38239023

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2005354279A Withdrawn JP2007154288A (en) 2005-12-08 2005-12-08 Method of manufacturing built-up multilayer printed circuit board

Country Status (1)

Country Link
JP (1) JP2007154288A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2010533977A (en) * 2007-07-17 2010-10-28 スリーエム イノベイティブ プロパティズ カンパニー Substrate patterning method

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2010533977A (en) * 2007-07-17 2010-10-28 スリーエム イノベイティブ プロパティズ カンパニー Substrate patterning method
KR101453881B1 (en) 2007-07-17 2014-10-21 삼성디스플레이 주식회사 Method of patterning a substrate

Similar Documents

Publication Publication Date Title
EP2601822B1 (en) Method to form solder deposits and non-melting bump structures on substrates
US6936923B2 (en) Method to form very a fine pitch solder bump using methods of electroplating
TWI437135B (en) Method to form solder deposits on substrates
TWI399148B (en) Solder pad structure for printed circuit boards and fabrication method thereof
JPH05218043A (en) Formation method of metal contact pad and formation method of metal contact terminal
CN1988143A (en) Semiconductor device and manufacturing method of the same
JPS5928366A (en) Method of producing electrically mutual connection package
JP2007109902A (en) Method for manufacturing multilayer printed wiring board, and photosensitive dry film used for same
US20110083885A1 (en) Metal wiring structure comprising electroless nickel plating layer and method of fabricating the same
JP2005033153A (en) Multilayer fine wiring interposer and its manufacturing method
JP2006147810A (en) Semiconductor device and method of manufacturing the same
JP2007154288A (en) Method of manufacturing built-up multilayer printed circuit board
CN105374701A (en) Activation Treatments in Plating Processes
JP2005057264A (en) Packaged electric structure and its manufacturing method
JPH06140409A (en) Manufacture of semiconductor device
JP3808365B2 (en) Semiconductor device and manufacturing method thereof
US7476412B2 (en) Method for the metalization of an insulator and/or a dielectric
JP2003179360A (en) Method of manufacturing printed board
JP2011258871A (en) Circuit board and method for manufacturing same
JPH09186161A (en) Formation of solder bump on semiconductor device
JP3823457B2 (en) Manufacturing method of ceramic wiring board
JP3409598B2 (en) Method for manufacturing semiconductor device
JPH08222840A (en) Circuit board with electrode pad and its manufacture
US20160381795A1 (en) Electronic device and method for manufacturing the same
JPH07122839A (en) Manufacture of ceramic wiring board

Legal Events

Date Code Title Description
A300 Withdrawal of application because of no request for examination

Free format text: JAPANESE INTERMEDIATE CODE: A300

Effective date: 20090303