JP2007148431A5

JP2007148431A5 -

Info

Publication number: JP2007148431A5
Application number: JP2007036152A
Authority: JP
Filing date: 2007-02-16
Publication date: 2008-07-10
Anticipated expiration: 2021-08-02

Claims

A plurality of pixels provided on the same substrate, a source signal line driver circuit and the gate signal line driver circuit,
Each of the plurality of pixels has a first transistor, a second transistor, the memory circuit, a liquid crystal element, a first selector and a second selector,
In the first transistor, the gate is electrically connected to the first gate signal line, one of the source and the drain is electrically connected to the source signal line, and the other of the source and the drain is electrically connected to the memory circuit via the first selection unit. Connected,
In the second transistor, the gate is electrically connected to the second gate signal line, one of the source and the drain is electrically connected to the memory circuit, and the other of the source and the drain is electrically connected to the liquid crystal element via the second selection unit. Connected,
The source signal line driver circuit is electrically connected to the source signal line;
The liquid crystal display device, wherein the gate signal line driver circuit is electrically connected to the first gate signal line and the second gate signal line.

Multiple pixels provided on the same substrate, a gate signal line driver circuit and contact the source signal line driver circuit,
Each of the plurality of pixels has a first transistor, a second transistor, the memory circuit, a liquid crystal element, a first selector and a second selector,
In the first transistor, the gate is electrically connected to the first gate signal line, one of the source and the drain is electrically connected to the source signal line, and the other of the source and the drain is electrically connected to the memory circuit via the first selection unit. Connected,
In the second transistor, the gate is electrically connected to the second gate signal line, one of the source and the drain is electrically connected to the memory circuit, and the other of the source and the drain is electrically connected to the liquid crystal element via the second selection unit. Connected,
The source signal line driver circuit is electrically connected to the source signal line;
The gate signal line driving circuit is electrically connected to the first gate signal line and the second gate signal line;
The plurality of pixels, the source signal line driver circuit and the gate signal line driver circuit is respectively Re its liquid crystal display device according to claim Rukoto to have a thin film transistor.

In claim 1 or claim 2,
The liquid crystal display device, wherein the substrate is a glass substrate, a plastic substrate, or a stainless steel substrate.

In any one of Claims 1 thru | or 3,
The liquid crystal display device, wherein the memory circuit is a static memory (SRAM), a ferroelectric memory (FeRAM), or a dynamic memory (DRAM).

An electronic device using the liquid crystal display device according to any one of claims 1 to 4.