JP2007147373A - Impedance analyzing program, storage medium, and analyzing method and apparatus - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide an impedance analyzing program, a storage medium, an analyzing method and an analyzing apparatus, which can obtain a characteristic impedance at each point of electric wiring, even in the case that the object to be analyzed is a complex and large-scale substrate. <P>SOLUTION: A step voltage is input to the electric wiring of a substrate model, and a time-domain electromagnetic field analysis is applied to the electric wiring on the substrate being selected as the object. Then, the characteristic impedance at each observation point on the electric wiring is sequentially estimated in accordance with the propagation path of the step voltage, based on voltage comparisons between adjacent observation points. <P>COPYRIGHT: (C)2007,JPO&INPIT

Description

  The present invention relates to an impedance analysis program, a storage medium, an analysis method, and an analysis apparatus for deriving a characteristic impedance of an electrical wiring by two-dimensional / three-dimensional electromagnetic field analysis.

  In recent digital devices, as the circuit operation speeds up, problems such as device malfunction and noise due to signal quality degradation such as ringing and overshoot increase. Such deterioration in waveform quality is caused by an increase in electromagnetic influence that electrical wiring including a printed circuit board receives from the surrounding three-dimensional structure as the operating frequency increases, so that the characteristic impedance of the electrical wiring changes, This occurs because the signal propagating in the electrical wiring is reflected and resonated due to mismatch of characteristic impedance. Similar problems also occur in printed circuit boards, LSI (Large Scale Integrated circuit) packages, ICs (Integrated Circuits), and the like.

  As a means to solve such characteristic impedance mismatches at the design stage, 2D / 3D electromagnetic field analysis has been reported to be applied to circuit design and applied to simulation of signal lines propagating on a printed circuit board. ing. For example, Non-Patent Document 1 describes a method for calculating the characteristic impedance of an electrical wiring from the cross-sectional shape of the electrical wiring on the substrate and the position of the ground electrode corresponding to the wiring. As described above, if the characteristic impedance of the electrical wiring is obtained, it is possible to analyze by a circuit simulator such as SPICE (Simulation Program with Integrated Circuit Emphasis) and detect ringing and overshoot.

Further, as a method for obtaining the characteristic impedance of the electrical wiring on the actually produced printed circuit board by measurement, there is a technique called TDR (Time Domain Reflectmetry) method. For example, Patent Document 1 discloses a method of measuring the characteristic impedance of an electrical wiring by applying a pulse to the electrical wiring and observing a reflected pulse. Even if the characteristic impedance obtained by this method is applied to the circuit simulator for analysis, ringing and overshoot can be detected as described above.
Japanese Patent Application Laid-Open No. 64-3571 Design Wave Magazine, CQ Publisher, April 2003, p. 140-146 Design Wave Magazine, CQ Publisher, July 2003, p. 123-128

  In the method described in Non-Patent Document 1, it is necessary to obtain the corresponding characteristic impedance for each case where the cross section of the electrical wiring and the structure of the corresponding ground electrode are different. Therefore, when the line width is different, as in the wiring in the circuit board, in the case of wiring in the inner layer / outer layer of the multilayer board, or when the distance to the adjacent wiring changes, the electrical wiring and the ground Each time the electrode structure changes, it is necessary to extract the cross section to obtain the characteristic impedance. In particular, as the wiring becomes more complicated, the impedance changes depending on the wiring and the other wiring nearby in addition to the corresponding ground electrode. Therefore, in order to obtain an accurate impedance, all that contribute to the impedance of the wiring It is necessary to extract the wiring and ground structure. For this reason, in the board | substrate with many wirings, much effort is required for extraction of a characteristic cross section. As a result, there is a problem that it is extremely difficult to detect all mismatches in characteristic impedance with a large-scale substrate.

  The TDR method described in Patent Document 1 is a method for detecting reflection of a signal propagating through an electrical wiring. Although it is possible to carry out a TDR simulation based on the board design data, if there are multiple characteristic impedance mismatches in the wiring, the reflections from each will be combined, resulting in a complicated signal line. There is a problem that can not cope.

  The present invention has been made in order to solve the above-described problems, and its purpose is to provide characteristics at various locations of electrical wiring even when the number of wirings on a substrate is large or wiring having a complicated shape. An impedance analysis program, an analysis method, and an analysis apparatus capable of deriving impedance are provided.

  According to one aspect of the present invention, there is provided a program for causing a computer having an arithmetic processing unit to execute an analysis process for obtaining a characteristic impedance of an electric wiring in a structure having electric wiring, wherein the arithmetic processing unit includes the structure Initializing the voltage of each part to a predetermined potential, and performing an electromagnetic field analysis in a time domain in which the time response of the step voltage applied to the electrical wiring by a voltage source having a known output impedance and output voltage is obtained by numerical analysis; and The arithmetic processing unit extracts the electrical state of the electrical wiring spatially and temporally based on the time response of the step voltage obtained by the electromagnetic field analysis; Detects temporal changes in the electrical state at multiple observation points in the area, and detects electrical conditions between the multiple observation points and adjacent points on the electrical wiring. Based on a comparison between, and a step of deriving a sequentially characteristic impedance of the observation point by obtaining the characteristic impedance in accordance with the propagation path of the step voltage from the voltage source.

  Preferably, the electrical state is a voltage on the electrical wiring, and the step of extracting the electrical state of the electrical wiring spatially and temporally is performed by the arithmetic processing unit according to the time response of the step voltage obtained by numerical analysis. Based on this, the voltage of each part on the electrical wiring is extracted in time series, and the characteristic impedance is derived by detecting the point on the time axis where the voltage at the observation point on the electrical wiring changes from zero to non-zero The step of performing the second step when the arithmetic processing unit changes the first non-zero voltage detected at each observation point and the voltage at a point adjacent to each observation point on the electrical wiring from zero to non-zero. The characteristic impedance at the observation point is derived by sequentially obtaining the characteristic impedance from the step where the step voltage from the voltage source propagates based on the comparison step and the comparison result with the non-zero voltage. And a step of.

  Preferably, the computer further includes a storage unit, and the second non-zero voltage is a first observation point where the step voltage has propagated earlier than the first observation point corresponding to the first non-zero voltage. The voltage at the time when the voltage at the adjacent second observation point changes from zero to non-zero, and the step of performing comparison with the second non-zero voltage is performed by the arithmetic processing unit including the first non-zero voltage, The step of deriving the characteristic impedance includes the step of storing the voltage change rate obtained from the comparison with the second non-zero voltage in the storage unit. And calculating the characteristic impedance according to the propagation path based on the voltage change rate stored in the storage unit.

Preferably, at an arbitrary observation point on the electrical wiring, the time interval for observing the voltage is Δt, the time when the voltage is observed to change from zero to a non-zero voltage V _x is t0, and the time t of the adjacent point is When the voltage at t0−Δt is V _x−1 and the characteristic impedance is Z _x−1 , the step of storing the voltage change rate in the storage unit is to change the voltage change rate k _x to k _x = V _x / V. comprising the step of obtaining from the _x-1, calculating a characteristic impedance, and determining a characteristic impedance _{Z x} of the observation point from _{Z x = k x / (2} -k x) Z x-1.

  Preferably, the computer further includes a synthesis processing unit, wherein the arithmetic processing unit converts the derived characteristic impedance value into visible information, and the synthesis processing unit performs synthesis so as to correspond to a point on the electrical wiring. And displaying.

  According to another aspect of the present invention, a computer-readable storage medium storing the analysis program is provided.

  According to still another aspect of the present invention, there is provided an analysis device for obtaining a characteristic impedance of an electric wiring in a structure having electric wiring, wherein the voltages of respective parts of the structure are initialized to predetermined potentials, and the output impedance and the output voltage are Based on the time response of the step voltage obtained by the electromagnetic field analysis based on the means for executing the electromagnetic field analysis in the time domain to obtain the time response of the step voltage applied to the electrical wiring by the known voltage source by the numerical analysis. A means for extracting the electrical state of the wiring spatially and temporally, and detecting a temporal change in the electrical state at a plurality of predetermined observation points on the electric wiring, and adjacent to the plurality of observation points on the electric wiring. Observed by sequentially obtaining the characteristic impedance according to the propagation path of the step voltage from the voltage source based on the comparison with the electrical state between And means for deriving the characteristic impedance of the point.

  According to still another aspect of the present invention, there is provided an analysis method for obtaining a characteristic impedance of an electric wiring in a structure having electric wiring, wherein the voltage of each part of the structure is initialized to a predetermined potential, and the output impedance and the output voltage are Based on the step of performing electromagnetic field analysis in the time domain, where the time response of the step voltage applied to the electrical wiring from a known voltage source is obtained by numerical analysis, and the time response of the step voltage determined by the electromagnetic field analysis, Extracting the electrical state of the wiring spatially and temporally, and detecting temporal changes in the electrical state at a plurality of predetermined observation points on the electrical wiring, and adjacent to the plurality of observation points on the electrical wiring Based on the comparison with the electrical state between the voltage source and the point where In comprising the step of deriving the characteristic impedance of the observation point.

  In the analysis program of the present invention, the characteristic impedance of each part of the wiring can be obtained on a complicated and large-scale printed circuit board without extracting the characteristics of the wiring that requires a lot of labor. This problem can be analyzed with the wiring pattern designed.

  Embodiments of the present invention will be described below with reference to the drawings. In the following description, the same parts are denoted by the same reference numerals. Their names and functions are also the same. Therefore, detailed description thereof will not be repeated.

  As will be apparent from the following description, in the impedance analysis program and analysis method of the present invention, time domain electromagnetic field analysis such as FDTD (Finite Differential Time Domain) method is performed on the printed circuit board and the electrical wiring on the board. Thus, the signal waveform propagating through the electric wiring on the substrate is analyzed with the wiring pattern designed, and characteristic impedances at various portions of the electric wiring are derived.

(1. System configuration of the present invention)
FIG. 1 is a conceptual diagram showing an example of a computer 100 that executes an analysis program of the present invention.

  In FIG. 1, a computer 100 for executing a program for analyzing the characteristic impedance of electrical wiring includes an optical disk drive 108 for reading information on an optical disk such as a CD-ROM (Compact Disc Read-Only Memory) and a flexible disk. A computer main body 102 having an FD drive 106 for reading and writing information on a disk (Flexible Disk, hereinafter referred to as FD) 116, a display 104 as a display device connected to the computer main body 102, and also connected to the computer main body 102 A keyboard 110 and a mouse 112 are provided as input devices.

FIG. 2 is a block diagram showing the configuration of the computer 100. As shown in FIG.
As shown in FIG. 2, in addition to the optical disk drive 108 and the FD drive 106, the computer main body 102 constituting the computer 100 includes a CPU (Central Processing Unit) 120 connected to the bus 105 and a ROM (Read Only). A memory 122 including a memory (RAM) and a random access memory (RAM), a direct access memory device such as a hard disk 124, and a communication interface 128 for exchanging data with the outside are included. A CD-ROM 118 is attached to the optical disk drive 108. An FD 116 is attached to the FD drive 106.

  Also, in the hard disk 124, for wiring on the substrate to be analyzed, parameters representing the physical properties of the substrate such as the shape of the substrate, the dielectric constant of the substrate, the wiring shape and the wiring conductivity such as the conductivity of the wiring, etc. Substrate CAD (Computer Aided Design) data 134 in which parameters representing physical properties and the like are stored, a program 135 for executing FDTD, which is one of programs for executing time-domain electromagnetic field analysis, and characteristic impedance An analysis program 136 and the like are stored. Here, for example, the substrate CAD data may be supplied from an external database via the communication interface 128.

  The CPU 120 functioning as an arithmetic processing unit executes processing corresponding to the above-described FDTD execution program and characteristic impedance analysis processing program using the memory 122 as a working memory.

  The CD-ROM 118 may be another medium, such as a DVD-ROM (Digital Versatile Disc) or a memory card, as long as it can record information such as a program installed in the computer main body. In this case, the computer main body 102 is provided with a drive device that can read these media.

  The FDTD execution program and the characteristic impedance analysis processing program (hereinafter collectively referred to as “analysis program”) of the present invention are software executed by the CPU 120 as described above. In general, such software is stored and distributed in a storage medium such as the CD-ROM 118 and the FD 116, read from the storage medium by the CD-ROM drive 108 or the FD drive 106, and temporarily stored in the hard disk 124. Alternatively, when the computer 100 is connected to the network, it is temporarily copied from the server on the network to the hard disk 124. Then, the data is further read from the hard disk 124 to the RAM in the memory 122 and executed by the CPU 120. In the case of network connection, the program may be directly loaded into the RAM and executed without being stored in the hard disk 124.

  The computer hardware itself and its operating principle shown in FIGS. 1 and 2 are general. Therefore, the most essential part of the present invention is software stored in a storage medium such as the FD 116, the CD-ROM 118, and the hard disk 124.

  As a general tendency, various program modules are prepared as a part of a computer operating system, and an application program generally calls a module in a predetermined arrangement to advance processing. . In such a case, the software itself does not include such a module, and the characteristic impedance can be analyzed only when the computer cooperates with the operating system. However, as long as a general platform is used, it is not necessary to distribute software including such modules, and the software itself not including these modules and the recording medium storing the software (and the software distributes on the network). Data signal) can be considered to constitute the embodiment.

(2. Characteristic impedance analysis method)
The characteristic impedance analysis method according to the present invention will be described below.

  FIGS. 3A and 3B are conceptual diagrams of a substrate and electric wiring that are targets of the characteristic impedance analysis method. FIG. 3A is a perspective view of the substrate structure, and FIG. 3B is a schematic diagram of the substrate structure, particularly the wiring structure. FIG.

First, referring to FIG. 3, the structure of the electrical wiring to be analyzed will be described.
In FIG. 3A, the substrate is mainly composed of a dielectric 301 such as glass epoxy and a metal foil such as copper disposed on the surface layer or the inner layer thereof. The metal foil is formed by etching or the like, and part of the metal foil is an electric wiring 302 that transmits an electric signal, and the rest is formed as a ground 303 indicating a ground electrode or a power source (not shown). In the example shown in FIG. 3A, the electrical wiring 302 is formed on the front surface side of the substrate, and the back surface side of the substrate is the ground 303 over the entire surface. In addition, a signal voltage applied between the electric wiring 302 and the ground 303 from the signal source 304 is transmitted along the electric wiring 302. In FIG. 3A, the output impedance 305 of the signal source 304 is shown.

  The electrical wiring 302 has a characteristic impedance determined by the width of the wiring, the distance from the ground 303, the dielectric constant of the dielectric 301, and the like. When the distance between the electric wiring 302 and the ground 303 is constant, for example, as shown in FIG. 3B, the characteristic impedance becomes a low value when the width of the electric wiring 302 is wide. If the width is narrow, the characteristic impedance is high. It is assumed that structural information such as the width of the wiring and the thickness of the dielectric is set as a structural parameter by another method. In FIG. 3B, the dielectric 301 and the ground 303 are omitted, and other symbols will be described later.

  An outline of the method for analyzing the characteristic impedance of the electrical wiring on the substrate is as follows. The analysis method of the present invention applies a step voltage from the signal source 304 and sequentially applies the time / point at which the step voltage reaches. The characteristic impedance is derived. At this time, the propagation of the step voltage is obtained by electromagnetic field analysis for a model including all wiring and ground electrode structures, so the voltage at each point in the board includes information based on the detailed structure of the board. Yes. This eliminates the need for a derivation method for setting the ground corresponding to the wiring, as described in Non-Patent Document 1, which takes a lot of time and labor to extract the characteristic cross section of the substrate.

FIG. 4 is a flowchart showing a schematic flow of a characteristic impedance derivation method.
First, in S400, structure data is read from the substrate CAD data.

  Next, as a step of time domain electromagnetic field analysis, after initializing the voltage of each part to a predetermined potential, for example, zero (S402), a step voltage is set in the signal source (S404) and FDTD is performed (S404). S406).

  Note that FDTD is an electromagnetic field numerical analysis method capable of obtaining a temporal change in spatial propagation of electromagnetic waves. In FDTD, Faraday's law and Ampere's law, which are Maxwell's basic equations, are differentiated and arranged on a mesh called a Yee lattice, and magnetic fields and electric fields are calculated alternately in space and in time.

  In order to analyze the electromagnetic field by FDTD, a structure as shown in FIG. 3A is read from the board design CAD data, and a two-dimensional or three-dimensional electromagnetic field model is created. Specifically, a model is obtained by dividing a substrate into meshes and setting whether a substance contained in each mesh is a metal, a dielectric, or air.

  As a result of the above-described FDTD, the electric field / magnetic field at each time is obtained at the surface of the structure in which the substrate is meshed or at each lattice point inside. A spatial integration of this electric field from the ground to the electrical wiring is a potential difference between the ground and the electrical wiring, that is, a voltage. Since the calculation result of FDTD becomes enormous, considering the size of the substrate and the propagation speed of the signal, what is thinned out temporally and spatially is output as the result of the time domain electromagnetic field analysis.

  Then, as a step of deriving the characteristic impedance, the time when the voltage becomes zero to non-zero at each observation point is extracted from the result of the time domain electromagnetic field analysis (S408), and the non-zero voltage is adjacent to the voltage. The past voltage at the observation point is compared to calculate the spatial voltage change rate (S410). Furthermore, the characteristic impedance at this observation point is calculated from this spatial voltage change rate and the characteristic impedance already determined at the adjacent observation point (S412).

  In S414, the characteristic impedance distribution corresponding to each observation point on the electrical wiring is output from the result of the characteristic impedance derivation.

FIG. 5 is an example of the output in S406.
The voltage (V ₀ , V ₁ , V ₂ , V ₃ ) corresponding to the observation points (TP ₀ , TP ₁ , TP ₂ , TP ₃ ) of each part of the substrate in FIG. These are shown as voltage waveforms at various parts of the substrate.

  Hereinafter, the characteristic impedance calculation procedure used in the analysis method of the present invention will be described in detail.

When a transmission line with characteristic impedance ZA [Ω] and a transmission line with characteristic impedance ZB [Ω] are connected and a voltage of VA [V] is transmitted from the ZA side,
VB = 2 · ZB · VA / (ZA + ZB) (1)
Is transmitted.

Furthermore, when the voltage transmission rate is ka,
ka = VB / VA = 2 · ZB / (ZA + ZB) (2)
It becomes.

Therefore, when ka and ZA are known, ZB is expressed by the following equation.
ZB = ka · ZA / (2-ka) (3)
However, the above example is a case of connection between transmission lines, and when a signal source having an output impedance Zs [Ω] and an open circuit voltage Vs [V] is connected to a transmission line having a characteristic impedance ZB, ZB The voltage VB transmitted to
VB = ZB · Vs / (Zs + ZB) (4)
The voltage transmission rate ks is ks = VB / Vs = ZB / (Zs + ZB) (5)
Therefore, ZB in this case is expressed by the following equation.

ZB = ks · Zs / (1-ks) (6)
When the characteristic impedance at a certain point on the wiring is obtained using the above formula, the characteristic impedance at a point adjacent to the point needs to be known. Therefore, the characteristic impedance can be derived by obtaining the characteristic impedance in order in accordance with the propagation of the step voltage from the observation point closest to the point where the signal source having a known output impedance is connected.

(3. Implementation on computer 100)
The analysis method according to the present invention can be implemented as computer software by the following procedure.

The procedure is summarized below.
FIG. 6 is a flowchart for specifically explaining the flow of processing of the computer program shown in FIG.

  First, the CPU 120 reads structural data from the substrate CAD data 134 stored in the hard disk 124. (S400).

  Subsequently, the CPU 120 initializes the voltage at each observation point on the substrate model to zero (S402), and then sets a step voltage source (S404).

  Further, the CPU 120 performs FDTD (S406). At this time, a computer connected via the communication interface 128 may be caused to execute FDTD and the result may be received.

The CPU 120 performs the following procedure (S608 to S626) for each X = 0,..., N according to software. Note that X represents an observation point. When X = 0, the observation point is adjacent to the signal source, and when X = n, the observation point represents an end point. At the start of this loop, X = 0, and the observation time t is also initialized to 0. Also, as an initial value representing the signal source, a known impedance of the signal source is set to Z- ₁ , and an open voltage of the known signal source is set to V- ₁ .

  S608 to S612 correspond to S408, S614 to S614 and S620 correspond to S410, S618 and S622 correspond to S412 and S624 to S626 correspond to S414, respectively.

First, in S608, CPU 120 based on the FDTD results S606, obtains the voltage _{V x} of the TP _x the closest observation point to the point where the signal source is connected. At this time, the acquired data is stored in the hard disk 124 in the format shown in FIG.

The CPU 120 refers to V _x at time t (S610), and if V _x = 0, advances the referenced time t by Δt (S612). If the step voltage is propagated and V _x is not zero, it is determined whether X is 0 (S614).

When X = 0, that is, when the observation point is adjacent to the signal source, the CPU 120 obtains the voltage change rate k ₀ from V ₀ and V ₋₁ based on the equation (5) (S616). Based on the equation (6), the characteristic impedance at TP ₀ is obtained, and the result is stored in the hard disk 124 (S618).

In addition, when X is not 0, that is, when the observation point is not adjacent to the signal source, since the transmission is not from the signal source, the CPU 120 calculates V _x and V _x−1 based on Expression (2). determined rate of voltage change from (S620), obtains the characteristic impedance in the TP _x based on the equation (3), and stores the result in the hard disk 124 (S622).

  Next, the CPU 120 determines whether or not the observation can be made up to the last point (S624). If not, the CPU 120 sets to observe an adjacent point according to the step voltage radio wave (S626).

In this way, when the derivation of all the observation points set in the electrical wiring is completed, the process ends.
(3.1. Example of derivation)
In S608, 50Ω that is the impedance of the signal source is set to Z ₋₁ as an initial value, and 2 V that is the open voltage of the signal source is set to V ₋₁ . Further, the observation point X and the observation time t are both set to 0.

  The characteristic impedance on the electrical wiring read in S400 is 50Ω, 100Ω, and 75Ω as shown in FIG.

  FIG. 7 shows an example in which the time point at which a non-zero voltage is obtained at each observation point is extracted based on the temporal and spatial voltage distribution obtained in S608, and the voltage change rate and the characteristic impedance are obtained. is there.

  The voltage change rate and the characteristic impedance when the voltage at each time and the non-zero voltage are obtained are stored in the hard disk 124. Note that (a) represents a non-zero voltage change.

For example, TP ₀ obtains a non-zero voltage 1 [V] for the first time at time t = 1. At this time, since V ₀ = 1 [V], V ₋₁ = 2 [V] (initial value), and Z ₋₁ = 50 [Ω] (initial value), k ₀ = V ₀ / V ₋₁ = 0.5, and Z ₀ = k ₀ · Z ₋₁ / (1−k ₀ ) = 0.5 · 50 / (1-0.5) = 50 [Ω] is obtained.

As shown in FIG. 3B, this represents that Z ₀ was obtained with high accuracy while the set characteristic impedance was 50 [Ω].

Further, the observation point TP ₂ obtains a non-zero voltage 1.33 [V] for the first time at time t = 3. At this time, V ₂ = 1.33 [V], V ₁ = 1 [V] (voltage at time t = 2 in TP ₁ ), Z ₁ = 50 [Ω] (already obtained at time t = 2) Characteristic impedance at TP ₁ ), k ₂ = V ₂ / V ₁ = 1.33, and Z ₂ = k ₂ · Z ₁ / (2-k ₀ ) = 1.33 · 50 / (2- 1.33) = 99 [Ω] is obtained.

This represents that, as shown in FIG. 3B, the set characteristic impedance was 100 [Ω], but Z ₂ was accurately obtained with an error of 1%.

  In this way, by applying a step voltage to the electrical wiring on the board and determining temporal and spatial changes by time-domain electromagnetic field analysis, the characteristics of the wiring are faithful to the shape of the electrical wiring from the analysis results. Impedance can be determined.

(4. Display example of characteristic impedance)
Furthermore, since the characteristic impedance obtained here corresponds to each observation point on the electrical wiring, it is easy to associate with the position on the board model.

  FIG. 8 is a flowchart in the case where the step of displaying the characteristic impedance is performed following the step of deriving the characteristic impedance described above.

  As shown in FIG. 8, as a step of displaying the characteristic impedance for each impedance value of the characteristic impedance distribution obtained from the step of deriving the characteristic impedance, a conversion process to visible information such as color, luminance, and numbers is performed ( S800), a display system is constructed in which an overall view of the characteristic impedance distribution of the electrical wiring on the board can be viewed by combining the electrical wiring on the board model with a technique such as superimpose (S802) and displaying it (S804). it can.

FIG. 9 is a diagram of a screen display example when the result of FIG. 7 is displayed according to FIG.
FIG. 9 shows a characteristic impedance display device 901 and a characteristic impedance display 902. In this way, visual recognition is performed by displaying characteristic impedance using readable information such as numbers, or by superimposing characteristic impedance values using visible information such as color and brightness on the electrical wiring on the board model. A characteristic impedance display device with good characteristics can be provided.

  Further, this method may be used to display the characteristic impedance during the wiring design.

  In this way, by deriving the characteristic impedance that is faithful to the shape of the electrical wiring for the electrical wiring on the board, the characteristic impedance mismatch due to the circuit board design error is verified before the board trial production, and improvement measures are taken Therefore, it is possible to provide a stable device without signal failure such as overshoot.

  Furthermore, by providing a device that displays the distribution of characteristic impedance superimposed on the wiring of the board, the visibility of characteristic impedance mismatch detection can be improved, so that board design verification and improvement measures are more efficient. It is possible to implement well and to provide a more stable device.

  The embodiment disclosed this time should be considered as illustrative in all points and not restrictive. The scope of the present invention is defined by the terms of the claims, rather than the description above, and is intended to include any modifications within the scope and meaning equivalent to the terms of the claims.

It is a conceptual diagram which shows an example of the computer 100 which executes the analysis program of this invention. It is a figure which shows the structure of this computer 100 in a block diagram format. It is a conceptual diagram of the board | substrate and electric wiring used as the object of the characteristic impedance analysis method. It is the flowchart which showed the general flow of the characteristic impedance derivation method. It is an example of the output in S402. 5 is a flowchart for specifically explaining the flow of processing of the computer program shown in FIG. 4. This is an example in which, based on the temporal and spatial voltage distribution obtained in S608, the time point at which a non-zero voltage is obtained at each observation point is extracted, and the voltage change rate and the characteristic impedance are obtained. It is a flowchart in the case of implementing the step which displays a characteristic impedance following the step of deriving the characteristic impedance mentioned above. It is a figure of the example of a screen display at the time of performing the display process of the result of FIG. 7 according to FIG.

Explanation of symbols

  100 computer, 102 computer main body, 104 display, 105 bus, 106 FD drive, 108 optical disk drive, 110 keyboard, 112 mouse, 114 wireless communication device, 118 CD-ROM, 120 CPU, 122 memory, 124 hard disk, 128 communication interface, 134 board CAD data, program for executing 135 FDTD, 136 characteristic impedance analysis program, 301 dielectric, 302 electrical wiring, 303 ground, 304 signal source, 305 characteristic impedance, 901 characteristic impedance display device screen, 902 characteristic impedance display.

Claims (8)

A program for causing a computer having an arithmetic processing unit to perform analysis processing for obtaining characteristic impedance of the electrical wiring in a structure having electrical wiring,
The time domain in which the arithmetic processing unit initializes the voltage of each part of the structure to a predetermined potential and obtains the time response of the step voltage applied to the electrical wiring by a voltage source having a known output impedance and output voltage by numerical analysis Performing an electromagnetic field analysis at
The arithmetic processing unit, based on the time response of the step voltage obtained by the electromagnetic field analysis, extracting the electrical state of the electrical wiring spatially and temporally;
The arithmetic processing unit detects temporal changes in the electrical state at a plurality of predetermined observation points on the electrical wiring, and performs electrical connection between the plurality of observation points and points adjacent on the electrical wiring. Deriving the characteristic impedance of the observation point by sequentially obtaining the characteristic impedance according to the propagation path of the step voltage from the voltage source based on the comparison with the target state. Analysis program for. The electrical condition is a voltage on the electrical wiring;
The step of extracting the electrical state of the electrical wiring spatially and temporally includes:
Based on the time response of the step voltage obtained by the numerical analysis, the arithmetic processing unit extracts the voltage of each part on the electrical wiring in time series, and the voltage at the observation point on the electrical wiring is zero. Detecting a point on the time axis that changes from non-zero to
Deriving the characteristic impedance comprises:
When the arithmetic processing unit changes the detected first non-zero voltage at each observation point and the voltage at a point adjacent to each observation point on the electrical wiring from zero to non-zero. Comparing to a non-zero voltage of
For causing the computer to execute an analysis process including a step of deriving the characteristic impedance of the observation point by sequentially obtaining the characteristic impedance from the point where the step voltage from the voltage source propagates based on the comparison result The analysis program according to claim 1. The computer further includes a storage unit,
The second non-zero voltage is a voltage at a second observation point adjacent to the first observation point where the step voltage has propagated earlier than the first observation point corresponding to the first non-zero voltage. Is the voltage when changes from zero to non-zero,
Performing the comparison with the second non-zero voltage comprises:
The arithmetic processing unit includes a step of storing the voltage change rate obtained from the comparison between the first non-zero voltage and the second non-zero voltage in the storage unit,
Deriving the characteristic impedance comprises:
The arithmetic processing unit includes a step of calculating a characteristic impedance according to the propagation path based on a known output voltage and output impedance of the voltage source and a voltage change rate stored in the storage unit. 2. The analysis program according to 2. At an arbitrary observation point on the electrical wiring, the time interval for observing the voltage is Δt, the time when the voltage is observed to change from zero to a non-zero voltage V _x is t0, and the time t = When the voltage at t0−Δt is V _x−1 and the characteristic impedance is Z _x−1 ,
The step of storing the voltage change rate in the storage unit includes:
Obtaining the voltage change rate k _x from k _x = V _x / V _x−1 ,
Calculating the characteristic impedance comprises:
Wherein the characteristic impedance _{Z x} of the observation point and determining the _{Z x = k x / (2} -k x) Z x-1, claim 3 Analysis according programs. The computer further includes a synthesis processing unit,
The arithmetic processing unit converting the derived characteristic impedance value into visible information;
The analysis program according to claim 1, further comprising a step in which the synthesis processing unit synthesizes and displays so as to correspond to a point on the electrical wiring.   A computer-readable storage medium storing the analysis program according to claim 1. An analysis device for obtaining a characteristic impedance of the electrical wiring in a structure having electrical wiring,
Electromagnetic field analysis in the time domain where the voltage of each part of the structure is initialized to a predetermined potential and the time response of the step voltage applied to the electrical wiring by a voltage source with known output impedance and output voltage is obtained by numerical analysis. Means to perform,
Means for spatially and temporally extracting the electrical state of the electrical wiring based on the time response of the step voltage determined by the electromagnetic field analysis;
For detecting a temporal change in the electrical state at a predetermined plurality of observation points on the electrical wiring, and comparing the electrical state between the plurality of observation points and adjacent points on the electrical wiring. And a means for deriving the characteristic impedance of the observation point by sequentially obtaining the characteristic impedance according to the propagation path of the step voltage from the voltage source. An analysis method for obtaining a characteristic impedance of the electrical wiring in a structure having electrical wiring,
Electromagnetic field analysis in the time domain where the voltage of each part of the structure is initialized to a predetermined potential and the time response of the step voltage applied to the electrical wiring by a voltage source with known output impedance and output voltage is obtained by numerical analysis. Steps to perform;
Extracting the electrical state of the electrical wiring spatially and temporally based on the time response of the step voltage determined by the electromagnetic field analysis;
For detecting a temporal change in the electrical state at a predetermined plurality of observation points on the electrical wiring, and comparing the electrical state between the plurality of observation points and adjacent points on the electrical wiring. And deriving the characteristic impedance of the observation point by sequentially obtaining the characteristic impedance according to the propagation path of the step voltage from the voltage source.

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