JP2007142331A - Method of manufacturing semiconductor device - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To stably form a low-resistance contact for connecting a lower-layer conductor to an upper-layer one. <P>SOLUTION: A natural oxide film 18 on the surface of a polysilicon plug 13 exposed to the bottom of a contact hole 17 is removed by RIE using hydrogen trifluoride immediately before forming an adhesion layer 19. The RIE is executed under conditions, where chemical etching governs in an etching mechanism, thus suppressing the etching of a silicon oxide film 15, and hence preventing the sputter-etched silicon oxide film from re-adhering to the bottom of the contact hole 17 and stably manufacturing a low-resistance contact having small variations in resistance. <P>COPYRIGHT: (C)2007,JPO&INPIT

Description

  The present invention relates to a method for manufacturing a semiconductor device having a contact for connecting a lower conductor and an upper conductor.

  In recent years, in a semiconductor device in which a memory circuit such as a DRAM (Dynamic Random Access Memory) and a logic circuit are mixedly mounted, a contact having a high aspect ratio (three or more) has been adopted in order to improve the degree of integration. In particular, the contact of a DRAM memory cell has a structure in which a contact plug made of polysilicon (hereinafter referred to as a polysilicon plug) and a contact plug made of tungsten (hereinafter referred to as a tungsten plug) are stacked in order to improve electrical characteristics. Contacts are used.

  FIG. 7 is a process cross-sectional view showing the process of forming such a contact structure. As shown in FIG. 7A, first, a lower structure having a structure in which a polysilicon plug 53 is embedded in an insulating film 52 made of a silicon oxide film or the like is formed on a silicon substrate 51 by a known fine processing technique. . On the lower structure, an insulating film 54 made of a silicon nitride film or the like that functions as a stopper film during dry etching for forming a contact hole described later is deposited. An insulating film 55 such as a silicon oxide film is deposited on the insulating film 54 as an interlayer insulating film.

  Next, a resist pattern 56 having an opening 56a at a contact hole formation position is formed on the insulating film 55 by photolithography or the like, and dry etching is performed using the resist pattern 56 as an etching mask. By this etching, the insulating film 55 and the insulating film 54 are sequentially removed, and as shown in FIG. 7B, a contact hole 57 in which the polysilicon plug 53 is exposed at the bottom is formed.

  When the formation of the contact hole 57 is completed, the resist pattern 56 is removed, and then cleaning is performed to remove a resist residue on the insulating film 55 and an organic substance attached to the inside of the contact hole 57 during the etching. For the cleaning, for example, a cleaning liquid containing sulfuric acid is used. In the process of resist removal and cleaning, a natural oxide film 58 is formed on the exposed surface of the polysilicon plug 53 exposed at the bottom of the contact hole 57 (FIG. 7C).

  Subsequently, after the natural oxide film 58 is removed by reverse sputtering using argon gas (FIG. 7D), a titanium film 60 as an adhesion layer of a tungsten plug is formed on the entire surface by sputtering. Is done. Note that the reverse sputtering method refers to an etching method in which a substrate is sputter-etched in a sputter deposition apparatus.

For example, the natural oxide film removal and the titanium film formation are continuously performed in the same vacuum processing chamber so that the natural oxide film is not formed again on the polysilicon plug 53 after the natural oxide film 58 is removed. . Then, a tungsten film 61 is deposited on the titanium film 60, and the titanium film 60 and the tungsten film 61 deposited on portions other than the contact hole 57 are removed, and the titanium film 60 and the tungsten film 61 shown in FIG. The contact which consists of is completed (for example, refer patent document 1).
JP 2002-324861 A

  However, when forming a contact with a high aspect ratio in recent years, the conventional contact plug formation method tends to increase the processing time in the reverse sputtering method of the oxide film removal step shown in FIG. This phenomenon is caused by the fact that argon ions having large kinetic energy do not easily reach the bottom surface of the contact hole 57.

  Argon ions incident on the substrate have a large kinetic energy on the outermost surface (the surface of the insulating film 55). However, the energy of argon ions incident on the inside of the contact hole 57 is reduced due to collision with the side wall. For this reason, the natural oxide film removability at the bottom of the contact hole 57 decreases as the aspect ratio increases. For this reason, when the natural oxide film 58 at the bottom of the contact hole having a high aspect ratio is removed, a long-time treatment is required to ensure a sufficient etching amount.

  When the processing time is increased, the argon ions incident on the outermost surface of the substrate have a large energy, so that the contact hole upper portion 57a is easily etched. As a result, the silicon oxide film 59 sputter-etched by the contact upper portion 57a is reattached to the bottom of the contact hole 57. When such redeposition occurs, removal of the natural oxide film 58 is hindered, and the natural oxide film 58 remains on the surface of the polysilicon plug 53.

  Thus, the natural oxide film 58 that remains without being completely removed and the silicon oxide film 59 that has reattached inhibit the silicide reaction between the titanium film 60 and the polysilicon plug 53 at the bottom of the contact hole 57. For this reason, in the conventional contact formation method, there arises a problem that contact resistance increases and resistance variation increases.

  The present invention has been proposed in view of the above-described conventional circumstances, and an object thereof is to provide a method of manufacturing a semiconductor device capable of stably forming a low-resistance contact.

  In order to solve the above-mentioned problems, the present invention employs the following means. First, the present invention is premised on a method for manufacturing a semiconductor device having a contact for connecting a lower conductor and an upper conductor. In the method of manufacturing a semiconductor device according to the present invention, first, an insulating film covering the lower conductor is formed, and a contact hole reaching the lower conductor is formed in the insulating film. Next, isotropic dry etching for selectively etching the lower conductor exposed at the bottom of the contact hole is performed, and the surface of the lower conductor is etched. In succession to this etching step, a metal film is formed in the contact hole.

  According to this configuration, the insulating film above the contact hole is not etched when the contact obstruction on the surface of the lower layer conductor such as a natural oxide film that causes the contact resistance to increase is removed by etching. Therefore, the insulating film does not reattach to the bottom of the contact, and the contact obstruction on the lower conductor surface can be surely removed. This makes it possible to manufacture a stable contact with low resistance and suppressed resistance variation.

  This configuration is particularly effective when forming a contact hole with a high aspect ratio (3 or more) in which the etching time of the lower conductor for removing the contact obstruction is relatively long. Further, when the main component of the lower conductor is silicon and the main component of the metal film is a refractory metal, the improvement from the conventional method is remarkable.

  The etching of the lower layer conductor can be performed by, for example, reactive ion etching using an etching gas containing nitrogen trifluoride gas. At this time, the reactive ion etching is preferably performed under a pressure of 5 Pa to 100.

  In the isotropic etching of the lower conductor, it is preferable to remove the contact obstruction on the surface of the lower conductor together with a part of the lower conductor to form a recess in the lower conductor. Thereby, the contact area between the metal film and the lower insulating film is increased, and resistance variation can be further reduced.

  The metal film can be formed by, for example, chemical vapor deposition. The oxide film removal and the metal film formation can also be performed continuously under vacuum. Thereby, the contact obstruction on the surface of the lower layer conductor can be reliably removed.

  Further, the lower conductor can be formed by depositing polysilicon in a lower contact hole that penetrates the lower insulating film formed on the substrate. In this case, the amount of polysilicon deposited in the lower contact hole is preferably 25 to 75% with respect to the volume of the lower contact hole.

  According to the present invention, for example, when a tungsten plug is formed on a polysilicon plug, it is possible to reliably prevent the remaining of a natural oxide film or redeposition of an insulating film from occurring at the bottom of the contact hole. For this reason, the silicide reaction proceeds without being hindered at the bottom of the contact hole, and variations in contact resistance can be suppressed. Therefore, it is possible to form a low resistance contact very stably. In the present invention, since the contact area between the lower conductor and the metal film is increased as compared with the prior art, it is possible to further suppress resistance variation and to form a contact structure.

(First embodiment)
Hereinafter, a first embodiment of the present invention will be described in detail with reference to the drawings. In the present embodiment, the present invention is applied to the manufacture of a semiconductor device including a contact having a structure in which a polysilicon plug and a tungsten plug are laminated. 1 and 2 are process cross-sectional views illustrating the manufacturing process of the semiconductor device.

  As shown in FIG. 1A, first, a lower part in which a polysilicon plug 13 is embedded in an insulating film 12 made of a silicon oxide film such as BPSG (Boro-Phospho Silicate glass) on a semiconductor substrate 11 made of silicon or the like. A structure is formed. Such a structure is formed by depositing polysilicon on the insulating film 12 in which the contact holes are formed by a CVD (Chemical Vapor Deposition) method or the like and planarizing the upper surface by a CMP (Chemical Mechanical Polishing) method or the like. can do. On the lower structure, an insulating film 14 made of a silicon nitride film and an insulating film 15 made of BPSG are deposited. Here, the insulating film 14 functions as a stopper film in dry etching for forming a contact hole described later.

  Next, as shown in FIG. 1B, a resist pattern 16 having an opening 16a at a contact hole formation position is formed on the insulating film 15 by photolithography or the like. Using the resist pattern 16 as an etching mask, the insulating film 15 and the insulating film 14 are sequentially etched to form a contact hole 17 reaching the silicon plug 13 as shown in FIG. The etching can be performed by dry etching such as plasma etching. FIG. 1C shows a state in which the resist pattern 16 is removed by ashing, organic cleaning, or the like after the contact hole 17 is formed.

  Subsequently, cleaning is performed to remove a resist residue on the insulating film 15 and an organic substance remaining in the contact hole 17. For the cleaning, for example, a cleaning solution containing sulfuric acid (SPM: Sulfuric acid-hydrogen Peroxide Mixture or the like) is used. As shown in FIG. 1D, the polysilicon plug 13 exposed at the bottom of the contact hole 17 due to such resist removal and cleaning, and exposure of the semiconductor substrate 11 to the air after cleaning, etc. A natural oxide film 18 grows about 1 to 2 nm.

In the present embodiment, the natural oxide film 18 is subsequently etched away together with a part of the polysilicon plug 13. The etching can be performed by, for example, reactive ion etching (RIE) using an etching gas containing nitrogen trifluoride (NF ₃ ). In this case, RIE can be performed by applying RF (Radio Frequency) power of about 1000 W under a pressure of about 30 Pa, for example. Here, the flow rate of nitrogen trifluoride is 100 ml / min (standard state), and the substrate temperature is 20 ° C.

  FIG. 3 is a diagram showing the relationship between the selectivity in RIE using nitrogen trifluoride as an etching gas and the pressure in the reaction chamber in which RIE is performed. Here, the selection ratio refers to the ratio between the etching rate of the polysilicon plug 13 and the etching rate of the silicon oxide film (in this embodiment, the natural oxide film 18 and the insulating film 15).

  As shown in FIG. 3, the selection ratio is small in the low pressure region. This is because, in a low pressure region, ions incident on the substrate enter the substrate almost without colliding with particles such as other ions before reaching the substrate. That is, in a low pressure region, the energy of ions incident on the substrate is large, and physical etching is dominant in the etching mechanism. For this reason, a large difference does not occur in the etching rate among the polysilicon plug 13, the natural oxide film 18, and the insulating film 15, and the etching proceeds at substantially the same etching rate.

  In contrast, in the high pressure region, ions collide with other ions and other particles before reaching the substrate, so the energy of ions incident on the substrate is small, and the etching mechanism is dominated by chemical etching. Become. For this reason, a difference occurs in the etching rate among the polysilicon plug 13, the natural oxide film 18, and the insulating film 15 according to the reactivity of the etching gas species, and the selectivity is increased.

  Therefore, as described above, when RIE is performed using nitrogen trifluoride as an etching gas under a pressure of about 30 Pa, chemical etching is dominant in the etching mechanism. That is, the etching of the polysilicon plug 13 proceeds isotropically as shown in FIG. 2A, and when the removal of the natural oxide film 18 is completed, the surface of the polysilicon plug 13 is the center of the contact hole 17. The position corresponding to is a bowl-shaped depression. For example, when removing the 1-2 nm natural oxide film 18 formed at the bottom of the contact hole 17 having an aspect ratio of 5 (diameter 200 nm, depth 1000 nm), the depth of the recess is about 50 nm. Become. Further, the maximum width (the upper end of the polysilicon plug 13) 17c of the recess (concave portion) formed in the polysilicon plug 13 is larger than the opening 17b of the insulating film 14 (so-called bowing shape).

  In addition, since the selection ratio is secured between the polysilicon plug 13 and the insulating film 15 under the etching conditions, the polysilicon is formed without enlarging the bottom portion 17b of the contact hole 17 and the upper portion 17a of the contact hole 17. Isotropic etching of the plug 13 can be performed. Therefore, even when the contact holes 17 are formed close to each other as in a DRAM or the like, the upper portions of the adjacent contact holes 17 are connected during etching, and the metal film 20 is formed in the contact holes 17 as will be described later. When filled, there is no short circuit. Therefore, according to the etching conditions described above, the natural oxide film 18 can be removed while suppressing etching of the upper portion of the insulating film 15. That is, when the natural oxide film 18 is etched, the etched insulating film 15 can be prevented from reattaching to the bottom of the contact hole 17.

  Note that the pressure at which the natural oxide film 18 is etched is not limited to the above-described conditions, and a condition that can ensure the selection ratio between the insulating film 15 and the polysilicon plug 13, that is, chemical etching is possible. Any pressure may be used. Therefore, as shown in FIG. 3, the lower limit of the pressure is desirably about 5 Pa or more. The upper limit of the pressure is not particularly limited, but about 500 Pa is sufficient.

As described above, when the removal of the natural oxide film 18 by isotropic etching is completed, a titanium film as the adhesion layer 19 of the tungsten plug is formed on the entire surface. Here, the adhesion layer 19 is formed by, for example, an inorganic plasma CVD method using titanium tetrachloride (TiCl ₄ ) as a raw material. Here, as a film forming condition, the flow rate of titanium tetrachloride is 2000 ml / min (standard state), the flow rate of monosilane (SiH ₄ ) is 2000 ml / min (standard state), and is introduced into the reaction chamber, and 1000 W of RF power is applied. is doing. The pressure in the reaction chamber is 2000 Pa, and the substrate temperature during film formation is 650 ° C.

After that, as shown in FIG. 2B, a tungsten film, which is a metal film 20 which is a main part of the contact plug, is formed on the adhesion layer 19 by using, for example, inorganic CVD using tungsten hexafluoride (WF ₆ ) as a raw material. The contact holes 17 are filled by the method. As the film forming conditions, for example, tungsten hexafluoride is introduced into the reaction chamber at 2000 ml / min (standard state) and monosilane at 2000 ml / min (standard state), and RF power of 1000 W is applied. At this time, the pressure in the reaction chamber is 2000 Pa, and the substrate temperature during film formation is 650 ° C.

  The tungsten film formed by the inorganic CVD method as described above is excellent in bottom coverage. For this reason, as shown in FIG. 2B, even when the polysilicon plug 13 isotropically etched is present at the bottom of the contact hole 17 having a high aspect ratio, conformal film formation is performed. Is possible. Therefore, the contact hole 17 can be easily embedded.

  Then, the adhesion layer 19 and the metal film 20 deposited on the portion other than the contact hole 17 are removed by a CMP method, etch back, or the like, and the contact structure including the adhesion layer 19 and the metal film 20 shown in FIG. 2C is completed. . An upper conductor is formed on the contact by a known method. Further, in the present embodiment, the removal of the oxide film 18 and the formation of the adhesion layer 19 are continuously performed under vacuum by a semiconductor manufacturing apparatus equipped with a known multi-chamber. Therefore, the natural oxide film 18 is not re-formed on the upper surface of the polysilicon plug 13.

  FIG. 4 shows the cumulative frequency distribution of the resistance (contact resistance) of the contact formed by the conventional method and the contact formed by stacking the polysilicon plug and the tungsten plug formed according to the present embodiment. From FIG. 4, it can be understood that the contact formed according to the present invention has a lower resistance and a smaller resistance variation than the conventional one.

  As described above, according to the present embodiment, since the upper part of the contact hole can be prevented from being sputter-etched, the reattachment of the insulating film (silicon oxide film) to the bottom part of the contact hole is surely prevented. be able to. Therefore, for example, even when a high aspect ratio contact having a structure in which a polysilicon plug and a tungsten plug are stacked is formed, a silicon oxide film does not remain at the junction between both plugs. Accordingly, since the silicide reaction at the junction between the polysilicon plug and the tungsten plug is not hindered, a contact with low resistance and small resistance variation can be formed. That is, a high aspect ratio contact can be stably formed. In addition, according to the present embodiment, the contact area between the lower conductor and the metal film is increased as compared with the prior art, so that it is possible to form a contact structure that further suppresses resistance variation.

(Second Embodiment)
Hereinafter, a second embodiment of the present invention will be described with reference to the drawings. Similar to the first embodiment, this embodiment also applies the present invention to the manufacture of a semiconductor device having a contact having a structure in which a polysilicon plug and a tungsten plug are laminated.

  5 and 6 are process cross-sectional views illustrating the manufacturing process of the semiconductor device. As shown in FIG. 5A, first, an insulating film 12 made of a silicon oxide film such as BPSG (Boro-Phospho Silicate glass) is formed on a semiconductor substrate 11 made of silicon or the like by a formation CVD method and reaches photolithography. A contact hole 12a is formed by etching. Next, as shown in FIG. 5B, a polysilicon film 31 is formed on the entire surface by a CVD method or the like. When the contact hole is completely filled, the polysilicon film in the contact hole usually has a volume ratio of about 150% with respect to the volume of the contact hole (amount of deposited polysilicon in the contact hole / volume of the contact hole). It is deposited with. However, in the present embodiment, the deposition amount of the polysilicon film 31 in the contact hole 12a is about 25 to 75% in volume ratio. For this reason, the polysilicon film 31 does not completely fill the contact hole 12a, and a recess is formed in the center of the contact hole 12a.

  Subsequently, a polysilicon film 31 is formed by CMP or the like, and the upper surface of the substrate is planarized. As a result, as shown in FIG. 5C, a contact plug 32 having a recess at the center of the contact hole 12a is formed.

  After the contact plug 32 is formed, as shown in FIG. 5D, an insulating film 14 made of a silicon nitride film and an insulating film 15 made of BPSG are deposited on the entire surface. Similar to the first embodiment, the insulating film 14 functions as a stopper film in dry etching for forming a contact hole described later.

  Next, a resist pattern 16 having an opening 16a at a contact hole formation position is formed on the insulating film 15 by photolithography or the like. Using the resist pattern 16 as an etching mask, the insulating film 15 and the insulating film 14 are sequentially etched to form a contact hole 17 reaching the silicon plug 32 as shown in FIG. The etching can be performed by dry etching such as plasma etching.

  After the resist pattern 16 is removed by ashing, organic cleaning, or the like, cleaning is performed to remove a resist residue on the insulating film 15 or an organic substance remaining in the contact hole 17. For the cleaning, for example, a cleaning liquid (SPM or the like) containing sulfuric acid is used. As shown in FIG. 6A, the polysilicon plug 32 exposed at the bottom of the contact hole 17 due to such resist removal and cleaning, and exposure of the semiconductor substrate 11 to the air after cleaning, etc. The natural oxide film 33 grows about 1 to 2 nm.

Subsequently, as in the first embodiment, the natural oxide film 33 is etched away together with a part of the polysilicon plug 13. The etching may be performed under the etching conditions shown in the first embodiment by RIE using an etching gas containing nitrogen trifluoride (NF ₃ ), for example.

  In the present embodiment, since the polysilicon plug 32 includes the recess as described above, if the etching amount in the etching is excessive, the polysilicon plug 32 is completely removed and the semiconductor substrate 11 is etched. In order to avoid this, the etching amount Te in the etching needs to be smaller than the minimum film thickness Tp of the polysilicon plug (film thickness in the recess). Further, since the natural oxide film 33 needs to be completely removed, if the film thickness of the natural oxide film 33 is To, then To ≦ Te ≦ Tp is a condition that the etching should satisfy.

  In the actual manufacturing process, the etching amount is controlled by the etching time. Therefore, when the above conditional expressions are converted as the etching rate ERp of the polysilicon plug and the etching rate ERo of the natural oxide film 33, the etching time te when the natural oxide film 33 is removed by etching is To / ERo ≦ te ≦ Tp / What is necessary is just to satisfy ERp.

  When the removal of the natural oxide film 18 by isotropic etching is completed as described above, as in the first embodiment, the adhesion layer 19 made of a titanium film and the metal film 20 made of a tungsten film are formed by an inorganic CVD method. It deposits in order and the contact hole 17 is filled (FIG.6 (c)). Then, the adhesion layer 19 and the metal film 20 deposited on the portion other than the contact hole 17 are removed by the CMP method, etch back or the like, and the contact structure including the adhesion layer 19 and the metal film 20 shown in FIG. 6D is completed. . An upper conductor is formed on the contact by a known method. In the present embodiment, the removal of the oxide film 33 and the formation of the adhesion layer 19 are continuously performed under vacuum. For this reason, the natural oxide film 18 is not re-formed on the upper surface of the polysilicon plug 13.

  The contact formed by stacking the polysilicon plug and the tungsten plug formed according to the present embodiment also has a lower resistance and less resistance variation than the conventional one, as in the first embodiment.

  As described above, according to the present embodiment, it is possible to suppress sputter etching of the upper portion of the contact hole as in the first embodiment, so that the insulating film (silicon oxide film) on the bottom of the contact hole Can be reliably prevented. Accordingly, since the silicide reaction at the junction between the polysilicon plug and the tungsten plug is not hindered, a contact with low resistance and small resistance variation can be formed. That is, a high aspect ratio contact can be stably formed. Further, according to the present embodiment, the contact area between the lower conductor and the metal film is increased as compared with the first embodiment, so that it is possible to form a contact structure that further suppresses resistance variation.

  In addition, this invention is not limited to embodiment mentioned above, A various deformation | transformation and application are possible in the range with the effect of this invention. For example, in the above embodiment, an example of a contact having a structure in which a polysilicon plug and a tungsten plug are stacked has been described. From the viewpoint of realizing low resistance by silicidation at the bottom of the contact hole, It is not limited to polysilicon, but may be a material mainly composed of silicon such as amorphous silicon or single crystal silicon. Similarly, the adhesion layer material is not limited to titanium, and may be titanium nitride or other refractory metal materials. The present invention is also applicable to contacts that do not have a laminated structure that is directly connected to a silicon substrate. Furthermore, the present invention can be practiced without being restricted by the material of the lower conductor or the insulating film by selecting an isotropic etching gas corresponding to the lower conductor and the insulating film. That is, the present invention can be applied to the manufacture of all semiconductor devices having contact holes, and can form contacts with low resistance and small resistance variation.

  In addition, the processes such as lithography, film formation, and etching described above can be replaced with other equivalent processes without departing from the technical idea of the present invention.

  INDUSTRIAL APPLICABILITY The present invention has an effect that a contact with low resistance and small variation can be stably formed, and is useful as a method for manufacturing a semiconductor device having a contact.

Process sectional drawing which shows the contact plug formation process of the 1st Embodiment of this invention Process sectional drawing which shows the contact plug formation process of the 1st Embodiment of this invention The figure which shows the relationship between the reaction chamber pressure in RIE which removes an oxide film, and a selection ratio The figure which shows the contact resistance of the contact plug formed by this invention Process sectional drawing which shows the contact plug formation process of the 2nd Embodiment of this invention Process sectional drawing which shows the contact plug formation process of the 2nd Embodiment of this invention Cross-sectional process diagram showing conventional contact plug formation process

Explanation of symbols

11 Semiconductor substrate 12 Insulating film 13, 32 Polysilicon plug (lower conductor)
15 Insulating film 16 Resist pattern 17 Contact hole 18, 33 Natural oxide film (contact inhibitor)
19 Adhesion layer 20 Metal film 51 Semiconductor substrate 53 Polysilicon plug 55 Insulating film 56 Resist pattern 57 Contact hole 58 Natural oxide film 59 Silicon oxide film (reattached insulating film)
61 Tungsten plug

Claims (9)

In a method for manufacturing a semiconductor device provided with a contact for connecting a lower conductor and an upper conductor,
Forming an insulating film covering the lower conductor;
Forming a contact hole reaching the lower conductor in the insulating film;
Etching the surface of the lower conductor by isotropic dry etching for selectively etching the lower conductor exposed at the bottom of the contact hole;
A step of forming a metal film in the contact hole continuously with the etching step;
A method for manufacturing a semiconductor device, comprising:   The method of manufacturing a semiconductor device according to claim 1, wherein an aspect ratio of the contact hole is 3 or more.   The method of manufacturing a semiconductor device according to claim 1, wherein a main component of the lower conductor is silicon, and a main component of the metal film is a refractory metal.   The method of manufacturing a semiconductor device according to claim 1, wherein the etching of the lower conductor is performed by reactive ion etching using an etching gas containing nitrogen trifluoride gas.   The method of manufacturing a semiconductor device according to claim 4, wherein the reactive ion etching is performed under a pressure of 5 to 500 Pa.   The method of manufacturing a semiconductor device according to claim 1, wherein the etching of the lower conductor includes etching and removing a contact obstruction on the surface of the lower conductor together with a part of the lower conductor to form a recess in the lower conductor.   The method for manufacturing a semiconductor device according to claim 1, wherein the etching of the lower conductor and the formation of the metal film are continuously performed under vacuum.   The method of manufacturing a semiconductor device according to claim 1, wherein the metal film is formed by chemical vapor deposition. The lower conductor is
Forming a lower insulating film on the substrate;
Forming a lower contact hole penetrating the lower insulating film;
Depositing polysilicon in the lower contact hole;
Have
2. The method of manufacturing a semiconductor device according to claim 1, wherein the amount of polysilicon deposited in the lower contact hole is 25 to 75% with respect to the volume of the lower contact hole.

Images