JP2007109713A - Group iii nitride semiconductor light emitting element - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a group III nitride semiconductor light emitting element having a high emission intensity and a low drive voltage. <P>SOLUTION: In a group III nitride semiconductor light emitting element where an n-type semiconductor layer, a light emitting layer and a p-type semiconductor layer composed of a group III nitride semiconductor are formed in this order on a substrate, and a positive electrode and a negative electrode are provided in contact with the p-type semiconductor layer and the n-type semiconductor layer, respectively, the positive electrode is composed of ITO (Indium-Tin-Oxide), the ITO is arranged in direct contact with the p-type semiconductor layer and the p-type semiconductor layer contains Mg dopant at a concentration of 0.9×10<SP>20</SP>to 2×10<SP>20</SP>atom/cm<SP>3</SP>. <P>COPYRIGHT: (C)2007,JPO&INPIT

Description

  The present invention relates to a group III nitride semiconductor light emitting device, and more particularly to a group III nitride semiconductor light emitting device having high emission intensity and low driving voltage.

  A group III nitride semiconductor light-emitting device has an n-type layer and a p-type layer arranged with a light-emitting layer interposed therebetween, and obtains light emission by injecting current from a negative electrode and a positive electrode formed in contact with each other. Yes. The light emission output depends on the area of the portion excluding the region necessary for forming both electrodes from the limited element area. However, providing an excessive area for extraction of light emission conversely reduces the electrode area, and at the time of light emission, there is a possibility that the drive voltage increases due to current concentration and the function of the light emitting layer deteriorates. Therefore, in the shape and arrangement of the negative electrode and the positive electrode, importance must be given to the balance with the region from which light emission is extracted.

  The negative electrode is formed by digging from above by a method such as etching and laminating one or more metal thin films on the exposed n-type layer. The positive electrode is composed of a conductive film provided on the entire p-type layer and a metal multilayer film (bonding pad) formed on a part of the conductive film. The conductive film is provided in order to distribute the current from the metal multilayer film to the entire p-type layer. This is related to the fact that the current diffusion in the lateral direction of the material is small as a characteristic of the group III nitride semiconductor material. That is, when there is no conductive film, current is injected only into the p-type layer region immediately below the metal multilayer film, and non-uniformity occurs in current supply to the light emitting layer. And the light from a light emitting layer will be shielded by the metal thin-film electrode which is a negative electrode, and cannot be taken out outside. For this reason, the conductive film is used as a current diffusion layer for spreading the current from the metal multilayer film to the entire p-type layer. Further, this conductive film needs to be light transmissive in order to extract emitted light to the outside. For this reason, a transparent conductive film is generally used as the conductive film used for the group III nitride semiconductor light emitting device.

  Conventionally, as a configuration of the positive electrode conductive film, a configuration in which an oxide of Ni or Co and Au as a contact metal contacting the p-type layer is combined (see, for example, Patent Document 1). Recently, a metal oxide that uses a highly conductive oxide, for example, an ITO film, has been used to reduce the contact metal thickness or to increase the light transmission in the absence of contact metal. (For example, refer to Patent Document 2).

  A layer made of a conductive transparent material such as an ITO film is superior in light transmittance to an oxide layer of Ni or Co. Therefore, the film thickness can be made relatively thick without impairing light extraction. Is possible. A Ni or Co oxide layer is used in a thickness range of 10 to 50 nm, whereas a conductive transparent film such as an ITO film has a thickness of 200 to 500 nm.

  The advantage of using a conductive transparent film such as an ITO film as the positive electrode conductive film of the group III nitride semiconductor light emitting device is that it has a higher light transmittance than the conventional positive electrode conductive film, so that the emission intensity for the same injection current Is to be higher. However, although it is a conductive film, the contact resistance with the p-type layer is larger than that of the conventional positive electrode conductive film, and there is a problem that a side effect that the driving voltage during use becomes high occurs.

Japanese Patent No. 2803742 Japanese Utility Model Publication No. 6-38265

  An object of the present invention is to provide a group III nitride semiconductor light-emitting device that solves the above-described problems and has high emission intensity and low driving voltage.

  In order to reduce the film resistance of the p-type group III nitride semiconductor layer, it is necessary to distribute a p-type dopant such as Mg in the p-type group III nitride semiconductor layer at a high concentration, but the dopant concentration is high. As a result, the crystallinity of the p-type group III nitride semiconductor layer itself is impaired, and as the crystal defects grow, donor properties appear to cancel the acceptor properties developed by Mg doping. Therefore, the Mg concentration could not be so high.

  The present inventor obtained a p-type group III nitride semiconductor layer having a high Mg concentration and excellent crystallinity by doping Mg while controlling the growth rate of the group III nitride semiconductor layer. The present inventors have found that a group III nitride semiconductor light emitting device having a low light emission intensity and a high light emission intensity can be produced.

That is, the present invention provides the following inventions.
(1) An n-type semiconductor layer, a light emitting layer, and a p-type semiconductor layer made of a group III nitride semiconductor are stacked in this order on a substrate, and a positive electrode and a negative electrode are in contact with the p-type semiconductor layer and the n-type semiconductor layer, respectively. In the provided light emitting device, the positive electrode is made of ITO (Indium-Tin-Oxide), the ITO is disposed so as to be in direct contact with the p-type semiconductor layer, and the p-type semiconductor layer contains an Mg dopant. A group III nitride semiconductor light-emitting device containing 0.9 × 10 ^{20 to} 2 × 10 ²⁰ atoms / cm ³ in concentration.

(2) An n-type semiconductor layer, a light-emitting layer, and a p-type semiconductor layer made of a group III nitride semiconductor are grown on the substrate in this order, and then the p-type semiconductor layer is made of ITO (Indium-Tin-Oxide). In the method of manufacturing a group III nitride semiconductor light emitting device comprising forming a positive electrode, the growth rate of the p-type semiconductor layer is 10 to 20 nm / min, and the concentration of Mg dopant in the p-type semiconductor layer is 0 A method for producing a Group III nitride semiconductor light-emitting device, wherein the number is from 9 × 10 ^{20 to} 2 × 10 ²⁰ atoms / cm ³

(3) In the above two items, the ratio of the Ga material supply amount to the Mg material supply amount (Mg / Ga) when growing the p-type semiconductor layer is 0.75 × 10 ^{−2 to} 1.5 × 10 ⁻² The manufacturing method as described.

  (4) The manufacturing method according to the above item 1 or 2, wherein the growth apparatus internal pressure when growing the p-type semiconductor layer is 10 to 50 kP.

  (5) A lamp comprising the group III nitride semiconductor light-emitting device according to item 1 above.

The main point of the present invention is that a positive electrode made of ITO is directly disposed on a p-type semiconductor layer and the Mg dopant concentration of the p-type semiconductor layer is controlled to 0.9 × 10 ²⁰ to 2 × 10 ²⁰ atoms / cm ^3. According to the above, a group III nitride semiconductor light emitting device having high emission intensity and low driving voltage can be obtained.

  In the p-type group III nitride semiconductor layer in which the positive electrode made of ITO is directly provided, the present invention takes in dopant Mg at a high concentration under a controlled growth rate, and has low resistance without losing crystallinity. The present invention provides a group III nitride semiconductor light-emitting device in which a p-type semiconductor layer is formed and high emission intensity is obtained with a low driving voltage. The detailed contents of the invention will be described below.

  FIG. 1 is a schematic view showing a cross section of a group III nitride semiconductor light emitting device in which a positive electrode made of ITO is directly provided on a p-type semiconductor layer according to the present invention. In this figure, reference numeral 7 denotes a positive electrode, which is composed of a transparent conductive film 7a made of ITO and a bonding pad layer 7b. Reference numeral 5 denotes a p-type semiconductor layer, which is composed of a p-type cladding layer 5a and a p-type contact layer 5b. 1 is a substrate, 2 is a buffer layer, 3 is an n-type semiconductor layer, 4 is a light emitting layer, and 6 is a negative electrode.

In the present invention, the substrate 1 includes a sapphire single crystal (Al ₂ O ₃ ; A plane, C plane, M plane, R plane), spinel single crystal (MgAl ₂ O ₄ ), ZnO single crystal, LiAlO ₂ single crystal, Oxide single crystal substrates such as LiGaO ₂ single crystal, MgO single crystal or Ga ₂ O ₃ single crystal, and borides such as Si single crystal, SiC single crystal, GaAs single crystal, AlN single crystal, GaN single crystal or ZrB ₂ A known substrate material selected from non-oxide single crystal substrates such as single crystals can be used without any limitation. The plane orientation of the substrate is not particularly limited, and the off angle may be arbitrarily selected.

As the group III nitride semiconductor constituting the buffer layer, the n-type semiconductor layer, the light emitting layer, and the p-type semiconductor layer, the general formula Al _x In _y Ga _1-xy N (0 ≦ x ≦ 1, 0 ≦ y <1, Semiconductors having various compositions represented by 0 ≦ x + y ≦ 1) are known. Even in the group III nitride semiconductor constituting the buffer layer, the n-type semiconductor layer, the light emitting layer, and the p-type semiconductor layer in the present invention, the general formula Al _x In _y Ga _1-xy N (0 ≦ x ≦ 1, 0 ≦ y Semiconductors having various compositions represented by <1, 0 ≦ x + y ≦ 1) can be used without any limitation.

  Examples of methods for growing these group III nitride semiconductors include metalorganic vapor phase growth (MOCVD), molecular beam epitaxy (MBE), and hydride vapor phase epitaxy (HVPE). Desirably, the composition control is easy and the MOCVD method with mass productivity is suitable, but it is not necessarily limited to this method.

When the MOCVD method is employed as the method for growing the semiconductor layer, trimethylgallium (TMGa) or triethylgallium (TEGa), which is an organic metal material, is mainly used as a group III Ga source, and also a group III Al source. As trimethylaluminum (TMAl) or triethylaluminum (TEAl). Further, for In, which is a raw material for the light emitting layer, trimethylindium (TMI) or triethylindium (TEI) is used as the raw material. Ammonia (NH ₃ ) or hydrazine (N ₂ H ₄ ) or the like is used as a Group V N source.

Si or Ge is used as a dopant material for the n-type semiconductor layer. Monosilane (SiH ₄ ) or disilane (Si ₂ H ₆ ) is used as the Si raw material, and germane (GeH ₄ ) or an organic germanium compound is used as the Ge raw material. In the p-type semiconductor layer, Mg is used as a dopant. For example, biscyclopentadienyl magnesium (Cp ₂ Mg) or bisethylcyclopentadienyl magnesium ((EtCp) ₂ Mg) is used as the raw material.

Next, each semiconductor layer adopting a general MOCVD method as a growth method will be described.
(Buffer layer)
As the buffer layer, a low temperature buffer layer disclosed in Japanese Patent No. 3026087 and a high temperature buffer layer disclosed in Japanese Patent Application Laid-Open No. 2003-243302 are known, and these buffer layers should be used without any limitation. Can do.

The substrate 1 to be used for growth can be selected from those described in the previous term. Here, a case where a sapphire substrate is used will be described. The substrate is placed on a grapha toy jig (susceptor) with SiC film installed in a reaction space where the temperature and pressure can be controlled, and NH ₃ gas and TMAl are placed in that place for both hydrogen carrier gas and nitrogen carrier gas. Send in. The grapha toy jig with SiC film is heated to a necessary temperature by induction heating with an RF coil, and an AlN buffer layer is formed on the substrate. The temperature is controlled from 500 ° C. to 700 ° C. to grow a low temperature buffer of AlN, and then raised to about 1100 ° C. for crystallization. When growing a high-temperature AlN buffer layer, it is possible not to heat in two steps, but at a temperature of 1000 ° C. to 1200 ° C. at a time. When using the AlN single crystal substrate and the GaN single crystal substrate described above, it is not always necessary to grow a buffer layer, and an n-type semiconductor layer described later is directly grown on the substrate.

(N-type semiconductor layer)
As the n-type semiconductor layer, those having various compositions and structures are known, and those having any composition and structure can be used in the present invention, including those known. Usually, the n-type semiconductor layer is an underlayer composed of an undoped GaN layer, an n-type dopant such as Si or Ge, and an n-type cladding layer having a larger band gap energy than the n-type contact layer and the light-emitting layer provided with the negative electrode Consists of The n-type contact layer can also serve as an n-type cladding layer and / or an underlayer.

Subsequent to the formation of the buffer layer, an underlayer composed of an undoped GaN layer is grown on the buffer layer. The temperature is 1000 to 1200 ° C., and under pressure control, NH ₃ gas and TMGa are sent onto the buffer layer together with the carrier gas. Although the supply amount of TMGa is limited by the ratio with NH ₃ that flows simultaneously, controlling the growth rate between 1 μm / hour and 3 μm / hour is effective in suppressing the occurrence of crystal defects such as dislocations. Regarding the growth pressure, an area of 20 to 60 kP (200 to 600 mbar) is optimal for securing the above growth rate.

Subsequent to the growth of the undoped GaN layer, an n-type contact layer is grown. The growth conditions are the same as the growth conditions for the undoped GaN layer. The dopant is supplied together with the carrier gas, but the supply concentration is controlled by the ratio with the TMGa supply amount. In the present invention, the driving voltage of a light emitting device having a positive electrode made of ITO is lowered by making a p-type semiconductor layer described later have a specific composition, but the driving voltage also depends on the dopant concentration of the n-type contact layer. Since it is naturally affected, the dopant concentration of the n-type contact layer is determined in accordance with the growth conditions of the p-type semiconductor layer. As the supply condition of the dopant, the drive voltage can be lowered by setting the M / Ga ratio (M = Si or Ge) in the range of 1.0 × 10 ^{−3 to} 6.0 × 10 ⁻³ .

  The thicknesses of the undoped GaN layer and the dopant-containing n-type semiconductor layer are preferably 1 to 4 μm, but are not necessarily limited to this range. As a means for suppressing the propagation of crystal defects from the substrate and the buffer layer to the upper layer, it is possible to increase the film thickness of the undoped GaN layer and / or the dopant-containing n-type semiconductor layer. This is not a good idea because it induces warping of the wafer itself. In the present invention, it is preferable to set the thickness of each layer within the above range.

(Light emitting layer)
As the light emitting layer, those having various compositions and structures are known, and those having any composition and structure including these known ones can be used in the present invention.

For example, the light emitting layer having a multiple quantum well structure is formed by alternately stacking n-type GaN layers serving as barrier layers and GaInN layers serving as well layers. As the carrier gas, N ₂ or H ₂ is selectively used. NH ₃ and TEGa or TMGa are supplied together with this carrier gas.

In the growth of the GaInN layer, TMI is further supplied. That is, the process of intermittently supplying In is controlled while controlling the growth time. The control of the In concentration is difficult by H ₂ is interposed in the carrier gas in the growth of the GaInN layer, it is not advisable to use of H ₂ as a carrier gas at this layer. The film thickness of the barrier layer (n-type GaN layer) and the well layer (GaInN layer) is selected so as to maximize the emission intensity. After the optimum film thickness is determined, the group III raw material supply amount and growth time are appropriately selected. The amount of dopant to the barrier layer is also a condition that determines the level of the driving voltage of the light emitting element, but the concentration is selected according to the growth conditions of the p-type semiconductor layer. The dopant may be either Si or Ge.

  The growth temperature is preferably between 700 ° C. and 1000 ° C., but is not necessarily limited to this range. However, in the growth of the well layer, In is difficult to be taken into the growth film at a high temperature, and it is difficult to substantially form the well layer. Therefore, the growth temperature is selected within a range that does not become too high. In the present invention, the growth temperature of the light emitting layer is in the range of 700 ° C. to 1000 ° C., but there is no problem even if the growth temperature of the barrier layer and the well layer is changed. The growth pressure is set in balance with the growth rate. In the present invention, the growth pressure is preferably between 20 kP (200 mbar) and 60 kP (600 mbar), but is not necessarily limited to this range.

  Although the number of well layers and barrier layers is 3 to 7 for both, it is not necessarily limited to this range. The light emitting layer is finished by finally growing the barrier layer (final barrier layer). This barrier layer serves to prevent carrier overflow from the well layer and to prevent re-desorption of In from the final well layer in the subsequent growth of the p-type semiconductor layer.

(P-type semiconductor layer)
The p-type semiconductor layer is usually composed of a p-type contact layer on which a positive electrode is formed and a p-type cladding layer having a band gap energy larger than that of the light emitting layer. The p-type contact layer can also serve as the p-type cladding layer.

In the present invention, the p-type semiconductor layer in which the Mg dopant concentration is controlled to 0.9 × 10 ²⁰ to 2 × 10 ²⁰ atoms / cm ³ is a p-type contact layer on which a positive electrode made of ITO is formed. is there. The Mg concentration of the p-type cladding layer is not necessarily in this range. In the p-type contact layer, hydrogen atoms may be present together with the Mg dopant at a concentration of about 1 × 10 ¹⁸ to 1 × 10 ²¹ atoms / cm ³ .

  In the growth of the p-type semiconductor layer, a p-type cladding layer is first laminated directly on the final barrier layer of the light emitting layer, and a p-type contact layer is laminated thereon. The p-type contact layer is the uppermost layer, and ITO constituting a part of the positive electrode is in contact therewith. GaN or GaAlN is preferably used for the p-type cladding layer. At this time, layers having different compositions or lattice constants may be alternately stacked, or the thickness of the layers and the concentration of Mg as a dopant may be changed.

The growth of the p-type contact layer is performed as follows. TMGa, TMAl, and dopant Cp ₂ Mg are fed onto the p-type cladding layer together with a carrier gas (hydrogen or nitrogen, or a mixed gas of both) and NH ₃ gas.

  The growth temperature at this time is preferably in the range of 980 to 1100 ° C. When the temperature is lower than 980 ° C., an epitaxial layer having low crystallinity is formed, and the film resistance due to crystal defects increases. Further, at a temperature higher than 1100 ° C., the well layer among the light emitting layers located in the lower layer is placed in a high temperature environment in the process of growing the p-type contact layer, and may be thermally damaged. In this case, there is a risk of causing a decrease in strength at the time of making the light emitting element or a deterioration in strength under a resistance test.

The growth pressure is not particularly limited, but is preferably 50 kP (500 mbar) or less. The reason for this is that if the growth is performed below this pressure, the in-plane Al concentration in the p-type contact layer can be made uniform, and the p-type contact layer in which the Al composition of GaAlN is changed as necessary. This is because it is easy to control the growth. Under conditions higher than this pressure, the reaction between the supplied TMAl and NH ₃ becomes remarkable, and TMAl is consumed before reaching the substrate in the middle of growth, making it difficult to obtain the target Al composition. The same can be said for Mg fed as a dopant. That is, when the growth condition is 50 kP (500 mbar) or less, the Mg concentration distribution in the two-dimensional direction (in-plane direction of the growth substrate) in the p-type contact layer becomes uniform (in-plane uniformity of the growth substrate).

  It is also known that the Al composition in the in-plane direction and the distribution of Mg concentration in the GaAlN contact layer change depending on the carrier gas flow rate used. However, it has been found that the Al composition in the contact layer and the in-plane uniformity of Mg are greatly influenced by the growth pressure condition rather than the carrier gas condition. Therefore, it is appropriate to set the growth pressure to 50 kP (500 mbar) or less and 10 kP (100 mbar) or more.

The Mg concentration of the p-type dopant can be controlled by setting the growth rate of the p-type contact layer as follows. The growth rate of the p-type contact layer mainly depends on the supply amount of TMGa which is a Ga material. If the TMGa supply amount per unit time is increased, the target film thickness can be obtained in such a short time. Similarly, the supply amount of Cp ₂ Mg as a dopant may be increased. However, in the p-type contact layer with a high growth rate, crystal defects are easily introduced, and even if a dopant is contained at a necessary concentration, film resistance due to crystal defects occurs, and as a result, the drive voltage does not decrease. End up. On the other hand, if the growth rate is too low, the growth time until the target film thickness is reached becomes long, and there is a risk of increasing thermal damage to the light emitting layer during the growth period. The present inventor examined the supply amount of TMGa per unit time, limited the growth rate of the p-type contact layer to a certain range, and changed the supply amount condition of Cp ₂ Mg accordingly. The growth conditions of the p-type contact layer satisfying that the drive voltage is low and the light-emitting layer is free from thermal damage as a light-emitting device having an ITO positive electrode include the growth rate (Vgc) of the p-type contact layer and TMGa. It has been found that the ratio (α (Mg / Ga)) between the supply amount and the Cp ₂ Mg supply amount needs to be within a certain range.

That is, under the growth temperature and growth pressure conditions described above, the growth rate Vgc of the p-type contact layer is preferably 10 to 20 nm / min, and more preferably 13 to 20 nm / min. α (Mg / Ga) is preferably 0.75 × 10 ^{−2 to} 1.5 × 10 ^{−2, and} more preferably 0.78 × 10 ^{−2 to} 1.2 × 10 ⁻² . Under this condition, the Mg concentration in the p-type contact layer can be controlled to 0.9 × 10 ²⁰ to 2 × 10 ²⁰ atoms / cm ³ .

Further, the thickness of the p-type contact layer is preferably 170 to 200 nm.
The growth rate is determined by measuring the film thickness of the p-type contact layer by TEM observation of the wafer cross section and dividing it by the growth time. Further, the Mg concentration in the p-type contact layer can be determined by a general mass spectrometer (SIMS).

After the growth of the p-type contact layer, the substrate heating is stopped and N ₂ gas is supplied to purge the reaction space, and the wafer is cooled until it is taken out of the growth apparatus. In this method, it was confirmed that the p-type contact layer was the target p-type at this point. Therefore, heat treatment for activation is not necessary after this.

  Next, the negative electrode and the positive electrode provided on the n-type contact layer and the p-type contact layer will be described.

(Negative electrode)
As the negative electrode, those having various compositions and structures are known, and those having any composition and structure can be used in the present invention, including those known. Various production methods are known as the production method, and these known methods can be used.

A negative electrode formation process is based on the following procedures, for example.
A known photolithography technique and a general etching technique can be used for producing the negative electrode forming surface on the n-type contact layer. By these techniques, digging can be performed from the uppermost layer of the wafer to the position of the n-type contact layer, and the n-type contact layer in the region where the negative electrode is to be formed can be exposed. As the negative electrode material, metal materials such as Cr, W, and V can be used in addition to Al, Ti, Ni, and Au as the contact metal in contact with the n-type contact layer. In order to improve adhesion to the n-type contact layer, a multilayer structure in which a plurality of contact metals are selected from the above metals may be used. If the outermost surface is Au, the bondability is good.

(Positive electrode)
In the present invention, ITO is used for the positive electrode. The composition of ITO is preferably 50% ≦ In <100% and 0% <Sn ≦ 50%. Within this range, it is possible to satisfy low film resistance and high light transmittance. It is particularly preferable that In is 90% and Sn is 10%. ITO may contain Group II, Group III, Group IV or Group V elements as impurities. Further, SnO, ZnO, InO, or the like can be used instead of ITO.

  The thickness of the ITO film is desirably 50 to 500 nm. If it is 50 nm or less, the film resistance of the ITO film itself is increased, and the drive voltage is increased. On the other hand, if it is thicker than 500 nm, the light extraction efficiency to the upper surface is lowered, and the light emission intensity is not increased.

  As a method for forming the ITO film, a known vacuum deposition method or sputtering method can be used. There are a resistance heating method and an electron beam heating method as a heating method for vacuum deposition, but an electron beam heating method is suitable for the deposition of materials other than metal. Alternatively, a method can be used in which the compound as a raw material is made liquid and applied to the surface to form an oxide film by appropriate treatment.

  In the vapor deposition method, the crystallinity of the ITO film is affected by conditions, but this is not the case if the conditions are appropriately selected. When the ITO film is formed at room temperature, heat treatment for transparency is required.

  Since film formation by sputtering is placed in a high-energy plasma environment, the surface of the p-type contact layer is likely to be damaged by plasma, and thus the contact resistance tends to increase. Thus, the influence on the surface of the p-type contact layer can be reduced.

  After the ITO film is formed, a bonding pad layer constituting the bonding pad portion is formed on a part of the surface. Together, they constitute a positive electrode. As the material for the bonding pad layer, those having various structures are known, and in the present invention, these known materials can be used without any particular limitation. In addition to Al, Ti, Ni, and Au used for the negative electrode material, Cr, W, and V can be used without any limitation. However, it is desirable to use a material with good adhesion to the ITO film. It is necessary to make the thickness sufficiently thick so as not to damage the ITO film against the stress at the time of bonding. The outermost layer is preferably made of a material having good adhesion to the bonding ball, for example, Au.

  The group III nitride semiconductor light emitting device of the present invention can be made into a lamp by providing a transparent cover by means well known in the art, for example. In addition, a white lamp can be produced by combining the gallium nitride compound semiconductor light emitting device of the present invention and a cover having a phosphor.

  EXAMPLES The present invention will be described in detail below with reference to examples and comparative examples, but the present invention is not limited to only these examples. Table 1 shows the manufacturing conditions of the light-emitting elements and the performance of the obtained light-emitting elements in each Example and Comparative Example.

Example 1
A sapphire substrate was set on the susceptor, the pressure was controlled to 20 kP (200 mbar), the temperature was controlled to 1100 ° C., and TMAl and NH ₃ were fed onto the substrate together with the H ₂ carrier gas to form an AlN buffer layer. This growth time was 10 minutes.

Thereafter, TMGa and NH ₃ were supplied at a pressure of 40 kP (400 mbar) and a temperature of 1030 ° C., and an underlayer made of undoped GaN was grown on the AlN buffer layer for 3 hours. While maintaining the pressure and temperature, GeH ₄ was supplied as an n-type dopant, and an n-type GaN layer was grown for 1 hour. This formed an n-type contact layer.

Thereafter, the pressure is 40 kP (400 mbar), the temperature is 750 ° C., the carrier gas is switched from H ₂ to N ₂ , and the barrier layer is grown for 7 minutes while supplying TEGa and NH ₃ and SiH ₄ as the dopant, and then further TMIn was supplied to grow the well layer for 5 minutes. The growth of the barrier layer and the well layer was alternately repeated five times, and finally the final barrier layer was grown to obtain a light emitting layer.

Thereafter, the pressure was 20 kP (200 mbar), the temperature was 1000 ° C., the carrier gas was switched to H ₂ again, TMGa and TMAl were supplied, and Cp ₂ Mg was fed as a dopant to grow a p-type cladding layer for 3 minutes. Thereafter, the p-type contact layer was grown while maintaining the pressure and temperature. The conditions were such that the supply ratio of Ga and Mg per unit time (α = Mg / Ga) was 0.0103, and the TMGa supply amount was fixed so that the growth rate was 15 nm per minute. The growth time was 12 minutes.

Thereafter, the carrier gas is switched again to H ₂ , the power supply to the induction coil is stopped, heating is stopped, the carrier gas is switched to N ₂ , the inside of the furnace is purged, and the obtained group III nitride semiconductor laminate Was cooled to a temperature at which it could be taken out of the furnace.

  A part of the n-type contact layer of the group III nitride semiconductor laminate taken out of the furnace was exposed by photolithography and dry etching, and a negative electrode made of a Cr and Ti metal layer was formed thereon. Further, an ITO film having a thickness of 350 nm was formed on the p-type contact layer by vapor deposition, and a bonding pad layer in which Ti, Au, Al, and Au were laminated in this order was formed thereon, and used as a positive electrode. Thereafter, the substrate back surface was polished and scribed, and then divided into light emitting elements.

The obtained light emitting device was caused to emit light by supplying a current of 20 mA, and the drive voltage and the light output were measured and found to be 3.2 V and 9 mW. Further, when the Mg concentration of the p-type contact layer was analyzed by SIMS, it was 1.8 × 10 ²⁰ atoms / cm ³ .

(Example 2)
Example 1 except that the p-type contact layer was grown under the following conditions: Ga: Mg supply ratio (α = Mg / Ga) was 0.0078, the growth rate was 20 nm / min, and the growth time was 9 minutes. A group III nitride semiconductor light emitting device was fabricated in the same manner as described above.
When the obtained light emitting device was evaluated in the same manner as in Example 1, the driving voltage was 3.3 V, the light emission output was 9 mW, and the Mg concentration in the p-type contact layer was 1.2 × 10 ²⁰ atoms / cm ³ . .

(Comparative Example 1)
Example 1 except that the p-type contact layer was grown under the following conditions: Ga and Mg supply ratio (α = Mg / Ga) of 0.0071, growth rate of 22 nm / min, and growth time of 8 minutes. A group III nitride semiconductor light emitting device was fabricated in the same manner as described above.
When the obtained light emitting device was evaluated in the same manner as in Example 1, the driving voltage was 3.8 V, the light emission output was 8 mW, and the Mg concentration in the p-type contact layer was 8 × 10 ¹⁹ atoms / cm ³ .

(Comparative Example 2)
Example 1 except that the p-type contact layer was grown under the following conditions: Ga and Mg supply ratio (α = Mg / Ga) of 0.017, growth rate of 9 nm / min, and growth time of 20 minutes. A group III nitride semiconductor light emitting device was fabricated in the same manner as described above.
When the obtained light emitting device was evaluated in the same manner as in Example 1, the driving voltage was 3.2 V, the light emission output was 7 mW, and the Mg concentration in the p-type contact layer was 3 × 10 ²⁰ atoms / cm ³ .

  The group III nitride semiconductor light-emitting device of the present invention has a good light emission output and a low driving voltage, so that its industrial utility value is very large.

It is the schematic diagram which showed the cross section of the group III nitride semiconductor light-emitting device of this invention.

Explanation of symbols

1 substrate 2 buffer layer 3 n-type semiconductor layer 4 light emitting layer 5 p-type semiconductor layer 6 negative electrode 7 positive electrode

Claims (5)

An n-type semiconductor layer, a light emitting layer, and a p-type semiconductor layer made of a group III nitride semiconductor are stacked in this order on the substrate, and a positive electrode and a negative electrode are provided in contact with the p-type semiconductor layer and the n-type semiconductor layer, respectively. In the light-emitting element, the positive electrode is made of ITO (Indium-Tin-Oxide), the ITO is arranged so as to be in direct contact with the p-type semiconductor layer, and the p-type semiconductor layer contains Mg dopant in an amount of 0.9. A group III nitride semiconductor light-emitting device comprising a concentration of × 10 ^{20 to} 2 × 10 ²⁰ atoms / cm ³ . After an n-type semiconductor layer, a light emitting layer, and a p-type semiconductor layer made of a group III nitride semiconductor are grown in this order on the substrate, a positive electrode made of ITO (Indium-Tin-Oxide) is formed on the p-type semiconductor layer. In the method for manufacturing a group III nitride semiconductor light emitting device comprising forming, the growth rate of the p-type semiconductor layer is 10 to 20 nm / min, and the concentration of Mg dopant in the p-type semiconductor layer is 0.9 × A method for producing a Group III nitride semiconductor light-emitting device, characterized in that it is 10 ^{20 to} 2 × 10 ²⁰ atoms / cm ³ . 3. The production according to claim ² , wherein a ratio (Mg / Ga) of a Ga raw material supply amount to an Mg raw material supply amount when growing the p-type semiconductor layer is 0.75 × 10 ^{−2 to} 1.5 × 10 ^−2. Method.   The manufacturing method according to claim 1 or 2, wherein the pressure in the growth apparatus when growing the p-type semiconductor layer is 10 to 50 kP.   A lamp comprising the group III nitride semiconductor light-emitting device according to claim 1.

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