JP2007103828A - Non-volatile semiconductor memory and manufacturing method thereof - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a non-volatile semiconductor memory having a structure capable of controlling the grain size and density of minute particles for composing a floating gate electrode for accumulating charge by applying a semiconductor device disclosed in an international publication 2004/006337A1 to the non-volatile semiconductor memory. <P>SOLUTION: The non-volatile semiconductor memory comprises a source/drain electrode 17; a channel formation region 18; a first insulating layer 11; a floating gate electrode 12; a second insulating layer 15; and a control electrode 16. The channel formation region 18 has a conductive path 20, comprising a channel formation region configuration particulate 21 made of a conductor or a semiconductor and an organic semiconductor molecule 22 bonded to the channel formation region configuration particulate 21. The floating gate electrode 12 comprises a floating gate electrode configuration particulate 13 made of a conductor or a semiconductor; and a protective film 14 made of an insulating material for covering the floating gate electrode configuration particulate. <P>COPYRIGHT: (C)2007,JPO&INPIT

Description

  The present invention relates to a nonvolatile semiconductor memory and a manufacturing method thereof.

Field effect transistors (FETs) including thin film transistors (TFTs) currently used in many electronic devices are, for example, channel formation regions and source / drains formed in a silicon semiconductor substrate or silicon semiconductor layer. A gate insulating layer made of SiO ₂ formed on the region, the surface of the silicon semiconductor substrate or the surface of the silicon semiconductor layer, and a gate electrode provided facing the channel formation region via the gate insulating layer. Alternatively, it includes a gate electrode formed on the support, a gate insulating layer formed on the support including the gate electrode, and a channel formation region and a source / drain region formed on the gate insulating layer. ing. For manufacturing field effect transistors having these structures, very expensive semiconductor manufacturing apparatuses are used, and reduction of manufacturing costs is strongly demanded.

  Therefore, in recent years, attention has been focused on the research and development of FETs using organic semiconductor materials that can be manufactured based on methods that do not use vacuum techniques exemplified by spin coating, printing, and spraying.

  By the way, since it is required to be incorporated in many electronic devices, the FET is required to operate at high speed. Therefore, various studies have been made to improve the mobility in FETs using organic semiconductor materials.

  For example, International Publication No. 2004 / 006337A1 is configured such that a conductive path is formed by fine particles made of a conductor or a semiconductor and organic semiconductor molecules bonded to the fine particles, and the conductivity of the conductive path is controlled by an electric field. An improved semiconductor device is disclosed. By adopting a structure such as a conductive path formed by bonding such fine particles and organic semiconductor molecules, charge transfer in the conductive path is dominant in the axial direction of the molecules along the main chain of the organic semiconductor molecules. Occurring and inter-electron transfer is not included in the conductive path, the mobility is not limited by the inter-electron transfer that has caused the low mobility of conventional organic semiconductors.

Further, as a kind of nonvolatile semiconductor memory cell known as an EEPROM, a nonvolatile semiconductor memory having a floating gate electrode also called a floating gate or a charge storage electrode is well known. Further, such a nonvolatile semiconductor memory is also known. Among them, a nonvolatile semiconductor memory having a so-called nanocrystal type structure is well known (for example, see Japanese Patent Application Laid-Open No. 11-317464). In this nanocrystal type nonvolatile semiconductor memory, as shown in a schematic partial cross-sectional view in FIG. 11, a first insulating layer 211 made of, for example, SiO ₂ is formed on the surface of a semiconductor substrate 210. A structure in which a floating gate electrode 212 is formed on 211, a second insulating layer 215 made of, for example, an ONO film is formed on the floating gate electrode 212, and a control electrode (gate electrode) 216 is formed on the second insulating layer 215. Have Reference numeral 217 represents a source / drain region, and reference numeral 218 represents a channel formation region. The floating gate electrode 212 includes an insulating film 213 formed on the first insulating layer 211 and conductive microcrystalline particles 214 formed in the insulating film 213. The conductive microcrystalline particles 214 are made of silicon (Si) and are hemispherical.

  In such a nanocrystal type nonvolatile semiconductor memory, for example, a high voltage is applied to the control electrode 216 in the process of injecting charges into the floating gate electrode 212, so that a defect occurs in the first insulating layer 211, A short circuit may occur between the floating gate electrode 212 and the channel formation region 218. However, even if such a short circuit occurs, since the floating gate electrode 212 is composed of the conductive microcrystalline particles 214 (that is, has a dot structure), the charges accumulated in the floating gate electrode 212 are In addition, since the electrons are not transferred by tunneling between the conductive microcrystalline particles 214, the electrons are not transferred between the conductive microcrystalline particles 214. It is possible to limit the leakage only to electric charges.

International Publication No. 2004 / 006337A1 JP-A-11-317464

  However, when the semiconductor device disclosed in the above-mentioned international publication is applied to a semiconductor memory, only a volatile semiconductor memory can be obtained. This international publication makes no mention of nonvolatile semiconductor memories.

In a nanocrystal type nonvolatile semiconductor memory, the conductive microcrystalline particles 214 made of Si are usually formed by annealing a SiO _x layer. Therefore, the formation process of the conductive microcrystalline particles 214 can be controlled only probabilistically, and the particle size of the conductive microcrystalline particles 214 (which determines the amount of charge that can be accumulated) affects the threshold voltage that determines the characteristics of the nonvolatile semiconductor memory. It is very difficult to independently control the density of the conductive microcrystalline particles 214 (for example, a factor that affects the capture probability of electrons injected from the channel formation region 218). Have the problem.

  Accordingly, an object of the present invention is to apply the semiconductor device disclosed in International Publication No. 2004 / 006337A1 to a nonvolatile semiconductor memory, and further, the floating gate electrode for accumulating charges is made of fine particles, and the particle size of such fine particles Another object of the present invention is to provide a nonvolatile semiconductor memory having a structure capable of controlling the density and a manufacturing method thereof.

In order to achieve the above object, a nonvolatile semiconductor memory according to the first aspect of the present invention includes:
(A) source / drain electrodes formed on a support;
(B) a channel formation region formed on a portion of the support located between the source / drain electrodes and the source / drain electrodes;
(C) a first insulating layer formed on the entire surface;
(D) a floating gate electrode formed on the first insulating layer so as to face the channel formation region;
(E) a second insulating layer formed on the floating gate electrode, and
(F) a control electrode formed on the second insulating layer so as to face the channel formation region;
A non-volatile semiconductor memory comprising:
The channel forming region has a channel formed by a conductor or a semiconductor, and has a conductive path formed by organic semiconductor molecules bonded to the channel forming region forming particle.
The floating gate electrode is composed of a floating gate electrode constituent fine particle made of a conductor or a semiconductor and a protective film made of an insulating material covering the floating gate electrode constituent fine particle.

  In the nonvolatile semiconductor memory according to the first aspect of the present invention, the first insulating layer is formed by arranging the first insulating layer-constituting particles made of an insulating material with substantially regularity, and the first insulating layer-constituting particulates Based on this arrangement state, the floating gate electrode constituting particles constituting the floating gate electrode can be arranged with substantially regularity.

In order to achieve the above object, a nonvolatile semiconductor memory according to a second aspect of the present invention includes:
(A) a control electrode formed on a support;
(B) a second insulating layer formed on the control electrode and the support,
(C) a floating gate electrode formed on the second insulating layer;
(D) a first insulating layer formed on the floating gate electrode;
(E) source / drain electrodes formed on the first insulating layer, and
(F) a channel formation region formed on the portion of the first insulating layer located between the source / drain electrode and the source / drain electrode, facing the control electrode;
A non-volatile semiconductor memory comprising:
The channel forming region has a channel formed by a conductor or a semiconductor, and has a conductive path formed by organic semiconductor molecules bonded to the channel forming region forming particle.
The floating gate electrode is composed of a floating gate electrode constituent fine particle made of a conductor or a semiconductor and a protective film made of an insulating material covering the floating gate electrode constituent fine particle.

  In the nonvolatile semiconductor memory according to the second aspect of the present invention, the second insulating layer is formed by arranging the second insulating layer-constituting particles made of an insulating material with substantially regularity, and the second insulating layer-constituting particulates. Based on this arrangement state, the floating gate electrode constituting particles constituting the floating gate electrode can be arranged with substantially regularity.

In order to achieve the above object, a method for manufacturing a nonvolatile semiconductor memory according to the first aspect of the present invention includes:
(A) source / drain electrodes formed on a support;
(B) a channel formation region formed on a portion of the support located between the source / drain electrodes and the source / drain electrodes;
(C) a first insulating layer formed on the entire surface;
(D) a floating gate electrode formed on the first insulating layer so as to face the channel formation region;
(E) a second insulating layer formed on the floating gate electrode, and
(F) a control electrode formed on the second insulating layer so as to face the channel formation region;
A method for manufacturing a nonvolatile semiconductor memory comprising:
Forming a floating gate electrode composed of a floating gate electrode constituent fine particle made of a conductor or a semiconductor and a protective film made of an insulating material covering the floating gate electrode constituent fine particle on the first insulating layer; And

In the method for manufacturing a nonvolatile semiconductor memory according to the first aspect of the present invention, after forming the channel formation region and the source / drain electrodes on the support, the first insulating layer constituting particles made of an insulating material are formed on the entire surface. Forming a first insulating layer arranged with substantially regularity,
In the formation process of the floating gate electrode, the floating gate electrode constituting particles constituting the floating gate electrode can be arranged with substantially regularity based on the arrangement state of the first insulating layer constituting particles.

In order to achieve the above object, a method for manufacturing a nonvolatile semiconductor memory according to the second aspect of the present invention includes:
(A) a control electrode formed on a support;
(B) a second insulating layer formed on the control electrode and the support,
(C) a floating gate electrode formed on the second insulating layer;
(D) a first insulating layer formed on the floating gate electrode;
(E) source / drain electrodes formed on the first insulating layer, and
(F) a channel formation region formed on the portion of the first insulating layer located between the source / drain electrode and the source / drain electrode, facing the control electrode;
A method for manufacturing a nonvolatile semiconductor memory comprising:
Forming a floating gate electrode composed of a floating gate electrode constituent fine particle made of a conductor or a semiconductor and a protective film made of an insulating material covering the floating gate electrode constituent fine particle on the second insulating layer; And

In the method for manufacturing a nonvolatile semiconductor memory according to the second aspect of the present invention, after the control electrode is formed on the support, the second insulating layer-constituting particles made of an insulating material are substantially formed on the control electrode and the support. Forming a second insulating layer arranged with regularity;
In the formation process of the floating gate electrode, the floating gate electrode constituting fine particles constituting the floating gate electrode can be arranged with substantially regularity based on the arrangement state of the second insulating layer constituting fine particles.

  In the nonvolatile semiconductor memory and the manufacturing method thereof according to the first aspect and the second aspect of the present invention including the above preferred configurations (hereinafter, these may be collectively referred to simply as the present invention). The average thickness of the second insulating layer is preferably thicker than the average thickness of the first insulating layer, and more specifically, the average thickness of the second insulating layer is 10 nm or more, preferably 100 nm or less. The average thickness of the first insulating layer is more preferably 6 nm to 10 nm. The first insulating layer and the second insulating layer may have a single layer structure or may have a laminated structure. When the first insulating layer is composed of spherical first insulating layer constituting fine particles, or when the second insulating layer is composed of spherical second insulating layer constituting fine particles, the average thickness of the first insulating layer, The average thickness of the second insulating layer means the diameter of the first insulating layer constituting fine particles and the second insulating layer constituting fine particles.

In the present invention including the above preferred embodiments, the floating gate electrode constituting fine particles are gold (Au), silver (Ag), platinum (Pt), copper (Cu), aluminum (Al), palladium (Pd), as a conductor, Chromium (Cr), nickel (Ni), iron (Fe), or an alloy composed of these metals, or cadmium sulfide (CdS) or cadmium selenide (CdSe) as a semiconductor , Cadmium telluride (CdTe), gallium arsenide (GaAs), titanium oxide (TiO ₂ ), or silicon (Si). Moreover, it is preferable that the molecule | numerator which comprises a protective film has a functional group couple | bonded with the floating gate electrode constituent fine particle at one end, and specifically, as a functional group, a thiol group (-SH), an amino group (- NH ₂ ), isocyano group (—NC), cyano group (—CN), thioacetoxyl group (—SCOCH ₃ ), or carboxyl group (—COOH) can be mentioned. The thiol group, amino group, isocyano group, cyano group, and thioacetoxyl group are functional groups bonded to the floating gate electrode constituting fine particles as a conductor such as Au, and the carboxyl group is a floating gate electrode constituting fine particle as a semiconductor. Is a functional group that binds to In addition, the functional groups located at both ends of the molecules constituting the protective film may be different, and it is more preferable that the functional groups at both ends are close to the floating gate electrode constituent particles. For example, dodecanethiol (C ₁₂ H ₂₅ SH) can be given as a protective film having a thiol group (—SH), and oleoylamine can be given as a protective film having an amino group (—NH ₂ ).

Further, in the present invention including the preferred embodiments and configurations described above, it is preferable that the functional group that the organic semiconductor molecule has at the terminal is chemically bonded to the channel-forming region-constituting fine particles. The constituent fine particles are gold (Au), silver (Ag), platinum (Pt), copper (Cu), aluminum (Al), palladium (Pd), chromium (Cr), nickel (Ni), or iron as a conductor. (Fe) or an alloy composed of these metals, or cadmium sulfide (CdS), cadmium selenide (CdSe), cadmium telluride (CdTe), gallium arsenide (GaAs) as a semiconductor , Titanium oxide (TiO ₂ ), or silicon (Si). The organic semiconductor molecule is an organic semiconductor molecule having a conjugated bond, and at both ends of the molecule, a thiol group (—SH), an amino group (—NH ₂ ), an isocyano group (—NC), a cyano group (—CN). ), A thioacetoxyl group (—SCOCH ₃ ), or a carboxyl group (—COOH). A thiol group, an amino group, an isocyano group, a cyano group, and a thioacetoxyl group are functional groups that bind to a channel forming region constituent fine particle as a conductor such as Au, and a carboxyl group is a channel forming region constituent fine particle as a semiconductor. Is a functional group that binds to In addition, the functional groups located at both ends of the organic semiconductor molecule may be different, and it is more preferable that the functional groups at both ends are close to the channel forming region constituting fine particles.

  Specifically, as the organic semiconductor molecule, for example, 4,4′-biphenyldithiol (BPDT) of the structural formula (1), 4,4′-diisocyanobiphenyl of the structural formula (2), structural formula (3) 4,4′-diisocyano-p-terphenyl and 2,5-bis (5′-thioacetoxyl-2′-thiophenyl) thiophene of the structural formula (4), 4,4 ′ of the structural formula (5) -Diisocyanophenyl, benzidine (biphenyl-4,4'-diamine) of structural formula (6), TCNQ (tetracyanoquinodimethane) of structural formula (7), biphenyl-4,4 of structural formula (8) '-Dicarboxylic acid, 1,4-di (4-thiophenylacetylinyl) -2-ethylbenzene of structural formula (9), 1,4-di (4-isocyanophenylacetylinyl of structural formula (10) ) -2-Ethylbenzene It can be exemplified Bovine Serum Albumin, Horse Radish Peroxidase, the Antibody-Antigen. These are all π-conjugated molecules, and preferably have functional groups that chemically bond with the channel-forming region-constituting fine particles in at least two places.

構造式（２）：４，４’−ジイソシアノビフェニル

構造式（３）：４，４’−ジイソシアノ−ｐ−テルフェニル

構造式（４）：２，５−ビス（５’−チオアセトキシル−２’−チオフェニル）チオフェン

構造式（５）：４，４’−ジイソシアノフェニル

構造式（６）：ベンジジン（ビフェニル−４，４'−ジアミン）

構造式（７）：ＴＣＮＱ（テトラシアノキノジメタン）

構造式（８）：ビフェニル−４，４'−ジカルボン酸

構造式（９）：１，４−ジ（４−チオフェニルアセチリニル）−２−エチルベンゼン

構造式（１０）：１，４−ジ（４−イソシアノフェニルアセチリニル）−２−エチルベンゼン

Structural formula (1): 4,4′-biphenyldithiol

Structural formula (2): 4,4′-diisocyanobiphenyl

Structural formula (3): 4,4′-diisocyano-p-terphenyl

Structural formula (4): 2,5-bis (5′-thioacetoxyl-2′-thiophenyl) thiophene

Structural formula (5): 4,4′-diisocyanophenyl

Structural formula (6): benzidine (biphenyl-4,4′-diamine)

Structural formula (7): TCNQ (tetracyanoquinodimethane)

Structural formula (8): Biphenyl-4,4′-dicarboxylic acid

Structural formula (9): 1,4-di (4-thiophenylacetylinyl) -2-ethylbenzene

Structural formula (10): 1,4-di (4-isocyanophenylacetylinyl) -2-ethylbenzene

  A dendrimer represented by the structural formula (11) can also be used as the organic semiconductor molecule.

Structural formula (11): Dendrimer

  As described above, it is preferable that the functional group at the terminal of the organic semiconductor molecule is chemically bonded to the channel-forming region constituting fine particles. In this case, the organic semiconductor molecule and the channel-forming region-constituting fine particles are chemically (alternatively) bonded to each other by the functional groups of the organic semiconductor molecule at both ends, so that a network-like conductive path is constructed. More preferably, the conductive path is preferably constituted by a single layer of a combination of channel-forming region-constituting fine particles and organic semiconductor molecules. Alternatively, in this case, the organic semiconductor molecule and the channel-forming region-constituting fine particles are three-dimensionally chemically (alternately) bonded by the functional groups of the organic semiconductor molecule at both ends, thereby constructing a network-like conductive path. Furthermore, it is preferable that the conductive path is constituted by a laminated structure of a combined body of channel-forming region constituting fine particles and organic semiconductor molecules. And by constructing a network-like conductive path in this way, the structure is such that the charge transfer in the conductive path occurs predominantly in the axial direction of the molecule along the main chain of the organic semiconductor molecule. Directional mobility, for example, high mobility due to delocalized π-electrons can be utilized to the maximum, so that it is possible to realize unprecedented high mobility comparable to monolayer transistors Become.

From the standpoint of preventing aggregation of the channel-forming region constituting particles, the surface of the channel-forming region constituting fine particles before being bonded to the organic semiconductor molecules is covered with a coating layer made of chain-like insulating organic molecules. preferable. The molecules constituting the coating layer are bonded to the channel-forming region-constituting fine particles, but the strength of the binding force depends on the channel-forming region-constituting particles covered by the coating layer (actually, they are covered by the coating layer. It has a great influence on the final diameter distribution of the aggregates (clusters) when producing the aggregates or clusters of the channel-forming region constituting particles. It is preferable that one end of the insulating organic molecule constituting the coating layer has a functional group that chemically reacts (bonds) with the fine particles forming the channel formation region. For example, mention may be made of a thiol group (-SH) as a functional group, alkanethiol [e.g., dodecanethiol (C ₁₂ H ₂₅ SH)] as one of the molecules with the thiol group at the end can be exemplified. It is considered that when a thiol group of dodecanethiol is bonded to fine particles forming a channel forming region such as gold, a hydrogen atom is detached and becomes C ₁₂ H ₂₅ S—Au. Alternatively, as an insulating organic molecule constituting the coating layer, an alkylamine molecule [for example, dodecylamine (C ₁₂ H ₂₅ NH ₂ )] can be exemplified.

The average particle size of the fine particles constituting the fine particles constituting the floating gate electrode or the fine particles constituting the channel forming region (hereinafter, these fine particles may be collectively referred to as constituent fine particles) is r _AVE , and the standard particle size of the constituent fine particles When the deviation is σ, it is preferable to satisfy σ / r _AVE ≦ 0.5. The r _AVE range is 5.0 × 10 ⁻¹⁰ m ≦ r _AVE ≦ 1.0 × 10 ⁻⁶ m, preferably 5.0 × 10 ⁻¹⁰ m ≦ r _AVE ≦ 1.0 × 10 ^−8. m is desirable. Examples of the shape of the constituent fine particles include a spherical shape, but the present invention is not limited to this. For example, in addition to the spherical shape, a triangle, a tetrahedron, a cube, a rectangular parallelepiped, a cone, a cylinder, and the like can be given. The average particle diameter of the constituent fine particles when the shape of the constituent fine particles is other than a spherical shape is assumed to be a sphere having the same volume as the measured volume of the non-spherical constituent fine particles, and the average value of the diameters of the spheres The average particle size may be set as follows.

The constituent fine particles as a conductor refer to fine particles made of a material having a volume resistivity of the order of 10 ⁻⁴ Ω · m (10 ⁻⁶ Ω · cm) or less. The constituent fine particles as a semiconductor are fine particles made of a material having a volume resistivity of the order of 10 ⁻⁴ Ω · m (10 ⁻⁶ Ω · cm) to 10 ¹² Ω · m (10 ¹⁰ Ω · cm). Point to.

High insulation properties such as silicon oxide (SiO _x ), silicon nitride (SiN _y ), SiO _x / SiN _y , SiON, SiO _x / SiON, aluminum oxide (Al ₂ O ₃ ), etc. as the material constituting the first insulating layer Inorganic insulating materials such as metal oxides, highly insulating metal nitrides, or fine particles thereof; polymethyl methacrylate (polymethyl methacrylate, PMMA), polyvinyl phenol (PVP), polyvinyl alcohol (PVA), polycarbonate, polyethylene terephthalate Organic insulating materials such as (PET), polyimide, polyethersulfone (PES), polystyrene, etc., or fine particles thereof; N-2 (aminoethyl) 3-aminopropyltrimethoxysilane (AEAPTMS), 3-mercaptopropyltri Methoxysilane (MP MS), silanol derivatives (silane coupling agents) such as octadecyltrichlorosilane (OTS); linear carbonization having a functional group capable of binding to a channel forming region constituent fine particle such as octadecanethiol and dodecyl isocyanate at one end Examples of hydrogens include straight-chain hydrocarbons having functional groups at both ends and at least one end being a functional group capable of binding to a material constituting the channel forming region, and combinations thereof are used. You can also In the case where the first insulating layer (or part thereof) is composed of fine particles, the shape of the fine particles is preferably spherical. Furthermore, BPSG, PSG, BSG, AsSG, PbSG, SOG (spin-on-glass), low dielectric constant SiO ₂ materials (for example, polyaryl ether, cycloperfluorocarbon polymer and benzocyclobutene, cyclic fluororesin, polytetrafluoroethylene) And silicon oxide materials such as fluorinated aryl ether, fluorinated polyimide, amorphous carbon, and organic SOG). Further, as the material constituting the second insulating layer, the above-mentioned highly insulating metal oxide including ONO film (SiO ₂ film / SiN film / SiO ₂ film), ON film (SiO ₂ film / SiN film), high insulation Various inorganic insulating materials such as conductive metal nitrides or fine particles thereof; various organic insulating materials described above including fine particles; various silanol derivatives (silane coupling agents) described above; various linear hydrocarbons described above; The above-mentioned various silicon oxide materials can be mentioned. When the second insulating layer (or a part thereof) is composed of fine particles, the shape of the fine particles is preferably spherical.

  As a method of forming the first insulating layer and the second insulating layer, although depending on the material constituting the first insulating layer and the second insulating layer, various chemical methods including a physical vapor deposition method (PVD method) and an MOCVD method are used. Vapor Phase Vapor Deposition (CVD); Spin Coating Method; Various Printing Methods such as Screen Printing Method, Inkjet Printing Method, Offset Printing Method, Gravure Printing Method; Air Doctor Coater Method, Blade Coater Method, Rod Coater Method, Knife Coater Method Various coating methods such as squeeze coater method, reverse roll coater method, transfer roll coater method, gravure coater method, kiss coater method, cast coater method, spray coater method, slit orifice coater method, calender coater method, dipping method; stamp method; casting Sol-gel method; electrodeposition method; shadow mask method Spraying; and can include any of the LB (Langmuir-Blodgett) method.

  In the present invention, the fine particles constituting the floating gate electrode constituting the floating gate electrode may be arranged with substantially regularity (this step may be referred to as a fine particle arranging step for the floating gate electrode), and the channel formation region The channel forming region constituting particles constituting the layer are arranged with substantially regularity (this process may be referred to as a channel forming region constituting particle arranging step), which improves the performance of the so-called non-volatile semiconductor memory as an organic transistor Preferred for. Then, two-dimensional regular arrangement of constituent fine particles such as fine particles constituting floating gate electrode and fine particles constituting channel formation region (fine particles are regularly arranged two-dimensionally in a plane substantially parallel to the surface of the base and in a filled state. In order to achieve the above, the floating gate electrode constituting fine particles constituting the floating gate electrode or the channel forming region constituting fine particles constituting the channel forming region (constituting fine particles) have a small size variation and a uniform particle size. It is preferable to use constituent fine particles, whereby a two-dimensional network of constituent fine particles can be achieved in a wide range and in a form having long-range order.

  In addition to this, a thin film made of a solution (for example, a fine particle colloid solution) containing fine particles constituting the floating gate electrode constituting the floating gate electrode or fine particles constituting the channel forming region (constituting fine particles) constituting the channel forming region is provided. After forming on the ground, it is preferable to evaporate the solvent contained in the thin film from the viewpoint that the constituent fine particles can be arranged by close packing. In this case, it is desirable to evaporate the solvent contained in the thin film while controlling the evaporation rate in the step of evaporating the solvent contained in the thin film. Alternatively, in this case, it is desirable to perform the surface treatment of the base before forming the thin film made of the solution containing the constituent fine particles. Alternatively, in this case, it is desirable to control the wettability between the solution containing the constituent fine particles and the base in the step of forming the thin film made of the solution containing the constituent fine particles. Examples of the method for forming a thin film made of a solution containing constituent fine particles include an immersion method, a casting method, a spin coating method, and the various printing methods described above.

  Alternatively, in the floating gate electrode constituting particle arranging step and the channel forming region constituting particle arranging step, a thin film is formed based on a solution containing the constituting fine particles, and then the thin film is transferred onto the base. Are preferable from the viewpoint of arranging them in close packing. More specifically, the method comprises a step of transferring a thin film containing constituent fine particles formed by evaporating a solvent contained in the thin film to a base after forming a thin film on the water surface based on a solution containing the constituent fine particles. Furthermore, in the step of evaporating the solvent contained in the thin film, it is more preferred to evaporate the solvent contained in the thin film while controlling the evaporation rate.

  In addition, it is preferable to combine the channel-forming region-constituting fine particles and the organic semiconductor molecules by performing the step of bringing the organic-semiconductor molecules into contact with each other after the channel-forming region-constituting fine particle arranging step. That is, for example, when the channel forming region constituting fine particles are arranged two-dimensionally regularly in a plane substantially parallel to the surface of the base and in a filled state, and then the organic semiconductor molecules are brought into contact with each other, As a result of the replacement of the molecules with the organic molecules constituting the coating layer, a chemical bond between the channel forming region constituting fine particles and the organic semiconductor molecules is formed. A single layer of the combined body can be formed by performing once, and a laminated structure of the combined body can be formed by repeating twice or more.

  As described above, the channel forming region constituting fine particles are preferably arranged in a packed state, and the channel forming region constituting fine particles are more preferably arranged in a close packed state. More specifically, “the channel-forming region-constituting particles are arranged in a packed state” means, for example, that a conductive path composed of organic semiconductor molecules bonded to the channel-forming region-constituting particulates is at least a source, for example. The channel forming region constituting fine particles are arranged so as to be formed between the drain electrodes. Needless to say, there may be some depletion, lattice defects, and the like. “The channel-forming region-constituting particles are arranged in a close-packed state” means that when the channel-forming region-constituting particles are regarded as rigid bodies, the maximum that can physically occupy a two-dimensional plane or three-dimensional space. The state is regularly arranged at a density of. However, here, since the organic semiconductor molecules always exist between the channel forming region constituent particles, the channel forming region constituent particles are not in contact with each other. The surface-to-surface distance between adjacent channel forming region constituting fine particles is equal to or less than the length of the organic semiconductor molecule to be used in the major axis direction.

  Further, as described above, the floating gate electrode constituent particles are preferably arranged in a packed state, and the floating gate electrode constituent particles are more preferably arranged in a close packed state. Needless to say, there may be some depletion, lattice defects, and the like. “The floating gate electrode constituent particles are arranged in a close-packed state” means that when the floating gate electrode constituent particles are regarded as a rigid body, the maximum that can physically occupy a two-dimensional plane or three-dimensional space. The state is regularly arranged at a density of.

  Furthermore, in the present invention, when the constituent particles are regularly arranged two-dimensionally in a plane substantially parallel to the surface of the base, more specifically, such two-dimensionally ordered particles are arranged. The arranged layers may be a single layer or may exist in multiple layers in a three-dimensional close-packed state. “Two-dimensionally regularly arranged” means that the constituent fine particles having a uniform particle diameter are packed in a space of at least approximately the thickness of one constituent fine particle, preferably in a close packed state. Means that Note that “in a plane substantially parallel to the surface of the base” means that when there are micro unevenness on the surface of the base by the manufacturing method of the base, it is substantially parallel to the micro unevenness.

  In order to achieve the two-dimensional regular arrangement by actively utilizing the self-organization phenomenon by the constituent fine particles themselves on the smooth base, as described above, the fine particles when the fine particle colloid solution is dropped on the base The evaporation conditions of the solvent contained in the colloidal solution and the degree of size variation of the constituent fine particles are very important factors. If the evaporation rate of the solvent is too fast, the constituent fine particles are left in place before the two-dimensional regular arrangement by self-organization is achieved, and the substrate cannot move freely on the ground. On the other hand, if the size of the constituent fine particles is different, voids are formed in the two-dimensional array and the closest packing is not achieved. It should be noted that “arranging the constituent fine particles in the closest packing” and “providing ordering in the arrangement” are not the same thing.

  One kind of organic semiconductor molecule that plays a role of bridging between the channel forming region forming fine particles forming the channel forming region has functional groups capable of binding to casting at both ends thereof. By the way, if the distance between the channel forming region constituent particles is longer than the total length of the organic semiconductor molecule and the channel forming region constituent particles are fixed on the base and cannot move, the conductive path is cut there. As a result, the number of conductive paths constituted by organic semiconductor molecules and channel-forming region-constituting fine particles is reduced, leading to deterioration of characteristics of the nonvolatile semiconductor memory. When it is intended to obtain a nonvolatile semiconductor memory having excellent characteristics, when this nonvolatile semiconductor memory is composed of, for example, a field effect transistor (FET), from one source / drain electrode to the other source / drain electrode It is necessary that the conductive paths are continuously connected. In addition, the number of conductive paths greatly affects the improvement of FET characteristics.

  In order to increase the number of conductive paths, the channel-forming region constituent particles are adjacent to each other at a distance closer than the length of the organic semiconductor molecule, and further, the channel-forming region constituent particles are two-dimensionally arranged in a hexagonal close packed manner. It is desirable to arrange. More specifically, the surface of the channel forming region constituting fine particles before bonding with the organic semiconductor molecules is covered with a coating layer made of chain-like insulating organic molecules. Accordingly, the distance between the channel forming region constituting fine particles is about twice as long as the length of the molecules constituting the coating layer (actually, the distance is shorter than that because the molecules slightly overlap at the tip). It is preferable that the length of the organic semiconductor molecule that cross-links the channel forming region constituting fine particles, which is one kind, is not longer than the distance between the channel forming region constituting fine particles determined as described above.

  The case where the constituent fine particles are composed of gold nanoparticles will be described below as an example, but the constituent fine particles are not limited to gold nanoparticles.

<Applying constituent fine particles to the substrate>
As for the gold nanoparticle coating method, a colloidal solution in which gold nanoparticles are dispersed in a solvent (hereinafter referred to as a gold nanoparticle colloidal solution) is dropped on the substrate, and when the solvent evaporates, A method (casting method) for achieving a two-dimensional ordered arrangement by utilizing the self-organization phenomenon caused by the lateral capillary force acting on the slab has been taken for a long time. This casting method is very simple, but if the evaporation rate of the solvent is too fast, the evaporation rate of the solvent exceeds the rate of self-organization of the gold nanoparticles. There is a problem that the gold nanoparticles are unevenly distributed as a result.

  The step of arranging the constituent fine particles in a two-dimensional regular and filled state in a plane substantially parallel to the surface of the substrate (particulate arrangement / filling step) is performed by lowering the thin film made of the solution containing the constituent fine particles. It consists of the process of evaporating the solvent contained in the thin film after it is formed on the ground (that is, after performing the casting method). In the process of evaporating the solvent contained in the thin film, it is contained in the thin film while controlling the evaporation rate. Evaporate the solvent. Further, before forming a thin film made of a solution containing constituent fine particles, a surface treatment of the base is performed. Furthermore, the wettability between the solution containing the constituent fine particles and the base is controlled in the step of forming the thin film made of the solution containing the constituent fine particles.

  For example, by mixing organic substances with low vapor pressure in gold nanoparticle colloidal solution, the evaporation rate of the solvent is controlled (slowed) (XM Lin, et al., J. Phys. Chem. B, 2001, 105, See 3353). Specifically, for example, when a gold nanoparticle colloid solution (solvent: toluene) whose surface is covered with a layer composed of an alkylamine molecule (for example, dodecylamine) or an alkanethiol molecule (for example, dodecanethiol) is used, dodecane is used. By mixing an organic substance that is dissolved in toluene such as thiol and is difficult to evaporate into the gold nanoparticle colloidal solution, the solvent evaporation rate in the gold nanoparticle colloidal solution can be reduced.

  Alternatively, after a casting method is performed in a closed space filled with a solvent vapor (such as a petri dish), a thin film made of a solution containing constituent fine particles is formed on the base (that is, after the casting method is performed). The solvent contained in the thin film is evaporated. Since the solvent contained in the thin film can be evaporated while controlling the evaporation rate in this step, the gold nanoparticles can be arranged in a densely packed state on the base.

  Alternatively, in some cases, instead of a simple casting method, a recess is formed in advance on the base surface by lithography technology or the like, a gold nanoparticle solution is dropped on the base surface including the recess, and the solvent is evaporated, Alternatively, a method in which a gold nanoparticle solution is dropped onto an underlying surface portion surrounded by an O-ring or the like placed on the underlying surface and the solvent is evaporated (ND Denkov, et al., Langmuir, 1992, 8, 3183). By adopting these methods, it is possible to form a uniform nanoparticle monolayer film as a result of the evaporation of the solvent from the central portion, unlike the evaporation of the solvent from the peripheral portion of the droplet that is generally observed. It becomes possible.

  Alternatively, the fine particle arrangement / filling step is constituted by a method similar to a so-called LB (Langmuir-Blodgett) method in which a thin film is formed based on a solution containing constituent fine particles and then the thin film is transferred onto a base. May be. That is, the constituent fine particles having a hydrophobic surface are floated on a hydrophilic solvent (for example, water) so as to have a two-dimensional regular arrangement in a single layer, or, conversely, the hydrophilic particles have a hydrophilic surface on the hydrophobic solvent. A method may be employed in which the constituent fine particles are floated in a single layer so as to have a two-dimensional regular arrangement, and the fine particles are transferred onto the substrate like the LB method (V. Santhanam, et al., Langmuir, 2003, 19, 7881).

  As an example, using gold nanoparticles having a hydrophobic surface with an average particle size of 12.2 nm, a method similar to the LB method, that is, after forming a thin film based on a solution containing gold nanoparticles on the water surface, The gold nanoparticle thin film formed by evaporating the solvent (specifically toluene) contained in the thin film was transferred onto the base. At this time, the solvent contained in the thin film was evaporated while controlling the evaporation rate. Specifically, the evaporation rate was controlled by covering a container containing water with a glass plate and dropping a solution containing gold nanoparticles from a gap between the glass plates. At this time, the amount of water was adjusted so that the distance between the water surface and the lid was about 5 mm. When a container having a size of 25 cm × 15 cm was used, when a 50 microliter nanoparticle solution was dropped, the solvent contained in the thin film evaporated in a time of about 30 seconds to 1 minute.

  Two means for promoting self-assembly more effectively during solvent evaporation in the casting method will be described below.

[Surface treatment of the substrate]
The first means is a means that considers the interaction between the substrate and the gold nanoparticles. When forming a two-dimensional structure of gold nanoparticles by self-organization, the interaction between the gold nanoparticles and the substrate is important. The surface state of the gold nanoparticles is mainly determined by the properties of the molecules constituting the layer covering the surface. Therefore, gold nanoparticles having various layers, for example, gold nanoparticles having a hydrophobic layer on the surface (molecules constituting the layer having an alkyl group, for example), or hydrophilic on the surface Before forming a thin film composed of a solution containing fine particles, using a gold nanoparticle in which a layer having a layer (the molecule constituting the layer has, for example, a carboxyl group, an amino group or a hydroxyl group) is used. Surface treatment can optimize the surface condition of the substrate, change the behavior of the gold nanoparticles and the substrate, and obtain the most suitable conditions for performing the casting method (T. Teranishi, et al ., Adv. Mater., 2001, 13, 1699). Here, when the surface of the base made of SiO ₂ is subjected to a hydrophilization treatment, examples thereof include plasma ashing treatment, piranha solution treatment, oxygen plasma treatment, and introduction of hydroxyl groups by UV-ozone treatment. On the other hand, when the surface of the substrate made of SiO ₂ is subjected to a hydrophobic treatment, for example, a treatment agent having a hydrophobic group at the terminal (for example, hexamethyldisilazane [(CH ₃ ) ₃ SiNHSi (CH ₃ ) ₃ ], octadecyltrichlorosilane) Surface treatment with [C ₁₈ H ₃₇ SiCl ₃ ]) may be performed.

[Control of wettability between solution containing constituent fine particles and substrate]
The second means is to control the wettability between the solution containing gold nanoparticles and the substrate. If the wettability of the solvent in the solution with respect to the base is good, the solvent spreads on the base, and if the wettability is poor, the solvent collects. Generally, when the solvent spreads over a wider range than the base, after forming a thin film made of a solution containing gold nanoparticles on the base, the solvent is uniformly evaporated from the entire thin film having a large area. The wettability can be changed by mixing different solvents and adjusting the mixing ratio, which makes it possible to obtain the best wettability for arranging gold nanoparticles on the substrate. . For example, when a toluene solution of gold nanoparticles is applied to a base made of SiO ₂ by a casting method to form a thin film made of a solution containing gold nanoparticles on the base, ethanol is added to the toluene solution of gold nanoparticles. When mixed to a certain extent, the solution spreads most on the substrate.

  Alternatively, it is preferable that the floating gate electrode constituting particles constituting the floating gate electrode are arranged with substantially regularity based on the arrangement state of the first insulating layer constituting particles constituting the first insulating layer as a base, or It is preferable that the fine particles constituting the floating gate electrode constituting the floating gate electrode are arranged with substantially regularity based on the arrangement state of the fine particles constituting the second insulating layer constituting the second insulating layer as the base. As a method for achieving such an arrangement state of the first insulating layer constituting fine particles or the second insulating layer constituting fine particles (hereinafter referred to as insulating layer constituting fine particles), an electrodeposition method, a spin coating method, a casting method, Method similar to the advection accumulation method (see AS Dimitrov et al., Langmuir, 10, 432 (1994)), LB (Langmuir-Blodgett) method [insulating layer structure having a hydrophobic surface on a hydrophilic solvent (eg water) Floating fine particles so as to have a two-dimensional regular arrangement in a single layer, or conversely, float fine particles constituting an insulating layer having a hydrophilic surface on a hydrophobic solvent so as to have a two-dimensional regular arrangement in a single layer. And a method of transferring it like the LB method (see V. Santhanam, et al., Langmuir, 2003, 19, 7881)]. The channel forming region constituting fine particles constituting the channel forming region are arranged with substantially regularity based on the arrangement state of the base in the support, or the channel is formed based on the arrangement state of the first insulating layer as the base. In order to arrange the channel forming region constituting particles constituting the forming region with substantially regularity, the arrangement state of the underlying particles in the support or the first insulating layer (hereinafter sometimes referred to as the underlying constituting particles) is achieved. The method for doing so can also be a similar method.

  Here, the insulating layer constituting fine particles and the base constituting fine particles are arranged with substantially regularity means that the insulating layer constituting fine particles and the base constituting fine particles are densely arranged so as to be positioned at the apex of the equilateral triangle, or It means that they are densely arranged so as to be located at the vertices of the square. Since all of the insulating layer constituent fine particles and the base constituent fine particles are not necessarily arranged with regularity, that is, it is needless to say that there may be some depletion, lattice defects, etc. It is expressed that it is arranged with regularity.

  In addition, floating gate electrode constituent particles and channel forming region constituent particles (constituent particles) are arranged with substantially regularity, so that the insulating layer constituent particles and the base constituent particles are arranged densely so that they are located at the vertices of an equilateral triangle. If it is, it means that the constituent fine particles are located on the normal passing through the center of the equilateral triangle. In this case, the constituent fine particles are located at the vertices of equilateral triangles formed by the constituent fine particles, or are located at the vertices of regular hexagons formed by the constituent fine particles. On the other hand, when the insulating layer constituent fine particles and the base constituent fine particles are densely arranged so as to be located at the apex of the square, it means that the constituent fine particles are located on the normal passing through the center of the square. In this case, the constituent fine particles are located at the apexes of a square formed by the constituent fine particles. Since not all of the constituent particles are arranged with regularity, that is, it is needless to say that there may be some depletion, lattice defects, etc., so they are arranged with “substantially” regularity. It expresses.

  In these cases, the distance between the fine particles constituting the floating gate electrode and the fine particles constituting the floating gate electrode may be such that the fine particles constituting the floating gate electrode and the fine particles constituting the floating gate electrode are in contact with each other through the protective film. desirable. In other words, the distance between the surfaces of adjacent fine particles constituting the floating gate electrode is most preferably about twice the thickness of the protective film to be used. Since a protective film always exists between the fine particles constituting the floating gate electrode, the fine particles constituting the floating gate electrode are not in contact with each other. Such a state can be achieved by appropriately selecting the particle size of the fine particles constituting the floating gate electrode, the film thickness of the protective film, and the particle size of the fine particles constituting the insulating layer. As described above, the layer in which the fine particles constituting the floating gate electrode are regularly arranged two-dimensionally may be a single layer or a multilayer.

  In this way, the insulating layer constituent fine particles made of an insulating material and the base formed by arranging the base constituent fine particles with substantially regularity are used as a so-called template, so that the floating gate electrode constituent fine particles and the channel forming region constituent fine particles are two-dimensional. Regular ordering can be achieved. Accordingly, it is difficult for the distance between the floating gate electrode constituent particles and the distance between the channel forming region constituent particles to vary.

In the present invention, as a support, various glass substrates, various glass substrates having an insulating layer formed on the surface, a quartz substrate, a quartz substrate having an insulating layer formed on the surface, and an insulating layer formed on the surface Examples include silicon substrates, polymethyl methacrylate (polymethyl methacrylate, PMMA), polyvinyl alcohol (PVA), polyvinylphenol (PVP), polyethersulfone (PES), polyimide, polycarbonate, and polyethylene terephthalate (PET). Mention may be made of organic polymers exemplified (which have the form of polymer materials such as flexible plastic films and sheets made of polymer materials, plastic substrates) or mica Can do. By using a support made of such a flexible polymer material, for example, it is possible to incorporate or integrate a nonvolatile semiconductor memory into an electronic device having a curved shape. Alternatively, as a support, on the surface, a silicon oxide-based material (for example, SiO _x or spin-on glass (SOG)); silicon nitride (SiN _Y ); aluminum oxide (Al ₂ O ₃ ); metal oxide high dielectric insulating film A material in which is formed can also be mentioned. Furthermore, other examples include a conductive substrate (a substrate made of a metal such as gold or highly oriented graphite).

  In the present invention, platinum (Pt), gold (Au), palladium (Pd), chromium (Cr), nickel (Ni), aluminum (Al) are used as materials constituting the control electrode, source / drain electrodes, and various wirings. , Silver (Ag), tantalum (Ta), tungsten (W), copper (Cu), titanium (Ti), indium (In), tin (Sn), or an alloy containing these metal elements, these Conductive particles made of these metals, conductive particles of alloys containing these metals, conductive materials such as polysilicon containing impurities, or a layered structure of layers containing these elements it can. Furthermore, organic materials (conductive polymers) such as poly (3,4-ethylenedioxythiophene) / polystyrene sulfonic acid [PEDOT / PSS] are used as materials constituting the control electrodes, source / drain electrodes, and various wirings. It can also be mentioned. The material constituting the control electrode, source / drain electrode, and various wirings may be the same material as the constituent fine particles, or may be a different material.

  Although the control electrode, source / drain electrode, and wiring are formed, depending on the materials constituting them, PVD method; various CVD methods including MOCVD method; spin coating method; various printing methods described above; various coatings described above A stamp method; a casting method; a sol-gel method; an electrodeposition method; a shadow mask method; a lift-off method; a plating method such as an electrolytic plating method, an electroless plating method, or a combination thereof; and a spray method; A combination with a patterning technique can be given as necessary. In addition, as physical vapor phase growth method (PVD method), (a) various vacuum deposition methods such as electron beam heating method, resistance heating method, flash deposition, (b) plasma deposition method, (c) bipolar sputtering method, DC sputtering method, DC magnetron sputtering method, high frequency sputtering method, magnetron sputtering method, ion beam sputtering method, bias sputtering method and other various sputtering methods, (d) DC (direct current) method, RF method, multi-cathode method, activation Various ion plating methods such as a reaction method, a field evaporation method, a high frequency ion plating method, and a reactive ion plating method can be given.

  Examples of the structure of a nonvolatile semiconductor memory cell in which a plurality of nonvolatile semiconductor memories of the present invention are integrated include a NOR type, a NAND string type memory cell, a DINOR type and an AND type which are a kind of EEPROM.

  In the case of the NAND string memory cell, the nonvolatile semiconductor memory cell includes a NAND string in which a plurality of nonvolatile semiconductor memories are connected in series, a first selection transistor connected to a memory element at one end of the NAND string, and a NAND string. The second select transistor connected to the memory element at the other end, and one source / drain region of the memory element at one end of the NAND string is connected to the bit line via the first select transistor, The other source / drain region of the memory element at the other end of the NAND string is connected to a common source line via a second selection transistor. The first selection transistor and the second selection transistor are, for example, field effect transistors whose channel formation region is made of an organic semiconductor (for example, a FET having a structure in which the floating gate electrode is removed from the nonvolatile semiconductor memory of the present invention). It can consist of

In the nonvolatile semiconductor memory of the present invention, a field effect transistor having a floating gate electrode between the control electrode and the channel formation region is formed. When an appropriate potential is applied to the control electrode, support, source / drain electrode, etc., Fowler-Nordheim tunnel current is generated, or thermal excitation occurs, and charge is injected into the floating gate electrode. As a result, information is stored as charges in the floating gate electrode. That is, information is written and stored in the nonvolatile semiconductor memory. When charges are accumulated in the floating gate electrode in this way, an electric field is generated by the accumulated charges, so that the threshold voltage _Vth of the nonvolatile semiconductor memory changes. The stored data can be discriminated by the change in the threshold voltage _Vth . By setting the thickness of the first insulating layer to a predetermined thickness, even if no voltage is applied to the control electrode, the charge accumulated in the floating gate electrode cannot exceed the potential barrier of the first insulating layer, and the floating gate Charge is held on the electrode. That is, the information is held in the nonvolatile semiconductor memory without being volatilized. On the other hand, when erasing information from the nonvolatile semiconductor memory, a voltage in the direction opposite to that at the time of writing information may be applied.

  In the present invention, the floating gate electrode is composed of the floating gate electrode constituent fine particles made of a conductor or a semiconductor and the protective film made of an insulating material covering the floating gate electrode constituent fine particles. By controlling the material constituting the fine particles, the particle size of the fine particles constituting the floating gate electrode, the thickness of the protective film and the length of the molecules constituting the protective film, the interaction of the fine particles constituting the floating gate electrode (for example, the floating gate electrode configuration) The distance between the fine particles, the arrangement state of the fine particles constituting the floating gate electrode, the density per unit area of the fine particles constituting the floating gate electrode, and the discrete level of electrons in the fine particles constituting the floating gate electrode) can be controlled. Various characteristics (for example, threshold voltage) of the nonvolatile semiconductor memory can be reliably controlled.

  Further, for example, since a high voltage is applied to the control electrode in the charge injection process to the floating gate electrode, a defect may occur in the first insulating layer, and a short circuit may occur between the floating gate electrode and the channel formation region. However, even in such a case, since the floating gate electrode is composed of the fine particles constituting the floating gate electrode (that is, having a dot structure), the charge accumulated in the floating gate electrode is each floating gate. Electron transfer is not caused by tunneling between the particles constituting the floating gate electrode, and the leakage of only the charges in the particles constituting the floating gate electrode existing near the site where the defect has occurred. You can stay. Furthermore, the movement of electric charges between the fine particles constituting the floating gate electrode can be suppressed. As a result, a highly durable nonvolatile semiconductor memory can be realized. Furthermore, the floating gate electrode composed of the fine particles constituting the floating gate electrode and the protective film can be formed by a simple process.

  In addition, since the channel formation region constituent fine particles are combined with the organic semiconductor molecules to form a conductive path, the network in which the channel formation region constituent fine particles are connected to the conductive paths along the molecular skeleton in the organic semiconductor molecule. Similarly, the conductive path can be formed by a simple process. Therefore, a structure in which charge transfer in the conductive path occurs predominantly in the axial direction of the molecule along the main chain of the organic semiconductor molecule. Since the conduction path does not include electron transfer between molecules, the mobility is not limited by the electron transfer between molecules, which is a cause of low mobility in a semiconductor device using a conventional organic semiconductor material. Therefore, the charge transfer in the axial direction in the organic semiconductor molecule can be utilized to the maximum extent. For example, when a molecule having a conjugated system formed along the main chain is used as an organic semiconductor molecule, high mobility due to delocalized π electrons can be used. In addition, since the conductive path can be formed one layer at a time in a low temperature process of 200 ° C. or less under normal pressure, a conductive path having a desired thickness can be easily formed, and the nonvolatile semiconductor can be manufactured at low cost. A memory can be manufactured.

  Hereinafter, the present invention will be described based on examples with reference to the drawings.

  Example 1 relates to a nonvolatile semiconductor memory according to a first aspect of the present invention and a manufacturing method thereof. A schematic partial cross-sectional view of the nonvolatile semiconductor memory of Example 1 is shown in FIG. 1A, and a conceptual diagram of the conductive path 20 is shown in FIG.

Specifically, the nonvolatile semiconductor memory of Example 1 is a top-gate nonvolatile semiconductor memory, and as shown in a schematic partial cross-sectional view in FIG.
(A) a source / drain electrode 17 formed on the support 10;
(B) a channel forming region 18 formed on a portion of the support 10 located between the source / drain electrode 17 and the source / drain electrode 17;
(C) a first insulating layer 11 formed on the entire surface (more specifically, on the source / drain electrode 17 and the channel formation region 18),
(D) a floating gate electrode 12 formed on the first insulating layer 11 so as to face the channel formation region 18;
(E) the second insulating layer 15 formed on the floating gate electrode 12, and
(F) a control electrode (gate electrode) 16 formed on the second insulating layer 15 so as to face the channel formation region 18;
It has.

In the first embodiment, a base layer 30 is formed between a portion of the support 10 located between the source / drain electrode 17 and the source / drain electrode 17 and the channel forming region 18. The underlayer 30 is formed by arranging base-constituting fine particles 31 made of an insulating material (specifically, SiO _x fine particles, silica fine particles) with substantially regularity. In the drawings, the underlayer 30 is illustrated as being composed of one layer composed of the ground constituent fine particles 31, but the ground layer 30 has a structure in which layers composed of the ground constituent fine particles 31 are laminated. You may have.

  As shown in the conceptual diagram of FIG. 1B, the channel forming region 18 is composed of channel forming region constituting fine particles 21 made of a conductor and organic semiconductor molecules 22 bonded to the channel forming region constituting fine particles 21. Based on the state of fine particle arrangement of the underlayer 30, the channel forming region constituting fine particles 21 are arranged with substantially regularity. In the drawing, the channel forming region 18 is illustrated as being composed of one layer composed of channel forming region constituting particles 21, but the channel forming region 18 is a layer composed of channel forming region constituting particles 21. May have a laminated structure. The same applies to Example 2 described later.

  In Example 1, gold fine particles (gold nanoparticles) are used as the channel forming region constituting fine particles 21 made of a conductor, and the organic semiconductor molecules 22 are organic semiconductor molecules having a conjugated bond, and thiol groups at both ends of the molecule. 4,4′-biphenyldithiol (BPDT) with (—SH) is used. The same applies to the second embodiment.

The first insulating layer 11 having an average thickness of 5 nm on the channel formation region 18 is made of SiO _x fine particles, the second insulating layer 15 having an average thickness of 8 nm is made of an ONO film, and the control electrode 16 and The source / drain electrode 17 is made of copper fine particles, and the support 10 is made of a glass substrate on the surface of which an insulating film (not shown) is formed.

  FIG. 7A schematically shows a state in which the base constituent fine particles 31 are arranged with substantially regularity in Example 1, but the base constituent fine particles 31 are densely positioned so as to be located at the vertices of an equilateral triangle. , Arranged in contact. Further, a state in which the channel forming region constituting fine particles 21 are arranged with substantially regularity is schematically shown in FIGS. 8A and 8B or schematically in FIGS. 9A and 9B. .

  7A and 7B are solid circles, and FIGS. 8A and 8B, FIGS. 9A and 9B, and FIG. In (A) and (B) of FIG. Further, the channel-forming region constituting fine particles 21 are indicated by solid circles in FIGS. 8A and 8B, FIGS. 9A and 9B, and FIGS. 10A and 10B. The semiconductor molecules 22 are indicated by solid line segments in FIG. 8B, FIG. 9B, and FIG.

  Here, since the base constituent fine particles 31 are densely arranged so as to be positioned at the vertices of the equilateral triangle, the channel forming region constituent fine particles 21 are located on the normal passing through the center of the equilateral triangle. The channel forming region constituting fine particles 21 are located at the apexes of an equilateral triangle formed by the channel forming region constituting fine particles 21 (see FIG. 8B) or are formed by the channel forming region constituting fine particles 21. It is located at the apex of a regular hexagon (see FIG. 9B). In order to obtain the state shown in FIG. 8B and the state shown in FIG. 9B, the average particle diameter of the base constituent fine particles 31, the average particle diameter of the channel forming region constituent fine particles 21, and the organic semiconductor molecules The lengths in the major axis direction of 22 are exemplified in the following Table 1 and Table 2, respectively.

[Table 1]
Average particle diameter of the base constituent fine particles 31: 7 nm
Average particle diameter of channel forming region constituting fine particles 21: 5 nm
The length of the organic semiconductor molecule 22 in the major axis direction: 2 nm

[Table 2]
Average particle diameter of the base constituent fine particles 31: 14 nm
Average particle diameter of channel forming region constituting fine particles 21: 5 nm
Length of major axis direction of organic semiconductor molecule 22: 2 nm

  In Example 1 or Example 2 to be described later, the functional group possessed by the organic semiconductor molecule 22 at the end is chemically bonded to the channel-forming region constituting fine particles 21. More specifically, the functional group which the organic semiconductor molecule 22 has at both ends (in Example 1 or Example 2 described later, it is an organic semiconductor molecule having a conjugated bond, and 4,4′-biphenyldithiol (BPDT). The organic semiconductor molecules 22 and the channel-forming region-constituting fine particles 21 are chemically (alternatively) bonded to each other by the thiol groups [—SH] possessed at both ends of the surface, or chemically (alternately) three-dimensionally. A network-like conductive path 20 is constructed by coupling. The conductive path 20 is constituted by a single layer of a conjugate of the channel forming region constituting fine particles 21 and the organic semiconductor molecules 22, or alternatively, by a laminated structure of the conjugate of the channel forming region constituting fine particles 21 and the organic semiconductor molecules 22. A conductive path 20 is configured.

  The channel forming region constituting fine particles 21 are formed on the base layer 30 (or the first insulating layer constituting fine particles 111A in Example 2) and the surface of the under layer 30 (or the first insulating layer constituting fine particles 111A in Example 2). After the two-dimensional regular arrangement in a substantially parallel plane, the step of bringing the organic semiconductor molecules 22 into contact is performed once, whereby a single unit of the combined body of the channel forming region constituting fine particles 21 and the organic semiconductor molecules 22 is obtained. One layer can be formed, and by performing it twice or more, a layer composed of a combined body of the channel forming region constituting fine particles 21 and the organic semiconductor molecules 22 is stacked, and a stacked structure of the combined body can be obtained. Alternatively, the channel forming region constituting fine particles 21 are regularly arranged three-dimensionally by repeating this step a plurality of times, and then the step of contacting the organic semiconductor molecules 22 is performed at least once. It is possible to obtain a laminated structure of a bonded body in which layers formed of a bonded body of the formation region constituting fine particles 21 and the organic semiconductor molecules 22 are stacked.

  That is, in the step of forming the channel forming region 18, after forming one layer of the channel forming region constituting fine particles 21, the organic semiconductor molecules 22 are brought into contact with the channel forming region constituting fine particles 21, thereby By forming a conjugate with the semiconductor molecule 22, one layer of the conjugate is formed. Thus, since the channel formation region 18 can be formed by forming each layer of the combined body, the channel formation region 18 having a desired thickness can be formed by repeating this process. . The channel forming region 18 thus obtained is composed of a combined body in which the channel forming region constituting fine particles 21 and the organic semiconductor molecules 22 are bonded in a network shape, and the gate voltage applied to the control electrode 16, The carrier movement is controlled by the charge accumulation state in the floating gate electrode 12 (information storage state in the nonvolatile semiconductor memory).

  Here, in the channel formation region 18, the channel formation region constituting fine particles 21 are two-dimensionally or three-dimensionally linked by the organic semiconductor molecules 22, and the conductive path in the channel formation region constituting fine particles 21 and the organic semiconductor molecules 22 A network-like conductive path 20 connected to the conductive paths along the molecular skeleton is formed. And, as shown in the conceptual diagram of FIG. 1B, this conductive path 20 does not include the intermolecular electron transfer that was the cause of the low mobility in the channel formation region made of a conventional organic semiconductor, In addition, since the electron movement in the molecule is performed through a conjugated system formed along the molecular skeleton, high mobility is expected. Electron conduction in the channel forming region 18 is performed through the network-like conductive path 20, and the conductivity of the channel forming region 18 is the gate voltage applied to the control electrode 16, and further charge accumulation in the floating gate electrode 12. It is controlled by the state (information storage state in the nonvolatile semiconductor memory).

  The channel forming region 18 may be a single layer of a combined body, or a stacked structure of a combined body of two or more layers and about 10 layers. The thickness of one layer is substantially the same as the particle diameter (several nm) of the channel forming region constituting fine particles. In the case where the channel forming region constituting fine particles 21 are made of gold (Au) having an average particle diameter of about 10 nm and have a laminated structure of 10 layers, the thickness of the channel forming region 18 is approximately 100 nm. In addition, since the channel forming region 18 can be obtained by forming each layer of the bonded body independently, the channel forming region constituting fine particles 21 are formed for each bonded body or for each stacked structure of the bonded body. The characteristics of the channel forming region 18 may be controlled by changing the material to be formed, the average particle size of the channel forming region constituting fine particles 21 and the organic semiconductor molecules 22.

  The items described above basically apply to Example 2 described later.

The floating gate electrode 12 includes a floating gate electrode constituent particle 13 made of a conductor and a protective film 14 made of an insulating material that covers the floating gate electrode constituent particle 13. The first insulating layer 11 is formed by arranging first insulating layer-constituting particles (not shown) made of an insulating material (specifically, SiO _x fine particles, silica fine particles) with substantially regularity. Based on the arrangement state of the constituent fine particles, the floating gate electrode constituting fine particles 13 constituting the floating gate electrode 12 are arranged with substantially regularity. The first insulating layer 11 may be constituted by one layer made of the first insulating layer constituting fine particles, or the first insulating layer 11 has a structure in which the layers made of the first insulating layer constituting fine particles are laminated. May have. The same applies to Example 2 described later.

In Example 1 or Example 2 described later, the floating gate electrode constituent fine particles 13 made of a conductor are made of gold fine particles (gold nanoparticles), and the protective film 14 is a protective film having an amino group (—NH ₂ ) (specifically, Oleoylamine).

  In Example 1, the first insulating layer-constituting fine particles are also arranged with substantially regularity as schematically shown in FIG. 7A or FIG. 7B. The fine particles constituting the first insulating layer are indicated by solid circles in FIGS. 7A and 7B, and FIGS. 8A and 8B, FIGS. 9A and 9B, In FIGS. 10A and 10B, a dotted circle is shown. Here, if the first insulating layer constituting fine particles are densely arranged so as to be located at the apex of the equilateral triangle, the floating gate electrode constituting fine particles 13 are located on the normal passing through the center of the equilateral triangle. The floating gate electrode constituent fine particles 13 are located at the vertices of equilateral triangles formed by the floating gate electrode constituting fine particles 13 or at the vertices of regular hexagons formed by the floating gate electrode constituting fine particles 13. In order to obtain each of these states, the average particle diameter of the floating gate electrode constituting fine particles 13, the average thickness of the protective film 14, and the average particle diameter of the first insulating layer constituting fine particles are respectively shown in Tables 3 and 4 below. It is illustrated in

[Table 3] Average particle size of the fine particles 13 positioned at the apex of the equilateral triangle: 5 nm
Average thickness of protective film 14: 1 nm
Average particle diameter of the first insulating layer constituting fine particles: 8 nm

[Table 4] Average particle diameter of the fine particles 13 at the position of the regular hexagon located at the apex of the regular hexagon: 4 nm
Average thickness of protective film 14: 1 nm
Average particle diameter of the first insulating layer constituting fine particles: 10 nm

  After the floating gate electrode constituting fine particles 13 are regularly arranged two-dimensionally on the first insulating layer constituting fine particles, the floating gate electrode constituting fine particles 13 are further arranged on the floating gate electrode constituting fine particles 13 regularly arranged two-dimensionally. By repeating the operation of regularly arranging 13 in a two-dimensional manner, it is possible to obtain the floating gate electrode 12 having a laminated structure in which layers of the floating gate electrode constituting fine particles 13 are laminated.

  The items described above basically apply to Example 2 described later.

  Hereinafter, with reference to FIGS. 2A to 2D and FIGS. 3A to 3B which are schematic partial end views of a support and the like, the nonvolatile semiconductor memory of Example 1 will be described. A manufacturing method will be described.

[Step-100]
First, a source / drain electrode 17 can be formed by printing a copper paste containing copper fine particles on the support 10 by a screen printing method and baking it (see FIG. 2A).

[Step-110]
Thereafter, an underlying layer in which underlying constituent fine particles 31 made of SiO _x that is an insulating material are arranged on the portion of the support 10 positioned between the source / drain electrode 17 and the source / drain electrode 17 with approximately regularity. 30 is formed. Specifically, a spin coating method in which a colloidal solution of silica (SiO ₂ ) nanoparticles (solvent: cyclohexane) is dropped so as to cover the entire surface of the support 10 and the excess solution and nanoparticles are removed by a spin coater. Based on this, the underlayer 30 can be formed (see FIG. 2B). In addition, the state in which the ground constituent fine particles 31 thus obtained are arranged with substantially regularity is, for example, schematically as shown in FIG.

[Step-120]
Next, a channel forming region 18 having a conductive path 20 constituted by channel forming region constituting fine particles 21 made of a conductor and organic semiconductor molecules 22 bonded to the channel forming region constituting fine particles 21 is formed on the base layer 30. (See FIG. 2C).

In Example 1, gold nanoparticles having a uniform particle size obtained by improving gold nanoparticles prepared in advance are used. That is, in Example 1, a method proposed by Leff et al. (A method for producing gold nanoparticles using dodecylamine (C ₁₂ H ₂₅ NH ₂ ) as a coating layer. DV Leff, et al., Langmuir, 1996, 12, 4723). Applying a modified method of Lin et al. (See XM Lin, et al., J. Nanoparticle Res., 2000, 2, 157) to the colloidal solution of gold nanoparticles. To make the particle size of the gold nanoparticles uniform.

Specifically, gold nanoparticles are obtained by the following preparation method. That is, tetrachloroauric acid (HAuCl ₄ .3H ₂ O) is dissolved in ion exchange water. Then, while the solution is vigorously stirred, tetraoctyl ammonium bromide (N (C ₈ H ₁₇ ) ₄ Br) dissolved in toluene is added into the solution. Then dodecylamine (C ₁₂ H ₂₅ NH ₂ ) dissolved in toluene is added to the mixture. Thereafter, a solution obtained by dissolving sodium borohydride (NaBH ₄ ) in ion-exchanged water is dropped into the vigorously stirred mixture. And after continuing stirring for 12 hours, after leaving still, an aqueous layer is removed with a separatory funnel. Next, toluene and dodecylamine are added to this solution, and the mixture is heated to reflux at 130 ° C. for 1 hour. Then, after leaving still to room temperature, liquid volume is reduced with an evaporator, Then ethanol is added and it leaves still for 12 hours in a freezer. The precipitated gold nanoparticles are separated by filtration, washed with ethanol, and dissolved in toluene. A gold nanoparticle colloidal solution (solvent: toluene) in which 0.05% by weight of gold nanoparticles having a surface coated with a coating layer made of dodecylamine is dispersed.

  And after forming the thin film which consists of the solution containing the channel formation area | region structure fine particle 21 obtained in this way on the base layer 30 by the casting method, the solvent contained in a solution is evaporated. Accordingly, the channel-forming region constituting fine particles 21 can be arranged with substantially regularity based on the fine particle arrangement state of the underlayer 30 (see FIG. 8A or FIG. 9A).

  Next, the conductive path 20 is formed by bonding the organic semiconductor molecules 22 to the channel forming region constituting fine particles 21. Specifically, after immersing the whole in a solution in which organic semiconductor molecule 22 composed of 4,4′-biphenyldithiol is dissolved in toluene at a molar concentration of several mM, the solution is replaced by washing with toluene. Evaporate. At this time, the dodecylamine constituting the coating layer is replaced by the organic semiconductor molecule 22 composed of 4,4′-biphenyldithiol, and the organic semiconductor molecule 22 is composed of gold nanoparticles by the thiol group (—SH) at the terminal. It is chemically bonded to the surface of the channel forming region constituting fine particles 21. A large number of organic semiconductor molecules 22 are bonded to the surface of one channel forming region constituting particle 21 so as to enclose the channel forming region constituting particle 21. Some of them are also bonded to other channel-forming region constituting particles 21 by a thiol group at the other molecule end, so that the organic semiconductor molecules 22 make the channel-forming region constituting particles 21 in a two-dimensional network form. A connected state can be obtained (see FIG. 8B or FIG. 9B).

  In this way, the organic semiconductor molecules 22 and the channel forming region constituting fine particles 21 are chemically (alternatively) bonded to each other by the functional groups of the organic semiconductor molecules 22 at both ends, whereby the network-like conductive path 20 is constructed. In the state shown in FIG. 2C, the conductive path 20 is constructed by a single layer of a combination of the channel forming region constituting fine particles 21 and the organic semiconductor molecules 22.

[Step-130]
Next, if necessary, [Step-120] is repeated a desired number of times. In this way, the organic semiconductor molecule 22 and the channel-forming region-constituting fine particles 21 are three-dimensionally chemically (alternately) bonded by the functional groups of the organic semiconductor molecule 22 at both ends, thereby constructing the network-like conductive path 20. As a result, it is possible to obtain a structure in which the conductive path 20 is constituted by a laminated structure of a combined body of the channel forming region constituting fine particles 21 and the organic semiconductor molecules 22.

[Step-140]
Thereafter, the first insulating layer 11 is formed on the entire surface (more specifically, on the source / drain electrode 17 and the channel formation region 18) (see FIG. 2D). Specifically, the first insulating layer 11 in which the first insulating layer-constituting particles made of SiO _{X as} an insulating material are arranged with substantially regularity is applied to a colloidal solution (solvent: cyclohexane) of silica (SiO ₂ ) nanoparticles. It can be formed on the basis of a spin coat method in which the entire surface is dropped and excess solution and nanoparticles are removed by a spin coater. The state in which the first insulating layer-constituting fine particles thus obtained are arranged with substantially regularity is the same as that shown in FIG. 7A, for example.

[Step-150]
Next, the floating gate electrode 12 composed of the floating gate electrode constituting fine particles 13 made of a conductor and the protective film 14 made of an insulating material covering the floating gate electrode constituting fine particles 13 is formed on the first insulating layer 11 ( (See (A) of FIG. 3). The floating gate electrode constituting particles 13 constituting the floating gate electrode 12 are arranged with substantially regularity based on the arrangement state of the first insulating layer constituting particles.

Specifically, gold nanoparticles are obtained by the following preparation method. That is, tetrachloroauric acid (HAuCl ₄ .3H ₂ O) is dissolved in ion exchange water. Then, while the solution is vigorously stirred, tetraoctyl ammonium bromide (N (C ₈ H ₁₇ ) ₄ Br) dissolved in toluene is added into the solution. Then dodecylamine (C ₁₂ H ₂₅ NH ₂ ) dissolved in toluene is added to the mixture. Thereafter, a solution obtained by dissolving sodium borohydride (NaBH ₄ ) in ion-exchanged water is dropped into the vigorously stirred mixture. And after continuing stirring for 12 hours, after leaving still, an aqueous layer is removed with a separatory funnel. Next, toluene and dodecylamine are added to this solution, and the mixture is heated to reflux at 130 ° C. for 1 hour. Then, after leaving still to room temperature, liquid volume is reduced with an evaporator, Then ethanol is added and it leaves still for 12 hours in a freezer. The precipitated gold nanoparticles are separated by filtration, washed with ethanol, and dissolved in toluene. A gold nanoparticle colloidal solution (solvent: toluene) in which 0.05% by weight of gold nanoparticles whose surface is coated with a protective film made of dodecylamine is dispersed.

  A thin film made of a solution containing the fine particles 13 of the floating gate electrode covered with the protective film 14 thus obtained is formed on the first insulating layer 11 by a casting method, and then the solvent contained in the solution is evaporated. Let Accordingly, the floating gate electrode constituting fine particles 13 covered with the protective film 14 can be arranged with substantially regularity based on the fine particle arrangement state of the first insulating layer 11.

[Step-160]
Thereafter, a second insulating layer 15 made of an ONO film is formed on the entire surface based on a sputtering method.

[Step-170]
Next, the control electrode 16 can be formed by printing a copper paste containing copper fine particles on the second insulating layer 15 by a screen printing method and baking it (see FIG. 3B). . The structure shown in FIG. 1A can be obtained by selectively removing the second insulating layer 15, the floating gate electrode 12, and the first insulating layer 11 using the control electrode 16 as a mask. .

[Step-180]
Finally, an insulating layer (not shown) as a passivation film is formed on the entire surface, an opening is formed in the insulating layer above the source / drain electrode 17, and a wiring material layer is formed on the entire surface including the inside of the opening. By patterning the wiring material layer, the nonvolatile semiconductor memory of Example 1 in which the wiring (not shown) connected to the source / drain electrode 17 is formed on the insulating layer can be completed.

  Example 2 relates to a nonvolatile semiconductor memory according to a second aspect of the present invention and a method for manufacturing the same. A schematic partial sectional view of the nonvolatile semiconductor memory of Example 2 is shown in FIG.

The non-volatile semiconductor memory of Example 2 is specifically a bottom gate / top contact type non-volatile semiconductor memory,
(A) a control electrode (gate electrode) 116 formed on the support 110;
(B) a second insulating layer 115 formed on the control electrode 116 and the support 110;
(C) a floating gate electrode 112 formed on the second insulating layer 115;
(D) a first insulating layer 111 formed on the floating gate electrode 112;
(E) source / drain electrodes 117 formed on the first insulating layer 111, and
(F) a channel formation region 118 formed on the portion of the first insulating layer 111 located between the source / drain electrode 117 and the source / drain electrode 117 so as to face the control electrode 116;
It has. The source / drain electrode 117 is formed on the extension portion 118A of the channel formation region 118.

The first insulating layer 111 is composed of first insulating layer constituting fine particles (first insulating layer constituting fine particles present on the outermost surface of the first insulating layer 111) made of an insulating material (specifically, SiO _x fine particles, silica fine particles). Only 111A is shown for the sake of convenience) and is arranged with substantially regularity. The channel forming region 118 is configured by channel forming region constituting fine particles 21 made of a conductor and organic semiconductor molecules 22 bonded to the channel forming region constituting fine particles 21, as shown in the conceptual diagram of FIG. Based on the fine particle arrangement state of the first insulating layer 111, the channel forming region constituting fine particles 21 are arranged with substantially regularity.

  Further, the floating gate electrode 112 includes a floating gate electrode constituent fine particle 113 made of a conductor and a protective film 114 made of an insulating material that covers the floating gate electrode constituent fine particle 113. Here, the second insulating layer 115 has substantially regular second insulating layer-constituting particles made of an insulating material (only the second insulating layer-constituting particulate 115A existing on the outermost surface of the second insulating layer 115 is shown for convenience). The floating gate electrode constituting particles 113 constituting the floating gate electrode 112 are arranged with substantially regularity based on the arrangement state of the second insulating layer constituting particles 115A.

  Since the material constituting the nonvolatile semiconductor memory of the second embodiment can be the same as the material constituting the nonvolatile semiconductor memory of the first embodiment, detailed description thereof is omitted.

  The state in which the first insulating layer constituting fine particles 111A and the second insulating layer constituting fine particles 115A in Example 2 are arranged with substantially regularity is schematically shown in FIG. 7A or FIG. 7B. Similarly, the first insulating layer-constituting particles 111A and the second insulating layer-constituting particles 115A are densely arranged in contact so as to be positioned at the vertices of an equilateral triangle, for example. Further, the state in which the channel forming region constituting fine particles 21 are arranged with substantially regularity is schematically shown in FIGS. 8A and 8B, or schematically shown in FIGS. 9A and 9B. Is the same. The first insulating layer constituting fine particles 111A and the second insulating layer constituting fine particles 115A are indicated by solid circles in FIGS. 7A and 7B, and FIGS. 8A and 8B and FIG. (A) and (B) of FIG. 10, and (A) and (B) of FIG.

  Here, since the first insulating layer constituting fine particles 111A and the second insulating layer constituting fine particles 115A are densely arranged so as to be located at the vertices of the equilateral triangle, the channel forming region constitution is formed on the normal passing through the center of the equilateral triangle. The fine particles 21 and the floating gate electrode constituting fine particles 113 are located. The channel forming region constituent fine particles 21 and the floating gate electrode constituent fine particles 113 are located at the vertices of an equilateral triangle formed by the channel forming region constituent fine particles 21 and the floating gate electrode constituent fine particles 113 (see FIG. 8B). Alternatively, it is located at the apex of a regular hexagon formed by the channel forming region constituting fine particles 21 and the floating gate electrode constituting fine particles 113 (see FIG. 9B). The average particle size of the first insulating layer constituting fine particles 111A, the average particle size of the channel forming region constituting fine particles 21 for obtaining the state shown in FIG. 8B and the state shown in FIG. 9B, The lengths of the organic semiconductor molecules 22 in the major axis direction may be the same as those illustrated in Table 1 and Table 2, respectively. The “average particle diameter of the base constituent fine particles 31” in Tables 1 and 2 may be read as “first insulating layer constituent fine particles 111A”. Further, the average particle diameter of the second insulating layer-constituting fine particles 115A, the average particle diameter of the floating gate electrode-constituting fine particles 113, and the average thickness of the protective film 114 may be the same as those exemplified in Table 3 and Table 4, respectively. . In Tables 3 and 4, “first insulating layer constituent particles” may be read as “second insulating layer constituent particles”.

  4A and 4B, which are schematic partial end views of the support and the like, and FIGS. 5A and 5B, the nonvolatile semiconductor device of Example 2 will be described below. A method for manufacturing the memory will be described.

[Step-200]
First, after forming the control electrode 116 on the support 110 in the same manner as [Step-170] in Example 1, the control electrode 116 and on the control electrode 116 in the same manner as in [Step-160] in Example 1. An ONO film is formed on the support 110, and the second insulating layer-constituting particles 115A made of SiO _x are substantially regularized on the ONO film in the same manner as in [Step-140] of Example 1. Arrange.

[Step-210]
Next, in the same manner as in [Step-150] in the first embodiment, the floating gate electrode constituting fine particles 113 made of a conductor and the protection made of an insulating material covering the floating gate electrode constituting fine particles 113 are formed on the second insulating layer 115. A floating gate electrode layer composed of the film 114 is formed. Next, the floating gate electrode 112 can be obtained by selectively removing the floating gate electrode layer (see FIG. 4A). In the figure, the second insulating layer constituting particles 115A other than the second insulating layer constituting particles 115A located under the floating gate electrode 112 are removed, but the second insulating layer constituting particles 115A located under the floating gate electrode 112 are shown. The second insulating layer constituting fine particles 115A other than the insulating layer constituting fine particles 115A may be left.

[Step-220]
Thereafter, the first insulating layer 111 is formed on the floating gate electrode 112 and the second insulating layer 115 on the entire surface in the same manner as in [Step-140] in Embodiment 1 (see FIG. 4B). The state in which the first insulating layer-constituting fine particles 111A obtained in this way are arranged with substantially regularity is the same as shown in FIG. In the drawing, the state in which the first insulating layer constituting particles 111A are arranged with substantially regularity is illustrated only on the surface of the first insulating layer 111.

[Step-230]
Thereafter, in the same manner as in [Step-120] and [Step-130] of Example 1, the first insulating layer-constituting fine particles 111A are made of a conductor on the first insulating layer 111 in a state of being arranged with substantially regularity. A channel forming region 118 having a conductive path 20 constituted by the channel forming region constituting fine particles 21 and the organic semiconductor molecules 22 bonded to the channel forming region constituting fine particles 21 is formed (see FIG. 5A).

[Step-240]
Next, in the same manner as in [Step-100] of Example 1, a source / drain electrode 117 is formed on the extending portion 118A of the channel formation region 118 (see FIG. 5B).

[Step-250]
Finally, an insulating layer (not shown) as a passivation film is formed on the entire surface, an opening is formed in the insulating layer above the source / drain electrode 117, and a wiring material layer is formed on the entire surface including the inside of the opening. By patterning the wiring material layer, the nonvolatile semiconductor memory of Example 2 in which the wiring (not shown) connected to the source / drain electrode 117 is formed on the insulating layer can be completed.

  The nonvolatile semiconductor memory according to the second embodiment may be a bottom gate / bottom contact type nonvolatile semiconductor memory as shown in FIG. In this case, after [Step-220], [Step-240], [Step-230], and [Step-250] may be executed in this order.

As mentioned above, although this invention was demonstrated based on the preferable Example, this invention is not limited to these Examples. The specific structure, configuration, and manufacturing conditions of the nonvolatile semiconductor memory are examples, and can be changed as appropriate. The fine particles constituting the floating gate electrode and the fine particles constituting the channel formation region are not limited to gold (Au), but other metals (for example, silver and platinum), or cadmium sulfide, cadmium selenide, or silicon as a semiconductor It can also consist of. Further, the protective film is not limited to a protective film having an amino group (—NH ₂ ) (specifically, oleoylamine), and the organic semiconductor molecule is also limited to 4,4′-biphenyldithiol (BPDT). Not what you want. In some cases, the floating gate electrode of the present invention can be applied to a nonvolatile semiconductor memory having a channel formation region formed in a silicon semiconductor substrate or a silicon semiconductor layer.

  Depending on the properties of the surface of the ground constituent fine particles and the insulating layer constituent fine particles, the base constituent fine particles and the insulating layer constituent fine particles are closely contacted so as to be positioned at the apex of the square as shown in FIG. It can also be arranged in a state. In this case, as shown in FIGS. 10A and 10B, channel-forming region constituent particles and floating gate electrode-constituting particles are located on the normal line passing through the center of the square, and the channel-forming region configuration The fine particles and the fine particles constituting the floating gate electrode are located at the apex of the square formed by the fine particles constituting the channel formation region and the fine particles constituting the floating gate electrode.

FIG. 1A is a schematic partial cross-sectional view of the nonvolatile semiconductor memory of Example 1, and FIG. 1B is composed of channel-forming region-constituting particles and organic semiconductor molecules. It is a conceptual diagram of a conductive path. 2A, 2 </ b> B, 2 </ b> C, and 2 </ b> D are schematic partial end views of a support and the like for describing the method for manufacturing the nonvolatile semiconductor memory of Example 1. FIG. 3A and 3B are schematic partial end views of a support and the like for explaining the manufacturing method of the nonvolatile semiconductor memory of Example 1 following FIG. 2D. . 4A and 4B are schematic partial end views of a support and the like for describing the method for manufacturing the nonvolatile semiconductor memory of Example 2. FIG. 5A and 5B are schematic partial end views of a support and the like for explaining the method for manufacturing the nonvolatile semiconductor memory of Example 2 following FIG. 4B. . FIG. 6 is a schematic partial cross-sectional view of a modification of the nonvolatile semiconductor memory according to the second embodiment. FIGS. 7A and 7B are diagrams schematically showing a state in which the first insulating layer constituting fine particles, the second insulating layer constituting fine particles, or the base constituting fine particles are arranged with substantially regularity. FIGS. 8A and 8B are diagrams schematically showing a state where the fine particles constituting the floating gate electrode or the fine particles constituting the channel formation region are arranged with substantially regularity. FIGS. 9A and 9B are diagrams schematically showing a state in which the fine particles constituting the floating gate electrode or the fine particles constituting the channel formation region are arranged with substantially regularity. FIGS. 10A and 10B are diagrams schematically showing a state in which floating gate electrode constituting particles or channel forming region constituting particles are arranged with substantially regularity. FIG. 11 is a schematic partial cross-sectional view of a so-called nanocrystal type nonvolatile semiconductor memory.

Explanation of symbols

DESCRIPTION OF SYMBOLS 10,110 ... Support body, 11, 111 ... 1st insulating layer, 12, 112 ... Floating gate electrode, 13, 113 ... Floating gate electrode constituent particle, 14, 114 ... Protective film , 15, 115 ... second insulating layer, 16, 116 ... control electrode (gate electrode), 17, 117 ... source / drain electrodes, 18, 118 ... channel formation region, 118A ... Channel forming region extension part, 20 ... conductive path, 21 ... channel forming region constituting fine particles, 22 ... organic semiconductor molecules, 30 ... underlying layer, 31 ... underlying constituent fine particles

Claims (18)

(A) source / drain electrodes formed on a support;
(B) a channel formation region formed on a portion of the support located between the source / drain electrodes and the source / drain electrodes;
(C) a first insulating layer formed on the entire surface;
(D) a floating gate electrode formed on the first insulating layer so as to face the channel formation region;
(E) a second insulating layer formed on the floating gate electrode, and
(F) a control electrode formed on the second insulating layer so as to face the channel formation region;
A non-volatile semiconductor memory comprising:
The channel forming region has a channel formed by a conductor or a semiconductor, and has a conductive path formed by organic semiconductor molecules bonded to the channel forming region forming particle.
The floating gate electrode is composed of a floating gate electrode constituent fine particle made of a conductor or a semiconductor and a protective film made of an insulating material covering the floating gate electrode constituent fine particle. The first insulating layer is composed of first insulating layer-constituting particles made of an insulating material arranged with substantially regularity,
2. The nonvolatile semiconductor memory according to claim 1, wherein the fine particles constituting the floating gate electrode are arranged with substantially regularity based on the arrangement state of the fine particles constituting the first insulating layer. (A) a control electrode formed on a support;
(B) a second insulating layer formed on the control electrode and the support,
(C) a floating gate electrode formed on the second insulating layer;
(D) a first insulating layer formed on the floating gate electrode;
(E) source / drain electrodes formed on the first insulating layer, and
(F) a channel formation region formed on the portion of the first insulating layer located between the source / drain electrode and the source / drain electrode, facing the control electrode;
A non-volatile semiconductor memory comprising:
The channel forming region has a channel formed by a conductor or a semiconductor, and has a conductive path formed by organic semiconductor molecules bonded to the channel forming region forming particle.
The floating gate electrode is composed of a floating gate electrode constituent fine particle made of a conductor or a semiconductor and a protective film made of an insulating material covering the floating gate electrode constituent fine particle. The second insulating layer is composed of second insulating layer-constituting particles made of an insulating material arranged with substantially regularity,
4. The nonvolatile semiconductor memory according to claim 3, wherein the fine particles constituting the floating gate electrode constituting the floating gate electrode are arranged with substantially regularity based on the arrangement state of the fine particles constituting the second insulating layer.   4. The nonvolatile semiconductor memory according to claim 1, wherein an average thickness of the second insulating layer is larger than an average thickness of the first insulating layer. 5. The average thickness of the second insulating layer is 10 nm or more,
6. The nonvolatile semiconductor memory according to claim 5, wherein the average thickness of the first insulating layer is 6 nm to 10 nm.   The fine particles constituting the floating gate electrode are composed of gold, silver, platinum, copper, aluminum, palladium, chromium, nickel, or iron as a conductor, or an alloy composed of these metals. The nonvolatile semiconductor memory according to claim 1 or 3.   The non-volatile semiconductor according to claim 1 or 3, wherein the fine particles constituting the floating gate electrode are made of cadmium sulfide, cadmium selenide, cadmium telluride, gallium arsenide, titanium oxide, or silicon as a semiconductor. memory.   4. The nonvolatile semiconductor memory according to claim 1, wherein a molecule constituting the protective film has a functional group bonded to the floating gate electrode constituting fine particle at one end thereof. 5. The functional group includes a thiol group (—SH), an amino group (—NH ₂ ), an isocyano group (—NC), a cyano group (—CN), a thioacetoxyl group (—SCOCH ₃ ), or a carboxyl group (— The nonvolatile semiconductor memory according to claim 9, wherein the nonvolatile semiconductor memory is COOH).   4. The nonvolatile semiconductor memory according to claim 1, wherein a functional group at the terminal of the organic semiconductor molecule is chemically bonded to the channel-forming region constituting fine particles.   The channel-forming region constituting fine particles are made of gold, silver, platinum, copper, aluminum, palladium, chromium, nickel, or iron as a conductor, or an alloy made of these metals. The nonvolatile semiconductor memory according to claim 1 or 3.   4. The nonvolatile semiconductor according to claim 1, wherein the channel-forming region-constituting fine particles are made of cadmium sulfide, cadmium selenide, cadmium telluride, gallium arsenide, titanium oxide, or silicon as a semiconductor. memory. The organic semiconductor molecule is an organic semiconductor molecule having a conjugated bond, and at both ends of the molecule, a thiol group (—SH), an amino group (—NH ₂ ), an isocyano group (—NC), a cyano group (—CN), The nonvolatile semiconductor memory according to claim 1, wherein the nonvolatile semiconductor memory has a thioacetoxyl group (—SCOCH ₃ ) or a carboxyl group (—COOH). (A) source / drain electrodes formed on a support;
(B) a channel formation region formed on a portion of the support located between the source / drain electrodes and the source / drain electrodes;
(C) a first insulating layer formed on the entire surface;
(D) a floating gate electrode formed on the first insulating layer so as to face the channel formation region;
(E) a second insulating layer formed on the floating gate electrode, and
(F) a control electrode formed on the second insulating layer so as to face the channel formation region;
A method for manufacturing a nonvolatile semiconductor memory comprising:
Forming a floating gate electrode composed of a floating gate electrode constituent fine particle made of a conductor or a semiconductor and a protective film made of an insulating material covering the floating gate electrode constituent fine particle on the first insulating layer; A method for manufacturing a nonvolatile semiconductor memory. Forming a first insulating layer in which first insulating layer-constituting particles made of an insulating material are arranged with substantially regularity on the entire surface after forming a channel formation region and source / drain electrodes on a support;
16. The floating gate electrode forming step according to claim 15, wherein the fine particles constituting the floating gate electrode are arranged with substantially regularity based on the arrangement state of the fine particles constituting the first insulating layer. The manufacturing method of the non-volatile semiconductor memory of description. (A) a control electrode formed on a support;
(B) a second insulating layer formed on the control electrode and the support,
(C) a floating gate electrode formed on the second insulating layer;
(D) a first insulating layer formed on the floating gate electrode;
(E) source / drain electrodes formed on the first insulating layer, and
(F) a channel formation region formed on the portion of the first insulating layer located between the source / drain electrode and the source / drain electrode, facing the control electrode;
A method for manufacturing a nonvolatile semiconductor memory comprising:
Forming a floating gate electrode composed of a floating gate electrode constituent fine particle made of a conductor or a semiconductor and a protective film made of an insulating material covering the floating gate electrode constituent fine particle on the second insulating layer; A method for manufacturing a nonvolatile semiconductor memory. Forming a control electrode on the support, and then forming a second insulating layer on the control electrode and the support, in which second insulating layer-constituting particles made of an insulating material are arranged with substantially regularity,
The floating gate electrode forming step includes arranging the floating gate electrode constituting particles constituting the floating gate electrode with substantially regularity based on the arrangement state of the second insulating layer constituting particles. The manufacturing method of the non-volatile semiconductor memory of description.

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