JP2007102383A - Non-contact tag and control method for non-contact tag - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a non-contact tag for accurately demodulating modulation data in different modulation systems without causing the increase of a circuit scale or power consumption or the decrease of a communication range. <P>SOLUTION: In the receiving circuit system of a non-contact tag, the start/stop of a clock frequency-division circuit 6 for generating a frequency-division clock 7 for driving a counter for decoding from an extraction clock 5 to be extracted from the carrier 400 is controlled on the basis of a logical signal(demodulation signal 9) to be output from a demodulation circuit 8 according to the demodulation state of a carrier 400. Then, the transition of the counter for decoding is made equal by ASK 100% modulation and ASK 10% modulation, so that it is possible to cope with different types of ASK modulation whose modulation degrees are different by one demodulation circuit system. Thus, it is not necessary to provide any redundant demodulation circuit for each demodulation system, and it is possible to reduce power consumption, and to increase a communication range with a reader/writer. <P>COPYRIGHT: (C)2007,JPO&INPIT

Description

  The present invention relates to a non-contact tag, a non-contact tag control method, and a non-contact ID identification system, and more particularly to a passive non-contact tag that operates with the power of a received radio wave, its control technology, application system, and the like. And effective technology.

  For example, in recent years, contactless ID identification systems have been attracting attention for applications such as supply chain management (SCM), logistics management (logistics), and inventory management. That is, a reader / writer connected to a computer automatically identifies an object to be read via wireless radio waves, with identification information of a transponder (non-contact tag) attached to a moving object such as a person or an object.

  Typical standards for this non-contact ID identification system include ISO 14443 type-A, ISO 15693 (both frequencies: 13.56 MHz), ISO 18000-6 type-A (frequency: up to 900 MHz), and the like.

  Proximity type ISO 14443 and proximity type ISO 15693 communicate with each other in a non-contact manner between a reader / writer and an IC card or a non-contact tag by an electromagnetic induction method. Although there are differences in standards, the basic configurations of cards or tags are known as disclosed in Patent Document 1 and Patent Document 2, for example.

  That is, an antenna (loop type) that receives radio waves (hereinafter referred to as a carrier) from a reader / writer, a power supply circuit for generating power from the received carrier, and a clock required for the operation of the IC card built-in circuit (LSI) from the carrier A clock circuit for extracting signals, a clock frequency dividing circuit for dividing the clock to a frequency used by internal logic, a demodulating circuit for demodulating the modulated carrier, a modulating circuit for returning a response to the reader / writer, received information It is conceivable to have a configuration comprising a non-volatile memory for storing etc., control of the non-volatile memory, and a control circuit for processing transmission / reception data.

  In the UHF band (up to 900 MHz) defined by ISO 18000-6, the communication system is a microwave system, so the antenna shape is a dipole type, but the basic configuration inside the LSI is almost the same.

  In ISO 14443 type-A and ISO 15693, ASK (Amplitude Shift Keying) 100% modulation is used as a modulation method of transmission data from a reader / writer to a transponder. The carrier (13.56 MHz in this case) from the reader / writer stops during a period in which transmission data is modulated by ASK 100% modulation.

  Since the internal clock required for LSI operation is generally extracted from the carrier from the reader / writer, when receiving ASK100% modulated data, the clock cannot be extracted from the carrier for the above-mentioned reason, so the internal clock of the LSI is also included. It stops, and the operation becomes discontinuous every time ASK100% modulated data is received.

  In order to avoid this clock stop, it is conceivable to mount a clock generation circuit such as a PLL (Phase Locked Loop), but this is not preferable. Because there is a difference in communication distance between the two standards (about 10 cm for ISO 14443 and about 70 cm for ISO 15693), both require longer communication distance characteristics. In order to increase the communication distance, it is necessary to reduce the power consumption of the LSI. Since the clock generation circuit such as the PLL described above consumes a large amount of power, it is not preferable to mount it on the LSI.

In fact, ISO 14443 type-A does not include a clock generation circuit such as a PLL, and there is an LSI that uses only the clock extracted from the clock extraction circuit.
On the other hand, the ISO 15693 standard defines data reception of ASK 10% modulation as well as ASK 100% modulation. In ISO15693, a command is transmitted from the reader / writer in accordance with the encoding shown in FIG. This encoding does not depend on the degree of modulation. Although the encoding does not depend on the degree of modulation, in the LSI on the command receiving side, as shown in FIG. 9A and FIG. ). For this reason, the same decoding circuit cannot recognize the same data due to a clock difference.

An example of decoding in ISO15693 as a decoding method will be described below. In the following description, an m-bit bit string is written as m′b00,.
The transmission data is 4′b0100 (a 4-bit bit string). Since ISO 15693 is transmitted with LSB first, 2′b01 is transmitted after 2′b00 is transmitted. The 2-bit data is transmitted in a data frame having a time width of 75.52 usec.

  As shown in FIG. 9A and FIG. 9B, the analog demodulated waveform changes in both the ASK 100% modulation and the ASK 10% modulation in the non-modulation period in which the carrier amplitude does not change and the modulation period in which the amplitude changes. Becomes H level and the modulation period becomes L level.

  First, a method for detecting and decoding the position of the modulation period (L level) will be described. This method corresponds to, for example, pulse pause coding (1 out of 4, 1 out of 256 of ISO15693).

  For data decoding, a counter for detecting the position of the L level and a decoding circuit for determining 2-bit data transmitted based on the counter value are used. The data processing unit performs logic processing based on the output data from the decoding unit.

  FIG. 10 shows the demodulated signal, the extracted clock, the divided clock, and the decoding counter value after demodulating the modulation data. The upper side of FIG. 10 is the case of ASK 100% modulation, and the lower side is the case of ASK 10% modulation.

  A frequency of 9.44 usec, which is the same as the pulse width, is generated from the frequency dividing circuit. As the decoding counter, a 3-bit flip-flop operating with a divided clock can be used.

  In the case of ASK 10% modulation on the lower side of FIG. 10, it is possible to extract a clock from a carrier during both non-modulation (period) and modulation (period), so that a divided clock can be output. With this divided clock, the 3-bit decoding counter can count from 0 to 7 during 75.52 usec in a 2-bit period. Transmission data can be decoded from the relationship between the count value of the decoding counter and the L level position of the demodulated signal. When the decoding counter when the demodulated signal becomes L level (corresponding to data reception) is 0, when the reception data is 2'b00, and when the decoding counter is 2, the decoding circuit is such that the reception data is 2'b01. Just design.

  On the other hand, in the case of ASK 100% modulation on the upper side of FIG. 10, when the data is modulated, the carrier signal level becomes 0 in the modulation period, and the clock cannot be extracted, so the divided clock is also stopped. For this reason, at the time of ASK 100% modulation, if the 3-bit counter counts up to 6, it shifts to the next data frame. If only the ASK 100% modulation is used, if the 3-bit counter is set to count up from 0 to 6, decoding can be performed from the relationship between the count value and the demodulated signal.

  However, if ASK 10% and ASK 100% are performed by the same decoding circuit, there occurs a problem that the positional relationship between the count value of the 3-bit counter and the L level of the demodulated signal is shifted depending on the modulation degree.

  Next, with reference to FIG. 11, a method of detecting the period (non-modulation period) in which the demodulated signal is at the H level for the same pulse pause encoded data will be described. The period of the divided clock is 9.44 usec as described above.

  In the case of this method, the decoding counter has a 4-bit width. The decoding counter resets to 4'b00 when detecting the L level of the demodulated signal. First, it is assumed that the first data is determined as 2′b00. This is determined by decoding from the first data of the command.

  Next, the period of the H level up to the L level of the second demodulated signal is counted by the decoding counter. In the case of ASK 10% modulation on the lower side of FIG. 11, the counter value of the decoding counter is 9. Here, since the first data is 2′b00 and the count value is 9, it can be seen that the second data is 2′b01. This combination can be discriminated from the coding waveform shown in FIG. If the count value of the decoding counter when the demodulated signal becomes L level is 7, 11, 13, the second data is determined as 2′b00, 2′b10, 2′b11, respectively. In the case of ASK 10% modulation, decoding is possible as described above. However, in the case of ASK 100% modulation on the lower side of FIG. 11, the value of the decoding counter is detected in the same manner as in the method of FIG. Will be different. Decoding is possible with one modulation method, but if a signal with two modulation degrees coexists, problems still occur.

  For this reason, as in Patent Document 1, this problem can be solved by mounting a decoding circuit and a demodulating circuit corresponding to each of different modulation degrees in any of the decoding methods. This method is not preferable because the scale, the chip area, etc. increase, leading to an increase in cost.

In Patent Document 2, in the demodulation circuit for demodulating ASK 100% modulation data, a clock value corresponding to a pause period in which the amplitude of the received radio wave becomes 0 due to modulation and the demodulation clock is interrupted is preset from the demodulation circuit to the counter circuit. Although a technique for enabling normal data demodulation is disclosed, it is necessary to add a preset function of the counter value to the demodulation circuit, so that the power consumption and the logic scale also increase. This causes a technical problem.
JP 2000-172806 A JP 2003-333112 A

An object of the present invention is to reduce power consumption when receiving modulated data accompanying a carrier in a contactless tag.
Another object of the present invention is to provide a technology capable of accurately demodulating modulation data of different modulation schemes in a contactless tag without causing an increase in circuit scale, power consumption, a decrease in communication distance, or the like. There is.

A first aspect of the present invention is a clock extraction means for extracting a clock from a received carrier wave;
Demodulating means for outputting a demodulated signal composed of a logic signal whose logic state changes corresponding to each of the non-modulation period and the modulation period of the carrier;
A frequency dividing means for generating a frequency-divided clock from the clock input from the clock extracting means and suppressing the output of the frequency-divided clock according to the logic state of the demodulated signal;
Decoding means for decoding information contained in the carrier wave using a counter value driven by the divided clock;
A non-contact tag including is provided.

A second aspect of the present invention is to extract a clock from a received carrier wave;
Outputting a demodulated signal composed of a logic signal whose logic state changes corresponding to each of a non-modulation period and a modulation period of the carrier wave;
Suppressing the output of the divided clock according to the logic state of the demodulated signal when generating a divided clock from the clock input from the clock extracting means;
Decoding information contained in the carrier wave using the divided clock count value;
There is provided a method for controlling a non-contact tag including.

A third aspect of the present invention includes a non-contact tag that transmits command information via an ASK modulated carrier wave, and a contactless tag that receives the command information and responds identification information to the access device. A contact ID identification system comprising:
The contactless tag is
Clock extraction means for extracting a clock from the carrier wave received from the access device;
Demodulating means for outputting a demodulated signal composed of a logic signal whose logic state changes corresponding to each of the non-modulation period and the modulation period of the carrier;
A frequency dividing means for generating a frequency-divided clock from the clock input from the clock extracting means and suppressing the output of the frequency-divided clock according to the logic state of the demodulated signal;
Decoding means for decoding command information contained in the carrier wave using a counter value driven by the divided clock;
A non-contact ID identification system including

  According to the present invention described above, for example, by stopping the frequency-divided clock generated from the clock extracted from the carrier wave in the modulation period, it is possible to reduce power consumption during reception.

  Further, for example, in the case of a modulation system in which the clock extracted from the carrier wave is interrupted during the modulation period, such as ASK 100% modulation, and in the modulation system in which the clock extracted from the carrier wave is not interrupted in the modulation period, such as ASK 10% modulation. In any of the modulation schemes, accurate communication information can be obtained by accurately demodulating and decoding the modulated carrier wave.

  In addition, as in Patent Document 1, a demodulator circuit is provided for each of the different modulation schemes, or as in Patent Document 2, a PLL, a counter value preset circuit, and the like are added for the purpose of compensating for a clock interrupted during the modulation period. As in this case, there are no problems such as an increase in circuit scale, power consumption, and a decrease in communication distance.

In the present invention, both the ASK 100% modulation and the ASK 10% modulation have the same L time (the time required for modulation) during a predetermined period, so the clock is stopped even in the ASK 10% modulation.

According to the present invention, it is possible to reduce power consumption when receiving modulated data accompanying a carrier in a non-contact tag.
Further, in a non-contact tag, it is possible to accurately demodulate modulation data of different modulation schemes without causing an increase in circuit scale, power consumption, a decrease in communication distance, or the like.

Hereinafter, embodiments of the present invention will be described in detail with reference to the drawings.
1, 2A and 2B are conceptual diagrams showing an example of the operation of the contactless tag according to one embodiment of the present invention, and FIG. 3 shows an example of the configuration of the contactless tag according to the present embodiment. FIG. 4A, FIG. 4B, and FIG. 4C are block diagrams illustrating in more detail the configuration of a part of the contactless tag of the present embodiment. FIG. 5 is a conceptual diagram showing an example of a configuration of a non-contact ID identification system using the non-contact tag of the present embodiment.

The contactless ID identification system according to the present embodiment includes a contactless tag 100, a reader / writer 200, and an information processing device 300.
The non-contact tag 100 is attached to a moving object such as a luggage 500, for example, and stores unique identification information (ID) therein.

The reader / writer 200 includes an antenna 201, a transmission / reception unit 202, and a control unit 203.
The antenna 201 is used for transmission / reception of a carrier 400 (carrier wave) such as a radio wave with the non-contact tag 100.

  The transmission / reception unit 202 performs modulation processing for placing necessary information on the carrier 400 to be transmitted to the contactless tag 100, processing for reproducing communication information from the carrier 400 coming from the contactless tag 100 by demodulation processing, and the like.

The control unit 203 controls the above-described modulation processing and demodulation processing in the transmission / reception unit 202 based on an instruction from the higher-level information processing device 300.
As a result, the reader / writer 200 exchanges information with the non-contact tag 100 via the carrier 400 such as a radio wave based on a command from the information processing apparatus 300, so that the non-contact tag 100 stores the information. The unique identification information is read and transmitted to the information processing apparatus 300, or the information instructed from the information processing apparatus 300 is written in the non-contact tag 100.

  Based on the unique identification information read from the non-contact tag 100 via the reader / writer 200, the information processing apparatus 300 recognizes the package 500 associated with the non-contact tag 100 and performs a desired process.

  As illustrated in FIG. 3, the contactless tag 100 according to the present embodiment includes an antenna 1, a rectifier 2, a power generation circuit 3, a clock extraction circuit 4, a clock divider circuit 6, a demodulation circuit 8, a modulation circuit 10, A logic circuit 12 and a nonvolatile memory 13 are included.

The non-contact tag 100 can be constituted by, for example, a one-chip LSI (Large Scale Integrated Circuit).
The antenna 1 transmits / receives a carrier 400 such as a radio wave to / from the reader / writer 200. In the example of FIG. 3, the antenna 1 is exemplified as a loop type, but a dipole type or the like may be used depending on the frequency of the carrier 400 used.

The rectifier 2 rectifies the high-frequency current of the carrier 400 received by the antenna 1 and inputs the rectified current to the power generation circuit 3 as a direct current.
The power supply generation circuit 3 distributes the direct current obtained from the rectifier 2 to each component in the non-contact tag 100 as an operating current.

That is, the contactless tag 100 according to the present embodiment is a passive contactless tag that operates by obtaining an operating current from the carrier 400.
The clock extraction circuit 4 extracts the extraction clock 5 necessary for the operation of the contactless tag 100 from the carrier 400.

The clock divider 6 divides the extracted clock 5 to a frequency that is actually used by the logic circuit 12 or the like.
The demodulation circuit 8 demodulates the modulated carrier 400.

The modulation circuit 10 performs a modulation process for causing the carrier 400 to accompany the response information 11 returned from the contactless tag 100 to the reader / writer 200.
The nonvolatile memory 13 is a storage medium such as an FRAM for storing identification information (ID) unique to the contactless tag 100, information received from the reader / writer 200, and the like.

The logic circuit 12 controls the nonvolatile memory 13 and processes transmission / reception data with the reader / writer 200.
The logic circuit 12 includes a counter unit 12a, a decoding unit 12b, and a data processing unit 12c.

The counter unit 12 a is a counter that is incremented by the frequency-divided clock 7 input from the clock frequency dividing circuit 6.
The decoding unit 12b performs a decoding process for obtaining digital information included in the carrier 400 based on the demodulated signal 9 input from the demodulation circuit 8 and the counter value 12a-1 of the counter unit 12a.

In this embodiment, the demodulated signal 9 output from the demodulating circuit 8 is also input to the clock frequency dividing circuit 6, and the operation of the clock frequency dividing circuit 6 is controlled by the demodulated signal 9.
FIG. 1 illustrates operations of the clock extraction circuit 4, the clock frequency dividing circuit 6, and the demodulation circuit 8 according to the modulation waveform of the carrier 400.

  In the case of the present embodiment, the demodulated signal 9 that is the output of the demodulating circuit 8 is a logic signal, and outputs an H level when the carrier 400 from the reader / writer 200 is not modulated and an L level when modulated.

  When the carrier 400 from the reader / writer 200 is not modulated (non-modulation period 400b), the demodulated signal 9 output from the demodulation circuit 8 outputs an H level. The clock extraction circuit 4 extracts a 13.56 MHz clock signal from the carrier 400 as the extraction clock 5. The clock dividing circuit 6 divides the 13.56 MHz extracted clock 5 and outputs a divided clock 7 which is a desired clock. This is the same operation for both ASK 100% modulation and ASK 10% modulation.

When the carrier 400 (modulated data) is received from the reader / writer 200, the demodulating circuit 8 demodulates the modulated data, and outputs an L-level demodulated signal 9 in the modulation period 400a.
Since the carrier 400 is stopped at the time of ASK 100% modulation, the extraction clock 5 that is the output of the clock extraction circuit 4 is also stopped. At this time, whether the output value of the extraction clock 5 stops at the H level or the L level is undefined, but the state may be either.

During ASK 10% modulation, the clock extraction circuit 4 continues to output the extracted 13.56 MHz extraction clock 5 in the same manner as in the case of no modulation.
The clock divider 6 receives the L level of the demodulated signal 9 and resets the divided clock 7 output from the clock divider 6 regardless of ASK 100% modulation or ASK 10% modulation. The output of the frequency-divided clock 7 output from the clock frequency-dividing circuit 6 during reset can be set at either the H level or the L level in accordance with the operation of the non-contact tag 100.

When the carrier 400 from the reader / writer 200 returns to the non-modulation state (non-modulation period 400b), the demodulated signal 9 from the demodulation circuit 8 also becomes H level.
Since the clock extraction circuit 4 is in an unmodulated state, the extracted clock 5 of 13.56 MHz is extracted and output to the clock frequency dividing circuit 6. Since the demodulated signal 9 from the demodulating circuit 8 transitions to the H level, the clock frequency dividing circuit 6 again divides the extracted clock 5 and outputs a desired frequency divided clock 7 to the logic circuit 12. The frequency-divided clock 7 is synchronized with the clock 5 every time the demodulated signal 9 transitions to the H level.

  This is the same operation for both ASK 100% modulation and ASK 10% modulation. The same frequency-divided clock 7 and demodulated signal 9 independent of the degree of modulation are input to the decoding unit 12b of the logic circuit 12 by resetting the demodulated signal 9 of the clock frequency-dividing circuit 6 at the time of modulation for receiving data (modulation period 400a). Thus, the data processing of both modulation degrees can be performed by one decoding unit 12b.

  With the above operation, when the carrier 400 from the reader / writer 200 is stopped (modulation period 400a), it is not necessary to supplement the extraction clock 5 with a PLL or the like, and the relationship between the demodulated signal 9 and the divided clock 7 without depending on the modulation degree. The received signal with the same signal is supplied to the logic circuit 12, and decoding processing becomes possible.

  The demodulation operation of the contactless tag 100 in the case of ISO15693 that supports both ASK100% modulation and ASK10% modulation in the carrier 400 is shown below. The configuration of the non-contact tag 100 is as shown in FIG.

The clock necessary for the operation of the contactless tag 100 is extracted from the carrier 400 (13.56 MHz) by the clock extraction circuit 4.
A clock (main clock) used in the logic circuit 12 uses a divided clock 7 obtained by further dividing the extracted clock 5 output from the clock extracting circuit 4 by the clock dividing circuit 6.

It is assumed that the demodulated signal 9 output from the demodulating circuit 8 transitions to the H level when there is no modulation and to the L level when modulating (when receiving data).
Here, some specific configuration examples of the clock frequency dividing circuit 6 will be exemplified below.

As illustrated in FIG. 4A, the clock frequency dividing circuit 6 of the present exemplary embodiment includes a flip-flop 61 (FF) and a logic gate 62.
The flip-flop 61 includes a clock input terminal CK, a D input terminal D, a Q output terminal Q, an XQ output terminal XQ, an enable input terminal EN, and a reset input terminal CL.

The XQ output terminal XQ outputs a logic signal obtained by inverting the logic of the Q output terminal Q.
The extracted clock 5 is input to the clock input terminal CK. The output of the XQ output terminal XQ is fed back to the D input terminal D, and a frequency-divided clock 7 is output from the Q output terminal Q in synchronization with the extraction clock 5 input to the clock input terminal CK.

The enable input terminal EN controls whether the frequency division operation of the flip-flop 61 is possible by a logic signal (enable signal 21) input to the enable input terminal EN.
The reset input terminal CL initializes the internal state of the flip-flop 61 by a logic signal (reset signal 22) input from the outside to the reset input terminal CL.

  In the case of FIG. 4A, the logic gate 62 performs a logical operation of the enable signal 21 input to the enable input terminal EN of the flip-flop 61 in the clock frequency dividing circuit 6 and the demodulated signal 9, and the logical signal of the operation result The enable signal 21a is input to the enable input terminal EN.

  The arithmetic function of the logic gate 62 that performs the logical operation of the enable signal 21 and the demodulated signal 9 is such that the frequency dividing operation of the flip-flop 61 is stopped when the demodulated signal 9 is at the L level, and the Q output terminal of the flip-flop 61 The logic state of the enable signal 21a is controlled so as to set the frequency-divided clock 7 output from Q to L level (or H level) and output to the enable input terminal EN.

  When the modulation data (carrier 400) is received with such a configuration and the demodulated signal 9 becomes L level (modulation period 400a), the clock frequency dividing circuit 6 stops frequency division and the frequency dividing clock 7 is set to L level (or H level).

  Further, when the demodulated signal 9 becomes the H level (non-modulation period 400 b), the extracted clock 5 that is the output from the clock extracting circuit 4 is again divided and the divided clock 7 is output to the logic circuit 12. That is, every time the demodulated signal 9 changes to the H level, the frequency-divided clock 7 is synchronized.

  Here, in the case of the present embodiment, the clock extraction circuit 4 is not reset at the L level timing of the demodulated signal 9. At a minimum, the clock used in the logic circuit 12 (in this example, the divided clock 7 that is the output of the clock dividing circuit 6) may be reset. If the extracted clock 5 is not used in another analog circuit or the like in the non-contact tag 100, the clock extracting circuit 4 may be reset. When resetting up to the clock extraction circuit 4, it is expected that the power consumption during reception of the modulated data (carrier 400) can be further reduced.

  Another example of the configuration of the clock frequency dividing circuit 6 is shown in FIG. 4B. In the example of FIG. 4B, the reset signal 22 is controlled by the demodulated signal 9 and the logic gate 62 to control the start / stop of the frequency-divided clock 7 according to the logic state of the demodulated signal 9.

  That is, as shown in FIG. 4B, the logic gate 62 performs a logical operation on the reset signal 22 and the demodulated signal 9 input to the reset input terminal CL, and inputs the output (reset signal 22a) to the reset input terminal CL. To do.

  As in the case of FIG. 4A described above, when the demodulated signal 9 becomes L level (modulation period 400a), the clock frequency dividing circuit 6 stops frequency division and resets the frequency divided clock 7 to L level (or H level). To do. When the demodulated signal 9 becomes H level (non-modulation period 400b), the divided clock 7 is output again.

  FIG. 4C shows still another configuration example of the clock frequency dividing circuit 6. In the case of FIG. 4C, a logic gate 62 is interposed in the feedback path from the XQ output terminal XQ to the D input terminal D, and the feedback signal from the XQ output terminal XQ to the D input terminal D depends on the logic state of the demodulated signal 9. To control.

  That is, in the example of FIG. 4C, the logical operation of XQ output from the XQ output terminal XQ and the demodulated signal 9 is performed by the logic gate 62 and input to the D input terminal D. In the logic gate 62, when the demodulated signal 9 becomes L level, the demodulated signal 9 is set to L level (modulation) as in FIGS. 4A and 4B by stopping the input to the D input terminal D when the demodulated signal 9 becomes L level. During the period 400a), the frequency-divided clock 7 can be output as a fixed value of L level or H level.

  With the configuration of the clock frequency dividing circuit 6 in FIGS. 4A to 4C described above, the waveform of the frequency divided clock 7 as shown in FIGS. 2A and 2B is obtained. 2A shows a waveform at the time of ASK 100% modulation, and FIG. 2B shows a waveform at the time of ASK 10% modulation.

  9A and 9B, the respective waveforms are, in order from the top, the modulated carrier waveform (carrier 400) from the reader / writer 200, and the analog demodulated waveform 401 (demodulated signal 9) obtained by demodulating the modulated carrier waveform. , A divided clock 7 divided from the extracted clock 5.

  Since the frequency-divided clock 7 is reset by detecting the L level (modulation period 400a) of the demodulated signal 9, even when ASK 10% modulation is performed in which the extracted clock 5 is not interrupted in the modulation period 400a, the modulated data is received (in the carrier 400). In the modulation period 400a), the frequency-divided clock 7 is stopped as in the ASK 100% modulation.

  As a result, the relationship between the demodulated data (the demodulated signal 9) and the frequency-divided clock 7 that drives the counter unit 12a is the same for both ASK 100% modulation and ASK 10% modulation. It becomes possible to perform a common decoding process based on the counter value 12a-1.

  When data is received during ASK 100% modulation, the carrier 400 stops, so that the extraction clock 5 cannot be extracted, and the frequency-divided clock 7 also stops. Therefore, a waveform as shown in FIG. 2A is inevitably obtained. However, as in the case of ASK 10% modulation in FIG. 2B, the frequency-divided clock 7 is reset when the demodulated signal 9 transitions to the L level when the data of the ASK 100% modulation is received, and when the demodulated signal 9 transitions to the H-level, It is preferable to start the operation of the circuit 6. This is because the frequency-divided clock 7 is synchronized every time modulation data is received, and it is better to perform the same operation without depending on the degree of modulation.

  When the non-contact tag 100 according to the present embodiment that performs such an operation decodes the carrier 400 conforming to the above-mentioned ISO15693 that supports both ASK100% modulation and ASK10% modulation, the above-described prior art FIG. The waveform is as shown in FIG. 6 (this embodiment), and the waveform of FIG. 11 of the prior art is as shown in FIG. 7 (this embodiment).

  That is, FIG. 6 shows a case where decoding (encoding) is performed based on the position of the modulation period 400a (the demodulated signal 9 is at L level) in a 75.52 usec (9.44 × 8) data frame in the carrier 400. Yes. As this method, for example, pulse pause encoding (1 out of 4, 1 out of 256 of ISO15693) is known.

  In this case, 2-bit data is assigned to each data frame, and the individual encoding method is as shown in FIG. Four types of bit patterns 2′b00 to 2′b11 correspond to each of 0, 2, 4, and 6 of the counter value 12a-1 having a 3-bit width, and the decoding unit 12b is based on this correspondence relationship. Thus, decoding is performed based on the L level position of the demodulated signal 9 in the data frame.

  As shown in FIG. 6, in the case of the present embodiment, ASK 100% modulation in which the carrier 400 (extracted clock 5) is interrupted in the modulation period 400a and ASK 10% in which the carrier 400 (extracted clock 5) is not interrupted in the modulation period 400a. In the case of modulation, the operating state of the divided clock 7, that is, the counter value 12a-1, is the same.

  As a result, the decoding results based on the position of the demodulated signal 9 at the L level (modulation period 400a) in the data frame of 75.52 usec (9.44 × 8) are ASK 100% modulation and ASK 10% modulation. Is the same.

  The same applies to a decoding (encoding) method based on a period in which the demodulated signal 9 of the carrier 400 is at the H level (non-modulation period 400b), that is, an interval between two preceding and following modulation periods 400a, as shown in FIG.

  Also in this case, the value of the divided clock 7 (counter value 12a-1) for counting the interval between the two preceding and following modulation periods 400a is the same in the case of ASK 100% modulation and in the case of ASK 10% modulation. The decoding result based on the period in which the signal 9 is at the H level is the same between the case of ASK 100% modulation and the case of ASK 10% modulation.

  As described above, according to the present embodiment, the operation of the demodulated signal 9 and the decoding counter unit 12a (that is, the frequency-divided clock 7) is the same regardless of the data of any modulation degree of ASK 100% modulation and ASK 10% modulation. .

Therefore, it is possible to perform demodulation and decoding processing by the same decoding unit 12b regardless of the encoding (decoding) method and modulation degree in the carrier 400.
As described above, according to the present embodiment, there is no need to provide a clock generation circuit such as a PLL in order to supplement the disruption of the extracted clock 5 extracted from the carrier 400, and the LSI constituting the contactless tag 100 Reduction of chip area, power consumption, etc. of the chip can be realized.

  Further, the decoding processing of the data of 100% modulation of ASK and 10% modulation of ASK can be made completely the same, and there is no need to provide multiple demodulation circuits 8 for each different modulation method, and the LSI chip constituting the non-contact tag 100 Reduction of logic scale, chip area, power consumption, etc. can be realized.

As a result, the manufacturing cost of the non-contact tag 100 can be reduced.
In addition, due to the history of the spread of contactless tags 100 and regulations such as related laws and regulations, different modulation methods are mixed in the same standard, and modulation is performed according to the manufacturing time of reader / writer 200 and the region of use (by country). Even when it is necessary to use different methods, according to the contactless tag 100 of the present embodiment, the internal circuit is complicated as in the conventional case, and performance such as manufacturing cost and power consumption (communication distance) is sacrificed. It is possible to support a plurality of modulation methods as they are.

As a result, the reader / writer 200 can be spread in the international non-contact ID identification system market without being conscious of the manufacturing time of the reader / writer 200.
Further, since the carrier 400 is modulated at the time of receiving a command from the reader / writer 200, the carrier 400 is interrupted or the modulation period 400a in which the amplitude decreases is lengthened, and the received power obtained by the power generation circuit 3 is Will be reduced. At this time, in the case of the present embodiment, the frequency-divided clock 7 is stopped during the modulation period 400a (the demodulated signal 9 is at L level), so that low power consumption during reception by the non-contact tag 100 is realized. be able to.

  In other words, in the case of the present embodiment, the communication possible distance between the non-contact tag 100 and the reader / writer 200 can be increased by reducing the power consumption of the non-contact tag 100 as described above. The application range of the contactless ID identification system using the contactless tag 100 and the contactless tag 100 is expanded.

Needless to say, the present invention is not limited to the configuration exemplified in the above-described embodiment, and various modifications can be made without departing from the spirit of the present invention.
For example, it can be applied to a transponder such as a non-contact IC card instead of a non-contact tag such as an RFID tag.

(Appendix 1)
Clock extraction means for extracting a clock from the received carrier wave;
Demodulating means for outputting a demodulated signal composed of a logic signal whose logic state changes corresponding to each of the non-modulation period and the modulation period of the carrier;
A frequency dividing means for generating a frequency-divided clock from the clock input from the clock extracting means and suppressing the output of the frequency-divided clock according to the logic state of the demodulated signal;
Decoding means for decoding information contained in the carrier wave using a counter value driven by the divided clock;
A non-contact tag characterized by including.
(Appendix 2)
In the non-contact tag according to appendix 1,
The non-contact tag, wherein the decoding means decodes the information by detecting a position of the modulation period in a data frame having a predetermined time width based on a value of the counter.
(Appendix 3)
In the non-contact tag according to appendix 1,
The non-contact tag, wherein the decoding means decodes the information by detecting a length of the non-modulation period based on a value of the counter.
(Appendix 4)
In the non-contact tag according to appendix 1,
The carrier carries the information at either the modulation rate of 100% or the modulation rate of 10%, and the same information is transmitted from the counter at both the modulation rate of 100% and the modulation rate of 10%. A contactless tag, characterized by matching value transitions.
(Appendix 5)
In the tag described in Appendix 1,
The carrier wave carries the information by either 100% amplitude modulation or 10% amplitude modulation, the amplitude is modulated by the 100% amplitude modulation, and the amplitude is modulated by the 10% amplitude modulation. The tag is characterized in that the divided clock output is inhibited during a period of time.
(Appendix 6)
In the non-contact tag according to appendix 1,
The frequency dividing means performs logical operation on the demodulated signal and the enable signal, a flip-flop that outputs the frequency-divided clock from the Q terminal by inputting the clock and returning the output from the XQ terminal to the D terminal. The contactless tag includes an input logic gate at an enable (EN) terminal of the flip-flop, and stops the divided clock according to the logic state of the demodulated signal.
(Appendix 7)
In the non-contact tag according to appendix 1,
The frequency dividing means receives the clock, and feeds back the output from the XQ terminal to the D terminal to output the frequency-divided clock from the Q terminal; the flip-flop clear signal; and the demodulated signal; And a logic gate that performs a logical operation on the clear (CL) terminal of the flip-flop and stops the frequency-divided clock according to the logic state of the demodulated signal.
(Appendix 8)
In the non-contact tag according to appendix 1,
The frequency dividing means receives the clock, feeds back the output from the XQ terminal to the D terminal, and outputs the frequency-divided clock from the Q terminal, and outputs the XQ terminal and the demodulated signal. A contactless tag, comprising: a logic gate that performs a logical operation and inputs to a D terminal of the flip-flop, and stops the divided clock according to a logic state of the demodulated signal.
(Appendix 9)
In the non-contact tag according to appendix 1,
The non-contact tag is a passive non-contact tag further including a rectifying means for extracting DC power from the carrier wave.
(Appendix 10)
Extracting a clock from the received carrier;
Outputting a demodulated signal composed of a logic signal whose logic state changes corresponding to each of a non-modulation period and a modulation period of the carrier wave;
Suppressing the output of the divided clock according to the logic state of the demodulated signal when generating a divided clock from the clock input from the clock extracting means;
Decoding information contained in the carrier wave using the divided clock count value;
A method for controlling a contactless tag, comprising:
(Appendix 11)
In the non-contact tag control method according to attachment 10,
In the step of decoding the information,
A method of controlling a contactless tag, wherein the information is decoded by detecting a position of the modulation period in a data frame having a predetermined time width based on the count value.
(Appendix 12)
In the non-contact tag control method according to attachment 10,
In the step of decoding the information,
A method of controlling a contactless tag, wherein the information is decoded by detecting the length of the modulation period based on the count value.
(Appendix 13)
In the non-contact tag control method according to attachment 10,
The carrier carries the information with either the modulation rate 100% or the modulation rate 10%,
In the step of decoding the information, the non-contact tag control is characterized in that, for the same information, the transition of the counter value coincides at both the modulation rate of 100% and the modulation rate of 10%. Method.
(Appendix 14)
A contactless ID identification system comprising: an access device that transmits command information via an ASK modulated carrier; and a contactless tag that receives the command information and responds identification information to the access device,
The contactless tag is
Clock extraction means for extracting a clock from the carrier wave received from the access device;
Demodulating means for outputting a demodulated signal composed of a logic signal whose logic state changes corresponding to each of the non-modulation period and the modulation period of the carrier;
A frequency dividing means for generating a frequency-divided clock from the clock input from the clock extracting means and suppressing the output of the frequency-divided clock according to the logic state of the demodulated signal;
Decoding means for decoding command information contained in the carrier wave using a counter value driven by the divided clock;
A non-contact ID identification system comprising:
(Appendix 15)
In the non-contact ID identification system according to attachment 14,
The access device transmits the command information by modulating the carrier wave at a modulation rate of 100% or a modulation rate of 10%.
(Appendix 16)
In the non-contact ID identification system according to attachment 14,
The non-contact ID identification system, wherein the decoding means decodes the information by detecting a position of the modulation period in a data frame having a predetermined time width based on a value of the counter.
(Appendix 17)
In the non-contact ID identification system according to attachment 14,
The non-contact ID identification system, wherein the decoding means decodes the information by detecting a length of the non-modulation period based on a value of the counter.

It is a conceptual diagram which shows an example of an effect | action of the non-contact tag which is one embodiment of this invention. It is a conceptual diagram which shows an example of an effect | action in the case of ASK100% modulation of the non-contact tag which is one embodiment of this invention. It is a conceptual diagram which shows an example of an effect | action in case of ASK10% modulation of the non-contact tag which is one embodiment of this invention. It is a block diagram which shows an example of a structure of the non-contact tag which is one embodiment of this invention. It is the block diagram which illustrated in detail the structure of a part of non-contact tag which is one embodiment of this invention. It is the block diagram which illustrated in detail the structure of a part of non-contact tag which is one embodiment of this invention. It is the block diagram which illustrated in detail the structure of a part of non-contact tag which is one embodiment of this invention. It is a conceptual diagram which shows an example of a structure of the non-contact ID identification system using the non-contact tag which is one embodiment of this invention. It is a timing chart which shows an example of the effect | action in the pulse-pause encoding of the non-contact tag which is one embodiment of this invention. It is a timing chart which shows an example of the effect | action in the pulse interval encoding of the non-contact tag which is one embodiment of this invention. It is a wave form diagram which shows an example of the coding waveform used with the non-contact ID identification system containing the non-contact tag which is one embodiment of this invention. It is a conceptual diagram which shows the effect | action in the case of ASK100% modulation of the conventional non-contact tag. It is a conceptual diagram which shows the effect | action in the case of ASK10% modulation of the conventional non-contact tag. It is a timing chart which shows the effect | action in the pulse-pause encoding of the conventional non-contact tag. It is a timing chart which shows an example of the effect | action in the pulse-pause encoding of the conventional non-contact tag.

Explanation of symbols

DESCRIPTION OF SYMBOLS 1 Antenna 2 Rectifier 3 Power supply generation circuit 4 Clock extraction circuit 5 Extraction clock 6 Clock division circuit 7 Frequency division clock 8 Demodulation circuit 9 Demodulation signal 10 Modulation circuit 11 Response information 12 Logic circuit 12a Counter part 12a-1 Counter value 12b Decoding part 12c Data processing unit 13 Non-volatile memory 21 Enable signal 21a Enable signal 22 Reset signal 22a Reset signal 61 Flip-flop 62 Logic gate 100 Non-contact tag 200 Reader / writer 201 Antenna 202 Transmitter / receiver 203 Control unit 300 Information processing device 400 Carrier 400a Modulation period 400b Non-modulation period 401 Analog demodulated waveform 500 Luggage

Claims (10)

Clock extraction means for extracting a clock from the received carrier wave;
Demodulating means for outputting a demodulated signal composed of a logic signal whose logic state changes corresponding to each of the non-modulation period and the modulation period of the carrier;
A frequency dividing means for generating a frequency-divided clock from the clock input from the clock extracting means and suppressing the output of the frequency-divided clock according to the logic state of the demodulated signal;
Decoding means for decoding information contained in the carrier wave using a counter value driven by the divided clock;
A non-contact tag characterized by including. The contactless tag according to claim 1,
The non-contact tag, wherein the decoding means decodes the information by detecting a position of the modulation period in a data frame having a predetermined time width based on a value of the counter. The contactless tag according to claim 1,
The non-contact tag, wherein the decoding means decodes the information by detecting a length of the non-modulation period based on a value of the counter. The contactless tag according to claim 1,
The carrier wave carries the information at either a modulation rate of 100% or a modulation rate of 10%, and the same information has the value of the counter at both the modulation rate of 100% and the modulation rate of 10%. A contactless tag characterized by matching transitions. The tag according to claim 1, wherein
The carrier wave carries the information by either 100% amplitude modulation or 10% amplitude modulation, the amplitude is modulated by the 100% amplitude modulation, and the amplitude is modulated by the 10% amplitude modulation. The tag is characterized in that the divided clock output is inhibited during a period of time. The contactless tag according to claim 1,
The frequency dividing means performs a logical operation on the demodulated signal and the enable signal, a flip-flop that outputs the frequency-divided clock from the Q terminal by inputting the clock and returning the output from the XQ terminal to the D terminal. The contactless tag includes an input logic gate at an enable (EN) terminal of the flip-flop, and stops the divided clock according to the logic state of the demodulated signal. The contactless tag according to claim 1,
The frequency dividing means receives the clock, and feeds back the output from the XQ terminal to the D terminal to output the frequency-divided clock from the Q terminal; the flip-flop clear signal; and the demodulated signal; And a logic gate that performs a logical operation on the clear (CL) terminal of the flip-flop and stops the frequency-divided clock according to the logic state of the demodulated signal. Extracting a clock from the received carrier;
Outputting a demodulated signal composed of a logic signal whose logic state changes corresponding to each of a non-modulation period and a modulation period of the carrier wave;
Suppressing the output of the divided clock according to the logic state of the demodulated signal when generating a divided clock from the clock input from the clock extracting means;
Decoding information contained in the carrier wave using the divided clock count value;
A method for controlling a contactless tag, comprising: The method of controlling a non-contact tag according to claim 8,
In the step of decoding the information,
A method of controlling a contactless tag, wherein the information is decoded by detecting a position of the modulation period in a data frame having a predetermined time width based on the count value. The method of controlling a non-contact tag according to claim 8,
In the step of decoding the information,
A method of controlling a contactless tag, wherein the information is decoded by detecting the length of the modulation period based on the count value.

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