JP2007101655A - Video display device and broadcast receiver - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To improve a degree of freedom of thermal design. <P>SOLUTION: A groove 121 is formed on the back of a cabinet 12 in which a flat display panel 14 is stored to form a plurality of regions separated across the groove on an internal surface, and a plurality of electric circuits 551, 552, 553 incorporated in the cabinet 12 are arranged in the plurality of regions so as to be thermally separated from each other. <P>COPYRIGHT: (C)2007,JPO&INPIT

Description

  The present invention relates to a video display device and a broadcast receiving device using a flat display panel such as a surface-conduction electron-emitter display (SED).

  As is well known, in recent years, digitalization of television broadcasting has been promoted. For example, in Japan, not only satellite digital broadcasting such as BS (broadcasting satellite) digital broadcasting and 110-degree CS (communication satellite) digital broadcasting but also terrestrial digital broadcasting has been started.

  A television broadcast receiver that receives such a television broadcast tends to be thin and have a large screen. For this reason, flat display panels such as SEDs that use a surface transmission electron-emitting device that emits an electron beam by applying a voltage between two device electrodes have been widely used.

  That is, this flat display panel can emit a fluorescent material by irradiating an electron beam emitted from a surface transmission type electron-emitting device onto a screen in which a fluorescent material is coated on a glass plate. It is utilized that the intensity of can be varied by the time length of the voltage applied to the electron-emitting device.

  Specifically, a large number of electron-emitting devices are arranged in a matrix on a glass plate, and this array is placed so as to face the screen. An image is formed on the screen by applying a voltage pulse having a time length corresponding to the sampling value of the image signal to each electron-emitting device.

  By the way, in such a flat display panel, a portion excluding the screen is accommodated in a case, and this case is magnetic such as a speaker or a transformer that generates magnetism in a cabinet of a video display device including a television vision broadcast receiver. It is assembled with the source. In such a video display device, design is emphasized, there is a strong demand for thinner cabinets, and there is a strong demand for improving the visibility of the appearance, so the degree of freedom in design including thermal control design is inferior. Have a problem.

  Therefore, as a video display device, a plate-like member is arranged in the middle of the hollow frame, a thick circuit is mounted on the plate-like member, and a thin circuit is mounted on the hollow frame so as to reduce the thickness. What was comprised is proposed (for example, refer patent document 1).

In addition, the video display device is configured such that a partition is provided in a chassis of the device, and a circuit board is disposed between the partition walls and thermally separated to perform thermal control (for example, see Patent Document 2). ), And a configuration in which wiring paths are formed on the lower left and right sides of the T-shaped main body portion of the lower cabinet so that the wiring can be easily changed (see, for example, Patent Document 3).
Japanese Patent Laid-Open No. 2003-216057 JP-A-11-242442 JP 2004-109396 A

  However, Patent Document 1 only discloses a thinned structure using a hollow frame, and Patent Document 2 discloses a thermal separation structure in which a partition is provided in a chassis and thermally separated for each circuit board. Patent Document 3 only discloses a wiring processing configuration that allows easy wiring change.

  The present invention has been made in view of the above circumstances, and an object thereof is to provide a video display device and a broadcast receiving device which can improve the degree of freedom in thermal design with a simple configuration.

  The present invention relates to a flat display panel that displays an image based on a video signal, a cabinet in which the flat display panel is accommodated, and a cabinet provided with a groove that separates an inner surface into a plurality of regions on the back surface, and the flat display A first circuit unit disposed in any one of a plurality of regions separated by a groove in the cabinet on the back side of the display panel, and a groove in the cabinet on the back side of the flat display panel The video display device is configured to include a second circuit unit that is disposed in another region of the plurality of regions and is thermally separated from the first circuit unit.

  The present invention also provides a broadcast signal receiving means for receiving a broadcast signal, a processing means for restoring a video signal from the received broadcast signal, a flat display panel for displaying a video based on the video signal, One of a cabinet in which a flat display panel is accommodated and a rear surface provided with a groove for separating an inner surface into a plurality of regions, and a plurality of regions separated by a groove in the cabinet behind the flat display panel The first circuit unit disposed in the other area and the other part of the plurality of areas separated by the groove of the cabinet on the rear side of the flat display panel, and thermally coupled with the first circuit unit And a second circuit unit arranged separately from each other to form a broadcast receiving apparatus.

  According to the above configuration, the first and second circuit units are disposed in different areas separated by the groove on the back surface inside the cabinet in which the flat display panel is accommodated, so that the mutual thermal connection is achieved. To be separated. Therefore, the first and second circuit parts are prevented from being affected by heat from the other, and the heat control gap in the cabinet is kept to a minimum, and high-accuracy heat control is possible respectively. Thus, the degree of freedom in thermal design is increased.

  As described above, according to the present invention, it is possible to provide a video display device and a broadcast receiving device that can improve the degree of freedom in thermal design with a simple configuration.

  Hereinafter, embodiments of the present invention will be described in detail with reference to the drawings.

  FIG. 1 shows a state in which a television broadcast receiver 11 described in the embodiment of the present invention is viewed from the front side, and mainly includes a thin cabinet 12 and a support base 13 that supports the cabinet 12. Composed.

  Of these, the cabinet 12 is provided with a flat display panel 14 such as an SED at the front center. In addition, the cabinet 12 is provided with a receiving unit 18 for receiving operation information sent from the speaker 15, the operation unit 16, and the wireless remote controller 17 on both sides of the flat display panel 14.

  On the other hand, the support 13 is pivotally connected to the center of the bottom surface of the cabinet 12 so that the cabinet 12 is supported upright while being placed on a horizontal surface of a predetermined base 19. Configured.

  FIG. 2 schematically shows a signal processing system of the television broadcast receiver 11. Various circuit blocks constituting the signal processing system are mainly disposed in the cabinet 12 at a position close to the back surface, that is, around the back side of the flat display panel 14.

  The digital television broadcast signal received by the digital television broadcast receiving antenna 20 is supplied to the tuner unit 22 via the input terminal 21. The tuner unit 22 selects and demodulates a signal of a desired channel from the input digital television broadcast signal. Then, the signal output from the tuner unit 22 is supplied to the decoder unit 23 and, for example, subjected to MPEG (moving picture experts group) 2 decoding processing, and then supplied to the selector 24.

  Further, the analog television broadcast signal received by the analog television broadcast receiving antenna 25 is supplied to the tuner unit 27 via the input terminal 26. The tuner unit 27 selects and demodulates a signal of a desired channel from the input analog television broadcast signal. The signal output from the tuner unit 27 is digitized by an A / D (analog / digital) conversion unit 28 and then output to the selector 24.

  The analog video and audio signals supplied to the analog signal input terminal 29 are supplied to the A / D converter 30 and digitized, and then output to the selector 24. Further, the digital video and audio signals supplied to the digital signal input terminal 31 are supplied to the selector 24 as they are.

  The selector 24 selects one of the four types of input digital video and audio signals and supplies it to the signal processing unit 32. The signal processing unit 32 performs predetermined signal processing on the input digital video signal, and then outputs it to the video display unit 33 including the flat display panel 14. The video display unit 33 drives the flat display panel 14 based on the input video signal to display a video. The signal processing unit 32 performs audio signal reproduction by performing predetermined signal processing on the input digital audio signal, converting it to analog, and outputting the analog signal to the speaker 15.

  Here, in the television broadcast receiver 11, various operations including the various reception operations described above are comprehensively controlled by the control unit 34. The control unit 34 incorporates a CPU (central processing unit) and the like, and receives operation information from the operation unit 16 or operation information transmitted from the remote controller 17 via the reception unit 18. Each unit is controlled so that the operation content is reflected.

  In this case, the control unit 34 mainly includes a ROM (read only memory) 35 storing a control program executed by the CPU, a RAM (random access memory) 36 for providing a work area to the CPU, A nonvolatile memory 37 in which setting information, control information, and the like are stored is used.

  FIG. 3 shows details of the video display unit 33. The video display unit 33 includes the flat display panel 14, a voltage pulse application unit 38, and a scanning unit 39. Among these, the flat display panel 14 includes a plurality of horizontal lines 40, a plurality of vertical lines 41 intersecting the plurality of horizontal lines 40, and intersections of the plurality of horizontal lines 40 and the plurality of vertical lines 41. , Each of which is composed of a plurality of surface-conduction type electron-emitting devices 42 each having a scanning electrode connected to a horizontal line 40 and a signal electrode connected to a vertical line 41, and a screen to be described later.

  The electron-emitting device 42 generates an electron discharge when the potential applied between the signal electrode and the scanning electrode exceeds the threshold, and can excite the phosphor on the opposing screen to emit light. In this case, color display is possible by arranging red, green, and blue phosphors alternately.

  Further, the voltage pulse applying unit 38 samples one horizontal scanning period of the RBG video signal supplied from the signal processing unit 32 by the clock CK 1 and holds it in the line memory 43. The sampling value for one line of the video signal held in the line memory 43 performs an operation of outputting a pulse width modulation signal to be described later in the next horizontal scanning period. Therefore, the sampling value is stored in the line memory 44 in accordance with the timing of the latch pulse DL. Latched and supplied to one input terminal of comparators 451, 452, 453,..., 45n prepared for each video sampling value.

  On the other hand, the voltage pulse applying unit 38 is provided with a 10-bit counter 46. The counter 46 counts up the clock CK2 and is initialized by the reset signal R, thereby cyclically counting 10-bit values from 0 to 1023 for each horizontal scanning period. And the count value of this counter 46 is supplied to the other input terminal of each comparator 451,452,453, ..., 45n.

  Each of these comparators 451 to 45n compares the video sampling value from the line memory 44 with the count value of the counter 46, and outputs an H (high) level when the count value of the counter 46 is smaller than the video sampling value. When the count value of the counter 46 exceeds the video sampling value, the L (low) level is output.

  The outputs of the comparators 451 to 45n are supplied to output buffer amplifiers 471 to 47n, respectively. These output buffer amplifiers 471 to 47n output the reference voltage Vref when the outputs of the corresponding comparators 451 to 45n are at the H level.

  Thereby, as will be described in detail later, each of the output buffer amplifiers 471 to 47n outputs a pulse width modulation signal having a voltage level of the reference voltage Vref and a pulse width corresponding to the video sampling value. It is supplied to each vertical line 41 of the panel 14.

  On the other hand, the scanning unit 39 has a shift register 49. The shift register 49 includes a plurality of output terminals corresponding to the horizontal lines 40 of the flat display panel 14. Each time the horizontal synchronization pulse HP is input, the H level is sequentially shifted and output from the plurality of output terminals. The shift register 49 is reset by the vertical synchronization pulse VP.

  The outputs of the shift register 49 are supplied to buffer amplifiers 501 to 50m, respectively. These buffer amplifiers 501 to 50m output a constant negative potential Vyon when the output of the shift register 49 is at the H level. Then, the outputs of the buffer amplifiers 501 to 50 m are supplied to the horizontal lines 40 of the flat display panel 14.

  FIG. 4 shows an enlarged view of one of the surface conduction electron-emitting devices 42. That is, the scanning electrode 422 and the signal electrode 423 are formed on the glass substrate 421, and the scanning electrode 422 and the signal electrode 423 are connected to the electron emission portion 425 formed by the energization forming process via the conductive thin film 424. Connected. Reference numeral 426 denotes a thin film formed by energization activation processing.

  As described above, the plurality of electron-emitting devices 42 are arranged on the glass substrate 421. An acceleration voltage application screen 51 is arranged at a predetermined interval so as to face the arrangement surface of the plurality of electron-emitting devices 42. The screen 51 is obtained by providing a metal back 513 on a glass substrate 511 via phosphors 512 corresponding to RGB.

  When a voltage E1 is applied between the scanning electrode 422 and the signal electrode 423, electrons are emitted from the electron emission portion 425. The emitted electrons are attracted to the screen 51 side by the high level acceleration voltage E2 generated by the power source 52 interposed between the metal back 513 of the screen 51 and the scanning electrode 422, and collide with the phosphor 512. To emit light.

  In this case, the power supply 52 is configured such that the level of the generated acceleration voltage E2 is variable based on the voltage control signal output from the control unit 34. The control unit 34 outputs a voltage control signal corresponding to the set brightness when the user performs an operation of setting the brightness of the display image on the flat display panel 14. That is, the acceleration voltage E2 is varied according to the brightness of the display image set by the user.

  5A to 5I show the pulse width modulation operation in the voltage pulse applying unit 38. FIG. Here, a pulse width modulation operation for one horizontal scanning period will be described. FIG. 5A shows the horizontal synchronization signal HD. FIG. 5B shows the clock CK <b> 2 given to the counter 46. FIG. 5C shows the count value of the counter 46 in the form of a triangular wave with the vertical axis representing a decimal value.

  Waveforms a to a + 4 shown in FIGS. 5D to 5H indicate the output buffer amplifiers 471 to 471 when the video sampling value output from the line memory 44 is a, a + 1,..., A + 4. The pulse width modulation signals obtained from 47n are shown respectively. FIG. 5I shows the i-th potential of the horizontal line 40 in FIG. The shift register 49 is selectively turned on one by one in order from the top in accordance with the horizontal synchronizing pulse HP, and a negative pulse with an amplitude Vyon is output for one horizontal scanning period.

  As shown in FIG. 5D, when the count value of the counter 46 is smaller than the video sampling value a, the comparators 451 to 45n output the H level, and the output buffer amplifiers 471 to 47n are signals having the amplitude of the reference voltage Vref. Is output. When the count value of the counter 46 exceeds the video sampling value a, the outputs of the comparators 451 to 45n become L level, and the outputs of the output buffer amplifiers 471 to 47n fall to the ground level. Thereby, a modulated signal having a pulse width corresponding to the video sampling value a is obtained.

  Similarly, when the video sampling value output from the line memory 44 is a + 1, a modulation signal having a pulse width longer by one cycle of the clock CK2 is obtained, and the video sampling values output from the line memory 44 are a + 2, a + 3. , A + 4,..., The pulse width is determined according to the value.

  As a result, a pulse width modulation signal having a pulse width (pulse width corresponding to gradation expression) proportional to the sampling value of the video signal held in the line memory 44 is obtained from the output buffer amplifiers 471 to 47n. The pulse width modulation signals output from the output buffer amplifiers 471 to 47n are supplied to the vertical line 41.

  In this manner, when a negative voltage Vyon is applied to a predetermined selected horizontal line 40 during a period in which a pulse width modulation signal for one horizontal scanning period is supplied to the vertical line 41, the horizontal line 40 A voltage level of Vref + Vyon is applied to each electron-emitting device 42 connected to.

  For this reason, each electron-emitting device 42 emits electrons for a time corresponding to the pulse width modulation signal, and the phosphor 512 emits light with a luminance corresponding to the time. As a result, an image for one horizontal scan is displayed.

  Here, in this embodiment, as described above, the power is generated by the power supply 52 interposed between the metal back 513 of the screen 51 and the scanning electrode 422 according to the brightness of the display image set by the user. By varying the acceleration voltage E2, the brightness of the display image on the flat display panel 14 is varied. In this case, the brightness of the display image is controlled to be darker because electrons are not attracted to the screen 51 as the acceleration voltage E2 is lowered.

  FIG. 6 shows the configuration of the back side of the cabinet 12 in which the flat display panel 14 is accommodated. That is, a groove 121 that separates the inner surface of the cabinet 12 into a plurality of circuit arrangement regions is formed on the rear surface of the cabinet 12. The groove 121 is formed such that an intermediate portion thereof is bent, for example, in a crank shape, and a plurality of external connection terminals 53 such as an AV connection terminal and an antenna terminal are disposed on the groove side wall. A wiring cable connected to an external device (not shown) is selectively connected to the external connection terminals 53 using the grooves 121 of the cabinet 12.

  In the cabinet 12, a circuit board 54 is arranged in parallel with the flat display panel 14. The circuit board 54 includes electric circuits 551 and 552 which are first circuit parts such as a transformer and a power supply circuit of the speaker 15 constituting the signal processing system of the television broadcast receiver 11, and a second circuit part. A certain electric circuit 553 is mounted separately on the groove 121.

  As a result, the plurality of electric circuits 551 and 552 and the electric circuit 553 housed in the cabinet 12 are thermally separated into different regions across the groove 121 in the cabinet 12 and receive heat from the other. This eliminates the need for independent thermal control and increases the degree of freedom in thermal design. As a result, the thermal control gap in the cabinet 12 can be easily minimized.

  In particular, by arranging the circuits that generate a large amount of heat separately in the cabinet 12 with the groove 121 interposed therebetween, heat concentration is prevented, so that the heat control structure can be simplified and the cabinet 12 is thin. It is possible to easily promote the conversion. Further, when the heat generation amount of the electric circuit 553 is larger than the heat generation amounts of the electric circuits 551 and 552, heat transfer from the electric circuit 553 is blocked by the groove 121, and the circuit characteristics of the electric circuits 551 and 552 are obtained. Therefore, it is possible to simplify the thermal control structure and promote the reduction in thickness.

  Then, a cover member 56 is attached to the groove 121 on the back surface of the cabinet 12 with the wiring cable (not shown) connected to the external connection terminal 53 as shown in FIG. 7, for example. Blocked. As a result, the above-described wiring cable (not shown) connected to the external connection terminal 53 is not exposed on the back side of the cabinet 12, thereby improving the visibility of the appearance.

  As described above, the television broadcast receiver 11 is provided with the groove 121 on the back surface of the cabinet 12 in which the flat display panel 14 is accommodated, and forms a plurality of regions separated by sandwiching the groove 121 on the inner surface. The plurality of electric circuits 551, 552, and 553 installed in the cabinet 12 are arranged in the plurality of regions so as to be thermally separated from each other.

  According to this, it becomes possible to effectively prevent the heat influence on the other due to the heat generation of the electric circuits 551 and 552 and the electric circuit 553 arranged in the cabinet 12 and to prevent heat concentration in the cabinet 12. As a result, heat can be dispersed. As a result, for example, circuit portions having different heat resistance characteristics can be arranged so as to enable high-precision thermal control while keeping the gap in the cabinet 12 to a minimum, so that the degree of freedom in thermal design is increased. Therefore, the thinning can be easily promoted.

  A plurality of external connection terminals 53 are arranged in the groove 121 of the cabinet 12. This further enables wiring connection with the external device (not shown) using the inside of the groove 121 as a wiring path, and simplifies the wiring process and improves the visibility of the appearance.

  In the above embodiment, the case has been described in which the groove 121 bent in a crank shape is formed on the back surface of the cabinet 12, but the present invention is not limited to this groove shape, and various shapes are formed. It is possible to expect similar effects.

  In the above-described embodiment, the case where the electric circuits 551, 552, and 553 are configured to be mounted on one circuit board 54 has been described. It is also possible to arrange each circuit board, mount an electric circuit on each circuit board, and electrically connect the boards with a flexible board or the like.

  Further, in the above-described embodiment, the SED is described as an example of the flat display panel 14, but the present invention is not limited to this, and may be applied to various flat display panels such as a plasma display and a liquid crystal display. It is possible and the same effect is expected.

  Further, the present invention is not limited to the above-described embodiment as it is, and can be embodied by variously modifying the constituent elements without departing from the scope of the invention in the implementation stage. Various inventions can be formed by appropriately combining a plurality of constituent elements disclosed in the above-described embodiments.

  For example, some components may be deleted from all the components shown in the embodiment. Furthermore, constituent elements according to different embodiments may be appropriately combined.

It is the top view shown in order to demonstrate the external appearance of the television broadcast receiver with which one embodiment of this invention is applied. It is a block block diagram shown in order to demonstrate the signal processing system of the television broadcast receiver in FIG. It is a block block diagram shown in order to demonstrate the detail of the video display part of the television broadcast receiver in FIG. FIG. 4 is a side cross-sectional view for explaining details of an electron-emitting device used in the video display unit of FIG. 3. FIG. 4 is a timing diagram for explaining the operation of the voltage pulse application unit of the video display unit in FIG. 3. It is a perspective view shown in order to demonstrate the arrangement configuration of the back surface of the cabinet of FIG. FIG. 7 is a perspective view showing a state where a cover member is attached to the groove of FIG. 6.

Explanation of symbols

  DESCRIPTION OF SYMBOLS 11 ... Television broadcasting receiver, 12 ... Cabinet, 121 ... Groove, 13 ... Support stand, 14 ... Flat panel display, 15 ... Speaker, 16 ... Operation part, 17 ... Remote controller, 18 ... Reception part, 19 ... Base 20 ... Antenna, 21 ... Input terminal, 22 ... Tuner, 23 ... Decoder, 24 ... Selector, 25 ... Antenna, 26 ... Input terminal, 27 ... Tuner, 28 ... A / D converter, 29 ... Input Terminals, 30 ... A / D converter, 31 ... Input terminal, 32 ... Signal processing unit, 33 ... Video display unit, 34 ... Control unit, 35 ... ROM, 36 ... RAM, 37 ... Non-volatile memory, 38 ... Voltage pulse Application unit 39... Scanning unit 40... Horizontal line 41. Vertical line 42. Electron emitting element 421 Glass substrate 43 and 44 Line memory 451 to 45n Comparator 46. Unter, 471-47n ... Output buffer amplifier, 49 ... Shift register, 501-50m ... Buffer amplifier, 51 ... Screen, 511 ... Glass substrate, 512 ... Phosphor, 52 ... Power source, 53 ... External connection terminal, 54 ... Circuit board , 551, 552, 553... Electric circuit, 56... Cover member.

Claims (4)

A flat display panel for displaying video based on video signals;
A cabinet provided with a groove for separating the inner surface into a plurality of regions on the back surface, in which the flat display panel is accommodated,
A first circuit unit disposed in any one of a plurality of regions separated by a groove of the cabinet on the rear side of the flat display panel;
A second circuit unit disposed in another region of the plurality of regions separated by the groove of the cabinet on the rear side of the flat display panel and thermally separated from the first circuit unit; ,
An image display device comprising:   The video display device according to claim 1, wherein an external connection terminal is disposed in the groove of the cabinet.   3. The video display device according to claim 1, wherein a cover member is attached to the groove of the cabinet. Broadcast signal receiving means for receiving a broadcast signal;
Processing means for restoring a video signal from the received broadcast signal;
A flat display panel for displaying video based on the video signal;
A cabinet provided with a groove for separating the inner surface into a plurality of regions on the back surface, in which the flat display panel is accommodated,
A first circuit unit disposed in any one of a plurality of regions separated by a groove of the cabinet on the rear side of the flat display panel;
A second circuit unit disposed in another region of the plurality of regions separated by the groove of the cabinet on the rear side of the flat display panel and thermally separated from the first circuit unit; ,
A broadcast receiving apparatus comprising:

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