JP2007098565A5 - - Google Patents
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- JP2007098565A5 JP2007098565A5 JP2006229501A JP2006229501A JP2007098565A5 JP 2007098565 A5 JP2007098565 A5 JP 2007098565A5 JP 2006229501 A JP2006229501 A JP 2006229501A JP 2006229501 A JP2006229501 A JP 2006229501A JP 2007098565 A5 JP2007098565 A5 JP 2007098565A5
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- layer
- forming
- opening
- structural
- structural layer
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- 238000004519 manufacturing process Methods 0.000 claims 11
- 239000000758 substrate Substances 0.000 claims 8
- 239000004065 semiconductor Substances 0.000 claims 6
- 239000010409 thin film Substances 0.000 claims 6
- 239000010408 film Substances 0.000 claims 5
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 claims 3
- 229910052710 silicon Inorganic materials 0.000 claims 3
- 239000010703 silicon Substances 0.000 claims 3
- 229910052751 metal Inorganic materials 0.000 claims 2
- 239000002184 metal Substances 0.000 claims 2
- RUFLMLWJRZAWLJ-UHFFFAOYSA-N Nickel silicide Chemical compound [Ni]=[Si]=[Ni] RUFLMLWJRZAWLJ-UHFFFAOYSA-N 0.000 claims 1
- 239000000956 alloy Substances 0.000 claims 1
- 229910052782 aluminium Inorganic materials 0.000 claims 1
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminum Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 claims 1
- 229910021417 amorphous silicon Inorganic materials 0.000 claims 1
- 239000003990 capacitor Substances 0.000 claims 1
- 239000003822 epoxy resin Substances 0.000 claims 1
- 239000000463 material Substances 0.000 claims 1
- 229910044991 metal oxide Inorganic materials 0.000 claims 1
- 150000004706 metal oxides Chemical class 0.000 claims 1
- ZOKXTWBITQBERF-UHFFFAOYSA-N molybdenum Chemical compound [Mo] ZOKXTWBITQBERF-UHFFFAOYSA-N 0.000 claims 1
- 229910052750 molybdenum Inorganic materials 0.000 claims 1
- 239000011733 molybdenum Substances 0.000 claims 1
- 229910021334 nickel silicide Inorganic materials 0.000 claims 1
- 239000011368 organic material Substances 0.000 claims 1
- 229910021420 polycrystalline silicon Inorganic materials 0.000 claims 1
- 229920000647 polyepoxide Polymers 0.000 claims 1
- 238000000926 separation method Methods 0.000 claims 1
- RTAQQCXQSZGOHL-UHFFFAOYSA-N titanium Chemical compound [Ti] RTAQQCXQSZGOHL-UHFFFAOYSA-N 0.000 claims 1
- 229910052719 titanium Inorganic materials 0.000 claims 1
- 239000010936 titanium Substances 0.000 claims 1
- WFKWXMTUELFFGS-UHFFFAOYSA-N tungsten Chemical compound [W] WFKWXMTUELFFGS-UHFFFAOYSA-N 0.000 claims 1
- 229910052721 tungsten Inorganic materials 0.000 claims 1
- 239000010937 tungsten Substances 0.000 claims 1
Claims (11)
前記剥離層上の第一の領域に第一の構造層を形成し、
前記第一の構造層を覆って第一の絶縁層を形成し、
前記第一の構造層が露出するように、前記第一の絶縁層に第一の開口を形成し、
前記第一の絶縁層上の第二の領域に第二の構造層を形成し、
前記第一の絶縁層、前記第一の開口、及び前記第二の構造層を覆うように第二の絶縁層を形成し、
前記第一の構造層及び前記第二の構造層が露出するように、前記第二の絶縁層に第二の開口及び第三の開口をそれぞれ形成し、
前記剥離層を除去し、
前記第二の開口及び前記第三の開口を介して前記第一の構造層と前記第二の構造層との少なくとも一部が互いに重なるように屈曲させることを特徴とする微小電気機械式装置の作製方法。 Forming a release layer,
Forming a first structural layer in a first region on the release layer;
Forming a first insulating layer covering the first structural layer;
Before SL so that the first structural layer is exposed, forming a first opening in said first insulating layer,
Forming a second structural layer in a second region on the first insulating layer;
Forming a second insulating layer so as to cover the first insulating layer, the first opening, and the second structural layer;
Before SL so that the first structural layer and the second structural layer is exposed, the second opening and the third opening are respectively formed on the second insulating layer,
Removing the release layer;
A micro electro mechanical device characterized in that at least a part of the first structure layer and the second structure layer is bent through the second opening and the third opening so as to overlap each other . Manufacturing method.
前記剥離層上の第一の領域に第一の構造層を形成し、
前記剥離層上の第二の領域に半導体層、ゲート絶縁膜、及びゲート電極を有する薄膜トランジスタを形成し、
前記第一の構造層及び前記薄膜トランジスタを覆って第一の絶縁層を形成し、
前記第一の構造層及び前記半導体層が露出するように、前記第一の絶縁層に第一の開口及び第二の開口をそれぞれ形成し、
前記第二の開口を充填するように導電層を形成するとともに、前記第一の絶縁層上の前記第二の領域に第二の構造層を形成し、
前記第一の絶縁層、前記第一の開口、前記導電層、及び前記第二の構造層を覆うように第二の絶縁層を形成し、
前記第一の構造層及び前記第二の構造層が露出するように、前記第二の絶縁層に第三の開口及び第四の開口をそれぞれ形成し、
前記剥離層を除去し、
前記第三の開口及び前記第四の開口を介して前記第一の構造層と前記第二の構造層との少なくとも一部が互いに重なるように屈曲させることを特徴とする微小電気機械式装置の作製方法。 Forming a release layer,
Forming a first structural layer in a first region on the release layer;
Forming a thin film transistor having a semiconductor layer , a gate insulating film, and a gate electrode in a second region on the release layer;
Forming a first insulating layer covering the first structural layer and the thin film transistor ;
Before SL so that the first structural layer and the semiconductor layer is exposed, the first opening and the second opening are respectively formed on the first insulating layer,
Forming a conductive layer to fill the second opening and forming a second structural layer in the second region on the first insulating layer;
Forming a second insulating layer so as to cover the first insulating layer, the first opening, the conductive layer, and the second structural layer;
Before SL so that the first structural layer and the second structural layer is exposed, the third opening and the fourth opening are respectively formed on the second insulating layer,
Removing the release layer;
A microelectromechanical device, wherein the first structural layer and the second structural layer are bent through the third opening and the fourth opening so as to overlap each other . Manufacturing method.
前記剥離層上の第一の領域に第一の構造層を形成し、
前記剥離層上の第二の領域に半導体層、ゲート絶縁膜、及びゲート電極を有する薄膜トランジスタを形成し、
前記第一の構造層及び前記薄膜トランジスタを覆って第一の絶縁層を形成し、
前記第一の構造層及び前記半導体層が露出するように、前記第一の絶縁層に第一の開口及び第二の開口をそれぞれ形成し、
前記第二の開口を充填するように導電層を形成するとともに、前記第一の絶縁層上の前記第二の領域に第二の構造層を形成し、
前記第一の絶縁層、前記第一の開口、前記導電層、及び前記第二の構造層を覆うように第二の絶縁層を形成し、
前記第一の構造層及び前記第二の構造層が露出するように、前記第二の絶縁層に第三の開口及び第四の開口をそれぞれ形成し、
前記剥離層を除去して前記第一の基板を剥離して、少なくとも前記第一の構造層と前記第二の構造層を可とう性を有する第二の基板へ転置し、
前記第三の開口及び前記第四の開口を介して前記第一の構造層と前記第二の構造層との少なくとも一部が互いに重なるように前記第二の基板を屈曲させることを特徴とする微小電気機械式装置の作製方法。 Forming a release layer on the first substrate ;
Forming a first structural layer in a first region on the release layer;
Forming a thin film transistor having a semiconductor layer , a gate insulating film, and a gate electrode in a second region on the release layer;
Forming a first insulating layer covering the first structural layer and the thin film transistor ;
Before SL so that the first structural layer and the semiconductor layer is exposed, the first opening and the second opening are respectively formed on the first insulating layer,
Forming a conductive layer to fill the second opening and forming a second structural layer in the second region on the first insulating layer;
Forming a second insulating layer so as to cover the first insulating layer, the first opening, the conductive layer, and the second structural layer;
Before SL so that the first structural layer and the second structural layer is exposed, the third opening and the fourth opening are respectively formed on the second insulating layer,
Removing the release layer to release the first substrate and transferring at least the first structure layer and the second structure layer to a flexible second substrate;
The second substrate is bent so that at least a part of the first structural layer and the second structural layer overlap with each other through the third opening and the fourth opening. A method for manufacturing a microelectromechanical device.
前記剥離層上の第一の領域に第一の構造層を形成し、
前記剥離層上の第二の領域に半導体層、ゲート絶縁膜、及びゲート電極を有する薄膜トランジスタを形成し、
前記第一の構造層及び前記薄膜トランジスタを覆って第一の絶縁層を形成し、
前記半導体層が露出するように、前記第一の絶縁層に第一の開口を形成し、
前記第一の開口を充填するように導電層を形成するとともに、前記第一の絶縁層上の前記第二の領域に第二の構造層を形成し、
前記第一の絶縁層、前記導電層、及び前記第二の構造層を覆うように第二の絶縁層を形成し、
前記剥離層を除去して前記第一の基板を剥離して、少なくとも前記第一の構造層と前記第二の構造層を第二の開口及び第三の開口が設けられた可撓性を有する第二の基板へ転置し、
前記第二の開口及び前記第三の開口を介して前記第一の構造層と前記第二の構造層との少なくとも一部が互いに重なるように前記第二の基板を屈曲させることを特徴とする微小電気機械式装置の作製方法。 Forming a release layer on the first substrate ;
Forming a first structural layer in a first region on the release layer;
Forming a thin film transistor having a semiconductor layer , a gate insulating film, and a gate electrode in a second region on the release layer;
Forming a first insulating layer covering the first structural layer and the thin film transistor ;
Forming a first opening in the first insulating layer such that the semiconductor layer is exposed ;
Forming a conductive layer to fill the first opening, and forming a second structural layer in the second region on the first insulating layer;
Forming a second insulating layer so as to cover the first insulating layer, the conductive layer, and the second structural layer;
And peeling the first substrate by removing the separation layer comprises at least the first structural layer and the second structural layer of a second opening and a third flexible with an opening at Transpose to the second substrate,
The second substrate is bent through the second opening and the third opening so that at least a part of the first structure layer and the second structure layer overlap each other. A method for manufacturing a microelectromechanical device.
10. The method for manufacturing a micro electro mechanical device according to claim 1, wherein an epoxy resin is used as the second insulating layer.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2006229501A JP4939873B2 (en) | 2005-09-06 | 2006-08-25 | Method for manufacturing micro electromechanical device |
Applications Claiming Priority (3)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2005258072 | 2005-09-06 | ||
JP2005258072 | 2005-09-06 | ||
JP2006229501A JP4939873B2 (en) | 2005-09-06 | 2006-08-25 | Method for manufacturing micro electromechanical device |
Publications (3)
Publication Number | Publication Date |
---|---|
JP2007098565A JP2007098565A (en) | 2007-04-19 |
JP2007098565A5 true JP2007098565A5 (en) | 2009-08-27 |
JP4939873B2 JP4939873B2 (en) | 2012-05-30 |
Family
ID=38026003
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
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JP2006229501A Expired - Fee Related JP4939873B2 (en) | 2005-09-06 | 2006-08-25 | Method for manufacturing micro electromechanical device |
Country Status (1)
Country | Link |
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JP (1) | JP4939873B2 (en) |
Families Citing this family (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN104051357B (en) | 2013-03-15 | 2017-04-12 | 财团法人工业技术研究院 | Environmentally sensitive electronic device and packaging method thereof |
TWI549290B (en) * | 2013-11-12 | 2016-09-11 | 財團法人工業技術研究院 | Foldable package structure |
CN104637886B (en) | 2013-11-12 | 2017-09-22 | 财团法人工业技术研究院 | Folding type packaging structure |
JP6590812B2 (en) * | 2014-01-09 | 2019-10-16 | モーション・エンジン・インコーポレーテッド | Integrated MEMS system |
TWI695525B (en) | 2014-07-25 | 2020-06-01 | 日商半導體能源研究所股份有限公司 | Separation method, light-emitting device, module, and electronic device |
EP3207568A4 (en) * | 2015-04-01 | 2017-09-20 | Goertek Inc. | Transfer method, manufacturing method, device and electronic apparatus of mems |
Family Cites Families (6)
Publication number | Priority date | Publication date | Assignee | Title |
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JPH06296380A (en) * | 1993-04-07 | 1994-10-21 | Nippondenso Co Ltd | Multi-tier type expansible-contractible actuator |
US6225688B1 (en) * | 1997-12-11 | 2001-05-01 | Tessera, Inc. | Stacked microelectronic assembly and method therefor |
US6300679B1 (en) * | 1998-06-01 | 2001-10-09 | Semiconductor Components Industries, Llc | Flexible substrate for packaging a semiconductor component |
JP3443066B2 (en) * | 2000-03-10 | 2003-09-02 | 株式会社国際電気通信基礎技術研究所 | Semiconductor device and manufacturing method thereof |
JP2005161464A (en) * | 2003-12-02 | 2005-06-23 | Advanced Telecommunication Research Institute International | Semiconductor device and its manufacturing method |
US7202552B2 (en) * | 2005-07-15 | 2007-04-10 | Silicon Matrix Pte. Ltd. | MEMS package using flexible substrates, and method thereof |
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2006
- 2006-08-25 JP JP2006229501A patent/JP4939873B2/en not_active Expired - Fee Related
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