JP2007095987A - Method of manufacturing semiconductor wafer and grinding apparatus - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a method of manufacturing a semiconductor wafer and a grinding apparatus which enable even an unskilled operator to easily and positively execute the quantitative tilting/shifting adjustment of grinding stone at the grinding process of a semiconductor wafer. <P>SOLUTION: The semiconductor wafer manufacturing method has a grinding process in which at least raw wafer W is ground with grinding stones 12, 22. The nanotopography of the wafer surface ground in the grinding process is measured, a plurality of nanotopography measurement values on the diameter or the radius of the wafer surface are averaged to obtain an average value components, the correspondence relation between the unevenness quantity of the average value components and tilt adjustment quantity the grinding stones for flattening the unevenness and/or shift quantity thereof is measured to obtain a relational formula, in advance, and tilt adjustment and/or shift adjustment of the grinding stones is executed in grinding processes thereafter based on the relational formula in advance. <P>COPYRIGHT: (C)2007,JPO&INPIT

Description

  The present invention relates to a method for manufacturing a semiconductor wafer and a grinding apparatus, and more particularly to a method for performing tilt adjustment and / or shift adjustment based on a measured value of nanotopography of a wafer surface after a grinding process.

  In semiconductor silicon wafers (hereinafter referred to as “wafers”), the size of the surface waviness component called “nanotopography” has recently become a problem among the wafer shape accuracy. This nanotopography is obtained by extracting the wavelength component of λ = 0.2 to 20 mm from the surface shape of the wafer, which has a shorter wavelength than “sledge” or “Warp” and a longer wavelength than “surface roughness”. Yes, the PV value is an extremely shallow wave of 0.1 to 0.2 μm or less.

  Nanotopography is generally measured by an “optical interference type” measuring instrument (trade name: Nanomapper (ADE Corp.) or Dynasearch (Raytex Co., Ltd.)). FIG. 8 shows an example of measurement. FIG. 8A is a nanotopography map, and the intensity of the nanotopography is qualitatively expressed by the shading. On the other hand, Fig. 8 (b) shows the shape and quantitative intensity of the nanotopography on four cross sections (diameters) measured every 45 °. The peaks and valleys in the graph correspond to the shading of the nanotopography map. . FIG. 9 schematically illustrates the correspondence between the nanotopography map and the nanotopography cross-sectional shape.

  This nanotopography is said to affect the yield of STI (Shallow Trench Isolation) process in device manufacturing. Nanotopography is created during the wafer processing process (slicing to polishing) and is strongly influenced by grinding, particularly double-headed grinding.

  An outline of double-head grinding is schematically shown in FIG. The raw material wafer W (slice wafer) is inserted into a hole having the same diameter as that of a wafer formed in a glass epoxy thin plate (not shown). As shown in FIG. Between the static pressure pads 11 and 21 which are metal thick plates, it hold | maintains so that it may have the clearance gap h of a static pressure pad and a wafer. As shown in FIG. 10 (c), the static pressure pad has lands 13 (bank portions) and pockets 14 (concave portions) on the surface thereof. As shown in FIG. 10 (d), the hydrostatic pressure water is supplied to the pocket 14, thereby holding the wafer W rotatably. As shown in FIG. 10 (c), a part of the hydrostatic pad is cut out, and the grinding wheels 12 and 22 are inserted therein, and the wafer W and the grinding wheels 12 and 22 are inserted as shown in FIG. 10 (b). The wafer W is rotated to grind the wafer W from both the left and right sides simultaneously. During grinding, the wafer W rotates, for example, by pressing a driving roller against an edge portion or by driving a claw at a notch portion.

  During this double-head grinding, warped wafers may be warped due to unbalanced cutting loads on both sides of the wafer. It has been proposed (see, for example, Patent Document 1). A specific example of the method for adjusting the positional relationship between the wafer W and the grindstones 12 and 22 is shown in FIG. One is called “shift adjustment” and is an adjustment for moving the grindstones 12 and 22 in a direction perpendicular to the wafer surface (FIG. 11A), and the other is called “tilt adjustment”. This adjustment is to change the relative angle between the surface and the grindstones 12 and 22 (FIG. 11 (b)).

In the current double-head grinding, the operator adjusts the shift and tilt of the grinding wheel based on the streaks, thickness shape, warp shape of the ground wafer, current values of the left and right grinding wheels during grinding, and measured values of the nanotopography. This is done through experience. Table 1 below shows an example of an adjustment method that is empirically performed.

  However, adjusting the positional relationship between the wafer and the grindstone based on the measured nanotopography in particular requires the experience and intuition of skilled workers, and requires a long adjustment time and a large number of adjustments at the start-up and changeover of the grinding machine. There was a problem of consuming dummy wafers for use.

International Publication No. 00/67950 Pamphlet

  The present invention has been made in view of such problems, and a semiconductor wafer capable of quantitatively simply and reliably adjusting a tilt / shift of a grindstone during a grinding process of a semiconductor wafer quantitatively even by an unskilled worker. An object of the present invention is to provide a manufacturing method and a grinding apparatus.

  The present invention has been made to solve the above-described problems, and is a method for manufacturing a semiconductor wafer, which includes at least a grinding step of grinding a raw material wafer with a grindstone, and a wafer surface ground by the grinding step. The nanotopography is measured, the average value component is obtained by averaging the nanotopography measurement values on a plurality of diameters or radii of the wafer surface, and the unevenness amount of the average value component and the whetstone for flattening the unevenness Measuring a correlation with the tilt adjustment amount and / or the shift adjustment amount to obtain a relational expression in advance, and performing tilt adjustment and / or shift adjustment of the grinding wheel in the subsequent grinding process based on the relational expression obtained in advance. A method of manufacturing a semiconductor wafer is provided (claim 1).

  In this way, if a relational expression between the unevenness amount of the average value component of the nanotopography and the tilt adjustment amount and / or shift adjustment amount of the grindstone for flattening the unevenness is obtained in advance, in the subsequent grinding process Based on the relational expression, even an unskilled worker can quantitatively easily and reliably perform tilt adjustment and / or shift adjustment quantitatively without consuming a great deal of adjustment time and adjustment dummy wafers. .

  In this case, it is preferable that the grinding step is a double-headed grinding step.

  Nanotopography is created during the wafer processing process (slicing to polishing), and is particularly affected by double-headed grinding. By adjusting the double-headed grinding process according to the present invention, the nanotopography of the wafer is further improved. be able to.

  The nanotopography measurement values on a plurality of diameters or radii of the wafer surface are preferably nanotopography measurement values on four diameters or radii of the wafer surface or on eight diameters or radii. Item 3).

  In this manner, tilt adjustment and / or shift adjustment can be easily and accurately performed using the nanotopography measurement values on the four diameters or radii of the wafer surface or on the eight diameters or radii.

  Further, by measuring the correlation with the tilt adjustment amount and / or the shift adjustment amount of the grindstone, the unevenness amount of the average value component obtained in advance by the relational expression is calculated as follows: (Claim 4).

  Thus, if the unevenness amount of the average value component is the unevenness amount in the central portion of the wafer surface and the unevenness amount in the outer peripheral ring portion, the nanotopography of the central portion and outer peripheral ring portion of the wafer surface that is particularly likely to deteriorate nanotopography. Can be improved.

  Further, it is preferable that the tilt adjustment and / or shift adjustment is automatically performed using a program that calculates the tilt adjustment amount and / or shift adjustment amount of the grindstone based on the relational expression.

  If the tilt adjustment and / or shift adjustment is automated in this way, the adjustment can be performed more easily in a short time, and the influence of the skill level of the worker can be eliminated.

  In this case, it is preferable that the tilt adjustment and / or the shift adjustment be performed by a motor drive.

  Thus, tilt adjustment and / or shift adjustment can be performed by motor drive.

  The average value component is preferably obtained by averaging nanotopography measurement values on a plurality of diameters or radii of a plurality of wafer surfaces.

  Thus, if the average value component is obtained by averaging the measurement values of a plurality of wafers, the average value component can be obtained more accurately, and the accuracy of tilt adjustment and / or shift adjustment can be increased.

  Also, a semiconductor wafer grinding apparatus comprising at least a grindstone and grinding a wafer with the grindstone, comprising a mechanism for adjusting the tilt and / or shift of the grindstone, the adjusting mechanism comprising a ground wafer surface Correlation between the unevenness amount of the average value component obtained by averaging the nanotopography measurement values on a plurality of diameters or radii of the above and the tilt adjustment amount and / or shift adjustment amount of the grindstone for flattening the unevenness A semiconductor wafer grinding apparatus is provided that performs tilt adjustment and / or shift adjustment of the grindstone based on a relational expression obtained by measuring.

  If it is a grinding device which has an adjustment mechanism based on such a relational expression, it will become a grinding device which can perform adjustment easily and reliably, and can improve nanotopography even by an unskilled worker.

  In this case, it is preferable that the grinding apparatus performs double-head grinding for simultaneously grinding both surfaces of the wafer.

  Nanotopography is created during the wafer processing process (slicing to polishing) and is particularly affected by double-headed grinding. Therefore, with a double-headed grinding machine like the present invention, the nanotopography of the wafer can be easily adjusted by adjustment. The device can be improved.

  In this case, it is preferable that the grinding apparatus automatically performs tilt adjustment and / or shift adjustment using a program for calculating the tilt adjustment amount and / or shift adjustment amount of the grindstone based on the relational expression ( Claim 10).

  If the grinding apparatus is such that tilt adjustment and / or shift adjustment is automated, the adjustment can be performed more easily in a short time.

  Furthermore, it is preferable that the grinding apparatus performs the tilt adjustment and / or shift adjustment by driving a motor.

  In this manner, a grinding apparatus that performs tilt adjustment and / or shift adjustment by motor drive can be provided.

  Further, it is preferable that the average value component is obtained by averaging nanotopography measurement values on a plurality of diameters or radii of a plurality of wafer surfaces.

  As described above, when the average value component is obtained by averaging the measurement values of a plurality of wafers, highly accurate tilt adjustment and / or shift adjustment is performed based on a more accurate relational expression. Can do.

  As described above, according to the present invention, a relational expression between the unevenness amount of the average value component of nanotopography and the tilt adjustment amount and / or shift adjustment amount of the grindstone for flattening the unevenness is obtained in advance. By adjusting the tilt and / or shift of the grinding wheel in the subsequent grinding process based on this relational expression, even unskilled workers can greatly reduce the adjustment time and the number of dummy wafers for adjustment. The nanotopography of the wafer can be improved quantitatively simply and reliably.

Hereinafter, although this invention is demonstrated in detail, this invention is not limited to these.
As a result of intensive studies to solve the above-mentioned problems, the present inventors have found that an average value component (ring-shaped component) obtained by averaging nanotopography measurement values of a processed wafer is related to grinding conditions. . Further, a correlation is obtained by measuring the correlation between the amount of unevenness of the average value component and the tilt adjustment amount and / or shift adjustment amount of the grindstone required for flattening the unevenness, The inventors have conceived that nanotopography can be easily improved by performing tilt adjustment and / or shift adjustment in grinding, and thus the present invention has been completed.

  That is, the semiconductor wafer manufacturing method of the present invention has at least a grinding step of grinding a raw material wafer with a grindstone, measures nanotopography of the wafer surface ground by the grinding step, and measures a plurality of diameters or The average value component is obtained by averaging the nanotopography measurement values on the radius, and the correlation between the unevenness amount of the average value component and the tilt adjustment amount and / or shift adjustment amount of the grindstone for flattening the unevenness is obtained. A relational expression is obtained in advance by measurement, and tilt adjustment and / or shift adjustment of the grindstone is performed in the subsequent grinding step based on the relational expression obtained in advance.

  In this case, the nanotopography is created during the wafer processing process (slicing to polishing), and the influence of double-headed grinding is particularly strong. Therefore, the case of adjusting the double-headed grinding process according to the present invention is taken as an example. Explain that topography can be improved.

(Measurement of nanotopography and processing of measured values)
An example of the method of using the nanotopography measurement value as the average value component as described above will be described with reference to the flowchart of FIG.
First, a wafer that has been ground by the grinding process is prepared, the nanotopography of the wafer surface is measured with a measuring machine, and the obtained numerical data is input directly or via a recording medium into a calculation program. (FIG. 6 (a)).

  The nanotopography measuring machine is not particularly limited, and for example, Nanomapper (ADE Corp.) or Dynasearch (Ratex Co., Ltd.) can be used. These devices are optical and measure nanotopography using wafer surface reflections. Nanomapper uses a Michelson interferometer, and the in-plane data of the silicon wafer captured by this interferometer is moved in the wafer plane by the window size determined by the setting after processing such as noise removal is performed, By replacing the PV value (maximum value-minimum value) in the window with the center value of the window, the data becomes nanotopography data.

  A nanotopography measurement value on four diameters on the wafer surface, that is, a nanotopography measurement value on eight radii is obtained by the arithmetic program (FIG. 6B).

  Next, the nanotopography measurement values on the eight radii obtained in FIG. 6B are averaged at eight points in each radial position as shown in Table 2 below to obtain an “average value component”. (See FIG. 12 for radial position). Alternatively, the average value component in the radial direction may be folded back in the opposite direction to form a waveform that is symmetrical with respect to the wafer center point (FIG. 6C).

In this way, the nanotopography measurement value can be used as an average value component, but the number of diameters or radii at which the nanotopography measurement values are averaged is not particularly limited. For example, four diameters or radii or eight diameters are used. Or it may be a radius.
The average value component may be obtained by averaging nanotopography measurement values of a plurality of wafers. Thus, more accurate adjustment can be performed by calculating | requiring an average value component using several wafers.

The average value component of the nanotopography measurement values obtained by the above method is shown in FIG.
Here, the average value component corresponds to a surface waviness component formed in a ring shape on the wafer surface, that is, it can be said to be a ring-shaped component or a point-symmetric component.

At this time, as shown in FIG. 2, the unevenness amount of the central portion of the average value component is defined as C ₀ , and the unevenness amount of the outer peripheral ring portion is defined as E ₀ .

  Here, the unevenness of the central portion and the unevenness of the outer peripheral ring portion are schematically illustrated as shown in FIG. FIG. 5 is a schematic diagram when the wafer set in the grinding apparatus is viewed from the front side of the grinding apparatus.

  In order to flatten such unevenness, tilt adjustment and shift adjustment of the grindstone of the grinding apparatus are performed. The relationship between the direction of the tilt adjustment and shift adjustment used in the following description and the symbols is defined in FIG.

(Relationship between unevenness and adjustment amount)
As described above, the nanotopography of the wafer after grinding is measured, and from the average value component (ring-shaped component) obtained by averaging the nanotopography measurement values, the “concavo-convex amount C _{0 in the} central portion” and “the outer ring portion The unevenness E ₀ ”is read (see FIG. 2). Then, the vertical tilt adjustment amount ΔX of the right grindstone and the shift adjustment amount ΔY of the right grindstone of the grinding apparatus empirically performed based on the above-described Table 1 and the like, which are necessary to make these irregularities as close to zero as possible, are obtained. . The left whetstone has a reverse sign.

By repeating such measurement, correlation data of C ₀ , E ₀ and ΔX, ΔY in a grinding apparatus used for wafer grinding is obtained, and graphs as shown in FIGS. 1A and 1B are obtained. The horizontal axis in FIG. 1 is “movement amount”, not an absolute value. From FIG. 1, both of “the central unevenness amount C ₀ ” and “the unevenness amount E ₀ of the outer ring portion” of the nanotopography change depending on both “vertical tilt adjustment amount ΔX” and “shift adjustment amount ΔY”. However, it can be seen that the slope of the change is different.

The slope of each regression line is obtained from the graph of FIG. 1 as follows.
Proportional coefficient of “vertical tilt adjustment amount ΔX” and “concavo-convex amount C _{0 at the} center”: −0.0200
Proportional coefficient of “vertical tilt adjustment amount ΔX” and “outer ring unevenness E ₀ ”: −0.0161
Proportional coefficient of “shift adjustment amount ΔY” and “concavo-convex amount C _{0 at the} center”: −0.0190
Proportional coefficient of “shift adjustment amount ΔY” and “unevenness amount E ₀ of outer ring portion”: −0.0087

The proportional coefficient is the amount of change in the unevenness with respect to the vertical tilt adjustment amount or the shift adjustment amount. That is, the following simultaneous equations (1a) and (1) are obtained by using the fact that the effects on the unevenness change amounts ΔC ₀ and ΔE _{0 of} the wafer central portion and the outer ring portion are different between the vertical tilt adjustment amount ΔX and the shift adjustment amount ΔY. Solve (1b). Here, it is assumed that ΔX and ΔY have an independent effect on the unevenness variation amounts ΔC ₀ and ΔE ₀ .
ΔC ₀ = −0.0200 ΔX −0.0190 ΔY Equation (1a)
ΔE ₀ = −0.0161 ΔX −0.0087 ΔY Equation (1b)

The simultaneous equations (1a) and (1b) are solved to obtain the following equations (2a) and (2b).
ΔX = (0.0087 ΔC ₀ − 0.0190 ΔE ₀ ) / 1.319 × 10 ⁻⁴ (2a)
ΔY = (−0.0161 ΔC ₀ + 0.0200 ΔE ₀ ) / 1.319 × 10 ⁻⁴ formula (2b)

In the above formulas (2a) and (2b), by inputting the unevenness variation amounts ΔC ₀ and ΔE ₀ of the wafer central portion and outer peripheral ring portion as target values, the vertical tilt and shift adjustment amounts ΔX and ΔY (of the right grindstone) are obtained. Can be sought.

Further, when the unevenness amounts obtained by the measurement are C ₀ and E ₀ , the target unevenness change amounts ΔC ₀ and ΔE ₀ in order to make them zero are −C ₀ and −E ₀ , respectively. Therefore, the following formulas (3a) and (3b) can be derived from the above formulas (2a) and (2b).
ΔX = (−0.0087 C ₀ + 0.0190 E ₀ ) / 1.319 × 10 ⁻⁴ formula (3a)
ΔY = (0.0161 C ₀ − 0.0200 E ₀ ) / 1.319 × 10 ⁻⁴ (3b)

A table of vertical tilt adjustment amounts and shift adjustment amounts is created based on the above equations (3a) and (3b). The created table (partial extract) is shown in Table 3 below.

(Tilt adjustment and shift adjustment)
As described above, if the relational expression between the unevenness amount and the tilt adjustment amount / shift adjustment amount in the grinding apparatus is obtained in advance, the adjustment can be performed quickly and accurately when it is necessary to perform the tilt adjustment or the shift adjustment thereafter. it can.
The nanotopography of the wafer that has been trial-ground by the above grinding apparatus is measured, the average value component is obtained from the nanotopography measurement value, and the direction and size of the unevenness of the “center portion” and the “outer peripheral ring” are obtained. Next, in Table 3 above, the tilt adjustment amount and shift adjustment amount of the grindstone for making these irregularities close to zero are obtained, and adjustment is performed based on this.

As described above, by performing tilt adjustment and shift adjustment based on the relational expressions of the unevenness amounts C ₀ and E ₀ and the adjustment amounts ΔX and ΔY, even non-skilled workers can improve nanotopography accurately and easily. Can do. For example, 10 to 20 wafers were consumed by adjustment based on conventional experience and intuition, but even an unskilled worker completed the adjustment with 5 or less trial grindings. Further, since the adjustment is performed quantitatively, there is little variation.

  The adjustment can be automated using a program that calculates the tilt adjustment amount and / or shift adjustment amount of the grindstone based on the relational expression. For example, a program that automatically creates a database as shown in Table 3 based on the relational expression may be used. When adjustment is performed using such a program, tilt adjustment and / or shift adjustment can be performed by motor drive.

(Grinding device)
Further, according to the present invention, there is provided a semiconductor wafer grinding apparatus comprising at least a grindstone, and grinding a wafer with the grindstone, comprising a mechanism for tilt adjustment and / or shift adjustment of the grindstone, the adjustment mechanism comprising: The amount of unevenness of the average value component obtained by averaging the nanotopography measurement values on a plurality of diameters or radii of the ground wafer surface, and the tilt adjustment amount and / or shift of the grindstone for flattening the unevenness There is provided a semiconductor wafer grinding apparatus or double-head grinding apparatus that performs tilt adjustment and / or shift adjustment of the grindstone based on a relational expression obtained by measuring a correlation with an adjustment amount.

  With a grinding apparatus having an adjustment mechanism that performs adjustment based on such a relational expression, even non-skilled workers can accurately and easily improve nanotopography based on the amount of unevenness.

  Further, the grinding apparatus may automatically perform tilt adjustment and / or shift adjustment using a program for calculating the tilt adjustment amount and / or shift adjustment amount of the grindstone based on the relational expression. . For example, the creation of Table 3 can be automated by a program, or the table can be stored in the apparatus as a database, and can be called as needed to automatically perform tilt adjustment and / or shift adjustment by motor drive.

  In the grinding apparatus, the average value component may be obtained by averaging nanotopography measurement values on a plurality of diameters or radii of a plurality of wafer surfaces. In this way, more accurate adjustment can be performed by obtaining the average value component using a plurality of wafers.

  In the above description, the relationship between the direction / movement amount of “vertical tilt adjustment and shift adjustment” and “the unevenness of the central part” and “the unevenness of the outer ring part” is approximated by a linear line. Approximation may be performed using higher-order curves such as second-order and third-order. Moreover, although the proportionality coefficient of this linear was shown above, these proportionality coefficients differ with grinding apparatuses, and are only an illustration.

Further, in the above it has been determined the correlation between the amount of unevenness C ₀ and the irregularity of the outer peripheral ring portion E ₀ and the tilt adjustment amount and the shift adjustment amount of the center portion, an intermediate ring other nano seen in FIG. 2, 7, etc. You may make it adjust by calculating | requiring the relationship with the value of topography. Further, according to the purpose, necessarily, without seeking the relationship between both the irregularity E ₀ of the irregularity C ₀ and the outer peripheral ring portion of the central portion, may be obtained an adjustment amount from the relationship between either . Furthermore, only one of the tilt adjustment and the shift adjustment can be performed.

Hereinafter, the present invention will be specifically described with reference to examples, but the present invention is not limited thereto. .
(Example)
As described above, nanotopography measurement was previously performed on a double-head grinding apparatus used in the double-head grinding process of semiconductor wafer manufacturing. That is, from the measured values of the nanotopography of the wafer surface after grinding, the average value components “concavo-convex amount C ₀ ” and “protrusion amount E ₀ of the outer peripheral ring portion” were obtained. Then, the vertical tilt adjustment amount ΔX of the right grindstone and the shift adjustment amount ΔY of the right grindstone for measuring the unevenness amounts C ₀ and E ₀ as close to zero as possible were measured, and the graph of FIG. 1 was obtained. Furthermore, the following formulas (3a) and (3b) were obtained based on FIG.
ΔX = (−0.0087 C ₀ + 0.0190 E ₀ ) / 1.319 × 10 ⁻⁴ formula (3a)
ΔY = (0.0161 C ₀ − 0.0200 E ₀ ) / 1.319 × 10 ⁻⁴ (3b)

Here, a single crystal silicon wafer having a diameter of 300 mm manufactured by the CZ method as a sample wafer was ground by the double-head grinding apparatus. Fig. 3 (a) shows the average value component obtained by measuring the nanotopography of the ground wafer with an optical measurement device Nanomapper and averaging the nanotopography measurement values on the four diameters of the wafer surface. As shown, “the unevenness amount C ₀ = + 1.25 in the central portion” and “the unevenness amount E ₀ = + 0.50 in the outer peripheral ring portion” were read.

The obtained concavo-convex amounts C ₀ and E ₀ were input to the above formulas (3a) and (3b) to obtain the right wheel vertical tilt adjustment amount ΔX = −10 and the right wheel shift adjustment amount ΔY = + 77. Based on these adjustment amounts, tilt adjustment and shift adjustment of the grindstone of the double-head grinding apparatus were performed. After the adjustment, the sample wafer was ground under the same conditions as described above, and the nanotopography of the ground wafer was measured to obtain an average value component. The average value component obtained is shown in FIG.

  3 (a) and 3 (b), it can be seen that the unevenness is clearly reduced in the central portion and the outer peripheral ring portion before and after the adjustment, and the nanotopography is improved.

The present invention is not limited to the above embodiment. The above-described embodiment is an exemplification, and the present invention has substantially the same configuration as the technical idea described in the claims of the present invention, and any device that exhibits the same function and effect is the present invention. It is included in the technical scope of the invention.
For example, measurement of nanotopography may be performed by a capacitance type measuring machine or a laser type sensor in addition to the optical interference type measuring machine. Moreover, the wafer manufactured by this invention is not restricted to a semiconductor silicon wafer, A compound semiconductor wafer may be sufficient.

(a) is a graph showing the relationship between the nanotopography unevenness amounts C ₀ and E ₀ and the vertical tilt adjustment amount ΔX, and (b) is the relationship between the nanotopography unevenness values C ₀ and E ₀ and the shift adjustment amount ΔY. It is a graph to show. In the graph of the mean components of the nanotopography measurement values, indicating the irregularity C ₀ and irregularity E ₀ of the outer peripheral ring portion of the wafer center. It is a graph which shows the average value component before grinding wheel adjustment in an Example, (b) It is a graph which shows the average value component after grinding wheel adjustment. It is the schematic which shows the definition of the direction of a shift adjustment and tilt adjustment, and a code | symbol. It is the schematic which defines the relationship of the unevenness | corrugation of the center part of an average value component, the unevenness | corrugation of an outer peripheral ring part, and a code | symbol. It is a flowchart which shows an example of the method which uses a nanotopography measurement value as an average value component. It is the graph which made the nanotopography measurement value the average value component. (a) is a nanotopography map that qualitatively expresses the intensity of nanotopography in light and shade, and (b) shows the shape and quantitative intensity of nanotopography on four sections (diameters) measured every 45 °. It is a graph. It is the schematic explaining the correspondence of a nanotopography map and nanotopography cross-sectional shape. (a) is a schematic diagram of double-head grinding, (b) is a schematic diagram showing the rotation direction of the wafer and the grindstone, (c) is a photograph showing the land pattern of the hydrostatic pad, and (d) is a static diagram. It is sectional drawing of a pressure pad. (a) is a schematic diagram for explaining the shift adjustment, and (b) is a schematic diagram for explaining the tilt adjustment. It is the schematic which shows the position of a radial direction in the case of using the nanotopography measurement value on eight radiuses of a wafer surface.

Explanation of symbols

11 ... Left static pressure pad, 21 ... Right static pressure pad, 12 ... Left grindstone, 22 ... Right grindstone,
13 ... Land, 14 ... Pocket, h ... Gap between static pressure pad and wafer,
C ₀ ... Unevenness amount at the center of the wafer surface, E ₀ ... Unevenness amount at the outer peripheral ring portion of the wafer surface,
W: Wafer.

Claims (12)

  A method of manufacturing a semiconductor wafer, comprising at least a grinding step of grinding a raw material wafer with a grindstone, measuring nanotopography of the wafer surface ground by the grinding step, and measuring a plurality of diameters or radii of the wafer surface An average value component is obtained by averaging the measured values of the nanotopography, and the correlation between the unevenness amount of the average value component and the tilt adjustment amount and / or shift adjustment amount of the grindstone for flattening the unevenness is measured. A method of manufacturing a semiconductor wafer comprising: obtaining a relational expression in advance, and performing tilt adjustment and / or shift adjustment of the grindstone in a subsequent grinding step based on the relational expression obtained in advance.   The method for manufacturing a semiconductor wafer according to claim 1, wherein the grinding step is a double-headed grinding step.   The nanotopography measurement value on a plurality of diameters or radii of the wafer surface is a nanotopography measurement value on four diameters or radii of the wafer surface or on eight diameters or radii. A method for producing a semiconductor wafer according to claim 1.   The unevenness amount of the average value component obtained by measuring the correlation with the tilt adjustment amount and / or the shift adjustment amount of the grindstone and obtaining the relational expression in advance is set as the unevenness amount in the central portion of the wafer surface and the unevenness amount in the outer ring portion. The method for manufacturing a semiconductor wafer according to any one of claims 1 to 3, wherein:   The tilt adjustment and / or shift adjustment is automatically performed using a program for calculating a tilt adjustment amount and / or a shift adjustment amount of the grindstone based on the relational expression. 5. The method for producing a semiconductor wafer according to claim 4.   6. The method of manufacturing a semiconductor wafer according to claim 1, wherein the tilt adjustment and / or the shift adjustment are performed by motor driving.   7. The semiconductor wafer according to claim 1, wherein the average value component is obtained by averaging nanotopography measurement values on a plurality of diameters or radii of a plurality of wafer surfaces. Manufacturing method.   A semiconductor wafer grinding apparatus comprising at least a grindstone and grinding a wafer with the grindstone, comprising a mechanism for tilt adjustment and / or shift adjustment of the grindstone, the adjustment mechanism comprising a plurality of ground wafer surfaces. Measures the correlation between the unevenness amount of the average value component obtained by averaging the nanotopography measurement values on the diameter or radius of the wheel and the tilt adjustment amount and / or shift adjustment amount of the grindstone for flattening the unevenness A semiconductor wafer grinding apparatus for performing tilt adjustment and / or shift adjustment of the grindstone based on the relational expression obtained in the above.   9. The semiconductor wafer grinding apparatus according to claim 8, wherein the semiconductor wafer grinding apparatus performs double-head grinding for simultaneously grinding both surfaces of the wafer.   9. The tilt adjustment and / or shift adjustment is automatically performed using a program that calculates the tilt adjustment amount and / or shift adjustment amount of the grindstone based on the relational expression. Item 10. A semiconductor wafer grinding apparatus according to Item 9.   11. The semiconductor wafer grinding apparatus according to claim 8, wherein the tilt adjustment and / or the shift adjustment are performed by a motor drive. 11.   The average value component is obtained by averaging nanotopography measurement values on a plurality of diameters or radii of a plurality of wafer surfaces, according to any one of claims 8 to 11. The semiconductor wafer grinding apparatus as described.

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