JP2007088748A - Waveform shaping circuit and semiconductor integrated circuit equipped with it - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a waveform shaping circuit which can adjust thresholds in upper and lower symmetrical positions with an intermediate voltage, etc. of an input signal as a reference in the waveform shaping circuit which shapes the input signal into a binary waveform, and outputs it. <P>SOLUTION: The circuit is provided with a comparator which outputs a first voltage or a second voltage according to the comparison result of the input signal and the thresholds, and a threshold creation unit which creates the threshold. The threshold creation unit comprises a reference voltage creation unit which creates the reference voltage. When the output of the comparator is a first voltage, the threshold is switched to a predetermined higher voltage with respect to the reference voltage. When the output of the comparator is a second voltage, the threshold is switched to a predetermined lower voltage with respect to the reference voltage. <P>COPYRIGHT: (C)2007,JPO&INPIT

Description

  The present invention relates to a waveform shaping circuit that shapes an input signal into a binary waveform and outputs it.

  Conventionally, in a waveform shaping circuit (hereinafter also referred to as a “comparator circuit”) that inputs an analog waveform signal or the like and shapes it into a binary waveform, a comparator (hereinafter referred to as “comparator circuit”) that compares the voltage of the input signal with a threshold value. Also referred to as a "comparator").

  In such a waveform shaping circuit, a circuit having hysteresis is widely used in order to reduce multiple edges (fluctuation of the output signal) caused by a slowly changing input signal or a noisy input signal.

  A general method for adding hysteresis is to positively feed back the output of the comparator to the input. FIG. 4 shows a basic configuration of a positive feedback comparator circuit.

  4, the positive feedback comparator circuit 100 includes a comparator IC100, an input resistor R100 connected between the positive feedback input terminal of the comparator IC100 and the input Vin, an output terminal of the IC100, and a positive feedback input terminal. And a feedback resistor R101 connected between the two.

  The comparator circuit 100 provides hysteresis by using the voltage between the input resistors R100 generated when the output is fed back by the feedback resistor R101.

Threshold value VthH (threshold for changing the output of the comparator circuit 100 from low to high. Hereinafter, also referred to as “threshold VthH”), VthL (for changing the output of the comparator circuit 100 from high to low) The threshold value (hereinafter also referred to as “threshold value VthL”) is expressed as follows. The output voltage when the output of the comparator circuit 100 is low is VoutL, and the output voltage when the output is high is VoutH.
VthH = (1 + R100 / R101) Vref−R100 / R101 × VoutL (1)
VthL = (1 + R100 / R101) Vref−R100 / R101 × VoutH (2)

  When the power supply voltage VDD supplied to the comparator IC100 is constant, both the output voltages VoutH and VoutL are constant, so that the threshold values VthH and VthL can be adjusted by changing R100 and R101. Can do.

  On the other hand, when the power supply voltage VDD supplied to the comparator IC100 is not constant, the level of the output voltage VoutH varies, and as a result, the hysteresis value also varies.

  FIG. 5 shows the hysteresis and the fluctuation of the output voltage waveform accompanying the fluctuation of the voltage level of the output voltage VoutH. As shown in FIG. 5, when a sine wave analog signal is inputted, the threshold values VthL and VthH are obtained when the power supply voltage is VDD (see FIG. 5A), and the output voltage waveform has a period b and a high output pulse. The pulse waveform has a width BWVOUTH (see FIG. 5B). On the other hand, at the power supply voltage VDD ′, the threshold value VthL ′ is obtained (see FIG. 5A), and the output voltage waveform is a pulse waveform having a period b and a High output pulse width BWVOUTH ′ (see FIG. 5B).

  As described above, in the conventional positive feedback comparator circuit, the threshold value and the hysteresis width change depending on the power supply voltage VDD, and the High output pulse width changes. That is, the duty (duty ratio) of the output pulse varies depending on the power supply voltage VDD.

  Therefore, when the comparator circuit 100 is placed in a situation where the power supply voltage VDD fluctuates due to variations in the power supply circuit, the duty (duty ratio) fluctuates and stable waveform shaping cannot be performed. Further, when the comparator circuit 100 is built in a general-purpose semiconductor integrated circuit, it is necessary to cope with various power supply voltages VDD, and there is a similar problem.

  Therefore, as shown in FIG. 6, a comparator circuit 200 having a hysteresis that does not depend on the power supply voltage VDD has been proposed (for example, Patent Document 1).

  The comparator circuit 200 switches the switch SW200 according to the output voltage Vout for the threshold voltage Vth to be compared with the input signal. The threshold value VthH can be adjusted by the variable voltage generating means, and the threshold value VthL can be adjusted by the variable current generating means (see FIG. 7).

Thus, since the comparator circuit 200 is configured so that the hysteresis is constant even when the output voltage fluctuates, the comparator circuit 200 can perform stable waveform shaping regardless of fluctuations in the power supply voltage.
Japanese Patent Laid-Open No. 10-54853

  However, since the comparator circuit of Patent Document 1 has a configuration in which the threshold value VthH is adjusted by the variable voltage generating means and the threshold value VthL is adjusted by the variable current generating means, the adjustment cannot be easily performed.

  That is, the threshold values VthH and VthL are adjusted in consideration of the signal level of the input signal. However, in the comparator circuit of Patent Document 1, the threshold value cannot be set based on the intermediate voltage of the input signal. The values VthH and VthL had to be set. Therefore, in order to adjust the hysteresis width after setting the threshold values VthH and VthL, it is necessary to adjust the variable voltage generating means and the variable current generating means again, which is complicated.

  In particular, in order to make the duty ratio at the time of sine wave input approximately 50%, the operation is complicated when the threshold values VthH and VthL are adjusted and used symmetrically with respect to the intermediate voltage of the input signal as a reference.

  Therefore, the invention according to claim 1 is a waveform shaping circuit that shapes an input signal into a binary waveform and outputs the waveform, and outputs a first voltage or a second voltage according to a comparison result between the input signal and a threshold value. A comparator that outputs the threshold, and a threshold generator that generates the threshold. The threshold generator includes a reference voltage generator that generates a reference voltage, and when the output of the comparator is the first voltage The threshold value is switched to a voltage higher than a reference voltage by a predetermined value, and when the output of the comparator is a second voltage, the threshold value is switched to a voltage lower than the reference voltage by the predetermined value.

  The invention according to claim 2 is the invention according to claim 1, wherein one end of the threshold value generator is connected to the reference voltage generator, and the other end is connected to the comparator. A threshold adjustment resistor unit, and the threshold value is switched by changing a direction of a current flowing through the threshold adjustment resistor unit according to whether the output of the comparator is a first voltage or a second voltage. To do.

  The invention according to claim 3 is the invention according to claim 2, wherein the threshold adjustment resistor section selects at least one of a plurality of resistors and the plurality of resistors, And a threshold adjustment resistor selection circuit that uses the selected resistor as the resistance of the threshold adjustment resistor section.

  The invention according to claim 4 is the invention according to claim 2 or 3, wherein the threshold value generator is connected to the other end of the threshold value adjusting resistor, respectively. A current circuit and a second constant current circuit, and when the output of the comparator is a first voltage, a current flows from the first constant current circuit to the threshold adjustment resistor, and the output of the comparator When the voltage is 2, current flows from the threshold adjustment resistor to the second constant current circuit.

  The invention according to claim 5 is the invention according to claim 4, wherein the current value of the second constant current circuit is substantially twice the current value of the first constant current circuit, By stopping the current to the second constant current circuit, the current flows from the first constant current circuit to the threshold adjustment resistor.

  The invention according to claim 6 is the invention according to any one of claims 1 to 5, wherein the reference voltage generator holds and outputs a peak of the input signal. And a bottom hold circuit that holds and outputs the bottom of the input signal, and a reference voltage between the output of the peak hold circuit and the output of the bottom hold circuit is used as the reference voltage. .

  According to a seventh aspect of the present invention, in the semiconductor integrated circuit provided with the waveform shaping circuit that shapes the input signal into a binary waveform and outputs the waveform, the previous waveform shaping circuit determines the comparison result between the input signal and the threshold value. And a comparator that outputs the first voltage or the second voltage according to the threshold value and a threshold value generator that generates the threshold value. The threshold value generator generates a reference voltage, and the output of the comparator is When the voltage is the first voltage, the threshold is switched to a voltage higher than the reference voltage by a predetermined value. When the output of the comparator is the second voltage, the threshold is switched to the voltage lower than the reference voltage by the predetermined value. It is characterized by.

  According to the first or seventh aspect of the invention, when the output of the comparator is the first voltage, the threshold is switched to a voltage higher than the reference voltage by a predetermined value, and the output of the comparator is the second voltage. Sometimes, the threshold value is switched to a voltage lower than the reference voltage by a predetermined value, so that the threshold value forming the hysteresis in the waveform shaping circuit can be made symmetric with respect to the reference voltage. Therefore, at the time of designing and developing the waveform shaping circuit, the hysteresis width can be adjusted based on the intermediate voltage (or average voltage or the like) of the input signal.

  According to the invention described in claim 2, the threshold value generator is connected between the reference voltage generator and the comparator depending on whether the output of the comparator is the first voltage or the second voltage. Since the threshold value is switched by changing the direction of the current flowing through the adjustment resistor unit, the hysteresis width of the waveform shaping circuit is variable according to the resistance value of the threshold adjustment resistor unit. Therefore, the hysteresis width can be easily adjusted by adjusting the resistance value of the threshold value adjusting resistor.

  According to the third aspect of the present invention, since the resistance value of the threshold adjustment resistor portion can be adjusted by selecting at least one of the plurality of resistors, the hysteresis width can be easily adjusted.

  According to the fourth aspect of the present invention, when the output of the comparator is the first voltage, the current flows from the first constant current circuit to the threshold adjustment resistor, and the output of the comparator is the second voltage. Since the current flows from the threshold adjustment resistor section to the second constant current circuit when the voltage is applied, the current flowing through the threshold adjustment resistor section can be a constant current. It is possible to stably supply a current that flows through the resistance portion.

  According to the fifth aspect of the invention, since the current to the second constant current circuit is stopped, the current flows from the first constant current circuit to the threshold adjustment resistor portion. Depending on whether the current output of the second constant current circuit is turned on or off, the direction of the current flowing through the threshold adjustment resistor can be reversed. In addition, since the current value of the second constant current circuit is approximately twice the current value of the first constant current circuit, the threshold values VthL and VthH can be easily symmetric with respect to the reference voltage.

  According to the sixth aspect of the present invention, the reference voltage generation unit is configured to use the intermediate voltage between the output of the peak hold circuit and the output of the bottom hold circuit as the reference voltage. A reference voltage can be dynamically generated, and a waveform shaping circuit with a duty ratio of approximately 50% when a sine wave is input can be provided regardless of the voltage level of the input signal.

  The waveform shaping circuit and the semiconductor integrated circuit according to the present embodiment shape an input signal into a binary waveform and output it. The first voltage or the second voltage is output according to the comparison result between the input signal and the threshold value. Is provided, and a threshold value generation unit that generates a threshold value is provided.

  In addition, the threshold generation unit includes a reference voltage generation unit that generates a reference voltage. When the output of the comparator is the first voltage, the threshold is switched to a voltage higher than the reference voltage by a predetermined value, and the output of the comparator is In the case of the second voltage, the threshold value is switched to a voltage lower by a predetermined value than the reference voltage.

  Therefore, the thresholds forming the hysteresis in the waveform shaping circuit, that is, the threshold values VthL and VthH can be made symmetric with respect to the reference voltage.

  As a result, it is possible to adjust the hysteresis width with reference to the reference voltage at the time of designing and developing the waveform shaping circuit.

  The threshold generation unit includes a threshold adjustment resistor unit having one end connected to the reference voltage and the other end connected to the input of the comparator.

  In addition, the threshold value is switched by changing the direction of the current flowing through the threshold adjustment resistor depending on whether the output of the comparator is the first voltage or the second voltage.

  Therefore, the hysteresis width of the waveform shaping circuit is variable according to the resistance value of the threshold adjustment resistor.

  As a result, the hysteresis width can be easily adjusted by adjusting the resistance value of the threshold value adjusting resistor.

  The threshold adjustment resistor unit includes a threshold adjustment resistor selection circuit that selects at least one of a plurality of resistors and the plurality of resistors and uses the selected resistor as a resistance of the threshold adjustment resistor unit. Have.

  Therefore, the resistance value of the threshold value adjusting resistor can be adjusted by selecting from a plurality of resistors.

  As a result, the hysteresis width can be easily adjusted. In addition, if this resistance can be provided outside the semiconductor integrated circuit, the hysteresis width can be adjusted even after the semiconductor integrated circuit incorporating the waveform shaping circuit is manufactured.

  Furthermore, the threshold value generation unit includes a first constant current circuit and a second constant current circuit that are respectively connected to the other end of the threshold value adjusting resistor unit.

  In addition, when the output of the comparator is the first voltage, the current flows from the first constant current circuit to the threshold adjustment resistor, and when the output of the comparator is the second voltage, the second value is output from the threshold adjustment resistor. The current is supplied to the constant current circuit.

  Therefore, the current flowing through the threshold adjustment resistor can be a constant current, and as a result, the current flowing through the threshold adjustment resistor can be stably supplied.

  The current value of the second constant current circuit is approximately twice the current value of the first constant current circuit. By stopping the current flowing to the second constant current circuit, the current value from the first constant current circuit is A current is passed through the threshold adjustment resistor.

  Therefore, the direction of the current flowing through the threshold adjustment resistor can be reversed depending on whether the current to the second constant current circuit is turned on or off. In addition, since the current value of the second constant current circuit is approximately twice the current value of the first constant current circuit, the threshold values VthL and VthH can be easily symmetric with respect to the reference voltage. In addition, if the first constant current circuit and the second constant current circuit are formed on the same semiconductor, variations can be suppressed and the accuracy of the constant current circuit can be improved. On the other hand, the symmetry can be improved.

  In addition, the first constant current circuit is constituted by a first transistor, the second constant current circuit is constituted by a second transistor, and the first transistor and a third transistor constituting a current mirror circuit; A third constant current circuit for supplying a predetermined current to the second transistor and the fourth transistor constituting the current mirror circuit is provided.

  Therefore, the current value of the first constant current circuit and the current value of the second constant current circuit can be made variable by the current flowing through the third constant current circuit.

  As a result, the hysteresis width can be adjusted by changing the current value of the constant current of the third constant current circuit without changing the threshold adjustment resistor. In addition, the hysteresis width can be easily and accurately adjusted by performing adjustment together with the adjustment by the threshold adjustment resistor.

  The third constant current circuit includes a buffer amplifier that outputs a predetermined voltage, an adjustment resistor connected between the output of the buffer amplifier and the second potential, and a fifth amplifier connected to the output of the buffer amplifier. And a sixth transistor that forms a current mirror circuit with the fifth transistor.

  Therefore, the constant current value of the third constant current circuit can be changed by changing the resistance provided between the output of the buffer amplifier and the second potential.

  As a result, the constant current value of the third constant current circuit can be easily changed. In addition, if this resistance can be provided outside the semiconductor integrated circuit, the hysteresis width can be adjusted even after the semiconductor integrated circuit incorporating the waveform shaping circuit is manufactured.

  The reference voltage generation unit described above has a peak hold circuit that holds and outputs the peak of the input signal, and a bottom hold circuit that holds and outputs the bottom of the input signal, and outputs the peak hold circuit. And a reference voltage between the output of the bottom hold circuit and the reference voltage.

  Therefore, it is possible to provide a waveform shaping circuit that can dynamically generate a reference voltage in accordance with an input signal and has a duty ratio of approximately 50% when a sine wave is input, regardless of the voltage level of the input signal. It becomes possible.

  Hereinafter, the waveform shaping circuit of the embodiment of the invention will be described more specifically. FIG. 1 is a diagram showing a basic circuit configuration of a waveform shaping circuit in the present embodiment, and FIG. 2 is a diagram showing input / output waveforms of the waveform shaping circuit in the present embodiment. This waveform shaping circuit is provided in the semiconductor integrated circuit.

  As shown in FIG. 1, the waveform shaping circuit 1 according to the present embodiment has an input signal Vin input to an inverting input terminal, a comparator IC1 that inputs a threshold Vth to a non-inverting input terminal, and a threshold generation that generates the threshold Vth. Part 2.

  The comparator IC1 has a high signal (hereinafter also simply referred to as “High”) as a first voltage or a low signal (hereinafter referred to as “high”) as a second voltage according to a comparison result between the input signal and the threshold value Vth. This is a comparator that simply outputs "Low".

  The threshold generation unit 2 includes a reference voltage generation unit 3 that generates the reference voltage Vref, a threshold adjustment resistor R1 that can adjust the threshold Vth, and a first constant current for flowing a constant current through the threshold adjustment resistor R1. The circuit 4 and the second constant current circuit 5 are included.

  The first constant current circuit 4 and the second constant current circuit 5 are controlled by the output of the comparator IC1. That is, when the output of the comparator IC1 is High, the current I1 flows from the first constant current circuit 4 to the threshold adjustment resistor R1, and when the output of the comparator IC1 is Low, the second constant current is output from the threshold adjustment resistor R1. Control is performed so that the current I 1 flows to the circuit 5.

As described above, when the first constant current circuit 4 and the second constant current circuit 5 are controlled by the output of the comparator IC1, the threshold values VthH and VthL are expressed by the following equations.
VthH = Vref + R1 × I1 (3)
VthL = Vref−R1 × I1 (4)

  Accordingly, when the output of the comparator IC1 is low, the threshold Vth is switched to a voltage VthL that is lower than the reference voltage Vref by a predetermined value (R1 × I1). When the output of the comparator IC1 is high, the threshold Vth is changed to the reference voltage Vref. On the other hand, the voltage VthH is switched to a predetermined value (R1 × I1) higher. In this way, by changing the direction of the current flowing through the threshold adjustment resistor R1, the voltages VthL and VthH can be made symmetrical with respect to the threshold Vth.

  The operation of the waveform shaping circuit 1 configured as described above will be specifically described with reference to FIG.

  FIG. 2A shows the voltage waveform of the input signal Vin input to the waveform shaping circuit 1. In this embodiment, the input signal Vin is input as a sine wave having the reference voltage Vref as the center voltage. It is going to be done.

  When this input signal Vin is input to the inverting input terminal of the comparator IC1 of the waveform shaping circuit 1, the threshold value Vth input to the non-inverting input terminal by the comparator IC1 is compared with the input signal Vin. When the input signal Vin is higher than the threshold value VthH, the output voltage of the comparator IC1 becomes Low, and when the input signal Vin is lower than the threshold value VthL, the output voltage of the comparator IC1 becomes High (FIG. 2B). reference).

  FIG. 2C shows the threshold Vth waveform of the waveform shaping circuit 1, and the voltage of the threshold Vth changes according to the change in the output of the comparator IC1 (see FIG. 2B). ing. That is, when the output of the comparator IC1 is Low, the threshold value is switched to the threshold value VthL, and when the output of the comparator IC1 is High, the threshold value is switched to the threshold value VthH.

  As described above, according to the waveform shaping circuit 1 of the present embodiment, the threshold values VthL and VthH forming the hysteresis can be made symmetrical (VHYSH = VHYSL) with respect to the reference voltage Vref, and the waveform shaping circuit is designed. During development, the hysteresis width can be adjusted with reference to the reference voltage. Therefore, by generating the intermediate voltage (or average voltage) of the input signal as the reference voltage Vref by the reference voltage generator 3, the duty ratio at the time of sine wave input can be made approximately 50%.

  In addition, the hysteresis width VHSY can be easily adjusted by adjusting the resistance value of the threshold adjustment resistor R1, thereby facilitating the design and development of the waveform shaping circuit 1. Further, if the threshold adjustment resistor R1 is not provided in the semiconductor integrated circuit but is provided as an external configuration, a highly versatile semiconductor integrated circuit can be provided.

  Next, a specific circuit configuration of the waveform shaping circuit in the present embodiment will be described in detail with reference to FIG. FIG. 3 is a diagram showing a specific circuit configuration of the waveform shaping circuit 1 in the present embodiment.

  First, the reference voltage generation unit 3 will be described. As shown in FIG. 3, the reference voltage generator 3 holds a peak hold circuit 31 that holds and outputs the peak voltage of the input signal Vin, and a bottom hold circuit 32 that holds and outputs the bottom voltage of the input signal Vin. have.

  The hold time of the peak hold circuit 31 can be adjusted by the capacitor C1, and the hold time of the bottom hold circuit 32 can be adjusted by the capacitor C2. Capacitors C1 and C2 are not built in the semiconductor integrated circuit, but can be externally attached to improve the versatility of the semiconductor integrated circuit. That is, terminals are provided from the peak hold circuit 31 and the bottom hold circuit 32 to the outside of the semiconductor integrated circuit, and the capacitors C1 and C2 are connected between these terminals and the second potential (VSS), respectively. Even after the circuit is manufactured, the hold time can be adjusted.

  The output from the peak hold circuit 31 is connected to the input of the buffer amplifier IC3 via the resistor R4, and the output from the bottom hold circuit 32 is connected to the input of the buffer amplifier IC3 via the resistor R5. Here, by setting R4 and R5 to the same resistance value, an intermediate voltage between the output voltage of the peak hold circuit 31 and the output voltage of the bottom hold circuit 32 is obtained at the connection point with the input of the buffer amplifier IC3. The intermediate voltage is buffered by the buffer amplifier IC3, and the buffered intermediate voltage is output from the reference voltage generation unit 3 as a reference voltage. The reference voltage output from the reference voltage generation unit 3 is input to the threshold adjustment resistor unit 6.

  The reference voltage generating unit 3 samples the input signal Vin at a predetermined interval in addition to generating the reference voltage using the hold circuit as described above, and generates a voltage corresponding to a value obtained by averaging the sampled values. The reference voltage Vref may be used, but is not limited thereto.

  Next, the threshold adjustment resistor 6 will be described. As shown in FIG. 3, the threshold adjustment resistor 6 selects a plurality of resistors R10a to R10n and at least one of the plurality of resistors R10a to R10n, and uses the selected resistor as a threshold adjustment resistor. And a threshold adjustment resistor selection circuit (switch portion in FIG. 3). By selecting a plurality of resistors, the resistance value of the threshold adjusting resistor 6 can be set finely. Note that the versatility of the semiconductor integrated circuit can be improved by allowing the threshold adjusting resistor 6 to be externally attached without being incorporated in the semiconductor integrated circuit. At this time, the threshold adjustment resistor section 6 may be configured by only one resistor, and the threshold adjustment resistor selection circuit is not required.

  As described above, the waveform shaping circuit 1 causes a current to flow from the first constant current circuit 4 to the threshold adjustment resistor 6 when the output of the comparator IC1 is High, and also when the output of the comparator IC1 is Low. A current is allowed to flow from the adjustment resistor 6 to the second constant current circuit 5.

  The first constant current circuit 4 includes a PMOS transistor Q1 that is a first transistor, and the second constant current circuit 5 includes an NMOS transistor Q5 that is a second transistor.

  The source of the PMOS transistor Q1 is connected to the first potential (in this embodiment, the VDD potential), and its drain is connected to the non-inverting input circuit of the comparator IC1. The gate of the PMOS transistor Q1 is connected to the gate and drain of the PMOS transistor Q3, and the PMOS transistor Q1 and the PMOS transistor Q3 constitute a first current mirror circuit. Note that the source of the PMOS transistor Q3 is connected to the first potential. The PMOS transistor Q3 corresponds to the third transistor.

  The drain of the NMOS transistor Q5 is connected to the non-inverting input circuit of the comparator IC1 via the drain and source of the NMOS transistor Q4, and the source of the NMOS transistor Q5 is connected to the second potential (in this embodiment, VSS potential). The gate and drain of the NMOS transistor Q5 are connected to the gate of the NMOS transistor Q6, and the NMOS transistor Q5 and the NMOS transistor Q6 constitute a second current mirror circuit. Note that the source of the NMOS transistor Q6 is connected to the second potential.

  Further, the drain of the NMOS transistor Q6 is connected to the drain of the PMOS transistor Q2, the gate of the NMOS transistor Q4, and the drain of the NMOS transistor Q7. Note that the source of the NMOS transistor Q7 is connected to the second potential, and the gate thereof is connected to the output of the comparator IC1. The NMOS transistor Q6 corresponds to the fourth transistor.

  The source of the PMOS transistor Q2 is connected to the first potential, and the gate thereof is connected to the gate and drain of the PMOS transistor Q3. The PMOS transistor Q2 and the PMOS transistor Q3 constitute a third current mirror circuit. Is done.

  Further, the drain of the PMOS transistor Q3 is connected to the variable constant current circuit 7. The constant current Ia of the variable constant current circuit 7 causes a constant current Ia to flow between the source and drain of the PMOS transistor Q3. A predetermined current flows through the first constant current circuit 4 and the second constant current circuit 5 by the first current mirror circuit, the second current mirror circuit, and the third current mirror circuit. The variable constant current circuit 7 corresponds to a third constant current circuit.

  Here, the PMOS transistors Q1, Q2, and Q3 are formed on a semiconductor substrate, and the MOS sizes of the transistors are formed in a ratio of Q1: Q2: Q3 = 1: 2: 2. Therefore, the first constant current circuit 4 has a constant current value Ia / 2, and the second constant current circuit 5 has a constant current value Ia.

  Next, the variable constant current circuit 7 will be described. As shown in FIG. 3, the variable constant current circuit 7 is connected to the fourth current mirror circuit composed of NMOS transistors Q8 and Q9, and the fourth current mirror circuit composed of PMOS transistors Q10 and Q11. 5 current mirror circuits, an adjustment resistor R2 connected to the fifth current mirror circuit, and a buffer amplifier IC2 whose output is connected to the fifth current mirror circuit and the adjustment resistor R2. The input of the buffer amplifier IC2 is connected to a predetermined voltage BG (V). Since the predetermined voltage BG is a band gap, a stable voltage can be output from the buffer amplifier IC2 with high accuracy. The NMOS transistor Q11 corresponds to the fifth transistor, and the NMOS transistor Q10 corresponds to the sixth transistor.

  Since the variable constant current circuit 7 is configured in this way, the same current as the current flowing through the adjustment resistor R2 flows from the NMOS transistor Q8. That is, the value of the current flowing through the adjustment resistor R2 becomes the constant current value of the variable constant current circuit 7. Therefore, it is possible to easily change the constant current value flowing from the NMOS transistor Q8 by changing the adjustment resistor R2. Note that the versatility of the semiconductor integrated circuit can be improved by allowing the adjustment resistor R2 to be externally attached without being incorporated in the semiconductor integrated circuit. The MOS sizes of the PMOS transistors Q10 and Q11 and the MOS sizes of the NMOS transistors Q8 and Q9 are formed on the semiconductor so as to be equal.

  The operation of the waveform shaping circuit configured as described above will be specifically described with reference to FIG.

  FIG. 2A shows the voltage waveform of the input signal Vin input to the waveform shaping circuit 1. When this input signal Vin is input to the waveform shaping circuit 1, the reference voltage is as described above. The reference voltage Vref is generated by the generator 3 based on the input signal Vin.

  When the input signal Vin is input to the inverting input terminal of the comparator IC1 of the waveform shaping circuit 1, the threshold value Vth input to the non-inverting input terminal is compared with the input signal Vin by the comparator IC1. In the present embodiment, until the input signal is input, the output of the comparator IC1 is assumed to be Low, and this threshold Vth is assumed to be VthL.

  Here, the switching operation of VthL and VthH at the threshold value Vth will be described.

As described above, when the input signal is input to the comparator IC1 and this signal becomes a voltage equal to or higher than VthH, the output of the comparator IC1 becomes Low. Thereby, a low voltage is input to the gate of the NMOS transistor Q7, and the NMOS transistor Q7 is turned off. When the NMOS transistor Q7 is turned off, the NMOS transistor Q4 is turned on, and the PMOS transistor Q1 that is the first constant current circuit and the NMOS transistor Q5 that is the second constant current circuit change the NMOS transistor Q4. Connected through.

  When the PMOS transistor Q1 and the NMOS transistor Q5 are connected via the NMOS transistor Q4, the current from the transistor Q1 to Ia / 2 flows into the transistor Q5, and the current from the threshold adjustment resistor 6 to the current Ia / 2 from the transistor Q5. Flow into. Thereby, the threshold value Vth is a value obtained by subtracting the resistance value Rx of the threshold adjustment resistor 6 multiplied by Ia / 2 from the reference voltage Vref (threshold value VthL = Vref−Rx × Ia / 2).

  Next, when the input signal becomes a voltage equal to or lower than VthL, the output of the comparator IC1 becomes High. As a result, a high voltage is input to the gate of the NMOS transistor Q7, and the NMOS transistor Q7 is turned on. When the NMOS transistor Q7 is turned on, the NMOS transistor Q4 is turned off, and the connection between the PMOS transistor Q1 that is the first constant current circuit and the NMOS transistor Q5 that is the second constant current circuit via the NMOS transistor Q4. As a result, the NMOS transistor Q5 is stopped and no current flows.

  When the operation of the NMOS transistor Q5 is stopped, the Ia / 2 current flows from the transistor Q1 into the threshold adjustment resistor section 6. Thus, the threshold value Vth is a value obtained by adding the reference voltage Vref to the resistance value Rx of the threshold adjustment resistor 6 multiplied by Ia / 2 (threshold value VthL = Vref + Rx × Ia / 2).

  As described above, according to the waveform shaping circuit 1 in the present embodiment, the threshold values VthL and VthH forming the hysteresis can be made symmetric with respect to the reference voltage Vref. The hysteresis width VHYS can be adjusted with reference to the reference voltage Vref. In addition, the reference voltage generation unit 3 generates the reference voltage Vref as an intermediate voltage (or average voltage) of the input signal, so that the duty ratio at the time of sine wave input can be made approximately 50%.

  Further, the capacitors C1, C2, resistors R1, R2, and R10a to R10n are not built in the semiconductor integrated circuit but can be externally attached, so that even if the waveform shaping circuit 1 is built in the semiconductor integrated circuit, the general purpose A highly reliable semiconductor integrated circuit can be provided.

It is a figure which shows the basic circuit structure of the waveform shaping circuit in embodiment of this invention. It is a figure which shows the input-output waveform of the waveform shaping circuit in embodiment of this invention. It is a figure which shows the specific circuit structure of the waveform shaping circuit in embodiment of this invention. It is a figure which shows the basic composition of the waveform shaping circuit of the conventional positive feedback. FIG. 5 is a diagram showing hysteresis and fluctuations in the output voltage waveform accompanying fluctuations in the voltage level of the output voltage in the circuit of FIG. 4. It is a figure which shows the structure of the other conventional waveform shaping circuit. FIG. 7 is a diagram showing hysteresis and fluctuations in the output voltage waveform accompanying fluctuations in the voltage level of the output voltage in the circuit of FIG. 6.

Explanation of symbols

DESCRIPTION OF SYMBOLS 1 Waveform shaping circuit 2 Threshold generation part 3 Reference voltage generation part 4 1st constant current circuit 5 2nd constant current circuit 6 Threshold adjustment resistance 7 Variable constant current circuit 8 Peak hold circuit 9 Bottom hold circuit IC1 Comparator

Claims (7)

In the waveform shaping circuit that shapes the input signal into a binary waveform and outputs it,
A comparator that outputs a first voltage or a second voltage according to a comparison result between the input signal and a threshold;
A threshold generation unit that generates the threshold,
The threshold generation unit
A reference voltage generation unit for generating a reference voltage;
When the output of the comparator is a first voltage, the threshold is switched to a voltage higher than a reference voltage by a predetermined value. When the output of the comparator is a second voltage, the threshold is set to the predetermined voltage with respect to the reference voltage. A waveform shaping circuit characterized by switching to a low voltage. The threshold generation unit
One end is connected to the reference voltage generation unit, and the other end includes a threshold adjustment resistor unit connected to the comparator,
2. The waveform shaping according to claim 1, wherein the threshold value is switched by changing a direction of a current passed through the threshold adjustment resistor unit depending on whether the output of the comparator is a first voltage or a second voltage. circuit. The threshold adjustment resistor is
The apparatus includes: a plurality of resistors; and a threshold adjustment resistor selection circuit that selects at least one of the plurality of resistors and uses the selected resistor as a resistance of a threshold adjustment resistor section. 2. The waveform shaping circuit according to 2. The threshold generation unit
A first constant current circuit and a second constant current circuit respectively connected to the other end of the threshold adjustment resistor unit;
When the output of the comparator is a first voltage, a current flows from the first constant current circuit to the threshold adjustment resistor, and when the output of the comparator is a second voltage, the threshold adjustment resistor 4. The waveform shaping circuit according to claim 2, wherein a current is passed through the second constant current circuit. The current value of the second constant current circuit is approximately twice the current value of the first constant current circuit,
5. The waveform shaping circuit according to claim 4, wherein a current is caused to flow from the first constant current circuit to the threshold adjustment resistor by stopping the current to the second constant current circuit. 6. The reference voltage generator is
A peak hold circuit for holding and outputting a peak of the input signal;
A bottom hold circuit that holds and outputs the bottom of the input signal;
6. The waveform shaping circuit according to claim 1, wherein a reference voltage between an output of the peak hold circuit and an output of the bottom hold circuit is used as the reference voltage. In a semiconductor integrated circuit provided with a waveform shaping circuit that shapes and outputs an input signal into a binary waveform,
The previous waveform shaping circuit
A comparator that outputs a first voltage or a second voltage according to a comparison result between the input signal and a threshold;
A threshold generation unit that generates the threshold,
The threshold generation unit generates a reference voltage, and when the output of the comparator is a first voltage, switches the threshold to a voltage higher than the reference voltage by a predetermined value, and the output of the comparator is a second voltage. In this case, the threshold value is switched to a voltage lower than the reference voltage by the predetermined value.

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