JP2007219901A - Reference current source circuit - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To output a reference current without being affected by the variation of a reference voltage. <P>SOLUTION: A reference current source circuit includes: a first feedback type constant voltage circuit using a negative feedback circuit of a first operational amplifier (OP 1) as a bias circuit of a first voltage source transistor (Tr 1); a second feedback type constant voltage circuit using a positive feedback circuit of a second operational amplifier (OP 2) as a bias circuit of a second voltage source transistor (Tr 2); a current mirror circuit which is connected between a first terminal of the Tr 1 and a power terminal and outputs the reference current; a reference resistor connected between a second terminal of the Tr 1 and a first terminal of the Tr 2; resistors Ra and Rb connected in series between the first terminal of the Tr 1 and a ground terminal; and a bias voltage input terminal to which the reference voltage is applied. The bias voltage input terminal is connected to an inverted input terminal of the OP 1, and the inverted input terminal of the OP 2 is connected to a node between the resistors Ra and Rb, and a second terminal of the Tr 2 is connected to the ground terminal. <P>COPYRIGHT: (C)2007,JPO&INPIT

Description

  The present invention relates to a reference current source circuit, and more particularly to a reference current source circuit capable of reducing current consumption.

  In many analog circuits incorporated in various electronic devices, circuit bias current is indispensable, and there is a reference current source for that purpose. This reference current source always outputs a constant reference current (Iref) (for example, Patent Document 1).

JP-A-10-132601

  Conventionally, when the reference current (Iref) is generated, the reference current (Iref) is usually formed by converting current with various resistors based on the reference voltage (Vref). However, if the voltage value (Vref value) of the reference voltage (Vref) varies, the current value (Iref value) of the reference current (Iref) varies, making it difficult to obtain the Iref value with high accuracy.

An object of the present invention is to provide a reference current source circuit in which the reference current hardly changes even when the reference voltage changes.
The above and other objects and novel features of the present invention will be apparent from the description of this specification and the accompanying drawings.

The following is a brief description of an outline of typical inventions disclosed in the present application.
(1) The reference current source circuit is
A first feedback type constant voltage circuit using a negative feedback circuit of a first operational amplifier as a bias circuit of the first voltage source transistor;
A second feedback type constant voltage circuit using a positive feedback circuit of a second operational amplifier as a bias circuit of the second voltage source transistor;
A reference resistance;
A bias voltage input terminal to which a reference voltage is applied;
A first reference voltage terminal to which a first reference voltage is supplied;
A second reference voltage terminal to which a second reference voltage is supplied;
The first terminal of the first voltage source transistor is connected to the first reference voltage terminal;
The reference resistor is connected in series between the second terminal of the first voltage source transistor and the first terminal of the second voltage source transistor,
Two resistors Ra and Rb are connected in series between the first terminal and the second reference voltage terminal of the first voltage source transistor,
An inverting input terminal of the first operational amplifier is connected to the bias voltage input terminal;
The inverting input terminal of the second operational amplifier is connected to a node between the resistor Ra and the resistor Rb,
The second terminal of the second voltage source transistor is connected to the second reference voltage terminal;
A current mirror circuit that outputs a reference current is connected to the first terminal of the first voltage source transistor and / or the second terminal of the second voltage source transistor. Further, the potential difference between both ends of the reference resistor is set to be equal to or less than a bias voltage (a voltage difference that can be generated practically, for example, 1 μV to 1 V).

The effects obtained by the representative ones of the inventions disclosed in the present application will be briefly described as follows.
According to the means of (1), (a) since two differential voltage sources (first and second feedback type constant voltage circuits) are used, even if the reference voltage (Vref) fluctuates, The voltage difference between the voltages output from the dynamic voltage source is unchanged. As a result, when the current flowing through Ra and Rb is 1/10 of the current flowing through Rc, the fluctuation of the reference current (Iref) is also reduced to 1/10, and the reference current (Iref) is accurately converted to an analog circuit. Can be supplied to.

  (B) Further, there are two types of resistors, which have good temperature characteristics but low resistivity per unit area, and have a resistivity per unit area larger than that of the resistor, but worse in temperature characteristics than the resistor. By selectively using the circuit, it is possible to reduce the size of the layout area of a semiconductor integrated circuit that uses only a resistor having a low resistivity per unit area while maintaining good temperature characteristics. The voltage difference between the voltages output from the two differential voltage sources (first and second feedback type constant voltage circuits) is equal to or less than the bias voltage (voltage difference that can be generated practically, for example, 1 μV to 1 V). By doing so, the area of the resistor constituting the reference current source can be reduced. For example, when the potential difference between both ends of the reference resistor Rc is 0.03 V, compared to the case where 1.25 V is applied to the reference resistor (conversion resistor) Rc, the area of the reference resistor Rc is about 1/38. Can be reduced. This reduced value is obtained when the Vref value (V1) of the reference voltage (Vref) at the bias voltage input terminal is 1.25 V, Ra is 100 kΩ, Rb is 4 MΩ, and Rc is 10 kΩ. Here, Rc is a resistor having a good temperature characteristic but a low resistivity per unit area, and Ra and Rb have a higher resistivity per unit area than the resistor but a temperature characteristic worse than that of the resistor. It is a resistor having

  (C) In a reference resistor (conversion resistor) Rc to which a resistor having a good temperature characteristic but a low resistivity per unit area is applied, a potential difference between both ends of the reference resistor Rc is less than a bias voltage (practically generated). Therefore, the current consumption can be reduced while maintaining good temperature characteristics.

  Hereinafter, embodiments of the present invention will be described in detail with reference to the drawings. Note that components having the same function are denoted by the same reference symbols throughout the drawings for describing the embodiment of the invention, and the repetitive description thereof is omitted.

  FIG. 1 is a circuit diagram showing a reference current source circuit which is Embodiment 1 of the present invention. As shown in FIG. 1, the reference voltage source circuit 1 includes a first feedback type constant voltage circuit 10 and a second feedback type constant voltage circuit 20 as two differential voltage sources. The first feedback type constant voltage circuit 10 includes a first operational amplifier (OP 1) 11 and a first voltage source transistor (Tr 1) 12 connected to the output terminal of the first operational amplifier 11. The first voltage source transistor 12 is made of, for example, a PMOS, and a control terminal (gate electrode) is connected to the output terminal of the first operational amplifier 11.

  The second feedback type constant voltage circuit 20 includes a second operational amplifier (OP2) 21 and a second voltage source transistor (Tr2) 22 connected to the output terminal of the second operational amplifier 21. The second voltage source transistor 22 is made of, for example, NMOS, and the control terminal (gate electrode) is connected to the output terminal of the second operational amplifier 21.

  Between a first terminal (drain electrode) of the first voltage source transistor 12 and a first reference voltage terminal (power supply terminal) 2 to which a first reference voltage (power supply) is supplied, a reference current (Iref) Is connected to the current mirror circuit 40. The current mirror circuit 40 includes PMOSs 41 and 42 having the same characteristics in which control terminals (gate electrodes) are connected to each other. The control terminal of the PMOS 41 is connected to the first terminal of the first voltage source transistor 12. The first terminals (drain electrodes) of both PMOSs 41 and 42 are connected to the first reference voltage terminal 2. Thus, the current mirror circuit 40 is configured, and the reference current (Iref) is output from the second terminal (source electrode) of the PMOS 42. The current mirror circuit 40 is a discharge type that discharges a reference current (Iref) to a load.

  On the other hand, a reference resistor (conversion resistor) 50 is connected in series between the second terminal (source electrode) of the first voltage source transistor 12 and the first terminal (drain electrode) of the second voltage source transistor 22. Has been. The voltage at the intersection (node) a between the reference resistor (Rc) 50 and the first voltage source transistor 12 becomes Va, and the voltage at the node b between the reference resistor (Rc) 50 and the second voltage source transistor 22. Becomes Vb.

  Two resistors Ra are provided between the first terminal of the first voltage source transistor 12 and the second reference voltage terminal (ground terminal) 3 to which the second reference voltage (ground potential, ground) is supplied. , Resistors Rb are connected in series. The first terminal of the first voltage source transistor 12 and the non-inverting input terminal (+) of the first operational amplifier 11 are connected. In addition, a voltage obtained by resistance division of the resistors Ra and Rb is applied to the inverting input terminal (−) of the second operational amplifier 21. That is, the node c between the resistor Ra and the resistor Rb is connected to the inverting input terminal (−) of the second operational amplifier 21. Let the voltage at node c be V2. A current flowing from the node a toward the first operational amplifier 11 and the resistor Ra is defined as I1, and a current flowing from the node a toward the reference resistor (Rc) 50 is defined as I2. The inverting input terminal (−) of the first operational amplifier 11 is connected to the bias voltage input terminal 4 to which the reference voltage (Vref) is applied. As a result, the first feedback type constant voltage circuit 10 has a structure using the negative feedback circuit of the first operational amplifier 11 as the bias circuit of the first voltage source transistor 12. V1 is supplied as a reference voltage (Vref). A reference current (Iref) having an Iref value is output from the second terminal of the PMOS 42 of the current mirror circuit 40.

  Further, the second terminal (source electrode) of the second voltage source transistor 22 of the second feedback type constant voltage circuit 20 is connected to the second reference potential terminal 3. Further, the node b and the non-inverting input terminal (+) of the second operational amplifier 21 are connected. As a result, the second feedback type constant voltage circuit 20 has a structure using the positive feedback circuit of the second operational amplifier 21 as the bias circuit of the second voltage source transistor 22.

Next, the relationship between current and voltage in circuit operation will be described.
Va is generated by the first feedback constant voltage circuit 10, Vb is generated by the second feedback constant voltage circuit 20, and Va−Vb is applied to the reference resistor (Rc) 50.

When the offset of the direct current (DC) of the operational amplifier is 0, Va = V1, Vb = V2, and Iref = I1 + I2.

Therefore, I1 is given by the following equation.

V2 is given by the following equation.

I2 is given by the following equation.

Here, an example will be described.
When V1 = 1.25 V, Ra = 100 kΩ, Rb = 4 MΩ, and Rc = 10 kΩ, Va = 1.25V.

となる。 Therefore,

It becomes.

Also,
V2 = 305n × 4M≈1.22.

となる。 Therefore,

It becomes.

  Further, Iref = 305 nA + 3 μA≈3.3 μA.

になり、抵抗値（抵抗体）、即ち、基準抵抗（Ｒｃ）５０を約１／３８に低減することができる。なお、ここで、Ｒｃは温度特性が良好であるが単位面積あたりの抵抗率が小さい抵抗体、ＲａとＲｂは、単位面積あたりの抵抗率が前記抵抗体より大きいが温度特性が前記抵抗体より悪い特性を有する抵抗体である。 In the reference current source circuit 1, the reference resistance (Rc) 50 is 10 kΩ and the reference current (Iref) can be 3.3 μA.

Thus, the resistance value (resistor), that is, the reference resistance (Rc) 50 can be reduced to about 1/38. Here, Rc is a resistor having a good temperature characteristic but a low resistivity per unit area, and Ra and Rb have a resistivity per unit area larger than that of the resistor, but a temperature characteristic is higher than that of the resistor. It is a resistor having bad characteristics.

Example 1 has the following effects.
(1) Since two differential voltage sources (first and second feedback type constant voltage circuits) are used, the voltage of the voltage output from the two differential voltage sources even if the reference voltage (Vref) fluctuates. The difference is unchanged. As a result, when the current flowing through Ra and Rb is 1/10 of the current flowing through Rc, the fluctuation of the reference current (Iref) is also reduced to 1/10, and the reference current (Iref) is accurately converted to an analog circuit. Can be supplied to.

  (2) Also, there are two types of resistors, which have good temperature characteristics but a low resistivity per unit area, and a resistance per unit area that is greater than that of the resistor but that is worse than that of the resistor. By selectively using the circuit, the layout area can be reduced as compared with a semiconductor integrated circuit using only a resistor having a low resistivity per unit area while maintaining good temperature characteristics. The voltage difference between the voltages output from the two differential voltage sources (first and second feedback type constant voltage circuits) is equal to or less than the bias voltage (voltage difference that can be generated practically, for example, 1 μV to 1 V). By doing so, the area of the resistor constituting the reference current source can be reduced. For example, when the potential difference between both ends of the reference resistor Rc is 0.03 V, compared to the case where 1.25 V is applied to the reference resistor (conversion resistor) Rc, the area of the reference resistor Rc is about 1/38. Can be reduced. This reduced value is obtained when the Vref value (V1) of the reference voltage (Vref) at the bias voltage input terminal is 1.25 V, Ra is 100 kΩ, Rb is 4 MΩ, and Rc is 10 kΩ. Here, Rc is a resistor having a good temperature characteristic but a low resistivity per unit area, and Ra and Rb have a resistivity per unit area larger than that of the resistor, but a temperature characteristic is higher than that of the resistor. It is a resistor having bad characteristics.

  (3) In a reference resistor (conversion resistor) Rc to which a resistor having a good temperature characteristic but a low resistivity per unit area is applied, a potential difference between both ends of the reference resistor Rc is less than a bias voltage (practically generated). Therefore, the current consumption can be reduced while maintaining good temperature characteristics.

  (4) In the reference current source circuit 1, since the first voltage source transistor 12 of the first feedback type constant voltage circuit 10 is formed of PMOS, an operational amplifier can be applied as compared with the case where it is configured of NMOS. The potential between the gate electrode and the source electrode can be increased. Therefore, the transistor size can be reduced and the operable voltage range can be expanded. Further, since the second voltage source transistor 22 of the second feedback type constant voltage circuit 20 is formed of NMOS, the potential between the gate electrode and the source electrode to which the operational amplifier can be applied is compared with the case where it is configured of PMOS. Can be bigger. Therefore, the transistor size can be reduced and the operable voltage range can be expanded.

FIG. 2 is a circuit diagram showing a reference current source circuit which is Embodiment 2 of the present invention.
The reference current source circuit 1 according to the second embodiment is different from the reference current source circuit 1 according to the first embodiment in that a current mirror circuit that outputs a reference current (Iref) is not provided on the first voltage source transistor 12 side. The structure is provided on the source transistor 22 side. Other parts are the same as those of the reference current source circuit 1 of the first embodiment.

  In the reference current source circuit 1 of the second embodiment, the first terminal (drain electrode) of the first voltage source transistor 12 of the first feedback constant voltage circuit 10 is directly connected to the first reference potential terminal 2. . A current mirror circuit 60 is connected between the second terminal (source electrode) of the first voltage source transistor 12 of the second feedback type constant voltage circuit 20 and the second reference potential terminal 3 serving as the ground. It has a structure.

  The current mirror circuit 60 includes NMOSs 61 and 62 having the same characteristics in which control terminals (gate electrodes) are connected to each other. The control terminal of the NMOS 61 is connected to the second terminal (source electrode) of the second voltage source transistor 22. The second terminals (source electrodes) of both NMOSs 61 and 62 are connected to the second reference potential terminal 3. Thus, a current mirror circuit 60 is configured, and the reference current (Iref) is sucked from the first terminal (drain electrode) of the NMOS 62. The current mirror circuit 60 is a suction type that sucks a reference current (Iref) from a load.

  According to the second embodiment, as in the first embodiment, it is possible to provide a reference current source circuit in which the reference current hardly changes even when the reference voltage varies. That is, the reference current source circuit 1 of the second embodiment is not affected by V1 because I1 can be excluded from the reference current (Iref) because the reference current (Iref) output is NMOS. Also, the reference current source circuit 1 of the second embodiment has a good temperature characteristic but a low resistivity per unit area and a resistivity per unit area as in the reference current source circuit 1 of the first embodiment. By selectively using two types of resistors, which are larger than the resistor but having a temperature characteristic worse than that of the resistor, in the circuit, it is possible to reduce current consumption and circuit area while maintaining good temperature characteristics.

FIG. 3 is a circuit diagram showing a reference current source circuit which is Embodiment 3 of the present invention.
The reference current source circuit 1 according to the third embodiment is the same as the first embodiment except that the resistor Ra and the resistor Rb are not provided between the second terminal of the first voltage source transistor 12 and the second reference potential terminal 3. The resistor Ra and the resistor Rb are connected in series between the voltage input terminal 4 and the second reference potential terminal 3. The resistance divided voltage of the resistors Ra and Rb is applied to the inverting input terminal (−) of the second feedback type constant voltage circuit 20. In other words, the node Ra of the resistors Ra and Rb and the inverting input terminal (−) of the second operational amplifier 21 are connected.

  In the third embodiment, the ejection-type current mirror circuit 40 shown in FIG. 1 is connected between the first terminal (drain electrode) of the first voltage source transistor 12 and the first reference potential terminal 2, and the second A suction-type current mirror circuit 60 shown in FIG. 2 is connected between the second terminal (source electrode) of the voltage source transistor 22 and the second reference potential terminal 3 to form an output structure of a current mirror circuit configuration. .

  Since the reference current source circuit 1 according to the third embodiment is a type in which V1 is inserted into the resistor Ra, the reference current (Iref) is not dependent on V1 and the reference current (Iref) can be output with higher accuracy.

  According to the third embodiment, as in the first embodiment, it is possible to provide a reference current source circuit in which the reference current does not easily fluctuate even when the reference voltage fluctuates, and the temperature characteristics are good but the resistivity per unit area is good. While maintaining good temperature characteristics by selectively using in the circuit two types of resistors that have a smaller resistance and a resistivity per unit area that is greater than that of the resistor, but with a temperature characteristic that is worse than that of the resistor, consumption is maintained. Reduction of current and circuit area can be achieved.

  Note that at the stage where the reference current source circuit 1 according to the third embodiment is monolithically formed on a semiconductor chip, Vb becomes higher than Va depending on the DC offset of the first operational amplifier 11 and the second operational amplifier 21, and the circuit may not operate. is there. In such a case, a structure in which the resistance value of the reference resistor (Rc) 50 can be adjusted, for example, a structure in which fuse trimming can be performed, and when the circuit does not operate, fuse trimming is performed so that Va and Vb are appropriate. The current source circuit 1 can be operated correctly.

FIG. 4 is a circuit diagram showing a reference current source circuit which is Embodiment 4 of the present invention.
The reference current source circuit 1 according to the fourth embodiment is not configured to supply the reference voltage (Vref) to the bias voltage input terminal 4 in the reference current source circuit 1 according to the first embodiment. ). That is, as shown in FIG. 4, a resistor Rd, a resistor Ra, and a resistor Rb are connected in series between a first reference potential terminal 2 to which power is supplied and a second reference potential terminal 3 serving as a ground. The node d between Rd and the resistor Ra is connected to the inverting input terminal (−) of the first operational amplifier 11. The voltage at the node d becomes the reference voltage (Vref). The node c between the resistor Ra and the resistor Rb is connected to the inverting input terminal (−) of the second operational amplifier 21 as in the third embodiment.

  The reference current source circuit 1 according to the fourth embodiment has an advantage that the bias voltage input terminal 4 need not be provided. According to the fourth embodiment, as in the first embodiment, it is possible to provide a reference current source circuit in which the reference current hardly changes even when the reference voltage fluctuates, and has a good temperature characteristic but a resistivity per unit area. While maintaining good temperature characteristics by selectively using in the circuit two types of resistors that have a smaller resistance and a resistivity per unit area that is greater than that of the resistor, but with a temperature characteristic that is worse than that of the resistor, consumption is maintained. Reduction of current and circuit area can be achieved.

  The invention made by the present inventor has been specifically described based on the embodiments. However, the present invention is not limited to the above embodiments, and various modifications can be made without departing from the scope of the invention. Nor. The output circuit that outputs the reference current (Iref) in the reference current source circuit 1 of the first embodiment is configured by the discharge-type current mirror circuit 40 and the suction-type current mirror circuit 60 as in the third embodiment. Of course, it is also good.

1 is a circuit diagram illustrating a reference current source circuit that is Embodiment 1 of the present invention. FIG. It is a circuit diagram which shows the reference current source circuit which is Example 2 of this invention. It is a circuit diagram which shows the reference current source circuit which is Example 3 of this invention. It is a circuit diagram which shows the reference current source circuit which is Example 4 of this invention.

Explanation of symbols

  DESCRIPTION OF SYMBOLS 1 ... Reference current source circuit, 2 ... 1st reference potential terminal, 3 ... 2nd reference potential terminal, 4 ... Bias voltage input terminal, 10 ... 1st feedback type constant voltage circuit, 11 ... 1st operational amplifier, 12 ... 1st voltage source transistor, 20... Second feedback type constant voltage circuit, 21... Second operational amplifier, 22... Second voltage source transistor, 40... Current mirror circuit, 41 and 42. (Conversion resistance), 60... Current mirror circuit, 61, 62... NMOS.

Claims (5)

A first feedback type constant voltage circuit using a negative feedback circuit of a first operational amplifier as a bias circuit of the first voltage source transistor;
A second feedback type constant voltage circuit using a positive feedback circuit of a second operational amplifier as a bias circuit of the second voltage source transistor;
A reference resistance;
A bias voltage input terminal to which a reference voltage is applied;
A first reference voltage terminal to which a first reference voltage is supplied;
A second reference voltage terminal to which a second reference voltage is supplied;
The first terminal of the first voltage source transistor is connected to the first reference voltage terminal;
The reference resistor is connected in series between the second terminal of the first voltage source transistor and the first terminal of the second voltage source transistor,
Two resistors Ra and Rb are connected in series between the first terminal and the second reference voltage terminal of the first voltage source transistor,
An inverting input terminal of the first operational amplifier is connected to the bias voltage input terminal;
The inverting input terminal of the second operational amplifier is connected to a node between the resistor Ra and the resistor Rb,
The second terminal of the second voltage source transistor is connected to the second reference voltage terminal;
A current mirror circuit that outputs a reference current is connected to the first terminal of the first voltage source transistor and / or the second terminal of the second voltage source transistor. Current source circuit. The reference current source circuit according to claim 1, wherein a potential difference between both ends of the reference resistor is set to a bias voltage or less. A current mirror circuit for discharging a reference current is connected between the first terminal of the first voltage source transistor and the first reference voltage terminal,
2. The reference current according to claim 1, wherein a current mirror circuit that sucks a reference current is connected between the second terminal of the second voltage source transistor and the second reference voltage terminal. Source circuit. A first feedback type constant voltage circuit using a negative feedback circuit of a first operational amplifier as a bias circuit of the first voltage source transistor;
A second feedback type constant voltage circuit using a positive feedback circuit of a second operational amplifier as a bias circuit of the second voltage source transistor;
A reference resistance;
A bias voltage input terminal to which a reference voltage is applied;
A first reference voltage terminal to which a first reference voltage is supplied;
A second reference voltage terminal to which a second reference voltage is supplied;
Two resistors Ra and Rb are connected in series between the bias voltage input terminal and the second reference voltage terminal,
An inverting input terminal of the first operational amplifier is connected to the bias voltage input terminal;
The inverting input terminal of the second operational amplifier is connected to a node between the resistor Ra and the resistor Rb,
The first terminal of the first voltage source transistor is connected to the first reference voltage terminal;
The reference resistor is connected in series between the second terminal of the first voltage source transistor and the first terminal of the second voltage source transistor,
The second terminal of the second voltage source transistor is connected to the second reference voltage terminal;
A current mirror circuit that outputs a reference current is connected to the first terminal of the first voltage source transistor and / or the second terminal of the second voltage source transistor. Current source circuit. A first feedback type constant voltage circuit using a negative feedback circuit of a first operational amplifier as a bias circuit of the first voltage source transistor;
A second feedback type constant voltage circuit using a positive feedback circuit of a second operational amplifier as a bias circuit of the second voltage source transistor;
A reference resistance;
A first reference voltage terminal to which a first reference voltage is supplied;
A second reference voltage terminal to which a second reference voltage is supplied;
Three resistors Ra, Rb, Rc are connected in series between the first reference voltage terminal and the second reference voltage terminal,
A node between the resistor Ra and the resistor Rb is connected to an inverting input terminal of the first operational amplifier and configured to supply a reference voltage;
A node between the resistor Rb and the resistor Rc is connected to an inverting input terminal of the second operational amplifier,
The first terminal of the first voltage source transistor is connected to the first reference voltage terminal;
The reference resistor is connected in series between the second terminal of the first voltage source transistor and the first terminal of the second voltage source transistor,
The second terminal of the second voltage source transistor is connected to the second reference voltage terminal;
A current mirror circuit that outputs a reference current is connected to the first terminal of the first voltage source transistor and / or the second terminal of the second voltage source transistor. Current source circuit.

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