JP2007087112A - Failure diagnostic device - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a failure diagnostic device, capable of specifying a faulty PWBA (printed wiring board assembly). <P>SOLUTION: The failure diagnostic device comprises a diagnosed device connection means transmitting and receiving data with a diagnosed device having a plurality of printed wiring boards each of which has a plurality of electronic parts; a test data input means inputting test data to at least one electronic part of at least one printed wiring board of the diagnosed device; an output data acquisition means acquiring output data outputted to the test data; a failure probability calculation means calculating, for each of the plurality of printed wiring board, a probability of failure of the printed wiring board by inputting the output data to a preliminarily determined failure diagnostic model as a variable; and a failure part specification means specifying a printed wiring board, as a failure part candidate, in the descending order of the probability calculated by the failure probability calculation means. <P>COPYRIGHT: (C)2007,JPO&INPIT

Description

  The present invention relates to a failure diagnosis technique in an electronic device.

  In recent years, electronic devices such as personal computers, copiers, and multifunction machines have many analog electronic circuits or digital electronic circuits as performance and functions are improved. These electronic circuits are stored in the electronic device in the form of a printed wiring board (hereinafter referred to as “PWBA”) for each function. PWBA is connected via a cable in order to realize a series of functions.

  Electronic circuits fail with a certain probability. Since it is difficult to reduce the probability of occurrence of a failure to zero, it is required to predict a failure in an electronic device or quickly identify a location where the failure has occurred and take appropriate measures. However, as the configuration of electronic devices becomes more complex, it becomes increasingly difficult to identify the location where a failure has occurred.

As a technique for identifying a failure location in a copying machine, a printer, or the like, there is a technique described in Patent Document 1, for example. Patent Document 1 discloses a technique in which an inspection program is sent to an image output as necessary between an image inspection apparatus and a management apparatus, and the inspection data is analyzed by the management apparatus to identify a failure location. In Patent Literature 1, when a failure diagnosis is performed in a management apparatus, a failure location is estimated using a failure diagnosis model based on, for example, a Bayesian network.
JP 2005-20713 A

  However, according to Patent Document 1, in order to obtain information for failure diagnosis, a sensor that detects an operation state is necessary. Patent Document 1 discloses a technique that enables failure diagnosis by analyzing data from a sensor. However, the failure of the PWBA itself constituting the apparatus has a problem that the failure location cannot be specified because there is no index such as sensor data.

  The present invention has been made in view of the above-described circumstances, and provides a failure diagnosis technique capable of specifying a PWBA in which a failure has occurred in an electronic device.

  In order to solve the above-described problems, the present invention provides a diagnostic device connection means for transmitting / receiving data to / from a diagnostic device having a plurality of printed wiring boards each having a plurality of electronic components, and the diagnostic device Test data input means for inputting test data to at least one electronic component of at least one printed wiring board among a plurality of printed wiring boards included in the diagnostic device connected via the apparatus connecting means, and the test data input Output data acquisition means for acquiring output data output with respect to the test data input by the means, and input the output data obtained by the output data acquisition means as a variable to a predetermined failure diagnosis model For each of the plurality of printed wiring boards, the probability that the printed wiring board has failed is calculated. Providing a failure probability calculating means, the fault diagnosis apparatus and a failure place specifying means for specifying a printed wiring board in the order of higher probability calculated by the failure probability calculating means as the failure point candidates.

  In a preferred embodiment, the failure diagnosis apparatus includes a test program storage unit storing a plurality of test programs, and at least one test program among the plurality of test programs stored in the test program storage unit according to a predetermined algorithm. A test program selecting means for selecting the test data, and a test data generating means for generating test data by executing the test program selected by the test program selecting means. Test data generated by the means may be input.

  In another preferred embodiment, the diagnostic device has error code output means for outputting an error code indicating a failure state, and the test program storage means includes an error code and a test program corresponding to the error code. The test program selection unit may store the test program corresponding to the error code output from the diagnosis target device among the test programs stored in the test program storage unit.

  In still another preferred embodiment, the device to be diagnosed includes environmental information of a place where the device to be diagnosed is installed, elapsed time information indicating an elapsed time since the device to be diagnosed is installed, the device to be diagnosed Replacement time information indicating the elapsed time since the last printed wiring board was replaced, replacement history information indicating the time when the printed wiring board of the diagnostic device was replaced, and the printed wiring board of the diagnostic device were manufactured. At least one of board manufacturing information for identifying the time when the electronic component of the printed wiring board of the diagnosis apparatus is manufactured, and operation history information indicating the operation history of the diagnosis apparatus. Information storage means for storing the test program, wherein the test program selection means is adapted to perform a test program according to a predetermined test program selection model. And the test program determining means is at least one of environmental information, elapsed time information, replacement time information, replacement history information, board manufacturing information, component manufacturing information, and operation history information stored in the information storage means. May be input as variables into the predetermined test program decision model.

  In still another preferred embodiment, the device to be diagnosed includes environmental information of a place where the device to be diagnosed is installed, elapsed time information indicating an elapsed time since the device to be diagnosed is installed, the device to be diagnosed Replacement time information indicating the elapsed time since the last printed wiring board was replaced, replacement history information indicating the time when the printed wiring board of the diagnostic device was replaced, and the printed wiring board of the diagnostic device were manufactured. At least one of board manufacturing information for identifying the time when the electronic component of the printed wiring board of the diagnosis apparatus is manufactured, and operation history information indicating the operation history of the diagnosis apparatus. In addition to the output data obtained by the output data acquisition means, the information storage means At least one of environmental information, elapsed time information, replacement time information, replacement history information, board manufacturing information, component manufacturing information, and operation history information stored in the stage is input to the predetermined failure model as a variable. Also good.

  In still another preferred embodiment, the diagnostic apparatus includes an error code output unit that outputs an error code indicating a failure state, and the failure diagnostic apparatus includes a storage unit that stores a plurality of test programs; Among the identifiers of the test program stored in the test program identifier storage means stored in the test program identifier storage means storing the server connection means to be connected, the error code and the test program corresponding to the error code, the diagnosis target A test program identifier selecting means for selecting an identifier of the test program corresponding to the error code output from the apparatus, and a download request for requesting downloading of the test program specified by the identifier of the test program selected by the selecting means, The server connection means Download request transmitting means for transmitting to a server device connected via the server, test program receiving means for receiving a test program transmitted from the server device in response to a download request transmitted by the download request transmitting means, Test data generating means for generating test data by executing the test program received by the test program receiving means, and the test data input means causes the test data generated by the test data generating means to be input. Also good.

  In still another preferred aspect, the device to be diagnosed and the failure diagnosis device may be the same device.

Hereinafter, embodiments of the present invention will be described with reference to the drawings.
<1. Overview>
FIG. 1 is a diagram showing a configuration of a failure diagnosis system 1000 according to an embodiment of the present invention. The failure diagnosis system 1000 includes a multifunction peripheral 100 that is a target of failure diagnosis, a management server 200 that manages data necessary for failure diagnosis, and a failure diagnosis apparatus 300 that performs failure diagnosis. The multi-function device 100, the management server 200, and the failure diagnosis apparatus 300 are connected via a network 400. The network 400 may be any network such as the Internet, a LAN (Local Area Network), and a WAN (Wide Area Network).

  FIG. 2 is a diagram illustrating the configuration of the multifunction peripheral 100. The image reading unit 101 optically reads a document image by a CCD (Charge Coupled Device) sensor (not shown) and converts it into data. The scanner IF unit 102 is an interface for transmitting the generated image data to other components of the multifunction peripheral 100. The display unit 103 is configured by, for example, an LCD (Liquid Crystal Display). The display unit 103 displays an operation state and an operation mode of the multifunction peripheral 100 under the control of the display control unit 104. The image forming unit 105 forms an image on a sheet (recording material) according to the read image data or the image data received via the communication IF unit 109. The printer IF unit 106 is an interface between the image forming unit and other components. The instruction input unit 107 is a user interface for inputting instructions to the multifunction device 100. The instruction input unit 107 includes a touch panel, a numeric keypad, and the like installed on the LCD. The recording / reading control unit 108 performs recording / reading control of image data. The recording / reading control unit 108 is configured by an HDD (Hard Disk Drive), for example. The communication IF unit 109 is an interface that transmits / receives data to / from other devices connected via the network 400. A CPU (Central Processing Unit) 110 controls each component of the multifunction peripheral 100. A ROM (Read Only Memory) 111 is a memory that stores a program or the like for operating the multifunction peripheral 100. A RAM (Random Access Memory) 112 is a memory that functions as a work area when the multifunction peripheral 100 operates. The NVRAM (Nonvolatile RAM) 113 is a memory that stores various states of the multifunction peripheral 100. Each of the above components are connected to each other via a bus 190.

  FIG. 3 is a diagram illustrating a circuit board configuration of the multi-function device 100. The multi-function device 100 includes a plurality of printed wiring boards (hereinafter referred to as “PWBA”). Each PWBA has a plurality of electronic components. The PWBA 1 includes a CPU 11, a memory 12, an ASIC (Application Specific Integrated Circuit) 13, an ASIC 14, a memory 15, and a memory 16. PWBA1 further includes a connector 17-2, a connector 17-3, a connector 17-4, and a connector 17-5 for connecting to PWBA2, PWBA3, PWBA4, and PWBA5. The PWBA 2 includes a CPU 21, a memory 22, an ASIC 23, and a connector 27. The PWBA 3 includes an ASIC 31, a memory 32, and a connector 37. The PWBA 4 includes a CPU 41, a memory 42, an ASIC 43, and a connector 47. Although details of the PWBA 5 are omitted, the PWBA 5 includes peripheral devices such as an HDD.

  FIG. 4 is a diagram illustrating a hardware configuration of the management server 200. The CPU 210 is a control unit that controls each component of the management server 200. The RAM 230 functions as a work area when the CPU 210 executes a program. The ROM 220 stores programs and the like necessary for the operation of the management server 200. The I / F 240 is an interface for transmitting and receiving data and control signals to and from other devices such as the multifunction peripheral 100. The HDD 250 is a storage device that stores various data and programs. In particular, the HDD 250 stores a plurality of test programs for performing fault diagnosis (details will be described later). The keyboard 260 and the display 270 are user interfaces for the user to perform operation input to the management server 200. The above components are connected to each other by a bus 290.

  FIG. 5 is a diagram illustrating a functional configuration of the failure diagnosis apparatus 300. The failure diagnosis apparatus 300 has the same hardware configuration as that of the management server 200. That is, the failure diagnosis apparatus 300 includes a CPU 321, a RAM 323, a ROM 322, an I / F 324, an HDD 325, a keyboard 326, and a display 327. The failure diagnosis apparatus 300 includes functional components described below when the CPU 321 executes a failure diagnosis program stored in the HDD 325. The error code receiving unit 303 receives an error code output from the multifunction device 100 in response to a failure. The multi-function device 100 outputs state variables indicating various states of the multi-function device 100 to the failure diagnosis apparatus 300 together with the error code. The state variable receiving unit 304 receives the state variable output from the multifunction device 100. The test program determining unit 305 determines a test program to be used based on the error code received by the error code receiving unit 303 and the state variable received by the state variable receiving unit 304. The test program determination unit 305 transmits a test program download request determined to be used to the management server 200. The management server 200 transmits a test program corresponding to the download request to the failure diagnosis apparatus 300. The test program receiving unit 306 receives the test program transmitted from the management server 200. The test program execution unit 307 executes the downloaded test program. When the test program is executed, the test program execution unit 307 causes the electronic component that is the target of the target PWBA among the PWBAs of the multifunction peripheral 100 to process the test data. The test result receiving unit 308 receives a test result from the multifunction device 100. A BN (Bayesian network) calculation processing unit 309 calculates a failure probability based on the received test result and the state variable of the multifunction peripheral 100. The failure candidate display unit 310 displays failure location candidates based on the calculation result.

<2. First Embodiment>
Hereinafter, detailed operation of the failure diagnosis system 1000 will be described.
FIG. 6 is a flowchart showing a failure diagnosis process according to the first embodiment of the present invention. When the error code is received from the multifunction device 100, the CPU 321 of the failure diagnosis apparatus 300 generates a restart request for requesting the restart of the multifunction device 100. The CPU 321 transmits the generated restart request to the MFP 100 that is the transmission source of the error code. When receiving the restart request, the multi-function device 100 executes the restart program and restarts itself (step S301).

  When the multifunction peripheral 100 is restarted, the CPU 321 of the failure diagnosis apparatus 300 determines whether an error code is generated again (step S302). In other words, the CPU 321 determines whether the same error code is transmitted from the multi-function device 100. If the error code does not occur again (step S302: NO), the failure diagnosis is not necessary, so the CPU 321 ends the process. When the error code occurs again (step S302: YES), the CPU 321 shifts the process to the test mode (step S303). Next, the CPU 321 determines a test program to be executed according to the error code (step S304). Note that the MFP 100 may be restarted by a user operation.

  FIG. 7 is a diagram illustrating an error message. When a failure occurs, the display unit 103 of the multifunction peripheral 100 displays an error code and a message prompting the user to restart as shown in FIG. The user restarts the MFP 100 according to the message, and when the same error code occurs again, presses the diagnosis button. When the diagnosis button is pressed, the multifunction peripheral 100 generates a diagnosis request and outputs it to the failure diagnosis apparatus 300. When receiving the diagnosis request from the multifunction device 100, the CPU 321 of the failure diagnosis apparatus 300 shifts the processing to the test mode (step S303).

  FIG. 8 is a flowchart showing details of the test program determination process according to the present embodiment. The CPU 321 calls the test program information stored in the HDD 325 (step S401). The test program information is information that associates an error code, a PWBA that is a test target, an electronic component that is a test target, and an identifier that identifies the test program. Next, the CPU 321 acquires the generated error code (step S402). The error code transmitted from the multifunction device 100 is stored in the RAM 323 or the HDD 325. Next, the CPU 321 specifies a test program corresponding to the generated error code from the called test program information (step S403).

  FIG. 9 is a diagram illustrating failure location candidates in the present embodiment. FIG. 10 is a diagram illustrating a test program table TB1 which is test program information according to the present embodiment. Here, a case where the error code “111-011” has occurred in the multifunction peripheral 100 will be described as an example. From FIG. 10, the PWBAs corresponding to the error codes 111-011 are PWBA1 and PWBA2. The CPU 321 specifies the memory test 12, the memory test 15, the memory test 16, the ASIC test 13, the ASIC test 14, and the CPU test 11 as test programs used for the PWBA1. In addition, the CPU 321 specifies the memory test 22, the ASIC test 23, and the CPU test 21 as test programs used for the PWBA2. For convenience of explanation, the same number as the electronic component to be tested is used as the reference number of the test program. The CPU test is, for example, a read / write test for the register unit. The ASIC test includes, for example, a functional block test in addition to a read / write test for the register unit. The test program is determined in the same manner when the error code is 310-254.

  A description will be given with reference to FIG. 6 again. When the test program to be used is determined, the CPU 321 determines whether the determined program is stored in the recording / reading control unit 108 of the multifunction peripheral 100 (step S305). In the present embodiment, the multi-function device 100 does not store a test program (step S305: NO). Therefore, the CPU 321 moves the process to step S306. When the determined program is stored in the recording / reading control unit 108 of the multi-function peripheral 100, such as when the previously downloaded test program remains without being deleted (step S305: YES), the CPU 321 performs the process at step S307. Migrate to

In step S306, the CPU 321 downloads a test program used for failure diagnosis.
FIG. 11 is a diagram for explaining the downloading of the test program. The management server 200 stores a plurality of test programs in the HDD 250. The CPU 321 of the failure diagnosis apparatus 300 generates a test program download request determined to be used, and transmits the test program download request to the management server 200. When receiving the download request, the CPU 210 of the management server 200 transmits the determined test program to the failure diagnosis apparatus 300 according to the download request.

  A description will be given with reference to FIG. 6 again. The CPU 321 combines the downloaded test program or the already stored test program (step S307). The CPU 321 executes each test program (step S308). That is, the failure diagnosis apparatus 300 outputs specific test data to an electronic component that is a test target of each test program and processes it.

  FIG. 12 is a diagram illustrating test results. As a result of execution of the test program corresponding to the error code 111-011, in this embodiment, the memory test 12: OK, the memory test 15: OK, the memory test 16: OK, the ASIC test 13: NG, and the ASIC test 14: NG CPU test 11: OK, memory test 22: NG, ASIC test 23: NG, CPU test 21: NG. The multifunction device 100 transmits the test result to the failure diagnosis apparatus 300. Returning to FIG. 6 again, the CPU 321 acquires the test result of each test program (step S309). Next, the CPU 321 performs failure diagnosis processing by inputting a test result as a variable to a predetermined failure diagnosis model (step S310).

  In this embodiment, the failure diagnosis system 1000 employs an inference engine using a Bayesian network as a failure diagnosis model. Fault diagnosis using a Bayesian network uses a probabilistic model genetic algorithm that generates search points using statistical information of good individuals in a population. Fault diagnosis using a Bayesian network is an optimization approach that estimates the distribution using a graph structure (called a Bayesian network or a causal network) by probabilistically capturing the dependency between nodes (variables).

  FIG. 13 is a diagram illustrating an overview of the failure diagnosis model according to the present embodiment. The Bayesian network is connected to a component state node (a node surrounded by a square in FIG. 13) having a state indicating whether or not the component is causing a failure, and is in a causal relationship with the component state. A plurality of information nodes (nodes surrounded by an ellipse in FIG. 13) are included as components. In the present embodiment, a node indicating the PWBA state is used as the component state node, and a node indicating the result of the test program is used as the information node.

  FIG. 14 is a diagram illustrating a failure diagnosis model according to this embodiment. The CPU 321 calculates a failure probability according to this failure diagnosis model. The CPU 321 extracts failure location candidates according to the calculated failure probability.

  FIG. 15 is a diagram illustrating a probability table indicating the strength of the causal relationship of each node. The failure diagnosis apparatus 300 stores a probability table corresponding to each node in the HDD 325 in advance. FIG. 15 shows the probability of normality and failure of PWBA2 with respect to the result information of each test program. In the case of CPU test 21: OK, ASIC test 23: OK, and memory test 22: OK, the normal probability of PWBA2 is 95% and the failure probability is 5%. In the case of the CPU test 21: OK, the ASIC test 23: OK, and the memory test 22: NG, the normal probability of PWBA2 is 40% and the failure probability is 60%. In the case of the CPU test 21: OK, the ASIC test 23: NG, and the memory test 22: OK, the normal probability of PWBA2 is 20% and the failure probability is 80%. In the case of the CPU test 21: OK, the ASIC test 23: NG, and the memory test 22: NG, the normal probability of PWBA2 is 15% and the failure probability is 85%. CPU test 21: NG, ASIC test 23: OK, memory test 22: OK, CPU test 21: NG, ASIC test 23: OK, memory test 22: NG, CPU test 21: NG, ASIC test In the case of 23: NG and memory test 22: OK, the normal probability of PWBA2 is 5% and the failure probability is 95%. In the case of the CPU test 21: NG, the ASIC test 23: NG, and the memory test 22: NG, the normal probability of PWBA2 is 1% and the failure probability is 99%. Similarly, probability tables are stored in advance for other PWBAs. The CPU 321 calculates the failure probability of a node as a failure cause candidate by inputting the test result (FIG. 12) as a probability variable to a failure diagnosis model using a Bayesian network. For example, the CPU 321 identifies nodes as failure cause candidates in descending order of failure probability, and causes the display 327 to display a message or a graphic for notifying the user of the failure cause.

  As described above, according to the present embodiment, the failure diagnosis apparatus 300 can specify the failure location by inputting the test result of each electronic component of the PWBA as a variable to the failure diagnosis model. Further, the failure diagnosis apparatus 300 has a test program table TB1, and there is no need to transmit various information such as internal information of the image forming apparatus to the management server 200. Therefore, the load on the network 400 can be reduced. Furthermore, since the load on the management server 200 can be reduced, the time required for failure diagnosis can be shortened as a result.

  As shown in FIG. 14, the failure diagnosis model of the above-described embodiment has a PWBA node (component state node) and a test program result information node in order to identify a failed PWBA. However, the nodes constituting the failure diagnosis model are not limited to this. In order to further improve the accuracy of fault diagnosis, in addition to the test program result information node, the manufacturing number information node of each part (ID information node of each part), replacement history information node, environmental information node such as temperature and humidity, An operation history information node, a counter value information node such as the number of prints of the multifunction device 100, and the like may be added to the failure diagnosis model. The failure diagnosis apparatus 300 acquires necessary information from the multifunction peripheral 100.

  FIG. 16 is a diagram illustrating an overview of a failure diagnosis model according to a modification of the first embodiment. FIG. 17 is a diagram illustrating a specific example of a failure diagnosis model according to this modification. FIG. 18 is a diagram illustrating a probability table according to this modification. In this way, by building a diagnostic model that adds information such as operating time information, serial number information, and elapsed time since the previous replacement in addition to the test results for each electronic component, more accurate fault diagnosis is possible. Can be done.

<3. Second Embodiment>
Subsequently, a second embodiment of the present invention will be described. In the following description, points different from the first embodiment will be mainly described, and description of matters common to the first embodiment will be omitted. In addition, components common to the first embodiment will be described using common reference numerals. In the second embodiment, the test program determination process in step S304 of FIG. 6 is different from that shown in FIG.

  FIG. 19 is a flowchart showing details of the test program determination process according to the second embodiment. In this embodiment, the CPU 321 of the failure diagnosis apparatus 300 determines a test program to be used according to a test program determination model using a Bayesian network. First, the CPU 321 calls various information stored in the recording / reading control unit 108 or the NVRAM 113 of the multifunction peripheral 100 (S1501). Various types of information include, for example, error code information, environmental information such as temperature and humidity, elapsed time since the installation of the image forming apparatus, or elapsed time information that is elapsed time since the circuit board was replaced, image Replacement history information such as when a part in the forming apparatus was replaced, manufacturing number, information on circuit board manufacturing, which is faulty part information that is likely to cause a failure during manufacturing, information on manufacturing parts, image forming apparatus The operation history information indicating the operation / execution content of. The CPU 321 of the failure diagnosis apparatus 300 transmits various information transmission requests to the multifunction peripheral 100. The multi-function device 100 transmits various information requested according to the transmission request to the failure diagnosis apparatus 300. The CPU 321 inputs various received information to the test program determination model (S1502). The CPU 321 performs a diagnostic process for determining a test program to be executed (S1503) and determines a test program.

  FIG. 20 is a diagram for explaining the outline of the test program determination model according to the second embodiment. Part X replacement information node (information about the frequency of replacement, etc.), number-of-prints information node, part X serial number information node, energization time information node of image forming apparatus, failure rate information node of circuit board Y (all failed) The failure occurrence rate of the circuit board Y with respect to the circuit board), the serial number information node of the circuit board Y, and the like constitute an input node connected to the node of the component X test.

  FIG. 21 is a diagram illustrating a specific example of a test program determination model according to the second embodiment. The test program determination model according to the present embodiment is based on the failure diagnosis model described in the first embodiment. The test program determination model according to the present embodiment has a plurality of various information nodes of the multifunction peripheral 100.

  FIG. 22 is a diagram illustrating a probability table corresponding to the node of the ASIC test 23. Since the test program information to be executed in response to the error code of the first embodiment is the base, in the case of the error code 111-111, the necessary probability of the ASIC test 23 is basically set higher. However, the required probability of the ASIC test 23 reflects the print number information and the part number information of the ASIC2. When the error code is 310-254, the required probability of the ASIC test 23 is set to be low.

  According to the present embodiment, a test program determination model is introduced, and a test program is determined based on test program information determined from an error code and various state information in the MFP 100. Therefore, an appropriate test program can be selected according to the state of the multifunction device 100.

<4. Other embodiments>
The present invention is not limited to the above-described embodiment, and various modifications can be made. In each of the above-described embodiments, a description has been given of a mode in which a device that performs failure diagnosis (failure diagnosis device 300) and a device to be diagnosed (multifunction device 100) that are targets of failure diagnosis are separate devices. May have the function of the failure diagnosis apparatus 300. That is, the multi-function device 100 may have a self-diagnosis function. In addition to the function of the failure diagnosis apparatus 300, the multifunction peripheral 100 may further include a function (part of) of the management server 200. The diagnosis apparatus is not limited to an image forming apparatus such as a multifunction peripheral. Any electronic device having a plurality of PWBAs each having a plurality of electronic components may be used.

  In each of the above-described embodiments, the mode in which only the test program selected according to the error code is executed has been described. However, a configuration in which the test program is not selected may be employed. For example, a test program may be executed for all electronic components of all PWBAs regardless of the error code that has occurred. Or it is good also as a structure which performs a test program about some predetermined electronic components irrespective of the produced | generated error code. Alternatively, when an error code occurs, a message that prompts the user to select a test program may be displayed so that the user can select a test program.

  Further, in each of the above-described embodiments, the aspect using the probability model based on the Bayesian network is described as the failure diagnosis model and the test program determination model. However, other probability models may be used.

1 is a diagram illustrating a configuration of a failure diagnosis system 1000. FIG. 1 is a diagram illustrating a configuration of a multifunction machine 100. FIG. 2 is a diagram illustrating a circuit board configuration of the multifunction machine 100. FIG. 2 is a diagram illustrating a hardware configuration of a management server 200. FIG. 3 is a diagram illustrating a functional configuration of a failure diagnosis apparatus 300. FIG. It is a flowchart which shows the failure diagnosis process which concerns on 1st Embodiment. It is a figure which illustrates an error message. It is a figure which shows the detail of the test program determination process which concerns on 1st Embodiment. It is a figure which illustrates the failure location candidate in 1st Embodiment. It is a figure which illustrates test program table TB1. It is a figure explaining download of a test program. It is a figure which illustrates a test result. It is a figure explaining the outline | summary of the failure diagnosis model which concerns on 1st Embodiment. It is a figure which illustrates the failure diagnosis model concerning a 1st embodiment. It is a figure which illustrates the probability table | surface which shows the strength of the causal relationship of each node. It is a figure explaining the outline | summary of the failure diagnosis model which concerns on the modification of 1st Embodiment. It is a figure which shows the specific example of the failure diagnosis model which concerns on this modification. It is a figure which illustrates the probability table | surface which concerns on this modification. It is a figure which shows the detail of the test program determination process which concerns on 2nd Embodiment. It is a figure which shows the outline | summary of the test program determination model which concerns on 2nd Embodiment. It is a figure which illustrates the test program determination model which concerns on 2nd Embodiment. It is a figure which illustrates the probability table which concerns on 2nd Embodiment.

Explanation of symbols

TB1 ... Test program table, 1, 2, 3, 4, 5 ... PWBA, 11 ... CPU, 12 ... Memory, 13 ... ASIC, 14 ... ASIC, 15 ... Memory, 16 ... Memory, 17 ... Connector, 21 ... CPU, DESCRIPTION OF SYMBOLS 22 ... Memory, 23 ... ASIC, 27 ... Connector, 31 ... ASIC, 32 ... Memory, 37 ... Connector, 41 ... CPU, 42 ... Memory, 43 ... ASIC, 47 ... Connector, 100 ... Multifunction machine, 101 ... Image reading part , 102 ... Scanner IF unit, 103 ... Display unit, 104 ... Display control unit, 105 ... Image forming unit, 106 ... Printer IF unit, 107 ... Instruction input unit, 108 ... Recording / reading control unit, 109 ... Communication IF unit, 110 ... CPU, 111 ... ROM, 112 ... RAM, 113 ... NVRAM, 190 ... bus, 200 ... management server, 210 ... CPU, 20 ... ROM, 230 ... RAM, 240 ... I / F, 250 ... HDD, 260 ... keyboard, 270 ... display, 290 ... bus, 300 ... fault diagnosis device, 303 ... error code receiving unit, 304 ... state variable receiving unit, 305 ... Test program determination unit, 306 ... Test program reception unit, 307 ... Test program execution unit, 308 ... Test result reception unit, 309 ... BN calculation processing unit, 310 ... Failure candidate display unit, 321 ... CPU, 322 ... ROM, 323 ... RAM, 324 ... I / F, 325 ... HDD, 326 ... keyboard, 327 ... display, 400 ... network, 1000 ... failure diagnosis system.

Claims (7)

Diagnostic device connection means for transmitting and receiving data to and from a diagnostic device each having a plurality of printed wiring boards each having a plurality of electronic components;
Test data input means for inputting test data to at least one electronic component of at least one printed wiring board among a plurality of printed wiring boards included in the diagnostic apparatus connected via the diagnostic apparatus connection means;
Output data acquisition means for acquiring output data output for the test data input by the test data input means;
By calculating the output data obtained by the output data acquisition means as a variable in a predetermined failure diagnosis model, the probability that the printed wiring board has failed is calculated for each of the plurality of printed wiring boards. Failure probability calculating means to
A failure diagnosis device comprising failure location specifying means for specifying printed wiring boards as failure location candidates in descending order of probability calculated by the failure probability calculation means. Test program storage means storing a plurality of test programs;
Test program selection means for selecting at least one test program among a plurality of test programs stored in the test program storage means in accordance with a predetermined algorithm;
Test data generation means for generating test data by executing the test program selected by the test program selection means,
The failure diagnosis apparatus according to claim 1, wherein the test data input unit inputs the test data generated by the test data generation unit. The diagnostic device has an error code output means for outputting an error code indicating a failure state,
The test program storage means stores an error code and a test program corresponding to the error code;
The test program selection unit selects a test program corresponding to an error code output from the diagnosis target device from among the test programs stored in the test program storage unit. Fault diagnosis device. Environmental information of the location where the diagnostic device is installed, elapsed time information indicating the elapsed time since the diagnostic device was installed, and the printed wiring board of the diagnostic device Replacement time information indicating the elapsed time since the replacement, replacement history information indicating the time when the printed wiring board of the diagnosis target device was replaced, and board manufacturing for specifying when the printed wiring board of the diagnosis target device was manufactured Information storage means for storing at least one of information, component manufacturing information for specifying when an electronic component of a printed wiring board of the diagnosis target device is manufactured, and operation history information indicating an operation history of the diagnosis target device Have
The test program selection means selects a test program according to a predetermined test program selection model,
The test program determining means uses the environment information, elapsed time information, replacement time information, replacement history information, board manufacturing information, component manufacturing information, and operation history information stored in the information storage means as variables. The failure diagnosis apparatus according to claim 2, wherein the failure diagnosis apparatus inputs a predetermined test program decision model. Environmental information of the location where the diagnostic device is installed, elapsed time information indicating the elapsed time since the diagnostic device was installed, and the printed wiring board of the diagnostic device Replacement time information indicating the elapsed time since the replacement, replacement history information indicating the time when the printed wiring board of the diagnosis target device was replaced, and board manufacturing for specifying when the printed wiring board of the diagnosis target device was manufactured Information storage means for storing at least one of information, component manufacturing information for specifying when an electronic component of a printed wiring board of the diagnosis target device is manufactured, and operation history information indicating an operation history of the diagnosis target device Have
In addition to the output data obtained by the output data acquisition means, the failure probability calculation means further includes environmental information, elapsed time information, replacement time information, replacement history information, board manufacturing information, The failure diagnosis apparatus according to claim 1, wherein at least one of component manufacturing information and operation history information is input as a variable to the predetermined failure diagnosis model. The diagnostic device has an error code output means for outputting an error code indicating a failure state,
The fault diagnosis device is
Server connection means for connecting to a server device having storage means for storing a plurality of test programs;
Test program identifier storage means for storing an error code and an identifier of a test program corresponding to the error code;
Test program identifier selection means for selecting an identifier of a test program corresponding to an error code output from the diagnostic device, among test program identifiers stored in the test program storage means,
Download request transmitting means for transmitting a download request for requesting download of a test program specified by an identifier of the test program selected by the selecting means to a server device connected via the server connecting means;
A test program receiving means for receiving a test program transmitted from the server device in response to a download request transmitted by the download request transmitting means;
Test data generating means for generating test data by executing the test program received by the test program receiving means,
The fault diagnosis apparatus according to claim 1, wherein the test data input unit inputs the test data generated by the test data generation unit.   The fault diagnosis apparatus according to claim 1, wherein the fault diagnosis apparatus is the same apparatus as the diagnosis target apparatus.

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