JP2007072360A - Projection type image display apparatus - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To solve the problem of a keystone adjustment circuit without correcting a keystone adjustment circuit, that an effective area of keystone adjustment is small during high bit rate processing, and an image is degraded during low bit rate processing. <P>SOLUTION: In the invention, the low bit rate processing and the high bit rate processing are switched over, according to a keystone adjustment amount or effectiveness/ineffectiveness of the keystone adjustment amount. Thereby, image degradation is prevented when the keystone adjustment is ineffective, while an effective area of the keystone adjustment is maximized. <P>COPYRIGHT: (C)2007,JPO&INPIT

Description

  The present invention relates to a projection-type image display device (projector) having a keystone adjustment (trapezoid correction) function.

The functional configuration and operation of a conventional projector will be described with reference to FIGS. In FIG. 1, reference numeral 1 denotes a video input circuit which receives an input video signal and creates a digital video signal through an A / D converter. The obtained digital video signal is stored in a frame buffer memory (not shown) and then read out at a predetermined timing. The digital video signal read from the frame buffer memory is added to the image adjustment circuit 4 and subjected to resolution conversion processing and keystone adjustment processing. The output of the image adjustment circuit 4 is applied to the next display circuit 8 where a drive signal for the display panel 9 is generated. The display panel 9 is a liquid crystal display element or the like, and may be a transmission method or a reflection method. Moreover, other devices, such as MMD (micromirror device), may be used.
The image adjustment circuit 4, the display circuit 8, and the like are under the control of the controller 5 constituted by a microcomputer, and their operations and functions are controlled.

Reference numeral 7 denotes a light source lamp, and an ultra-high pressure mercury lamp or the like is recently used, but an incandescent light source such as a halogen lamp or a semiconductor light source such as an LED may be used.
Reference numeral 11 denotes a projection lens unit which has a function of condensing a light beam emitted from the display panel 9 and forming an image formed on the surface of the display panel 9 on the screen 12.
As shown in FIG. 2, when the projection optical axis of the projector is not perpendicular to the screen 12, a square or rectangular screen is transformed into a trapezoidal shape and projected as it is. The aspect ratio also changes. Therefore, so-called keystone adjustment is required to adjust the display image of the display panel 9 so that the original screen is projected onto the screen 12.

Reference numeral 6 denotes an inclination sensor, which is a means for detecting the installation angle (relative to the horizontal) of the projector body.
Based on the information detected by the tilt sensor 6, the keystone adjustment is performed by calculating the keystone adjustment amount for the upright screen 12. Keystone adjustment is performed on the data in the frame buffer memory in the image processing circuit 4 of the projector. However, the image processing circuit 4 requires more processing time as the target frame buffer memory is larger and the keystone adjustment amount is larger. When the keystone adjustment amount exceeds a certain value, reading from the frame buffer memory is not in time, and keystone adjustment cannot be performed correctly.
For this reason, conventionally, an increase in the amount of adjustment has been a problem for keystone adjustment for high-resolution signals (for example, Patent Document 1).

FIG. 3 is a block diagram showing a conventional first method of the image adjustment circuit 4 in FIG. In the figure, the output of the resolution conversion circuit 41 is stored in the frame buffer memory 44 as it is. The keystone adjustment circuit 43 performs keystone adjustment according to the set adjustment amount. When a high resolution signal (such as SXGA +) is input, the effective range of keystone adjustment is narrow at the bit rate of the input signal.
Therefore, the second method conventionally performed is shown in the block diagram of FIG. Unlike FIG. 3, the output of the resolution conversion circuit 41 is converted to a low bit rate by the gradation compression circuit 42 and stored in the frame buffer memory 44. As shown in FIG. 6, the gradation compression circuit 42 reduces the number of gradations per pixel and reduces the bit rate stored in the frame buffer memory 44 below the bit rate of the input signal. The area can be increased.
However, the bit rate is reduced by gradation compression by dithering, and the keystone adjustment amount is increased as compared with the first method, but the image quality deteriorates.
JP 2004-246242 A

As described above, keystone adjustment has a narrow effective area for keystone adjustment during high bit rate processing, and is accompanied by image quality degradation during low bit rate processing. The present invention aims to solve the above problems without revising the keystone adjustment circuit having such problems.
That is, it is an object of the present invention to prevent image quality degradation when keystone adjustment is disabled while maximizing the effective area of keystone adjustment within the range of the performance of the image processing circuit of the projector.

  In order to solve the above problems, in the present invention, the low bit rate processing and the high bit rate processing are switched according to the keystone adjustment amount or the validity / invalidity of the keystone adjustment.

  According to the present invention, the image quality of the projected image when the keystone adjustment amount is smaller than the predetermined amount is improved while maximizing the effective area of the keystone adjustment without increasing the performance of the image processing circuit of the projector. It becomes possible.

According to the first preferred embodiment of the present invention, the low bit rate processing and the high bit rate processing are switched in accordance with the keystone adjustment amount. As a result, it is possible to improve the image quality of the projected image when the keystone adjustment amount is smaller than the predetermined amount while maximizing the effective area of the keystone adjustment without improving the performance of the image processing circuit of the projector. It becomes possible.
Further, according to the second embodiment of the present invention, the low bit rate processing and the high bit rate processing are switched according to the validity / invalidity of the keystone adjustment. This makes it possible to improve the image quality of the projected image when keystone adjustment is disabled, while maximizing the effective area of keystone adjustment, without increasing the performance of the image processing circuit of the projector.
In the third embodiment of the present invention, when keystone adjustment is necessary or when a keystone adjustment amount setting operation is in progress, processing is performed at a low bit rate. Further, when the keystone adjustment is unnecessary and the keystone adjustment amount setting operation is not being performed, the processing is performed at a high bit rate. As a result, in addition to the above effects, it is possible to avoid a phenomenon in which the screen flickers during the keystone adjustment amount setting operation.

Examples of the present invention will be described below.
[Example 1]
FIG. 1 shows a configuration of a projector according to an embodiment of the present invention. FIG. 5 shows a block configuration of the image adjustment circuit 4 of the projector of FIG. FIG. 7 is a flowchart of the processing contents in the image adjustment circuit 4 of FIG. Assume that a video signal of 24 bits (24 BPP) per pixel is input as an input signal.
First, in step (hereinafter denoted by S) 2 in FIG. 7, the controller 5 determines whether the keystone adjustment is enabled / disabled by operating the remote controller 2 or the operation panel 3. When the keystone adjustment is valid, the gradation compression circuit 42 converts the input signal into 16 BPP data by dithering and stores it in the frame buffer memory 44 (S4). If the keystone adjustment is invalid, the output of the resolution conversion circuit 41 is stored in the frame buffer memory 44 at 24 BPP (S3).

As in the prior art, in S5 and S6, the keystone adjustment circuit 43 performs keystone adjustment according to the set adjustment amount. The keystone adjustment circuit 43 acquires a keystone adjustment valid / invalid state, and obtains a keystone adjustment amount setting value from the controller 5 when the keystone adjustment is valid. The keystone adjustment image is transmitted to the display circuit 8 by reading from the frame buffer memory 44 while thinning it out according to the output position in accordance with the set value. At the time of thinning, the pixel value after thinning is also weighted from surrounding pixels before thinning.
When the keystone adjustment is invalid, the data stored in the frame buffer memory 44 is transmitted to the display circuit 8 without performing the keystone adjustment.

  FIG. 6 shows a comparison of the number of pixels read within a certain time during the keystone adjustment process. The larger the keystone adjustment amount, the longer the processing time. However, by reducing the bit rate per pixel, the number of pixels read within a certain time increases, and the effective range of keystone adjustment can be increased when comparing input signals having the same resolution.

Screen flicker occurs when the bit rate is switched between 16 BPP and 24 BPP. Therefore, if the determination of S2 in FIG. 7 is always performed while sequentially displaying the adjustment results, the screen flickers when the set value is sequentially changed across 0 (keystone adjustment disabled).
Therefore, while the window for operating the keystone adjustment amount is displayed, the process is always performed at 16 BPP, and when the setting window is closed, it is determined whether the process is performed at 16 BPP or 24 BPP. This is determined by storing the state in the keystone adjustment operation state storage memory 10 of FIG. 1 and determining this memory.

A flow chart at this time is shown in FIG.
In S1, it is determined whether or not a window for operating the keystone adjustment amount is being displayed.
In S2, the validity / invalidity of the keystone adjustment when the keystone adjustment amount is not being operated is determined.
If it is determined in S1 and S2 that the keystone adjustment is not being performed and the keystone adjustment is invalid, 24BPP is stored in the frame buffer memory (S3). Otherwise, it is stored in the frame buffer memory with 16 BPP (S4).
In S5 and S6, the keystone adjustment circuit 43 performs keystone adjustment according to the set adjustment amount.
According to the method of FIG. 8, it is possible to avoid the occurrence of flicker during the user's keystone adjustment amount operation.

In the above-described embodiment, an example is shown in which switching between 16 BPP and 24 BPP is determined based on whether keystone adjustment is enabled / disabled. However, the same effect can be obtained by switching by determining whether the set keystone adjustment amount is an amount that can be processed by 24 BPP.
Further, when the screen resolution is low and the desired maximum keystone adjustment amount can be processed by 24 BPP, it is also possible to always perform processing by 24 BPP.

[Example 2]
The image adjustment circuit 4 shown in FIG. 1 is the same as that shown in FIG. 9, and gradation compression is performed at a low bit rate when keystone adjustment is enabled, and gradation compression is performed at a high bit rate when keystone adjustment is disabled. The same effect as in Example 1 is obtained.
Both 42 and 45 in FIG. 9 are circuits that perform gradation compression on the output of the resolution conversion circuit. The bit rate is higher when gradation compression is performed by 45 circuits than by 42 circuits. Image quality degradation is less when data is stored in the frame buffer memory at a higher bit rate.

It is a block diagram of the projector which concerns on one Example of this invention. It is a figure which shows the typical installation example of a projector. It is a block diagram of the conventional image adjustment circuit which preserve | saves the output of a resolution conversion circuit as it is in a frame buffer memory. It is a block diagram of the other image adjustment circuit of the prior art example which performs gradation compression and preserve | saves in a frame buffer memory. FIG. 3 is a block diagram of an image adjustment circuit that performs gradation compression only when keystone adjustment is enabled according to Embodiment 1 of the present invention. It is a figure which shows the comparison of the bit allocation at the time of a high bit rate process and a low bit rate. 6 is a flow of switching between high bit rate processing and low bit rate processing in the circuit of FIG. 5. 6 is a flow for switching between high bit rate processing and low bit rate processing during keystone adjustment operation in the circuit of FIG. 5. It is a block diagram of the image adjustment circuit which carries out high compression of the keystone adjustment effective gradation and low compression of the keystone invalid gradation according to Embodiment 2 of the present invention.

Explanation of symbols

1: Video input circuit 2: Remote controller 3: Operation panel 4: Image adjustment circuit 5: Controller 6: Tilt sensor 7: Light source lamp 8: Display circuit 9: Display panel 10: Keystone adjustment operation state storage memory 11: Projection lens Unit 12: Screen 41: Resolution conversion circuit 42: Gradation compression circuit 43: Keystone adjustment circuit 44: Frame buffer memory 201, 301: Peltier element 202, 302: Cooling plate

Claims (5)

A keystone adjustment means for adjusting a digital video signal as necessary, wherein the first signal processing procedure enables a predetermined keystone adjustment at a first bit rate, and a first signal processing procedure. Having a second signal processing procedure for processing at a low second bit rate and having an effective area of keystone adjustment greater than the first signal processing procedure;
If the necessary keystone adjustment amount is less than the predetermined amount, the video signal having the first bit rate is supplied to the keystone adjustment means to execute the processing according to the first signal processing procedure. A projection type video display device comprising: a bit rate adjusting unit that supplies a video signal converted into a rate to the keystone adjusting unit to execute processing according to the second signal processing procedure.   2. The projection-type video according to claim 1, wherein the less than the predetermined amount is substantially 0, and the bit rate of the video signal processed by the keystone adjusting means is switched according to the necessity of the keystone adjustment. Display device.   The bit rate adjusting means causes the keystone adjusting means to perform processing at the second bit rate when keystone adjustment is necessary or when a keystone adjustment amount setting operation is in progress, and does not require keystone adjustment. 3. The projection type image display apparatus according to claim 2, wherein when the keystone adjustment amount setting operation is not being performed, processing is performed at the first bit rate.   The bit rate adjusting means generates the video signal of the second bit rate by compressing the gradation of the video signal of the first bit rate. The projection type image display device described in 1. The bit rate adjusting means creates a video signal having a first bit rate and a second bit rate by gradation-compressing the digital video signal. The projection-type image display device described.

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