JP2007065689A - Substrate for electronic equipment and its manufacturing method, and electronic equipment - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a substrate for electronic equipment that can be improved in oxidation resistance to water and resist peeling liquid and also improved in oxidation resistance to an etching agent etc., when copper with low resistance is used for electrode and wiring materials, and electronic equipment equipped with such a substrate for electronic equipment. <P>SOLUTION: A liquid crystal display device (electronic equipment) 30 uses the substrate 31 for electronic equipment characterized in that a copper layer (copper wiring) 40a is formed on a substrate 36 having insulating property at least on its surface and coated with a copper compound layer 40b of a copper compound selected out of copper phosphide, copper boride, and copper bromide. <P>COPYRIGHT: (C)2007,JPO&INPIT

Description

  The present invention relates to a substrate for an electronic device such as a thin film transistor (TFT) array substrate provided in an electronic device such as a liquid crystal display device and a manufacturing method thereof and the electronic device, and when using low resistance copper as an electrode or a wiring material, The present invention relates to an electronic device substrate that can improve oxidation resistance to moisture and a resist stripping solution, and that can improve acid resistance to an etching agent, a manufacturing method thereof, and an electronic device including such an electronic device substrate.

  In general, a thin film transistor (TFT) array substrate is known as a substrate provided in a liquid crystal display device. FIG. 15 and FIG. 16 show an example of the structure of a general thin film transistor array substrate in which portions such as a gate wiring G and a source wiring S are provided on a substrate 86. In the thin film transistor array substrate shown in FIGS. 15 and 16, gate wirings G and source wirings S are wired in a matrix on a transparent substrate 86 such as glass. A region surrounded by the gate wiring G and the source wiring S is a pixel portion 81, and a thin film transistor 83 is provided in each pixel portion 81.

  The thin film transistor 83 has a general structure of an etch stopper type. A gate insulating film 89 is formed on a gate electrode 88 made of a conductive material such as Al or Al alloy provided by being drawn out from the gate line G and the gate line G. A semiconductor active film 90 made of amorphous silicon (a-Si) is provided on the gate insulating film 89 so as to oppose the gate electrode 88. Further, the semiconductor active film 90 is made of a conductive material such as Al or Al alloy. A drain electrode 91 and a source electrode 92 are provided so as to face each other. Note that ohmic contact films 90a and 90a made of amorphous silicon or the like doped with a dopant such as phosphorus at a high concentration are formed on the upper sides of both sides of the semiconductor active film 90, and a drain electrode 91 and a source electrode are formed thereon. An etching stopper 93 is formed in a state sandwiched between the two. A transparent pixel electrode 95 made of a transparent electrode material is connected from above the drain electrode 91 to the side of the drain electrode 91.

  A passivation film 96 is provided on the gate insulating film 89, the transparent pixel electrode 95, the drain electrode 91, the source electrode 92, and the like. An alignment film (not shown) is formed on the passivation film 96, and an active matrix liquid crystal display device is formed by providing liquid crystal above the alignment film. When an electric field is applied to liquid crystal molecules by the transparent pixel electrode 95. The alignment of liquid crystal molecules can be controlled.

  As a method of manufacturing the thin film transistor array substrate shown in FIGS. 15 and 16, a target made of aluminum or an aluminum alloy is used, and a thin film forming means such as a normal sputtering method in which AC power is applied to the target is used on the glass substrate 86. After forming an Al or Al alloy layer on the surface, the Al or Al alloy layer other than the gate formation position is removed by photolithography to form the gate electrode 88, and then the gate insulating film 89 is formed by thin film forming means such as CVD. Then, the semiconductor active film 90 and the etching stopper 93 are formed, and then the ohmic contact film 90a, the drain electrode 91 and the source electrode 92 are formed thereon by the above-described sputtering method and photolithography method, and then the drain electrode 91 and Mask the source electrode 92 and After dividing the ohmic contact layer 90a by removing a part of the click contact film 90a, by forming a passivation film 96 by a CVD method, a thin film transistor array substrate is obtained.

  By the way, in recent years, with the increase in the speed of liquid crystal display devices and the like, a problem of signal transmission delay due to the resistance of wiring such as a gate electrode, a drain electrode, and a source electrode has become apparent, and in order to solve such a problem The use of copper having a resistance lower than that of Al or an Al alloy as a material constituting electrodes and wirings has been studied. This copper wiring can be formed by forming a Cu layer by a normal sputtering method as in the case of forming the wiring from Al or an Al alloy, and then removing the Cu layer at a place other than the wiring formation position by a photolithography method.

However, in the liquid crystal display device provided with the thin film transistor array substrate having the structure shown in FIGS. 15 and 16, when copper is used as an electrode or a wiring material, copper is weak against a chemical solution, so that other layers are etched in a later process. When an acid-based etching agent having oxidizing power used in the process penetrates into the copper film, the copper film may be etched and damaged, and if the damage progresses, a disconnection failure may occur. Therefore, there is a problem that the etching agent to be used is limited. In addition, when copper is used as an electrode or a wiring material, when the resist stripping solution used in the photolithography process has penetrated into the copper film, the resist stripping solution may corrode the copper film. Also, the etching mechanism of the copper film is that the surface of the copper film is oxidized and etched, but if an oxide layer such as CuO or CuO _{2 is} formed on the surface of the copper film by moisture in the air before etching. Further, there is a problem that even an etching agent having no oxidizing power is etched and damaged, and further, a disconnection failure occurs. Copper is less oxidizable than Al, Si, and Cr, but is easily oxidized due to the presence of moisture. Therefore, a Cu alloy is considered as a Cu-based wiring material that can prevent the generation of an oxide layer such as CuO or CuO _{2 on the} surface. However, the Cu alloy has a higher wiring specific resistance than Cu and has a low resistance. The effect of using this material will be less expected.

  The present invention has been made in view of the above circumstances. When low-resistance copper is used as an electrode or a wiring material, the oxidation resistance against moisture or resist stripping solution can be improved, and the acid resistance against an etching agent can be improved. It is an object of the present invention to provide an electronic device substrate and a manufacturing method thereof, and to provide an electronic device including such an electronic device substrate.

  In order to solve the above problems, the substrate for electronic equipment of the present invention forms a copper wiring on a substrate having at least an insulating surface, and the copper wiring is formed of copper phosphide, copper boride, copper oxalate, and nitride. It is characterized by being coated with any copper compound layer selected from copper. The thickness of the copper compound layer is preferably about 50 to 500 angstroms. When the thickness of the copper compound layer is less than 50 angstroms, it is too thin to improve the oxidation resistance against moisture and resist stripping solution and the acid resistance against etching agents, etc., and the purpose is to increase the thickness exceeding 500 angstroms. The effect cannot be improved so much and the wiring specific resistance is lowered.

Moreover, in order to solve the said subject, the board | substrate for electronic devices concerning this invention is the copper compound in which the outer surface of a copper wiring is selected from copper phosphide, copper boride, copper oxalate, copper nitride A wiring structure covered with a layer is provided on a substrate having at least an insulating surface. The thickness of the copper compound layer located between the substrate and the copper wiring in the copper compound layer is preferably about 50 to 500 angstroms. When the thickness of the copper compound layer is less than 50 angstroms, if the material forming the substrate is a glass substrate, SiO ₂ oxygen in the glass substrate enters the copper wiring, and the interface between the copper wiring and the substrate is oxidized. Therefore, even if the thickness exceeds 500 angstroms, the intended effect cannot be improved so much, which is economically disadvantageous.

  In the substrate for electronic equipment of the present invention, the copper compound layer as a protective layer resistant to chemicals and moisture such as resist stripping solution and etching solution is formed on the surface or outer peripheral surface of the copper wiring. It is formed on (outer surface). According to the substrate for electronic equipment having such a configuration, even if an acid-based etching agent having an oxidizing power used when etching other layers in a subsequent process penetrates into the copper wiring, the surface of the copper wiring or Since the copper compound layer is formed on the outer peripheral surface (outer surface), the copper wiring is not easily damaged by the etching agent, the occurrence of disconnection failure can be prevented, and the degree of freedom of the etching agent used is great.

  In addition, even if the resist stripping solution used in the photolithography process penetrates into the copper wiring, the copper compound layer is formed on the surface or outer surface of the copper wiring, thus preventing corrosion of the copper wiring by the resist stripping solution. it can. In addition, since the copper compound layer is formed on the surface of the copper wiring, an oxide layer is not formed on the surface of the copper wiring due to the presence of moisture before etching, and is damaged by an etching agent having no oxidizing power. It is difficult to prevent disconnection failure. Therefore, according to the substrate for electronic equipment of the present invention, it is possible to improve the oxidation resistance against moisture and resist stripping solution without impairing the characteristics of using low resistance copper as an electrode or wiring material, and also acid resistance against an etching agent or the like. Therefore, it is possible to prevent disconnection failure and corrosion, and since the degree of freedom of the etching agent to be used is large, the process after forming the copper wiring is not easily restricted. Further, in the electronic device substrate of the present invention, the copper compound layer covering the copper wiring can be formed using the same film forming apparatus as that for forming the copper wiring, and therefore it is necessary to provide a special manufacturing apparatus. The manufacturing process is not complicated. Furthermore, since the copper compound layer does not require heat treatment at a high temperature of 800 ° C. or higher in a processing gas atmosphere such as ammonia gas, when using a substrate such as a glass substrate that cannot withstand heating of 600 ° C. or higher. Is also applicable.

Moreover, in the substrate for electronic equipment according to the present invention, if the wiring structure formed by coating the outer surface of the copper wiring with the copper compound layer is formed on a substrate having at least an insulating surface, Since the copper compound layer is formed between the copper wiring and the substrate, the SiO ₂ oxygen in the glass substrate can be prevented from entering the copper wiring even if the material forming the substrate is a glass substrate. It is possible to prevent the interface between the wiring and the substrate from being oxidized. In the electronic device substrate according to the present invention, the substrate may have a silicon nitride film on the surface. According to the electronic device substrate having such a configuration, since the silicon nitride film is interposed between the copper wiring and the substrate, when the SiO _{2 in} the substrate is contained, the oxygen of the silicon wiring is contained in the copper wiring. Intrusion can be avoided, and oxidation of the interface between the copper wiring and the substrate can be prevented.

In order to solve the above-described problems, the method for manufacturing a substrate for electronic equipment according to the present invention includes disposing a substrate having a copper wiring formed on a surface thereof in a processing chamber that can be maintained in a reduced pressure state that constitutes the plasma apparatus, A processing gas containing at least nitrogen gas or ammonia gas is supplied into the room, and plasma processing is performed so that the copper wiring surface is covered with a copper nitride film. In addition, in order to solve the above-described problems, the method for manufacturing an electronic device substrate according to the present invention includes disposing a substrate having a copper wiring formed on the surface thereof in a processing chamber that can be maintained in a reduced pressure state that constitutes the plasma apparatus. The plasma processing may be performed by supplying a processing gas containing at least a PH ₃ gas into the processing chamber and covering the copper wiring surface with a copper phosphide film. In addition, in order to solve the above-described problems, the method for manufacturing an electronic device substrate according to the present invention includes disposing a substrate having a copper wiring formed on the surface thereof in a processing chamber that can be maintained in a reduced pressure state that constitutes the plasma apparatus. The plasma processing may be performed by supplying a processing gas containing at least B ₂ H ₆ gas into the processing chamber and covering the copper wiring surface with a copper boride coating. In addition, in order to solve the above-described problems, the method for manufacturing an electronic device substrate according to the present invention includes disposing a substrate having a copper wiring formed on the surface thereof in a processing chamber that can be maintained in a reduced pressure state that constitutes the plasma apparatus. The plasma processing may be performed by supplying a processing gas containing at least HBr gas into the processing chamber and covering the copper wiring surface with a copper bromide film.

  According to the method for manufacturing a substrate for an electronic device of the present invention having any one of the above configurations, the copper wiring is formed on the substrate, and the copper wiring is covered with the copper compound layer. A substrate can be manufactured. Also, any one of the copper nitride film, copper phosphide film, copper boride film, and copper bromide film covering the surface of the copper wiring is formed using the same film forming apparatus as that for forming the copper wiring. Therefore, it is not necessary to provide a special manufacturing apparatus, and the manufacturing process is not complicated. Further, since the coating does not require heat treatment at a high temperature of 800 ° C. or higher in a processing gas atmosphere such as ammonia gas, it can also be applied when a glass substrate that cannot withstand heating of 600 ° C. or higher is used as the substrate. . Moreover, the manufacturing method of the board | substrate for electronic devices of this invention of the structure where the copper wiring was formed on the board | substrate, and this copper wiring was coat | covered with the said copper compound layer is not limited to the above-mentioned manufacturing method, An ion implantation apparatus is used. A substrate having a copper wiring formed on the surface is arranged in the ion implantation chamber, and phosphorus ions, boron ions, bromine ions, nitrogen ions, etc. generated from the ion source through the mass analyzer in the ion implantation. The selected specific ions are accelerated by an accelerator, and the accelerated ions are doped on the surface of the copper wiring, and the copper wiring surface is any one of a copper nitride film, a copper phosphide film, a copper boride film, and a copper bromide film. It can also be manufactured by an ion implantation method (ion doping method) or the like for forming a coating film.

In order to solve the above problems, a method for manufacturing a substrate for electronic equipment according to the present invention includes mounting a substrate in a deposition chamber and supplying a first processing gas containing at least nitrogen gas or ammonia gas to the deposition chamber. Forming a copper nitride film on the surface of the substrate by vapor deposition, then supplying an inert gas into the film formation chamber, forming a copper film on the surface of the copper nitride film by vapor deposition, and forming the copper nitride film and the above A wiring is formed by patterning a laminated film with a copper film, and then a second processing gas containing at least nitrogen gas or ammonia gas is supplied into the plasma processing chamber so that the outer surface of the wiring is covered with a copper nitride coating. It is characterized by processing. According to another aspect of the present invention, there is provided a method for manufacturing a substrate for electronic equipment, comprising: mounting a substrate in a deposition chamber; and providing a first processing gas containing at least a PH ₃ gas in the deposition chamber. Supply, form a copper phosphide film on the substrate surface by vapor deposition, then supply an inert gas into the film formation chamber, form a copper film on the copper phosphide film surface by vapor deposition, and perform the phosphation A wiring film is formed by patterning a laminated film of a copper film and the copper film, and then a second processing gas containing at least a PH ₃ gas is supplied into the plasma processing chamber, and the outer surface of the wiring is coated with a copper phosphide film. The plasma processing may be performed so as to cover the surface.

In addition, in order to solve the above-described problems, the method for manufacturing a substrate for electronic equipment according to the present invention includes mounting a substrate in a film formation chamber and containing at least B ₂ H ₆ gas in the film formation chamber. A gas is supplied, a copper boride film is formed on the surface of the substrate by an evaporation method, an inert gas is then supplied into the film formation chamber, a copper film is formed on the surface of the copper boride film by an evaporation method, and A laminated film of the copper boride film and the copper film is patterned to form a wiring, and then a second processing gas containing at least B ₂ H ₆ gas is supplied into the plasma processing chamber, and the outer surface of the wiring is formed on the outer surface of the wiring. The plasma treatment may be performed so as to cover with the copper chloride coating. In addition, in order to solve the above problems, a method for manufacturing a substrate for electronic equipment according to the present invention includes mounting a substrate in a deposition chamber and supplying a first processing gas containing at least HBr gas to the deposition chamber. Then, a copper bromide film is formed on the substrate surface by vapor deposition, then an inert gas is supplied into the film formation chamber, a copper film is formed on the copper bromide film surface by vapor deposition, and the copper bromide is formed. A wiring is formed by patterning a laminated film of the film and the copper film, and then a second processing gas containing at least HBr gas is supplied into the plasma processing chamber so that the outer surface of the wiring is covered with a copper bromide film. It may be characterized by plasma treatment.

  According to the method for manufacturing an electronic device substrate of the present invention having any one of the above-described structures, a wiring structure formed by coating the outer surface of a copper wiring with the copper compound layer is formed on a substrate having at least a surface insulating surface. The board | substrate for electronic devices of this invention of the provided structure can be manufactured. Further, the same film forming apparatus as the one in which the copper wiring is formed on any one of the copper nitride film, the copper phosphide film, the copper boride film, and the copper bromide film covering the outer peripheral surface (outer surface) of the copper wiring. Therefore, it is not necessary to provide a special manufacturing apparatus and the manufacturing process is not complicated. Further, since the coating does not require heat treatment at a high temperature of 800 ° C. or higher in a processing gas atmosphere such as ammonia gas, it can also be applied when a glass substrate that cannot withstand heating of 600 ° C. or higher is used as the substrate. .

  In addition, the method for manufacturing a substrate for electronic equipment according to the present invention having a structure in which a wiring structure formed by coating the outer surface of a copper wiring with the copper compound layer is provided on a substrate having at least a surface of the surface is manufactured as described above. Without limitation to the method, a substrate having a copper film formed on the surface thereof is arranged in an ion implantation chamber constituting an ion implantation apparatus, and phosphorus ions and boron ions generated from an ion source through a mass analyzer in the ion implantation. Specific ions selected from bromine ions, nitrogen ions, etc. are accelerated by an accelerator, and the accelerated ions are doped into the surface of the copper film (ion implantation method) to form a copper nitride film, a copper phosphide film, a boron Either a copper halide film or a copper bromide film is formed, then a copper film is formed on the surface of the film by vapor deposition, and a laminated film of the film and the copper film is patterned and arranged. Then, specific ions selected from phosphorus ions, boron ions, bromine ions, nitrogen ions, etc. generated from the ion source via the mass analyzer are accelerated by an accelerator, and the accelerated ions are connected to the wiring The outer surface of the wiring can be doped (ion implantation method) to cover the outer surface of the wiring with any one of a copper nitride coating, a copper phosphide coating, a copper boride coating, and a copper bromide coating. In the method for manufacturing a substrate for electronic equipment of the present invention, a vacuum vapor deposition method or a sputter vapor deposition method can be employed as the vapor deposition method.

  In order to solve the above problems, an electronic device according to the present invention is characterized by using the electronic device substrate of the present invention having any one of the above-described configurations. According to the electronic device of the present invention, since the substrate for electronic device of the present invention using the copper wiring as the low resistance wiring is provided, the signal voltage drop and the wiring delay due to the wiring resistance hardly occur, and the wiring is long. There is an advantage that it is possible to easily realize a display device and the like that are optimal for large-area display and high-detail display with thin wiring. In addition, since the electronic device substrate of the present invention free from disconnection failure or corrosion is provided, an electronic device having good characteristics can be provided.

  As described above, according to the present invention, when low-resistance copper is used as an electrode or a wiring material, the electronic device can improve the oxidation resistance against moisture and resist stripping solution, and can improve the acid resistance against etching agents and the like. It is possible to provide a circuit board and a manufacturing method thereof, and an electronic device including such a substrate for electronic equipment.

BEST MODE FOR CARRYING OUT THE INVENTION

  Each embodiment of the present invention will be described in detail below, but the present invention is not limited to these embodiments. FIG. 1 shows a main part of a first embodiment in which an electronic device of the present invention is applied to a liquid crystal display device. A liquid crystal display device 30 of this example is a thin film transistor array of an embodiment of a substrate for an electronic device of the present invention. A substrate 31, a transparent counter substrate 32 provided in parallel with the thin film transistor array substrate 31, and a liquid crystal layer 33 sealed between the thin film transistor array substrate 31 and the counter substrate 32 are provided. ing. As in the conventional structure shown in FIG. 15, the thin film transistor array substrate 31 has a large number of vertical source wirings and a large number of horizontal gate wirings in a matrix when viewed from the upper surface side of the counter substrate 32. In this way, each of a large number of regions surrounded by the source wiring and the gate wiring is a pixel portion, and each region corresponding to each pixel portion is made of a transparent conductive material such as ITO (indium tin oxide). A pixel electrode 35 is formed, and a thin film transistor is provided in the vicinity of each pixel electrode 35.

FIG. 1 is an enlarged view of a portion of a thin film transistor provided in a region corresponding to one pixel portion surrounded by a source wiring and a gate wiring, and a peripheral portion thereof. A thin film transistor array substrate 31 has a large number of pixel portions. A display screen as the liquid crystal display device 30 is formed in alignment. In the thin film transistor array substrate 31 of this embodiment, a gate electrode 40 is provided on a substrate 36 having at least a surface insulating surface in each pixel portion, and a gate insulating film 41 is provided so as to cover the gate electrode 40 and the substrate 36. In addition, a semiconductor active film 42 smaller than the gate electrode 40 is stacked on the gate insulating film 41 on the gate electrode 40, and ohmic contact films 43 and 44 made of n ⁺ layers or the like are formed on both ends of the semiconductor active film 42. The semiconductor active film 42 is stacked so as to be aligned with the end of the semiconductor active film 42 and separated from each other with a gap in the center of the semiconductor active film 42. As the substrate 36 here, a glass substrate or a substrate on which a SiN _x film 36a is formed can be used. Here, the gate electrode 40 is obtained by coating a copper layer (copper wiring) 40a with one of the copper compound layers 40b selected from copper phosphide, copper boride, copper oxalate, and copper nitride.

Next, the upper and left sides of the ohmic contact film 43 on the left side of FIG. 1 (the side away from the pixel electrode 35 shown in FIG. 1), the left side of the semiconductor active film 42 thereunder, and the gate insulating film 41 continuous therewith. A low resistance silicon compound film 45 made of an a-Si: n ⁺ layer, chromium silicide, etc. is provided so as to cover a part of the upper surface of the semiconductor layer, that is, to cover the overlapping part (overlapping part) of the semiconductor active film 42 and the ohmic contact film 43. A source electrode 46 is formed thereon. Here, the source electrode 46 is obtained by coating a copper layer (copper wiring) 46a with one of the copper compound layers 46b selected from copper phosphide, copper boride, copper oxalate, and copper nitride.

In addition, the upper and right sides of the ohmic contact film 44 on the right side of FIG. 1 (the side close to the pixel electrode 35 shown in FIG. 1), the right side of the semiconductor active film 42 thereunder, and the upper surface of the gate insulating film 41 continuous therewith. A low resistance silicon compound film 47 made of an n ⁺ layer or the like is provided so as to cover a part of the semiconductor active film 42, that is, to cover the overlapping portion of the semiconductor active film 42 and the ohmic contact film 43, and a drain electrode 48 is formed thereon. . Here, the drain electrode 48 is formed by coating a copper layer (copper wiring) 48a with any one of the copper compound layers 48b selected from copper phosphide, copper boride, copper oxalate, and copper nitride. Further, a passivation film 49 is provided on each of these films to cover them, and a pixel electrode 35 is formed on the passivation film 49 on the right end of the drain electrode 48. The drain electrode 48 is connected via a connection conductor 51 provided in a contact hole (conduction hole) 50 formed in the passivation film 49.

  On the other hand, a color filter 52 and a common electrode film 53 are laminated in order from the counter substrate 32 side on the liquid crystal side of the counter substrate 32 provided for the thin film transistor array substrate 31. The color filter 52 transmits light that passes through a portion that contributes to display in a pixel region provided with a black matrix 54 and a pixel electrode 35 that covers a thin film transistor portion, a gate wiring portion, and a source wiring portion that do not contribute to display. In addition, the color pixel portion 55 for performing color display is mainly configured. These color pixel portions 55 are required when the liquid crystal display device has a color display structure, and are provided for each pixel portion. For example, R (red) is used so that the adjacent pixel portions have different colors. ), G (green), and B (blue) ternary colors are arranged regularly or randomly so that there is no color deviation. 1, the alignment films provided on the liquid crystal side of the thin film transistor array substrate 31 and the liquid crystal side of the counter substrate 32 are omitted, and are provided on the outside of the thin film transistor array substrate 31 and the outside of the counter substrate 32. The polarizing plate is omitted.

  In the thin film transistor array substrate 31 provided in the liquid crystal display device 30 shown in FIG. 1, an acid-based etching agent having oxidizing power used when etching other layers in a later process is used as the gate electrode 40 or the source electrode. The copper compound layers 40b, 46b, and 48b are formed on the surface even when they penetrate into the electrode 46 and the drain electrode 48. Therefore, the copper layer is hardly damaged by the etching agent, and the occurrence of disconnection failure can be prevented. The degree of freedom of the etching agent used is great. Further, even if the resist stripping solution used in the photolithography process penetrates into the gate electrode 40, the source electrode 46, and the drain electrode 48, the copper compound layers 40b, 46b, and 48b are formed on the surface. The copper layer is not easily oxidized by the stripping solution, and corrosion can be prevented. Moreover, since the copper compound layers 40b, 46b, and 48b are formed on the surface of the gate electrode 40, the source electrode 46, and the drain electrode 48, an oxide layer is formed on the surface of the electrode due to the presence of moisture before etching. It is difficult to be damaged by an etching agent having no oxidizing power, and it is possible to prevent occurrence of disconnection failure.

Therefore, according to the thin film transistor array substrate 31 of the embodiment, the oxidation resistance against moisture and resist stripping solution can be improved without impairing the characteristics of using low resistance copper as an electrode or wiring material, and the acid resistance against an etching agent or the like. Therefore, it is possible to prevent disconnection failure and corrosion, and since the degree of freedom of the etching agent used is large, the process after electrode formation is not easily restricted. In the thin film transistor array substrate 31 of the embodiment, the copper compound layers 40b, 46b, and 48b covering the copper layers 40a, 46a, and 48a are formed by using the same film forming apparatus as that for forming the copper layers 40a, 46a, and 48a. Therefore, it is not necessary to provide a special manufacturing apparatus, and the manufacturing process is not complicated. Further, since the copper compound layers 40b, 46b, and 48b do not require heat treatment at a high temperature of 800 ° C. or higher in a processing gas atmosphere such as ammonia gas, a glass substrate that cannot be heated at 600 ° C. or higher is used as the substrate. It can also be applied to. Further, in the one I was used to form a the SiN _x film 36a on the surface as the substrate 36, since the SiN _x film 36a is interposed between the gate electrode 40 and the substrate 36, SiO in the substrate ₂ Even if oxygen is contained, the oxygen can be prevented from entering the gate electrode 40 and the interface between the gate electrode 40 and the substrate 36 can be prevented from being oxidized.

  According to the liquid crystal display device 30 of the embodiment, since the thin film transistor array substrate 31 as described above is provided, a signal voltage drop or wiring delay due to wiring resistance is unlikely to occur, and a large-area display in which wiring becomes long or There is an advantage that it is possible to easily realize a display device that is optimal for high-detail display in which the wiring becomes thin. In addition, since the thin film transistor array substrate 31 free from disconnection failure or corrosion is provided, a liquid crystal display device with good characteristics can be provided.

  Next, an example in which the method for manufacturing a substrate for electronic equipment of the present invention is applied to a method for manufacturing a thin film transistor array substrate having the structure shown in FIG. 1 will be described. FIG. 2 is a schematic configuration diagram showing a film forming chamber of a thin film manufacturing apparatus suitably used in the method for manufacturing the thin film transistor array substrate of the embodiment, and FIG. 3 is a plan view showing the entire configuration of the thin film manufacturing apparatus. FIG. 4 is an enlarged side view of a part of the thin film manufacturing apparatus shown in FIG. FIG. 2 shows a film forming chamber (processing chamber) that can be maintained in a reduced pressure state. The film forming chamber 60 is connected to the side of the transfer chamber 61 via a gate valve 62 as shown in FIG. . In addition to the film forming chamber 60, a rotor chamber 63, an unrotor chamber 66, and a stocker chamber 65 are connected around the transfer chamber 61 so as to surround the transfer chamber 61, respectively. Between them, gate valves 66, 67, 68 are provided, respectively. As described above, the film forming chamber 60, the transfer chamber 61, the rotor chamber 63, the unrotor chamber 66, and the stocker chamber 65 constitute the thin film manufacturing apparatus A '.

  As shown in FIG. 2, the film formation chamber 60 is provided with a first electrode 70 on the top, a target 71 is detachably mounted on the bottom surface of the first electrode 70, and the film formation chamber 60. A second electrode 72 is provided on the bottom of the substrate, and a substrate 36 having at least an insulating surface is detachably mounted on the upper surface of the second electrode 72. As a material forming the target 71, copper is used when forming the gate electrode 40, the source electrode 46, and the drain electrode 48, and when forming an a-Si: n + layer, n-type a-Si: n + is used. P-doped Si for generation is used. As the substrate 36, a glass substrate can be suitably used when a thin film transistor array substrate is manufactured. For the mounting of the target 71, a generally known target mounting mechanism such as an electrostatic chuck can be used. The first electrode 70 includes a base body 70a made of a conductive material and a protective layer 70b made of an oxide film, nitride film, fluoride film, or the like formed on the surface of the base body 70a.

  A first AC power source 75 is connected to the first electrode 70, and a matching circuit 75a is incorporated between the first electrode 70 and the first AC power source 75. The circuit 75a has an effect of making the reflected wave of the high frequency power zero. A DC power supply 78 is connected to the first electrode 70 via a band pass filter 77 such as an impedance adjusting low pass filter. This band pass filter 77 adjusts the impedance of the circuit to infinity so that no high frequency is applied to the DC power supply 78. Further, a second AC power supply 80 is connected to the second electrode 72, and a matching circuit having the same effect as the matching circuit 75a is provided between the second electrode 72 and the second AC power supply 80. 80a is incorporated. The film formation chamber 60 includes an exhaust unit 60a for evacuation and gas exhaust, a reaction gas supply mechanism 60b into the film formation chamber 60, etc., but FIG. These are described in a simplified manner.

  Next, the transfer chamber 61 is provided with a link-type transfer mechanism (magic hand) 69, and the transfer mechanism 69 is rotatable about a support shaft 74 erected at the center of the transfer chamber 61. The target 71 is taken out from the cassette 79 provided and placed in the stocker chamber 65 and transferred to the film forming chamber 60 as necessary, so that the target 71 can be mounted on the first electrode 70 of the film forming chamber 60. ing. The cassette 79 also stores a dummy target 71a so that the dummy target 71a can be transferred to the film forming chamber 60 as needed.

  The thin film production apparatus shown in FIGS. 2 to 4 includes one or more thin films (for example, a copper film for forming the gate electrode 40, a copper nitride film covering the surface, and copper phosphide) in one film forming chamber 60. One of a film, a copper boride film, a copper bromide film, a gate insulating film 41, a semiconductor active film 42, ohmic contact films 43 and 44, low resistance silicon compound films 45 and 47, and a source electrode 46, a copper nitride film covering the surface, a copper phosphide film, a copper boride film, a copper bromide film, a copper film for forming the drain electrode 48, and this This is an apparatus capable of continuously forming a copper nitride film, a copper phosphide film, a copper boride film, or a copper bromide film) covering the surface. That is, in the film formation chamber 60, CVD film formation (film formation covering the gate insulating film, the semiconductor active film, the copper film of the gate electrode, the film covering the copper film of the source electrode, and the film covering the copper film of the drain electrode) And sputtering deposition (deposition of ohmic contact film, low resistance silicon compound film, copper film of gate electrode, copper film of source electrode, copper film of drain electrode) can be performed by switching the power source. First, when the film forming chamber 60, the transfer chamber 61, and the stocker chamber 65 are depressurized, the gate valves 62 and 18 are opened, and the glass substrate 36 is attached to the second electrode 72 by the transfer mechanism 33. If the gate valve 62 is closed from this state, a thin film such as the gate electrode 40 is sequentially formed on the substrate 36 according to the following steps.

(1) Film formation process of copper film of gate electrode The film forming chamber 60 is set to an Ar gas atmosphere, a target 71 made of copper is attached to the first electrode 70, and the DC power supply 78 or the first AC power supply 75 is operated. The first power (at least one of DC power and AC power) is applied to the target 71 and the second AC power supply 80 is operated to apply the second AC power to the glass substrate 36 by sputtering. Then, a copper film is formed by sputtering to form a copper film 40c on the substrate 36 as shown in FIG.
(2) Gate electrode copper layer patterning step A resist is applied to the surface of the copper film 40c, pattern exposure is performed, and unnecessary portions are removed by etching, followed by patterning for removing the resist, as shown in FIG. 5B. A copper layer (copper wiring) 40a is formed.

(3) Film formation step of copper compound layer of gate electrode The target 71 made of copper is removed from the first electrode 70 and a dummy target 71a made of Si, SiO ₂ or the like is mounted. The processing gas is supplied into the film forming chamber 60 while the mounted glass substrate 36 is left as it is. As a processing gas used here, when forming a copper nitride film, a mixed gas of nitrogen gas or ammonia gas is used. When forming a copper phosphide film, PH ₃ gas is used, and a copper boride film is formed. When forming, a mixed gas with B ₂ H ₆ gas is used, and when forming a copper bromide film, HBr gas is used. Note that the processing gas here may contain an inert gas such as Ar or hydrogen gas. The flow rate of the processing gas is approximately the same as that in the CVD process for forming the gate insulating film.

Next, a high frequency of about 40 MHz is supplied from the first AC power source 75 to the first electrode 70, the load potential is floated to generate plasma, and further, the second AC power source 80 applies to the second electrode 72. A high frequency power having a frequency of about 13.6 MHz is applied to deposit components in the processing gas on the copper film 40c, and N, P, B, Br, etc. in the components react with copper to form the copper layer 40a. When plasma treatment is performed so that the surface is covered with a film such as a copper nitride film, a copper phosphide film, a copper boride film, or a copper bromide film, the surface of the copper layer 40a becomes a copper compound layer 40b as shown in FIG. As a result, the gate electrode 40 covered with is obtained. In this step, the power applied to the substrate 36 is about 0.5 to 2 W / cm ² . The plasma treatment time is about 10 seconds to 10 minutes, preferably about 1 minute to 3 minutes. A longer plasma treatment time can increase the thickness of the copper compound layer. However, if the thickness of the compound layer becomes too large, the specific resistance decreases.

(4) CVD film forming process of gate insulating film (silicon nitride film) 41 The film forming chamber 60 is set to a SiH ₄ + NH ₃ + N ₂ mixed gas atmosphere, a dummy target 71a is mounted on the first electrode 70, and the first AC A CVD film is formed by supplying a high frequency of 200 MHz from the power source 75 to the first electrode 70, floating the load potential, generating plasma, and depositing a silicon nitride film on the substrate 36, as shown in FIG. Such a gate insulating film 41 is formed. In the case of this CVD film formation, the frequency for supplying the dummy target 71a attached to the first electrode 70 is set so as not to be sputtered, the ion energy applied to the first electrode 70 is reduced, and the second High frequency power is supplied to the electrode 72 to control ion energy applied to the substrate 36.
(5) CVD film forming process of semiconductor active film (a-Si layer) 42 The film forming chamber 60 is set to a SiH ₄ + H ₂ mixed gas atmosphere, and the first AC is mounted with the dummy target 71a attached to the first electrode 70. A high frequency of about 200 MHz is supplied from the power source 75 to the first electrode 70, and a high frequency power is supplied from the second AC power source 80 to the second electrode 72 to control ion energy applied to the glass substrate 36. The a-Si layer is formed, and the semiconductor active film 42 is formed.

(6) Sputter deposition process of ohmic contact film (a-Si: n + layer) 43a The deposition chamber 60 is in an Ar gas atmosphere, and P-doped Si for generating an a-Si: n + layer is formed on the first electrode 70. A target 71 consisting of the following is mounted, a high frequency of about 13.6 MHz is supplied from the first AC power supply 75 to the first electrode 70, and the load potential applied from the DC power supply 78 is -200V for sputtering. An ohmic contact film 43 a is formed on the semiconductor active film 42.
(7) Patterning process of semiconductor active film 42 and ohmic contact film 43a A resist is applied to the surface of ohmic contact film 43a, pattern exposure is performed, and unnecessary portions are removed by etching, followed by patterning for removing the resist. As shown in D, an island-like semiconductor active film 42 and an ohmic contact film 43a smaller than the gate electrode 40 are obtained. The formation position of the semiconductor active film 42 and the ohmic contact film 43 a is a position facing the gate electrode 40 in the gate insulating film 41 on the gate electrode 40.
(8) Sputter deposition process of low resistance silicon compound film (a-Si: n + layer) 45a The low resistance silicon compound film 45a is formed on the ohmic contact film 43a so as to cover the ohmic contact film 43a and the gate insulating film 41. The film is formed in the same manner as the sputtering film formation.

(9) Sputter deposition process of the copper film of the source electrode 46 and the drain electrode 48 The deposition chamber 60 is set to an Ar gas atmosphere, a target 71 made of copper is attached to the first electrode 70, and the DC power source 78 or the first As shown in FIG. 5D, sputtering is performed by operating the AC power supply 75 to apply the first power to the target 71 and operating the second AC power supply 80 to apply the second AC power to the glass substrate 36. Such a copper film 46c is formed by sputtering.
(10) Formation process of ohmic contact films 43, 44, low resistance silicon compound films 45, 47, and copper layers of the source electrode 46 and the drain electrode 48 The upper part of the central part of the semiconductor active film 42 is removed by etching, and the semiconductor By removing the ohmic contact film 43a, the low-resistance silicon compound film 45a, and the copper film 46c on the central portion of the active film 42, they are separated from each other on both end portions of the semiconductor active film 42 as shown in FIG. The ohmic contact films 43 and 44 are formed, and the low resistance silicon compound films 45 and 47, the copper layer 46a of the source electrode 46, and the copper layer 48a of the drain electrode 48 are formed on the ohmic contact films. be able to.

(11) Step of forming copper compound layers 46b and 48b of source electrode 46 and drain electrode 48 Plasma is applied to the surfaces of copper compound layers 46b and 48b of source electrode 46 and drain electrode 48, and to the surface of copper layer 40a of gate electrode 40. Plasma treatment is performed in substantially the same manner as the treated method, and a source electrode 46 and a drain electrode 48 in which the surfaces of the copper layers 46a and 48a are covered with the copper compound layers 46b and 48b as shown in FIG. 6B are obtained.
(12) CVD Film Formation Step of Passivation Film 49 A passivation film 49 made of silicon nitride is formed in substantially the same manner as the CVD film formation process of the gate insulating film 41 so as to cover the semiconductor active film 42, the source electrode 46, and the drain electrode 48. Film.

(13) Pixel electrode formation step After forming an ITO layer on the passivation film 49, the pixel electrode 35 is formed by patterning, and then the passivation film 49 is etched by a dry method or a combination of a dry method and a wet method. After the contact hole 50 is formed, a layer made of a conductive material is formed, and then patterning is performed to form the connection conductor portion 51 over the bottom and inner wall surfaces of the contact hole 50 and the top surface of the passivation film 49 as shown in FIG. When the drain electrode 48 and the pixel electrode 35 are connected through the connection conductor portion 51, the thin film transistor array substrate 31 similar to that shown in FIG. 1 is obtained. When a substrate having a SiN _x film 36a formed on the surface is used as the substrate 36, the same method as the CVD film forming step of the gate insulating film 41 described above is performed before the copper layer 40a is formed on the substrate 36. A SiN _x film is formed in advance. Although the source wiring is not shown in the drawing, it may be formed at the same time as the film formation and the etching when the source electrode 46 is formed on the gate insulating film 41.

  If the thin film transistor array substrate is manufactured by the method described above, the copper compound layers 40b, 46b, and 48b can be formed using the same film forming apparatus as that for forming the copper layers 40a, 46a, and 48a. There is no need to provide a manufacturing apparatus, and the manufacturing process is not complicated. Further, since the copper compound layers 40b, 46b, and 48b do not require heat treatment at a high temperature of 800 ° C. or higher in a processing gas atmosphere such as ammonia gas, a glass substrate that cannot withstand heating at 600 ° C. or higher is used as the substrate. It can be applied to the case of using as. In the above embodiment, the case where the low resistance silicon compound film is provided between the ohmic contact film 43 and the source electrode 46 and between the ohmic contact film 44 and the drain electrode 48 has been described. May not necessarily be provided. In the method of manufacturing the thin film transistor array substrate according to the first embodiment described above, the case where the copper layer (copper wiring) constituting the electrode is formed in the processing chamber constituting the plasma apparatus as shown in FIG. However, the copper layer may be formed by a normal sputtering apparatus.

FIG. 7 shows a main part of the second embodiment in which the electronic apparatus of the present invention is applied to a liquid crystal display device. The liquid crystal display device 30a of this example is the liquid crystal of the first embodiment shown in FIG. A difference from the display device is that the gate electrode (wiring structure) 40 includes a thin film transistor array substrate 31a composed of a copper layer (copper wiring) 40a and a copper compound layer 40b covering the outer peripheral surface (outer surface) thereof. That is, the copper compound layer 40b is also formed between the substrate 36 and the copper layer 40a. According to the liquid crystal display device 30a of the second embodiment, since the copper compound layer 40b is formed between the copper layer 40a of the gate electrode and the substrate 36, even if the material forming the substrate is a glass substrate. It is possible to prevent the SiO ₂ oxygen in the glass substrate from entering the copper wiring and to prevent the interface between the gate electrode 40 and the substrate 36 from being oxidized.

Next, in the method of manufacturing the thin film transistor array substrate 31a having the structure shown in FIG. 7, before the copper film 40c is formed on the substrate 36, a film 40e for forming a copper compound layer between the copper film and the substrate is formed. After performing the film process (P-1), the copper film 40c is formed on the coating film 40e in the same manner as the above-described (1) film formation process of the copper film of the gate electrode, and then the above-described (2) gate. Manufacture of the thin film transistor array substrate 31 of the first embodiment described above, except that a patterning step (2-2) of a laminated film of a film 40e and a copper film 40c as described later is performed instead of the patterning step of the copper layer of the electrode. It is the same as the method.
(P-1) Film formation step of the copper film 40c and the film 40e between the substrates A target 71 made of copper is attached to the first electrode 70, the processing gas is supplied into the film formation chamber 60, and the DC power supply 78 is used. The first AC power supply 75 is operated to apply the first power (at least one of DC power and AC power) to the target 71 and the second AC power supply 80 is operated to generate the second AC power. A film 40e such as a copper nitride film, a copper phosphide film, a copper boride film, or a copper bromide film is formed on the substrate 36 by sputtering applied to the glass substrate 36 as shown in FIG.

  (2-2) Patterning process of coating 40e and copper film 40c A resist is applied to the surface of copper film 40c, pattern exposure is performed, and patterning is performed to remove the resist after removing unnecessary portions of copper film 40c and coating 40e by etching. Then, as shown in FIG. 8B, a copper layer (copper wiring) 40a and a copper compound layer 40b between this and the substrate 36 are formed. According to the method of manufacturing the thin film transistor array substrate of the second embodiment, any one of the copper nitride film, the copper phosphide film, the copper boride film, and the copper bromide film is formed by forming the copper film 40c. Therefore, it is not necessary to provide a special manufacturing apparatus and the manufacturing process is not complicated. Further, since the coating 40e does not require heat treatment at a high temperature of 800 ° C. or higher in a processing gas atmosphere such as ammonia gas, the coating 40e is also applicable when a glass substrate that cannot withstand heating of 600 ° C. or higher is used as the substrate. it can.

  In the method of manufacturing the thin film transistor array substrate according to the second embodiment described above, the copper layer constituting the electrode in the processing chamber constituting the plasma apparatus as shown in FIG. 2, and the copper layer between the copper layer and the substrate Although the case where the compound layer is formed has been described, the copper compound layer may be formed by a plasma CVD apparatus, and the copper layer may be formed by a normal sputtering apparatus. In the above embodiments, the case where the electronic device substrate and the manufacturing method thereof and the electronic device of the present invention are applied to the thin film transistor array substrate, the manufacturing method thereof, and the liquid crystal display device has been described. And can be applied to a semiconductor integrated device.

  (Embodiment 1) Using the thin film production apparatus shown in FIGS. 2 to 4, the film formation chamber 60 is set to an Ar gas atmosphere, the target 71 made of copper is mounted on the first electrode 70, and the DC power supply 78 is operated. A copper film having a film thickness of 2000 angstroms was formed on the glass substrate by a sputtering method in which DC power was applied to the target 71 and the second AC power supply 80 was operated to apply high frequency power to the glass substrate 36.

Next, the target 71 made of copper is removed from the first electrode 70 and a dummy target 71a made of Si, SiO ₂ or the like is attached, while the glass substrate 36 attached to the second electrode 72 is left as it is. NH ₃ gas was supplied as a processing gas into the film chamber 60 at a flow rate of 600 ccm. Next, a high frequency of 40 MHz is supplied from the first AC power supply 75 to the first electrode 70, the load potential is floated to generate plasma, and further, the frequency is supplied from the second AC power supply 80 to the second electrode 72. A high frequency power of about 13.6 MHz is applied, and nitrogen in the processing gas is deposited on the copper film and reacted with copper to perform plasma treatment for 1 minute, and the surface of the copper film is nitrided with a thickness of 200 angstroms. A wiring layer covered with a copper layer was produced. In this step, the power applied to the substrate 36 was set to about 0.5 to 2 W / cm ² . When the specific resistance of the wiring layer obtained in Example 1 was measured, it was 2.05 Ω · cm.

Example 2 A wiring layer was produced in the same manner as in Example 1 except that the plasma treatment time was 3 minutes. The wiring layer obtained here had a copper nitride layer thickness of 400 angstroms. The specific resistance of the wiring layer obtained in Example 2 was measured and found to be 2.11 Ω · cm.
(Comparative Example 1) A copper film having a film thickness of 2000 angstroms was formed on a glass substrate in the same manner as in Example 1 to form a wiring layer made only of a copper film. The specific resistance of the wiring layer obtained in Comparative Example 1 was measured and found to be 1.9 Ω · cm.

  (Experimental Example) The wiring layers obtained in Examples 1 and 2 and Comparative Example 1 were immersed in ammonium persulfate (etching solution) for 1 minute, taken out from the stripping solution, rinsed and dried. The chemical resistance was examined. When the etching rate of each wiring layer was measured, the wiring layer of Example 1 was 200 angstroms / minute, the wiring layer of Example 2 was 70 angstroms / minute, and the wiring layer of Comparative Example 1 was 1280 angstroms / minute. It was. The state of the conductive layers of Examples 1 and 2 and Comparative Example 1 before and after immersion in ammonium persulfate was observed with an atomic force microscope (AFM). The results are shown in FIGS. FIG. 9 is a photograph showing the metal structure on the surface of the wiring layer of Example 1 before immersion in ammonium persulfate, and FIG. 10 is a photograph showing the metal structure on the surface of the wiring layer in Example 1 after immersion in ammonium persulfate. FIG. 11 is a photograph showing the metal structure on the surface of the wiring layer of Example 2 before immersion in ammonium persulfate, and FIG. 12 is a photograph showing the metal structure on the surface of the wiring layer in Example 2 after immersion in ammonium persulfate. FIG. 13 is a photograph showing the metal structure on the surface of the wiring layer of Comparative Example 1 before immersion in ammonium persulfate, and FIG. 14 is a photograph showing the metal structure on the surface of the wiring layer in Comparative Example 1 after immersion in ammonium persulfate.

  As is clear from the results shown in FIGS. 9 to 14 and the measurement results of the etching rate, the wiring layer of Comparative Example 1 has a high etching rate by ammonium persulfate, and the copper film is etched almost entirely (surface protection). The rate is close to 0%.) Only a small amount of copper film remains on the surface of the glass substrate, and it can be seen that the etching solution is greatly damaged. On the other hand, in Examples 1 and 2, the etching rate by ammonium persulfate is larger than that in Comparative Example 1, and the surface protection rate of the wiring layer of Example 1 in which plasma treatment is 1 minute is 50%. The wiring layer of Example 2 with a treatment time of 3 minutes has a surface protection rate of 70%, the state of the surface of the wiring layer before and after immersion in the etching solution has not changed much, and is more resistant to chemicals than that of Comparative Example 1. It turns out that it is excellent. Here, the surface protection rate is the ratio of the total area of the surface portion remaining after the etching solution immersion to the wiring layer surface area (100%) before the etching solution immersion.

It is a figure which shows the cross section of the liquid crystal display device of 1st Embodiment concerning this invention, and a thin-film transistor array substrate. It is a block diagram which shows the film-forming chamber of the thin-film manufacturing apparatus used suitably for the manufacturing method of the thin-film transistor array substrate of 1st Embodiment concerning this invention. It is a top view which shows the whole structure of the manufacturing apparatus of the thin film used suitably for the manufacturing method of the thin-film transistor array substrate of 1st Embodiment concerning this invention. It is the side view to which a part of manufacturing apparatus of the thin film shown in FIG. 3 was expanded. It is a figure which shows the manufacturing method of the thin-film transistor array substrate of 1st Embodiment concerning this invention in process order. It is a figure which shows the manufacturing method of the thin-film transistor array substrate of 1st Embodiment concerning this invention in process order. It is a figure which shows the cross section of the liquid crystal display device of 2nd Embodiment concerning this invention, and a thin-film transistor array substrate. It is a figure for demonstrating the manufacturing method of the thin-film transistor array substrate of 2nd Embodiment concerning this invention. It is a photograph which shows the metal structure of the wiring layer surface of Example 1 before etching liquid immersion. It is a photograph which shows the metal structure of the wiring layer surface of Example 1 after etching liquid immersion. It is a photograph which shows the metal structure of the wiring layer surface of Example 2 before etching liquid immersion. It is a photograph which shows the metal structure of the wiring layer surface of Example 2 after etching liquid immersion. It is a photograph which shows the metal structure of the wiring layer surface of the comparative example 1 before etching liquid immersion. It is a photograph which shows the metal structure of the wiring layer surface of the comparative example 1 after immersion in etching liquid. 10 is a schematic plan view showing a pixel portion of an example of a thin film transistor array substrate provided in a conventional liquid crystal display device. FIG. 16 is a cross-sectional view illustrating the thin film transistor array substrate of FIG. 15.

Explanation of symbols

30, 30a ... liquid crystal display device, 31, 31a ... thin film transistor array substrate, 36 ... substrate, 36a ... SiN _x film, 40 ... gate electrode, 40a, 46a, 48a ... copper Layer, 40b, 46b, 48b ... copper compound layer, 40c, 46c ... copper film, 40e ... coating, 46 ... source electrode, 48 ... drain electrode, 60 ... film formation chamber .

Claims (10)

  A copper wiring is formed on a substrate having an insulating surface at least, and the copper wiring is covered with any copper compound layer selected from copper phosphide, copper boride, and copper oxalate. PCB for electronic equipment.   A wiring structure in which an outer surface of a copper wiring is covered with any copper compound layer selected from copper phosphide, copper boride, and copper oxalate is provided on a substrate having at least an insulating surface. An electronic device substrate characterized by the above.   3. The electronic device substrate according to claim 1, wherein the substrate has a silicon nitride film on a surface thereof. A substrate having a copper wiring formed on the surface thereof is disposed in a processing chamber that can be maintained in a reduced pressure state that constitutes the plasma apparatus, and a processing gas containing at least a PH ₃ gas is supplied into the processing chamber, and the copper wiring surface is A method for producing a substrate for electronic equipment, wherein plasma treatment is performed so as to cover with a copper phosphide film. A substrate having copper wiring formed on a surface thereof is disposed in a processing chamber that can be maintained in a reduced pressure state that constitutes the plasma apparatus, and a processing gas containing at least B ₂ H ₆ gas is supplied into the processing chamber, and the copper wiring A method for producing a substrate for electronic equipment, characterized in that plasma treatment is performed so that the surface is covered with a copper boride coating.   A substrate having copper wiring formed on the surface thereof is disposed in a processing chamber that can be maintained in a reduced pressure state that constitutes the plasma apparatus, a processing gas containing at least HBr gas is supplied into the processing chamber, and the surface of the copper wiring is smelled. A method for producing a substrate for an electronic device, wherein plasma treatment is performed so as to cover with a copper chloride coating. A substrate is mounted in the film formation chamber, a first processing gas containing at least a PH ₃ gas is supplied into the film formation chamber, a copper phosphide film is formed on the substrate surface by vapor deposition, and then the film formation chamber An inert gas is supplied to the surface, a copper film is formed on the surface of the copper phosphide film by vapor deposition, a wiring film is formed by patterning a laminated film of the copper phosphide film and the copper film, and then a plasma processing chamber And supplying a second processing gas containing at least a PH ₃ gas to the substrate so as to cover the outer surface of the wiring with a copper phosphide film. A substrate is mounted in the deposition chamber, a first processing gas containing at least B ₂ H ₆ gas is supplied into the deposition chamber, a copper boride film is formed on the substrate surface by vapor deposition, and then the formation An inert gas is supplied into the film chamber, a copper film is formed on the surface of the copper boride film by vapor deposition, a wiring film is formed by patterning the laminated film of the copper boride film and the copper film, and then plasma A method for manufacturing a substrate for electronic equipment, wherein a second processing gas containing at least B ₂ H ₆ gas is supplied into a processing chamber, and plasma processing is performed so that the outer surface of the wiring is covered with a copper boride coating.   A substrate is mounted in the film formation chamber, a first treatment gas containing at least HBr gas is supplied into the film formation chamber, a copper bromide film is formed on the substrate surface by vapor deposition, and then the film formation chamber is formed. An inert gas is supplied, a copper film is formed on the surface of the copper bromide film by vapor deposition, a wiring film is formed by patterning the laminated film of the copper bromide film and the copper film, and then in the plasma processing chamber A method for manufacturing an electronic device substrate, comprising: supplying a second processing gas containing at least HBr gas, and performing plasma processing so as to cover an outer surface of the wiring with a copper bromide film. The electronic device using the board | substrate for electronic devices of Claim 1 or 2.

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