JP2007059642A - Trimming switch - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a trimming switch capable of trimming even after packaging and not requiring driving power depending on reading conditions. <P>SOLUTION: In this trimming switch, a first terminal 108 of a capacitor 107, a gate terminal 117 of a reading transistor 101 and a second terminal 106 of a capacitor 104 are electrically connected to the same position to form an electric charge storage section 122. Since a conduction state between a source terminal 103 of the reading transistor 101 and a drain terminal 102 thereof changes depending on the quantity of charges stored in the charge storage section 122, turning on/off of a trimming element 119 can be performed without using power. This can solve problems that trimming after packaging is difficult in a technique for performing trimming by melting an aluminum fuse and that a trimming switch must be continuously supplied with bias power so that reading condition can be met and power consumption increases for maintaining reading conditions in a technique for performing trimming using an EEPROM. <P>COPYRIGHT: (C)2007,JPO&INPIT

Description

  The present invention relates to a trimming switch used for adjusting the electrical characteristics of an electronic device.

  As one of the above-described trimming switches, for example, a fuse made of an aluminum or polysilicon pattern is blown with a laser beam, and the on / off of a trimming element connected to the fuse is selected. A configuration example of a trimming switch for adjusting characteristics is known.

  For example, as described in Patent Document 1, when an aluminum fuse is used as a trimming switch and the aluminum fuse is blown with laser light, the laser light is more easily absorbed than aluminum, and the temperature is likely to rise due to laser light irradiation. An example of the structure of a trimming switch having a structure in which an aluminum fuse can be more easily blown by using titanium nitride as a sidewall of an aluminum wiring is shown.

  Further, an electrically rewritable non-volatile memory element (hereinafter abbreviated as EEPROM) is used as a trimming switch, and it is read out whether the memory content of the EEPROM is “OFF” or “ON”, and the trimming switch is set according to the memory content. A configuration example of a trimming switch capable of individually switching the operation to “OFF” or “ON” is known.

  For example, as shown in Patent Document 2, a storage transistor having a floating gate, a selection transistor in which the source of the storage transistor and the drain of the selection transistor are connected, and a gate at the intersection of the source of the storage transistor and the drain of the selection transistor A trimming switch is configured to have a connected pass transistor, and when power corresponding to the read bias of the EEPROM is supplied from the outside of the EEPROM, the on / off of the pass transistor is controlled by the stored contents of the storage transistor. Technology is shown.

JP 2000-58654 A US Pat. No. 5,055,169

  However, in the technique of performing the trimming by fusing the aluminum fuse disclosed in Patent Document 1 described above, the trimming including the characteristics of the peripheral circuit such as the characteristics of the analog circuit cannot be performed after mounting the semiconductor chip. It is difficult. In mounting, it is extremely difficult to correct characteristic changes due to stress or the like applied to the semiconductor chip by trimming. Furthermore, since the fuse once cut cannot be reconnected, there is a problem that re-correction at the stage of fine adjustment cannot be performed.

  In addition, an expensive laser trimming apparatus is required to perform the trimming process of fusing using a laser beam. Further, when laser trimming is performed, it is necessary to irradiate a laser beam in accordance with the position of the fuse, so that an alignment mechanism having high mechanical accuracy is required. For this reason, it takes time to align the laser beam, and there is a problem that the throughput is lowered. Further, it is necessary to increase the dimension of the trimming switch so as to keep a space larger than the focusing diameter of the laser beam so that adjacent fuses are not accidentally blown, which includes factors that hinder integration.

  In addition, when the technique described in Patent Document 2 described above is used, trimming is performed by electrically reading information stored in the memory transistor and controlling on / off of the trimming element. Can be suppressed.

  However, in order to make the setting of the trimming switch effective, it is necessary to always apply a bias under a read condition. Under read conditions, it is necessary to always apply an intermediate potential other than the ground and power supply voltage to the storage transistor and the selection transistor. Therefore, it is necessary to always activate a circuit that generates an intermediate potential, which causes a problem that power consumption increases. In addition, if the applied voltage fluctuates irregularly, such as immediately after the power is turned on, the trimming switch may irregularly turn on and off, possibly causing a signal different from the written information to be output. There is. Further, nine types of bias conditions including power supply voltage, ground, and high impedance state are required to perform writing, erasing, and reading, so that the peripheral circuit becomes complicated and requires a large pattern area, which hinders integration. It is a factor.

  SUMMARY OF THE INVENTION Accordingly, the present invention is to provide a trimming switch that solves the conventional problems as described above, has high throughput in the trimming process, and has low power consumption when reading after trimming.

  To achieve the above object, a trimming switch of the present invention has a first capacitor having a first terminal and a second terminal, a third terminal and a fourth terminal, and the first terminal of the first capacitor. And a third capacitor having a larger insulating layer thickness than the first capacitor, to which the third terminal is connected, a first drain terminal, a first gate terminal, and a first source terminal. The first drain terminal is connected to a first bias supply terminal for receiving a potential for erasing or writing charge information of the first capacitor, and the first gate terminal is a potential applied to a word line terminal. Is connected to the word line terminal so as to be transmitted to the first gate terminal, a voltage is applied to the first gate terminal through the word line terminal, and the first source terminal and the first drain terminal , A voltage applied to the first drain terminal through the first bias supply terminal is transmitted to the fourth terminal of the second capacitor through the first source terminal. A first transistor in which a fourth terminal of the second capacitor and the first source terminal are connected, a second drain terminal, a second gate terminal, and a second source terminal, The second drain terminal is connected to a second bias supply terminal to which a potential complementary to the first bias supply terminal is applied in order to erase or write the charge information of the first capacitor, and the second gate terminal is connected to the word A potential applied to the line terminal is connected to the word line terminal so that a potential is transmitted to the second gate terminal, and a voltage is applied to the second gate terminal through the word line terminal. Thus, when the conductive state is established between the second source terminal and the second drain terminal, the voltage applied to the second drain terminal through the second bias supply terminal passes through the second source terminal. The second terminal of the first capacitor and the second source terminal are connected to be transmitted to the second terminal of the first capacitor, and the second source terminal is other than the second terminal. Has a second transistor that is electrically isolated, a third source terminal, a third gate terminal, and a third drain terminal. The third terminal, the first terminal, and the third gate terminal are: A charge storage unit is formed which is connected and held in an electrically insulated state from other elements, and among the charges stored in the charge storage unit, the charge storage unit is stored in the third gate terminal. The third charge And a third transistor that takes one of a conductive state and a non-conductive state without receiving external power supply by modulating conductivity between the rain terminal and the third source terminal. .

  According to this configuration, the charge storage unit is formed in which the third terminal, the first terminal, and the third gate terminal are connected and electrically insulated from other elements. A trimming switch is configured without direct external power supply by directly modulating the conductivity between the third drain terminal and the third source terminal by the charge accumulated in the charge storage unit. Since the transistor 3 can be controlled to be either conductive or cut off, the trimmed information can be output without disturbing even when the potential applied to the trimming switch fluctuates immediately after the power is turned on. it can.

  Further, after the trimming, the conductivity between the third drain terminal and the third source terminal is modulated, so that the third transistor constituting the trimming switch is turned on or off without receiving external power supply. Therefore, it is possible to suppress the increase in power consumption required to drive the trimming switch by operating without supplying power to the trimming switch.

  Further, the trimming switch of the present invention described above is configured to connect the first terminal and the second terminal of the first capacitor in order to erase or write the charge stored in the charge storage unit through the first capacitor. The nonvolatile memory element is erased or written so as to be erased or written by controlling the amount of charge accumulated in the charge memory portion by a Fowler-Nordheim current generated when an electric field is supplied between them. It is configured.

  According to this configuration, the charge input / output portion of the trimming switch can be formed with a simple structure in which the capacitor layer thickness is partially changed.

  Hereinafter, an embodiment of a trimming switch according to the present invention will be described with reference to the drawings.

<Equivalent circuit of trimming switch>
FIG. 1 is an equivalent circuit of a trimming switch according to the present invention.

  The drain terminal 102 of the read transistor 101 is connected to the first terminal 120 of the trimming element 119. The source terminal 103 is connected to the second terminal 121 of the trimming element 119, and the connection portion is grounded. The second terminal 106 of the capacitor 104 is connected to the gate terminal 117 of the reading transistor 101.

  A first terminal 108 of the capacitor 107 is connected to the gate terminal 117 of the reading transistor 101 and the second terminal 106 of the capacitor 104, and forms a charge storage portion 122 that is electrically isolated from other elements.

  The drain terminal 114 of the drain transistor 113 is connected to the second bias supply terminal 124 in order to receive a bias for erasing and writing from the outside of the trimming switch 100. The source terminal 115 of the drain transistor 113 is connected to the first terminal 105 of the capacitor 104 so that charge can be exchanged through the capacitor 104. The gate terminal 125 of the drain transistor 113 is connected to a word line 118 that controls erasing and writing.

  The drain terminal 111 of the gate transistor 110 is connected to a first bias supply terminal 123 for receiving a bias from the outside of the trimming switch 100 in order to receive a bias for erasing and writing. The gate terminal 116 of the gate transistor 110 is connected to a word line 118 that controls erasing and writing.

  The source terminal 112 of the gate transistor 110 is connected to the second terminal 109 of the capacitor 107. Erasing and writing are performed by applying a high potential of, for example, about 15 V to the first bias supply terminal 123 or the second bias supply terminal 124 with the word line 118 turned “ON”. For example, when a high potential is applied to the first bias supply terminal 123, this potential is transmitted to the second terminal 106 of the capacitor 104 through the gate transistor 110, and a Fowler-Nordheim (hereinafter abbreviated as FN) current flows through the capacitor 104. Negative charges are accumulated in the memory portion 122, and the reading transistor 101 is turned off. On the other hand, when a high potential is applied to the second bias supply terminal 124, the read transistor 101 is turned “ON”.

  By controlling the charge movement using the FN current in this way, it is possible to form a charge movement mechanism having a structure that is easier to manufacture than the method of controlling the charge movement using hot carriers. In addition, the charge transfer mechanism can be manufactured with a small number of steps.

  In addition, since the trimming switch 100 is switched on and off purely electrically, trimming can be performed with a smaller area compared to a trimming method in which a fuse is melted away using laser light. Further, trimming can be performed at a higher speed than the method of irradiating laser light by mechanically matching the positional relationship between the irradiation position of the laser light and the trimming switch.

  Further, since the trimming switch 100 can be switched on and off purely, the trimming can be performed even after mounting, unlike the trimming method using laser light. Therefore, the characteristic change due to the stress applied to the semiconductor chip during mounting can be corrected by trimming.

  Furthermore, since the information of the trimming switch once written can be erased again, correction at the fine adjustment stage can be performed again, and trimming can be performed while monitoring the output signal, so that trimming can be performed more precisely. it can.

<Cross-sectional structure of trimming switch>
FIG. 2A is a layout diagram of a trimming switch according to the present invention, and FIG. 2B is a schematic cross-sectional view of FIG. 2 taken along AA′-BB ′. The second terminal 109 of the capacitor 107 is formed on the silicon substrate 200 so as to face the first terminal 108.

  The gate transistor 110 is formed so as to cross the word line 118. When the potential of the word line 118 is low, the potential applied to the drain terminal 111 of the gate transistor 110 is transmitted to the second terminal 109 of the capacitor 107. No writing or erasing occurs.

  The insulating layer 201 in the capacitor 104 region is thinner than the capacitor 107 and is formed so that the electric field concentrates in the capacitor 104 region.

  When the potential of the word line 118 is 15V, the potential applied to the drain terminal 111 by the gate transistor 110 is transmitted to the second terminal 109 of the capacitor 107. The applied voltage is transmitted from the second terminal 109 of the capacitor 107 to the first terminal of the facing capacitor 107, and is transmitted to the second terminal 106 of the capacitor 104 having a thinner insulating layer 201 than the capacitor 107. . Since the insulating layer 201 in the region of the capacitor 104 is thinner than the insulating layer 201 in the region of the capacitor 107, the first terminal 108 and the second terminal of the capacitor 107 are between the first terminal 105 and the second terminal 106 of the capacitor 104. Erasing and writing can be performed by applying an electric field stronger than that of the terminal 109 and moving charges using the FN current.

<Operation of trimming switch; reading>
The read operation of the trimming switch will be described again using the equivalent circuit diagram of the trimming switch shown in FIG.

  The read operation is realized by setting the word line 118 to 0V, for example, or by setting both the drain terminal 111 of the gate transistor 110 and the drain terminal 114 of the drain transistor 113 to 0V. Furthermore, it is established even when the power is turned off.

  In the read operation, the charge stored in the charge storage unit 122 is transmitted to the gate terminal 117 of the read transistor 101, and the read transistor 101 is turned on / off based on this charge amount.

  When the amount of charge in the charge storage unit 122 is large in the negative direction (the number of electrons stored in the charge storage unit 122 is large), the drain terminal 102 and the source terminal 103 of the reading transistor 101 are cut off. .

  On the other hand, when the amount of charge in the charge storage unit 122 is large in the positive direction (the number of electrons stored in the charge storage unit 122 is small), the drain terminal 102 and the source terminal 103 of the read transistor 101 are electrically connected. It becomes a state.

  Further, reading is determined only by the amount of charge stored in the charge storage unit 122, and reading can be executed without receiving external power supply. Therefore, power for reading is supplied to the trimming switch 100. Therefore, it is possible to obtain the trimming switch 100 that does not consume power after trimming. Since power is not consumed after trimming, the battery life can be improved by using it for portable devices or the like that have restrictions on power consumption.

  Further, the potential required for the reading operation is only 0 V, and there is an advantage that it is not necessary to apply a new potential.

<Operation of trimming switch; erasing, writing>
The erasing and writing operations of the trimming switch will be described again using the equivalent circuit diagram of the trimming switch shown in FIG. First, the erase operation will be described. When performing the erase operation, the word line 118 is set to 15 V, for example, and the gate transistor 110 and the drain transistor 113 are turned on. Then, the potential of the second bias supply terminal 124 is set to 0 V, for example, and the potential of the first bias supply terminal 123 is set to 15 V, for example. The voltage applied to the first bias supply terminal 123 passes through the gate transistor 110 and is applied to the first terminal 106 of the capacitor 104. The electrons pass through the capacitor 104 due to the FN current and are injected into the charge storage unit 122, so that negative charges are accumulated in the charge storage unit 122.

  Therefore, the gate terminal 117 of the reading transistor 101 has a negative potential, and the conduction state is “OFF”.

  Next, the write operation will be described. When performing a write operation, the word line 118 is set to 15 V, for example, and the gate transistor 110 and the drain transistor 113 are turned on. Then, the potential of the first bias supply terminal is set to 0 V, for example, and the potential of the second bias supply terminal is set to 15 V, for example. The voltage applied to the second bias supply terminal passes through the drain transistor 113 and is applied to the first terminal 105 of the capacitor 104. The electrons pass through the capacitor 104 by the FN current and are discharged from the charge storage unit 122, so that a positive charge is accumulated in the charge storage unit 122.

  Therefore, the gate terminal 117 of the reading transistor 101 becomes a positive potential, and the conduction state is “ON”.

  In addition, the trimming switch can be driven by applying only two kinds of potentials of 0 V and 15 V as the bias potential in all the operating states of erasing, writing, and reading.

<Effect>
Next, the effect of the present invention will be described.

  (1) As a method of controlling the amount of accumulated charge in the charge storage unit 122, the amount of accumulated charge in the charge storage unit 122 is moved by using the FN current from the second terminal 106 of the capacitor 104 to move the charge to the first terminal 105 of the capacitor 104. Can be controlled. The method using the FN current can form a charge transfer mechanism having a simpler structure than the method of controlling the charge transfer using hot carriers, and can form the charge transfer mechanism with a small number of steps. Can do.

  (2) Since the trimming switch 100 is switched purely electrically, trimming can be performed with a smaller area compared to a trimming method in which a fuse is melted away using laser light. In addition, it is possible to perform trimming at a higher speed than the method of irradiating laser light by mechanically matching the positional relationship between the laser light irradiation position and the trimming switch.

  (3) Since trimming can be performed even after the semiconductor chip is mounted, characteristic changes due to stress applied to the semiconductor chip during mounting can be corrected by trimming. Further, since the information of the trimming switch once written can be erased again, the correction at the fine adjustment stage can be performed again if necessary, and trimming can be performed more precisely.

  (4) Reading is determined only by the amount of charge stored in the charge storage unit 122 and can be executed without receiving external power supply. Therefore, the trimming switch 100 is supplied with electric power for reading. A trimming switch 100 that does not need to be supplied and does not consume power after trimming can be obtained.

  (5) Since the trimming switch 100 can be read, erased, and written by applying only two kinds of potentials, for example, 0 V and 15 V, as necessary bias potentials, the peripheral circuit for driving the trimming switch 100 is simple. The circuit area for the peripheral circuit can be kept small.

Trimming switch equivalent circuit. The layout and sectional drawing of a trimming switch.

Explanation of symbols

DESCRIPTION OF SYMBOLS 100 ... Trimming switch, 101 ... Read-out transistor as 3rd transistor, 102 ... Drain terminal as 3rd drain terminal, 103 ... Source terminal as 3rd source terminal, 104 ... Capacitor as 1st capacitor, 105 ... 1st terminal 106 ... 2nd terminal, 107 ... capacitor as 2nd capacitor, 108 ... 1st terminal as 3rd terminal, 109 ... 2nd terminal as 4th terminal, 110 ... as 1st transistor Gate transistor 111... Drain terminal as first drain terminal 112... Source terminal as first source terminal 113 113 drain transistor as second transistor 114. Drain terminal as second drain terminal 115. Source terminal as two source terminals, 116 ... first gate Gate terminal as terminal, 117... Gate terminal as third gate terminal, 118... Word line as word line terminal, 119... Trimming element, 120. 123: First bias supply terminal, 124: Second bias supply terminal, 125: Gate terminal as second gate terminal, 200: Silicon substrate, 201: Insulating layer.

Claims (2)

A first capacitor having a first terminal and a second terminal;
A second terminal having a third terminal and a fourth terminal, wherein the first terminal of the first capacitor and the third terminal are connected, and the insulating layer is thicker than the first capacitor. A capacitor,
The first drain terminal includes a first drain terminal, a first gate terminal, and a first source terminal, and the first drain terminal supplies a first bias for receiving a potential for erasing or writing charge information of the first capacitor. Connected to the terminal,
The first gate terminal is connected to the word line terminal so that a potential applied to the word line terminal is transmitted to the first gate terminal.
When a voltage is applied to the first gate terminal through the word line terminal to make the first source terminal and the first drain terminal conductive, the first drain terminal through the first bias supply terminal. The fourth terminal of the second capacitor and the first source terminal are connected so that the voltage applied to the first capacitor is transmitted to the fourth terminal of the second capacitor through the first source terminal. A first transistor;
A second drain terminal; a second gate terminal; and a second source terminal. The second drain terminal is complementary to the first bias supply terminal for erasing or writing charge information of the first capacitor. Connected to a second bias supply terminal to which a potential is applied;
The second gate terminal is connected to the word line terminal so that a potential applied to the word line terminal is transmitted to the second gate terminal;
When a voltage is applied to the second gate terminal through the word line terminal to make the second source terminal and the second drain terminal conductive, the second drain through the second bias supply terminal. A second terminal of the first capacitor and the second source terminal are connected so that a voltage applied to the terminal is transmitted to the second terminal of the first capacitor through the second source terminal; The second source terminal is electrically insulated from elements other than the second terminal; and
A third source terminal; a third gate terminal; and a third drain terminal. The third terminal, the first terminal, and the third gate terminal are connected to each other and electrically insulated from other elements. A charge storage unit held in a fixed state, and among the charges stored in the charge storage unit, the third drain terminal and the third source by the charge stored in the third gate terminal A trimming switch comprising: a third transistor that is in a conductive state or a non-conductive state without receiving external power supply by modulating conductivity with the terminal. Occurs when an electric field is supplied between the first terminal and the second terminal of the first capacitor to erase or write the charge stored in the charge storage unit through the first capacitor. The non-volatile memory element is configured so that a non-volatile memory is erased or written by controlling a charge amount accumulated in the charge memory portion by a Fowler-Nordheim current. The trimming switch according to 1.