JP2007049211A5 - - Google Patents

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Publication number
JP2007049211A5
JP2007049211A5 JP2006319318A JP2006319318A JP2007049211A5 JP 2007049211 A5 JP2007049211 A5 JP 2007049211A5 JP 2006319318 A JP2006319318 A JP 2006319318A JP 2006319318 A JP2006319318 A JP 2006319318A JP 2007049211 A5 JP2007049211 A5 JP 2007049211A5
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JP
Japan
Prior art keywords
semiconductor
semiconductor element
manufacturing
semiconductor device
element mounting
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Application number
JP2006319318A
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Japanese (ja)
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JP4369465B2 (en
JP2007049211A (en
Filing date
Publication date
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Priority to JP2006319318A priority Critical patent/JP4369465B2/en
Priority claimed from JP2006319318A external-priority patent/JP4369465B2/en
Publication of JP2007049211A publication Critical patent/JP2007049211A/en
Publication of JP2007049211A5 publication Critical patent/JP2007049211A5/ja
Application granted granted Critical
Publication of JP4369465B2 publication Critical patent/JP4369465B2/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

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Claims (5)

半導体素子搭載領域を備えた凹部と、該凹部に接続されるとともに該凹部を囲むリブ部とからなる半導体素子搭載部を準備する工程と、
パッドを備えた半導体素子を前記半導体素子搭載部の前記半導体素子搭載領域に搭載する工程と、
外部回路への接続のためのパターンが備えられた枠状のプリント板前記半導体素子搭載部の前記リブ部とを固定する工程と、
前記半導体素子の前記パッドと前記プリント板の前記パターンとをワイヤによって電気的に接続する工程と、
前記ワイヤ及び前記ワイヤによる接続部を樹脂によって封止成型する工程と、
を備えた半導体装置の製造方法。
Preparing a semiconductor element mounting portion comprising a recess provided with a semiconductor element mounting region, and a rib portion connected to the recess and surrounding the recess;
Mounting a semiconductor element having a pad on the semiconductor element mounting region of the semiconductor element mounting portion;
And fixing the printed board pattern is a frame-like that provided for connection to an external circuit and with said rib portion of said semiconductor element mounting portion,
A step of electrically connecting the pattern of the pad and the printed circuit board of the semiconductor device by wires,
Sealing and molding the wire and the connecting portion by the wire with a resin;
A method for manufacturing a semiconductor device comprising:
前記プリント板を固定する工程は、該プリント板の前記枠内に前記半導体素子が位置するように前記半導体素子搭載部を前記プリント板に固定する工程である  The step of fixing the printed board is a step of fixing the semiconductor element mounting portion to the printed board so that the semiconductor element is positioned within the frame of the printed board.
請求項1記載の半導体装置の製造方法。  A method for manufacturing a semiconductor device according to claim 1.
前記プリント板の露出された前記パターンに半田ボールを固定する工程を更に備えた  The method further includes a step of fixing a solder ball to the exposed pattern of the printed board.
請求項1又は請求項2記載の半導体装置の製造方法。  A method for manufacturing a semiconductor device according to claim 1.
請求項1乃至請求項3の何れか1項に記載の半導体装置の製造方法により製造された半導体装置を複数準備する工程と、  Preparing a plurality of semiconductor devices manufactured by the method of manufacturing a semiconductor device according to any one of claims 1 to 3,
前記半導体装置の前記半導体素子搭載部の背面同士を同じ方向に搭載させて固定する工程と、  Mounting and fixing back surfaces of the semiconductor element mounting portions of the semiconductor device in the same direction;
を備えた半導体マルチパッケージの製造方法。  A method for manufacturing a semiconductor multi-package, comprising:
請求項1乃至請求項3の何れか1項に記載の半導体装置の製造方法により製造された半導体装置を複数準備する工程と、  Preparing a plurality of semiconductor devices manufactured by the method of manufacturing a semiconductor device according to any one of claims 1 to 3,
前記半導体装置の前記半導体素子搭載部の背面同士が対応するように搭載させて固定する工程と、  Mounting and fixing so that the back surfaces of the semiconductor element mounting portions of the semiconductor device correspond to each other;
を備えた半導体マルチパッケージの製造方法。  A method for manufacturing a semiconductor multi-package, comprising:
JP2006319318A 2006-11-27 2006-11-27 Semiconductor device manufacturing method and semiconductor multi-package manufacturing method Expired - Fee Related JP4369465B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2006319318A JP4369465B2 (en) 2006-11-27 2006-11-27 Semiconductor device manufacturing method and semiconductor multi-package manufacturing method

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2006319318A JP4369465B2 (en) 2006-11-27 2006-11-27 Semiconductor device manufacturing method and semiconductor multi-package manufacturing method

Related Parent Applications (1)

Application Number Title Priority Date Filing Date
JP09013898A Division JP3939429B2 (en) 1998-04-02 1998-04-02 Semiconductor device

Publications (3)

Publication Number Publication Date
JP2007049211A JP2007049211A (en) 2007-02-22
JP2007049211A5 true JP2007049211A5 (en) 2007-04-26
JP4369465B2 JP4369465B2 (en) 2009-11-18

Family

ID=37851712

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2006319318A Expired - Fee Related JP4369465B2 (en) 2006-11-27 2006-11-27 Semiconductor device manufacturing method and semiconductor multi-package manufacturing method

Country Status (1)

Country Link
JP (1) JP4369465B2 (en)

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