JP2007036976A - Symbol detecting device and method, symbol detection control program, and recording medium - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To realize symbol detection with reliability, by solving a problem of taking-in of two Nyquist points or no Nyquist point in one buffer memory in a conventional way. <P>SOLUTION: While a necessary number of sampling data are sequentially taken in two or more sampling data buffers in the symbol detecting device, the sampling data are delayed by several symbols and taken in a clock reproducing data buffer. To compensate dislocation of a Nyquist point after detecting the Nyquist point from the center of the clock reproducing data buffer, one Nyquist point should be located surely at the center of the buffer memory in the clock reproduction data buffer in constitution or under control, by controlling at least one of the data taking-in and reading-out into the sampling data buffer, the data taking-in in the clock reproduction buffer, and the taking-in/reading-out data length. <P>COPYRIGHT: (C)2007,JPO&INPIT

Description

  The present invention relates to a symbol detection apparatus, a symbol detection method, a symbol detection control program, and a recording medium suitable for a digital wireless communication device.

In digital wireless communication, data to be transmitted is transmitted and received in units of frames, but a synchronization signal (Frame Sync Word) having a specific signal arrangement pattern at a predetermined position of each frame, for example, the beginning of the frame, on the transmitter side The receiver side detects the frame synchronization word in the detection output signal, establishes synchronization, and demodulates the information data following the FS word according to the synchronization timing. Thus, in digital wireless communication, ensuring synchronization on the receiving side is extremely important in demodulating data. On the other hand, the receiver of the digital radio reproduces the clock from the baseband signal obtained by the detection, and performs the process of reproducing the digital signal based on this, but the difference in the reference oscillation frequency between the transmitter and the receiver Due to the influence of fading and the like, a deviation between the Nyquist point and the symbol timing (symbol acquisition timing) occurs, and if this deviation becomes large, the bit error rate may deteriorate and data reproduction may become impossible. For this reason, conventionally, the oscillation frequency of the reference oscillator that generates the clock signal of the receiver is synchronized with the symbol timing detected from the received and detected signal.
In addition, in order to speed up digital signal processing, the digital wireless communication device includes a digital signal arithmetic processing unit (hereinafter referred to as DSP: Digital Signal Processor or Processing) separately from the CPU that controls the entire wireless device, for example, reception. The unit is configured to perform symbol detection, processing for restoring a speech encoded signal to a speech signal (decoding processing), and processing for encoding a speech signal from a microphone (encoding processing) in the transmitter. is there.

FIG. 11 is a functional block diagram of the main part of a base band signal (hereinafter also referred to as BB signal) processing unit using a DSP of a conventional digital radio. In the configuration shown in this example, a radio wave is converted into a baseband signal via an antenna, a reception front end unit, etc. (not shown) and then supplied to the A / D converter 110. In this A / D converter 110, for example, when the symbol rate is 4.8 kHz, oversampling is performed at a frequency of 48 kHz which is ten times the symbol rate, and each sampling value is supplied to the DSP 111.
The DSP 111 includes an ISR 112 unit including two data buffers DB0 and DB1, a digital reception processing unit 113, and a decoding unit 114. The digital reception processing unit 113 includes a clock recovery unit 115 and a symbol detection unit. 116 is provided.
When an interrupt process occurs in the DSP 111, the process that has been executed so far is temporarily interrupted and the interrupt process is preferentially processed. When the interrupt process ends, the original process is resumed. For this reason, a process of storing information such as a processing status and a place that has been executed so far in another memory is performed. The process is performed by an ISR (Interrupt Service Routine or Interrupt Status Register), as shown in FIG. 12, each time an interrupt process occurs, the two buffers are switched.
The clock recovery processing unit 115 detects the Nyquist point of each symbol in the clock recovery data buffer and synchronizes with the symbol, thereby converting the symbol data into bit data. The detected and converted bit data string is decoded by the vocoder of the decoding unit 114, restored to an audio signal captured from a microphone or the like on the transmitter side, and output from a speaker or the like. Note that an interrupt generated by DMA (Direct Memory Access) or a timer function can be used to generate an interrupt.
JP 2004-40222 A

However, according to the above-described prior art, since the number of data (BB data) extracted from the received BB signal is a fixed number, the data buffer has a fixed number of data due to fading, clock oscillator frequency fluctuation, or the like. In some cases, two or more Nyquist points exist in the predetermined number of baseband data (also referred to as BB data), and accurate data detection may not be possible. In order to cope with such a phenomenon, it is necessary to perform a process with an algorithm for detecting data at two Nyquist points in the data buffer, which complicates a complicated process.
Such conventional problems will be described with reference to the drawings. FIG. 13 illustrates an example of an eye pattern in a wireless receiver that employs the APCO Project 25 (hereinafter referred to as “APCO P25”) scheme. The eye pattern is a digital signal waveform superimposed for a certain period and observed with an oscilloscope. The original signal superimposed on the transmitted wave is a rectangular wave, but the waveform is rounded and rounded. Because it is called eye pattern. The better the state of the communication line, the greater the electric field strength and the better the SN (signal to noise ratio), the more a single curve will be. Here, the Nyquist point is used as a point indicating a true symbol value as shown in FIG.
In APCO P25, a four-value FSK modulation scheme is adopted, and each symbol value corresponds to a frequency shift in the digital modulation signal, and the frequency shift is 600 [Hz], 1800 [Hz], −600 [Hz], and −1800 [Hz] has been subjected to any frequency shift, and each symbol represents a combination of 2 bits, “00”, “01”, “10”, or “11”. . As described in FIGS. 11 and 12 and described in FIG. 14, the symbol rate is 4.8 kHz, but the acquisition is oversampled at 48 kHz, which is 10 times, and 10 samples per symbol are used as received BB data as a buffer. Shows the case of importing. In the clock recovery processing, Nyquist point detection is performed for each symbol length (here, 10 sampling data) of BB data obtained from the A / D converter 110.

FIG. 15 is a schematic diagram of a clock recovery Nyquist detection pattern showing an ideal state when a Nyquist point is detected after clock recovery under the above-described conditions. As shown in this figure, when the Nyquist point is located at the fifth position, which is the central portion of the data buffer (memory), out of the 10 sampled data acquired, one Nyquist point is always provided for each data buffer fetched data string. There will be no inconvenience. However, as shown in FIG. 16, when the Nyquist point in the acquired sampling data is located at the head of the data buffer, if the position of the next Nyquist point is shifted due to the influence of the clock frequency shift or fading, the next In some cases, the Nyquist point is not located in the previous data buffer and enters the previous data buffer. If such a state occurs frequently, the bit error rate may deteriorate and normal communication may become difficult.
An object of the present invention has been made in view of the above-described problems of the prior art, and is a symbol detection apparatus, a symbol detection method, and a symbol detection method that reliably perform symbol detection each time interrupt processing is performed. The purpose is to provide a program.

To achieve the object, the present invention provides a symbol detection apparatus according to claim 1, wherein a plurality of sampling data for storing required sampling data in a symbol detection apparatus for detecting symbol data from baseband data obtained by receiving and detecting a digital modulation signal. A buffer, sampling data fetching means for sequentially fetching the required number of sampling data into the sampling data buffer, sampling data reading means for reading the required number of sampling data from the sampling data buffer, and supplying the read sampling data and supplying a clock A clock recovery data buffer to be recovered, and a Nyquist position error detection means for detecting a Nyquist point shift from a center position of the clock recovery data buffer. Les to correct the acquired data to the sampled data buffer, read, or incorporation into the clock reproduction data buffer, or and controlling at least one of the capture / read data length.
According to another aspect of the present invention, there is provided a symbol detection device for detecting symbol data from baseband data obtained by receiving and detecting a digital modulation signal, and at least four sampling data buffers for storing required sampling data, and the sampling data buffer. Sampling data fetching means for sequentially fetching the required number of sampling data, an auxiliary buffer used when the capacity of the sampling data is insufficient, sampling data reading means for reading the required number of sampling data from the sampling data buffer, and the read A clock recovery data buffer that supplies sampling data to recover the clock, and a Nyquist point that detects a deviation of the Nyquist point from the center position of the clock recovery data buffer. Position error detection means, and so as to correct the deviation of the Nyquist point, the data fetching to the sampling data buffer, the reading, the fetching to the data buffer for clock reproduction, or the length of the fetching / reading data length It is characterized by controlling at least one.

4. The symbol detection method according to claim 3, wherein in the symbol detection method for detecting symbol data from baseband data obtained by receiving and detecting a digital modulation signal, sampling data capturing processing for sequentially capturing a required number of sampling data into a plurality of sampling data buffers. A sampling data reading process for reading a required number of sampling data from the sampling data buffer, a process for supplying the read sampling data to a clock recovery data buffer for recovering a clock, and a center of the clock recovery data buffer Nyquist position error detection processing for detecting a deviation of the Nyquist point from the position, and taking in, reading out, or sampling of data from the sampling data buffer so as to correct the deviation of the Nyquist point. Incorporation into click reproduction data buffer, or characterized in that it comprises a Nyquist position correction processing for controlling at least one of the capture / read data length.
5. The symbol detection method according to claim 4, wherein in the symbol detection method for detecting the symbol data from the baseband data obtained by receiving and detecting the digital modulation signal, the required sampling data is sequentially taken into at least four sampling data buffers and one auxiliary buffer. Sampling data capturing process, sampling data reading process for reading out a required number of sampling data from the sampling data buffer and auxiliary buffer, and clock recovery process for supplying the read sampling data to the clock recovery data buffer and recovering the clock A Nyquist position error detection process for detecting a Nyquist point shift from the center position of the clock recovery data buffer, and the sample so as to correct the Nyquist point shift. Grayed data to the data buffer fetch, read, or incorporation into the clock reproduction data buffer, or characterized in that it comprises a and a process of controlling at least one of the capture / read data length.

A symbol detection control program according to a fifth aspect is characterized in that the symbol detection method according to any one of the third and fourth aspects is programmed to be controlled by a computer.
A recording medium described in claim 6 is characterized in that the symbol detection control program described in claim 5 is recorded.
Although not described in the claims, as will be described later, the same applicant has applied for an invention that can be used in the present invention as a “clock recovery apparatus and method”, but this means is used in the present invention. Is possible. In that case, in the first aspect of the invention, the Nyquist error detecting means obtains a symbol value by oversampling the detected signal at a frequency m (m is an integer of 3 or more) times the symbol clock frequency. Means for determining whether each sequentially obtained symbol value is the same as the previous symbol value, and each calculated value n (n is an integer of 1 or 2) sequentially obtained in the buffer memory Buffer means for storing sequentially, timing detection means for detecting symbol timing based on the sampling timing corresponding to the buffer memory position and the operation value accumulated in the buffer, and a symbol rate according to the symbol timing detection result The sampling frequency or phase of the frequency oscillating means is set to one sample in the direction of extending the tracking range of The oscillation frequency correcting means for controlling clocks can be configured with. A symbol detection method including similar functional processing can also be used.
Among terms used, terms similar to each other such as symbol data and symbol value, buffer and data buffer, symbol clock and clock, sampling data buffer and data buffer, and the like are almost the same unless otherwise specified. Shall be used in The interrupt processing can also use an interrupt by DMA (Direct Memory Access) or a timer function.

According to a first aspect of the present invention, in a symbol detection apparatus for detecting symbol data from baseband data obtained by receiving and detecting a digital modulation signal, several symbol data are obtained while sequentially taking a required number of sampling data into a plurality of sampling data buffers. The sampling data buffer is delayed so as to capture the sampling data into the clock recovery data buffer, detect a Nyquist point shift from the center position of the clock recovery data buffer, and correct the Nyquist point shift. Since at least one of the data fetching, reading, or fetching to the clock recovery data buffer, or the fetching / reading data length is controlled, there is always one Nyquist point in the clock recovery data buffer. Bag It will be located in the center of Amemori. Therefore, the conventional problem that two Nyquist points are taken into one buffer memory or that Nyquist points are included at all is eliminated, and reliable symbol detection is possible.
According to the second aspect of the present invention, since the number of the sampling data buffers is four and one auxiliary buffer is provided, the symbol detection apparatus of the present invention can be efficiently used with a small number of data buffers as will be described in detail below. Can be realized.
According to the third aspect of the present invention, a symbol detection method is provided that provides a function equivalent to that of the symbol detection apparatus according to the first aspect, which is useful for realizing the symbol detection means of the present invention by software.
Further, in the invention described in claim 4, as in the invention described in claim 2, when necessary sampling data is sequentially fetched into the four sampling data buffers and the buffer memory capacity is insufficient, the processing of fetching into one auxiliary buffer is performed. Therefore, the symbol detection method of the present invention can be efficiently realized with a small number of data buffers.
The invention according to claim 5 is the same processing method as long as a computer having the OS is programmed by programming the symbol detection method according to any one of claims 3 and 4 according to the controllable OS. Can be controlled.
According to the sixth aspect of the present invention, the program of the symbol detection method of the present invention is recorded on a recording medium in a computer-readable format, so that the program can be operated anywhere if the recording medium is carried.
In the invention described in each claim, if a “clock recovery device” filed by the same applicant is used as the Nyquist error detection means, more reliable symbol detection is possible.

Hereinafter, the present invention will be described in detail with reference to embodiments shown in the drawings. However, the components, types, combinations, shapes, relative arrangements, and the like described in this embodiment are merely illustrative examples and not intended to limit the scope of the present invention only unless otherwise specified. .
FIG. 1 is a configuration diagram of a reception BB data capture buffer showing an embodiment of the present invention, and FIG. 2 is a diagram showing an example of reception BB data capture buffer switching control. In this embodiment, four sampling data buffers 1 to 4 and one auxiliary buffer 5 are provided as shown in FIG. 14 under the same conditions as those shown in FIG. 14, and each sampling data buffer has a changeover switch. 6, 10 oversampling data for one symbol are taken in. In this state, a total of 40 sampling data corresponding to 4 symbols of the received BB data is continuously stored in the four sampling data buffers 1 to 4. When this is read out by the changeover switch 7 and is read (taken in) into the data buffer 8 for clock reproduction, for example, as shown in FIG. Read from previous sampling data buffer. Then, as will be described in detail below, the number of samplings taken in the clock recovery data buffer 8 and its timing are adjusted in accordance with the clock recovery situation. The switches 6 and 7 are functional, and are actually processed by software as fetching, reading, or timer function by addressing the buffer memory in relation to the interrupt processing. Similarly, the sampling data buffers 1 to 4 are generally managed and controlled as addresses of memory areas.

As shown in FIG. 3A, the sampling data buffer 8 takes 10 sampling data from the received BB data with a delay of 2 in terms of the number of symbols, and the Nyquist point in the center is the center of the sampling data buffer. In the fifth position, it is determined that the capture timing is correct, and capture is performed at the same timing. However, as shown in (b) and (c), when the Nyquist point is located behind or in front of the sampling data buffer, it is determined that the capture timing is advanced or delayed, and capture is performed. Adjust the timing or adjust the sampling number (which can also be expressed as the data length). The positional relationship between the Nyquist point and the memory number of the data buffer shown in FIG. 3 may be either a state in the sampling data buffer or a state in the clock reproduction data buffer. The clock recovery data buffer detects the detection result by controlling the data fetching timing and data length to the sampling data buffer so that one Nyquist point is always located in the data buffer, or is controlled. do it. The same applies to the following description. The memory position of the Nyquist point in the sampling data buffer or the clock recovery data buffer is expressed by “center”, “front, head, tip”, “back”, etc., but these are the sequential numbers of the buffer memory, that is, , Pointing to the address.
FIG. 4 is a diagram illustrating a control example in the case where the Nyquist point is located at the center of the sampling data buffer. 4, 5, and 6, the processing on the right side of the drawing is later in time, and the processing on the left side is performed earlier. For example, if attention is paid to buffer memory numbers 1, 2, 3, 4,..., Sampling data is captured in the first buffer before the fourth buffer.
In (a), when the capture from the received BB data is performed for 10 sampling data for one symbol to the sampling data buffer 3 (shaded portion) via the changeover switch 6, the data for clock recovery is stored. Reading from the sampling data buffer for writing to the buffer 8 indicates that 10 sampling data from the sampling data buffer 1 are delayed by 2 symbols. At this time, since the Nyquist point is located at the center in the clock recovery data buffer, no correction is necessary, and it is performed at the same read and capture timings as shown in (b) and (c).

  On the other hand, in FIG. 5, the reception BB data is fetched for 10 sampling data for one symbol to the sampling data buffer 3 (shaded portion) via the changeover switch 6 as in FIG. In this example, the writing to the clock recovery data buffer 8 is delayed by two symbols. In this example, the Nyquist point detection position in the clock recovery data buffer is located behind the sampling data buffer ( For example, the difference from the center position (fifth) is 2. In this example, it is determined that 5 <7 and there is a shift in the positive direction (the reception BB data capture timing is advanced), and the reception BB to be performed next is received as shown in FIG. In the data capturing process, 12 sampling data of (10 sampling data) + (difference from the fifth sample = 2) are captured. At this time, since the memory capacity of the sampling data buffer 4 is exceeded, an auxiliary buffer is used. Further, in fetching into the clock recovery data buffer 8 (reading from the data buffer), the fetching timing is adjusted so that the Nyquist point is at the center of the memory (fifth), and ten sampling data are fetched ( Sampling data buffer 2 in FIG. As a result, thereafter, as shown in FIG. 5C, the Nyquist point in the fetch / read data in the data buffer is located at the center of the buffer.

  FIG. 6 is a diagram illustrating a control example in the case where the Nyquist point in the received BB data captured in reverse is located at the leading end of the buffer. First, similar to FIG. 4A, the reception BB data is fetched and written to the clock reproduction data buffer 8. In this example, the Nyquist point detection position in the clock reproduction data buffer is the sampling buffer memory. Therefore, the difference from the center position (fifth) is −2. In this example, it is determined that 5> 3 and is shifted in the negative direction (the reception BB data capturing timing is delayed), and in response to this result, as shown in FIG. In the data acquisition, eight sampling data of (10 sampling data) − (difference from the fifth sample = 2) are acquired (the hatched portion of the data buffer 4 in FIG. 6B). Correspondingly, the Nyquist point extends over the sampling data buffers 1 and 2 in the buffer memory as shown in FIG. 6B when fetching into the clock recovery data buffer 8 (reading from the data buffer). 10 pieces of sampling data are fetched so as to be in the center (fifth). As a result, as shown in FIG. 6C, the Nyquist point in the subsequent fetch / read data in the sampling data buffer is located at the center of the buffer. In this example, the Nyquist point position in the clock recovery data buffer is detected, and in order to reflect the result and control the sampling data take-in timing and data length, the case of delaying by two samples is shown. Not limited to this, the timing of delay and the length (number) of sampling / reading sampling data can be changed as appropriate as long as they do not contradict the gist of the present invention.

FIG. 7 is a flowchart of the series of control methods described above. When the process starts, first, in the case of the capture control, the reception BB data capture data buffer address and the reception BB data capture length are set, and the reception BB data is sequentially captured into the sampling data buffers 1 to 4 according to the settings. Is started (S1). At the start time, for example, 10 pieces of sampling data are captured at a specified timing. The fetched received BB data is read out at a predetermined sample rate from the fetch timing and supplied to the clock recovery data buffer (S2). At this time, the read timing and read address are determined based on an error between the central portion of the sampling data buffer (the central position of the buffer memory, for example, the fifth) and the Nyquist point position. There is no timing, so the timing is as specified.
The next received BB data is sent to the sampling data buffer that periodically repeats the fetching. If the error information is obtained, the address of the sampling data buffer is determined based on the error information (S3). . On the other hand, clock recovery processing is performed based on the data fetched into the clock recovery data buffer, and at that time, the Nyquist point positional relationship in the buffer is detected as described above (S4). As described above, the symbol data detected in this way is converted into a predetermined bit string (S5), restored to the original audio signal encoded by these bit strings, and output from a speaker or the like. . As a result of the above processing, the Nyquist point error detection is performed once for each interrupt processing, and based on this, the received BB data capture data length is set (S6). By repeatedly executing the above processing, the Nyquist point is always controlled to be located at the center position of the data buffer. According to this, for example, even when the Nyquist position in the data buffer is deviated from the center position due to a change in the state of the fading or the clock generator, the position is automatically corrected to be an appropriate position. Therefore, no bit error occurs.

In the above description, the case where the timing and the data length of the sampling data buffer, the reading, and the clock recovery data buffer are controlled is exemplified, but one or several of them are controlled. You can also select a combination. For example, when the deviation of the Nyquist point is small or the like, even if one or both of the timing for fetching into the data buffer for clock reproduction and / or the control of the data length are controlled, it is equivalent to the case described above. Control would be possible. Further, although the case where the processing for detecting the relationship between the reception BB data capture timing and the Nyquist point is performed in the clock reproduction data buffer has been described, it is not necessary to limit to this example when implementing the present invention. It is also possible to provide a program for performing interrupt processing, a dedicated function block, or a dedicated flow. In addition, the apparatus and method used for the process of detecting the Nyquist point positional relationship in the data buffer can be realized by using known means in addition to, for example, Japanese Patent Laid-Open No. 2003-333113. The clock reproduction apparatus and method, and the program have been filed, but they have not been published yet and are considered to be a new invention in combination with the present invention, and will be described in detail below.
In the present invention described above, it is assumed that the Nyquist point and the sampling timing are coincident with each other, whereas the clock recovery device described below makes the Nyquist point and the sampling timing coincide. Both are not necessarily the same purpose, but if used together in the present invention, there can be a significant effect.

FIG. 8 is a schematic block diagram of a “clock recovery device” for which the same application has been filed. Note that the block diagram shown in this example is functional, and is not necessarily limited to this example. Any configuration may be used as long as it functions as described below, and the configuration already described A function that overlaps with a part may be used. The terms used are in accordance with the descriptions in the filed specification, but similar terms have the same concept unless otherwise specified.
The clock recovery device 20 shown in this example detects a received signal and detects the original signal superimposed on the carrier signal on the transmission side, and 4 according to the frequency shift amount from the detection signal. A quaternary determination unit 22 that outputs two signals, a delay unit 23 that delays the output signal of the quaternary determination unit 22 for a predetermined time, an output of the quaternary determination unit 22 and a delay unit 23 that delays the output of the quaternary determination unit 22 An XOR operation circuit 24 for calculating the exclusive logical product of the outputs of the output, an integration unit 25 for accumulating the operation results of the XOR operation circuit 24 as a buffer matrix and obtaining an integrated value for each buffer column, and integrating each time the buffer matrix is filled The gate unit 26 that outputs the integrated value in the unit 5 and the switch unit 27 that includes terminals a, b, and c for dividing the integrated value signal from the gate unit 26 into three parts are provided. The terminal a of the switch unit 27 includes a counter-up unit 28, a second gate unit 29, and a threshold unit 30 that supplies a threshold value (also referred to as a threshold value) to the second gate unit 29. The advance processing route is connected, and is connected to the symbol timing detection unit 31 via this route. The terminal b of the switch unit 27 is directly connected to the symbol timing detection unit 31. Further, a timing delay processing route including a counter-down unit 32, a third gate unit 33, and a threshold unit 34 for supplying a threshold to the third gate unit 33 is connected to the remaining terminal c of the switch unit 27. It is connected to the symbol timing detector 31 via this route. The output of the symbol timing detection unit 31 is supplied to the detection unit 21, and the timing deviation is corrected by correcting the detection timing.

FIG. 9 is a flowchart showing a control procedure of the clock recovery apparatus shown in FIG. In FIG. 9, first, clock recovery is performed (S21), and it is determined whether or not the processing at that time is a change of the symbol clock timing. If the change is the symbol clock timing (S22 YES), the state of the symbol timing is determined. Is detected (S23).
For example, as shown in Japanese Patent Laid-Open No. 2003-333113, symbol timing state detection is performed by using adjacent sampling data stored in memory in the integrating unit 25, the first gate unit 26, the symbol timing detecting unit 31, and the like. It is detected by comparing the sampling values. Note that the terminal 27 of the switch 27 is selected at the start of processing, and the output of the first gate unit 25 is directly supplied to the symbol timing detection unit 31 directly. As a result of this detection, when there is a deviation in the symbol clock timing, different processing is performed depending on whether it is delayed or advanced. First, in step ST3, if there is a delay in the symbol clock (S23, S24), the switch 27 in FIG. 8 is switched to c to select a timing delay processing route. When there is a delay in the symbol acquisition timing, the count and value of the counter down unit 32 are decremented (subtracted) by one (S25). Further, the count value at that time is compared with the threshold value (threshold value) 34 in the third gate unit 33, and if it is equal to or exceeds the threshold value (YES in S26), the sampling timing is shifted by one clock plus one ( Along with S27), the counter value is reset and the series of processing ends (S28). Note that if the count value is not a threshold value in step S26, the process is similarly terminated.
On the other hand, if the symbol clock is advanced (S23, S29) in step S23 for detecting the symbol timing state in step S23, the switch 27 is switched to a and the timing advance processing route is selected. If there is progress in the symbol acquisition timing, the count and value of the counter up unit 28 are incremented (added) by one (S30). Further, the count value at that time is compared with the threshold value (threshold value) 30 in the second gate unit 29, and if it is equal to or exceeds the threshold value (S31 YES), the sampling timing is shifted by -1 for one clock. Along with (S32), the counter value is reset and the series of processing is terminated (S33). If the count value is not a threshold value in step S31, the process is similarly terminated.

FIG. 10 shows the state of the counter operation in the above processing. In steps S24 and S29, the counter value is decreased or increased based on the respective determination results, and when the counter value reaches the threshold value. The phase of the clock frequency for one sampling is corrected. That is, as shown in FIG. 10, as long as it is located between the upper and lower thresholds with the zero level line as an ideal symbol timing as a boundary, accurate symbol data can be detected, so that the clock frequency Since correction is not necessary, only the counter value is increased or decreased. However, when the count value exceeds the threshold value, an accurate symbol value can no longer be acquired at the same symbol acquisition timing. As a result, even if the symbol rate is delayed or advanced, the width between the Nyquist point and the symbol acquisition timing can be secured as wide, so that both are balanced and consequently the tracking range is expanded. It will be a thing. As described above, the detection signal is oversampled at a frequency of three times or more, the delay / advance state of the symbol acquisition timing at each sampling timing is detected, and the oscillation frequency of the oscillation means for clock recovery according to the situation Thus, even if the sync word cannot be detected, the clock can be recovered. In addition, since the interval between the symbol acquisition timing point and the Nyquist point is similarly increased on the timing advance side, and both are balanced, a stable clock recovery device can be obtained.
If all or part of the clock recovery apparatus and method according to the same applicant described above is partially used, it can also be used as a means for detecting the relationship between reception BB data fetching and Nyquist point required in the present invention. There is a possibility, and when used in combination with the present invention, more accurate symbol detection is possible.

  As described above, according to the apparatus and method of the present invention, in a symbol detection apparatus that detects symbol data from baseband data obtained by receiving and detecting a digital modulation signal, a required number of sampling data is sequentially transferred to a plurality of sampling data buffers. While taking in, the sampling data is delayed by several symbols, the sampling data is taken into the clock reproduction data buffer, and the deviation of the Nyquist point from the center position of the clock reproduction data buffer is detected and the deviation of the Nyquist point is corrected. In addition, since it is configured to control at least one of the data fetching to the sampling data buffer, the reading, the fetching to the clock recovery data buffer, or the fetching / reading data length, the clock recovery data buffer includes Always 1 So that the Nyquist point of positioned at the center of the buffer. Therefore, the conventional problem that two Nyquist points are taken into one buffer or no Nyquist points are included at all is eliminated, and reliable symbol detection is possible.

It is a figure which shows the structural example of the reception BB data acquisition buffer in the symbol detection apparatus which concerns on one Embodiment of this invention. It is a figure which shows the example of reception BB data acquisition buffer switching in this invention. FIG. 4 is a schematic diagram showing a state of control for moving the Nyquist point to the center position of the clock recovery data buffer in the present invention, (a) is a diagram showing a case where it is in an appropriate position, and (b) is in a positive state. The figure which shows a case, (c) is a figure which shows the case in a negative state. (A), (b), (c) is a control schematic diagram when the Nyquist point is located at the center of the data buffer. (A), (b), (c) is a control schematic diagram when the Nyquist point is shifted in the positive direction from the center position of the data buffer. (A), (b), (c) is a control schematic diagram when the Nyquist point is shifted in the negative direction from the center position of the data buffer. 7 is a flowchart of a series of control methods in FIGS. 4 to 6. It is a block block diagram which shows the example of the clock reproducing | regenerating apparatus which can be utilized in this invention. It is a flowchart which shows the example of a control method of the clock reproducing | regenerating apparatus which can be utilized in this invention. It is a figure which shows the mode of the counter operation | movement explaining the operation example of the clock reproducing | regenerating apparatus which can be utilized in this invention. It is a DSP function outline figure of the conventional digital receiver. It is a functional block diagram which shows the switching control of the conventional reception BB data acquisition buffer. It is a figure which shows the example of an eye pattern. It is a figure which shows the example of the parameter of reception BB data process part implementation. It is the schematic which shows the example of a clock reproduction Nyquist detection pattern It is the schematic which shows the other example of a clock reproduction | regeneration Nyquist detection pattern.

Explanation of symbols

  1, 2, 3: sampling data buffer, 5: auxiliary buffer, 6, 7: changeover switch, 8: clock recovery data buffer, 21: detection unit, 22: quaternary determination unit, 23: delay unit, 24: XOR Arithmetic circuit, 25: integration unit, 26, 29, 33: gate unit, 27: switch, 28: counter up unit, 30, 34: threshold unit (threshold unit), 31: symbol timing detection unit, 110: A / D converter, 111: DSP section, 112: ISR section, 113: digital reception processing section, 114: decoder section, 115: clock recovery section, 116: symbol detection section.

Claims (6)

In a symbol detection device for detecting symbol data from baseband data obtained by receiving and detecting a digital modulation signal,
A plurality of sampling data buffers for storing required sampling data; and
Sampling data capturing means for sequentially capturing a required number of sampling data into the sampling data buffer;
Sampling data reading means for reading the required number of sampling data from the sampling data buffer;
A clock recovery data buffer for recovering a clock by supplying the read sampling data;
Nyquist position error detecting means for detecting a deviation of the Nyquist point from the center position of the clock recovery data buffer,
Controlling at least one of data fetching to the sampling data buffer, reading to the data buffer for clock reproduction, or fetching / reading data length so as to correct the deviation of the Nyquist point Symbol detection device. In a symbol detection device for detecting symbol data from baseband data obtained by receiving and detecting a digital modulation signal,
At least four sampling data buffers for storing required sampling data;
Sampling data capturing means for sequentially capturing a required number of sampling data into the sampling data buffer;
An auxiliary buffer to be used when the sampling data capacity is insufficient;
Sampling data reading means for reading the required number of sampling data from the sampling data buffer;
A clock recovery data buffer for recovering a clock by supplying the read sampling data;
Nyquist position error detecting means for detecting a deviation of the Nyquist point from the center position of the clock recovery data buffer,
Controlling at least one of data fetching to the sampling data buffer, reading to the data buffer for clock reproduction, or fetching / reading data length so as to correct the deviation of the Nyquist point Symbol detection device. In a symbol detection method for detecting symbol data from baseband data obtained by receiving and detecting a digital modulation signal,
Sampling data fetching processing for sequentially fetching the required number of sampling data into a plurality of sampling data buffers,
Sampling data read processing for reading a required number of sampling data from the sampling data buffer;
A process of supplying the read sampling data to a clock recovery data buffer for recovering a clock;
A Nyquist position error detection process for detecting a deviation of the Nyquist point from the center position of the clock recovery data buffer;
Nyquist position correction processing for controlling at least one of data fetching to the sampling data buffer, reading to the data buffer for clock reproduction, or fetching / reading data length so as to correct the deviation of the Nyquist point And a symbol detection method. In a symbol detection method for detecting symbol data from baseband data obtained by receiving and detecting a digital modulation signal,
A sampling data capturing process for sequentially capturing required sampling data into at least four sampling data buffers and one auxiliary buffer;
Sampling data read processing for reading the required number of sampling data from the sampling data buffer and the auxiliary buffer;
Supplying the read sampling data to a clock recovery data buffer to recover a clock;
A Nyquist position error detection process for detecting a deviation of the Nyquist point from the center position of the clock recovery data buffer;
A process of controlling at least one of data fetching to the sampling data buffer, reading to the data buffer for clock reproduction, or fetching / reading data length so as to correct the deviation of the Nyquist point. A symbol detection method comprising:   A symbol detection control program, wherein the symbol detection method according to claim 3 or 4 is programmed to be controlled by a computer.   A recording medium on which the symbol detection control program according to claim 5 is recorded.

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