JP2007035950A - Solid-state image pickup device, manufacturing method thereof and camera - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a solid-state image pickup device capable of dealing with various transfer modes and improving optical sensitivity, and a manufacturing method thereof and a camera. <P>SOLUTION: An image pickup device according to this embodiment has a plurality of light-receiving sections 5 arranged in matrix; a plurality of first transfer channels each arranged so as to be adjacent to each of columns of the light-receiving sections 5; a plurality of transfer electrodes 21 arranged on the transfer channels and extending in a line direction through between the light-receiving sections 5; a second transfer electrode 22 and a third transfer electrode 23 arranged on the same layer as those of the first transfer electrodes 21 on the transfer channels and arranged separately from each other; a first driving wiring 41 extending in a line direction through between the light-receiving sections 5 on the first transfer electrode 21 and connecting the second transfer electrodes 22 adjacent in the line direction; and a second driving wiring 42 extending in a line direction through between the light-receiving sections 5 on the first driving wiring 41 and connecting the third transfer electrodes 23 adjacent in the line direction. <P>COPYRIGHT: (C)2007,JPO&INPIT

Description

  The present invention particularly relates to a CCD (Charge Coupled Device) type solid-state imaging device, a manufacturing method thereof, and a camera.

  In order to increase the amount of charge handled by the vertical transfer unit (vertical transfer CCD) of the CCD solid-state imaging device and realize both pixel readout and thinning processing of pixel signals, three or more transfer electrodes are prepared per pixel. In addition, it is necessary to perform multiphase driving of three or more phases.

  Conventionally, the transfer electrode has been formed using three or more polysilicon layers. In this case, the transfer electrodes are arranged with their end portions overlapping each other. However, as the pixel size becomes finer, the influence of overlapping and unevenness of transfer electrodes constituting the vertical transfer unit becomes significant. That is, the incident light (referred to as the fact that the light that should be incident on the light receiving portion is blocked by the light shielding film) is likely to occur due to the unevenness. As a result, the amount of light incident on the light receiving portion is reduced, leading to a decrease in photosensitivity.

  In order to reduce the unevenness of the vertical transfer portion, a method of forming a transfer electrode having a single layer structure with a single polysilicon layer has been proposed (see Patent Document 1). However, in the method described in Patent Document 1, since it is necessary to connect transfer electrodes in the horizontal direction (horizontal direction), two or more wires are arranged between pixels. In this case, there is a problem in that the width between adjacent pixels in the vertical direction is increased, the area of the light receiving part is reduced, and the photosensitivity and the amount of charge handled by the light receiving part are reduced. There is a method of increasing the potential of the light receiving portion to maintain the amount of charge to be handled, but in this case, there is a problem that the read voltage becomes high.

A structure is disclosed in which a transfer electrode having a single-layer structure is used and a drive wiring (shunt wiring) for supplying a transfer pulse to the transfer electrode is provided above the transfer electrode (see Patent Document 2). However, most of the conventional structures have a drive wiring in the vertical direction along the vertical transfer portion. When the drive wiring is arranged in the vertical direction, there is a problem that transfer mode is restricted and it is difficult to realize thinning transfer of pixels.
JP 2003-7997 A Japanese Patent No. 3123068

  The present invention has been made in view of the above circumstances, and an object of the present invention is to provide a solid-state imaging device, a method for manufacturing the same, and a camera that can cope with various transfer modes and can improve light sensitivity. There is.

  In order to achieve the above object, a solid-state imaging device according to the present invention includes a plurality of light receiving units arranged in a matrix, a plurality of transfer channels arranged adjacent to the columns of the light receiving units, and the transfer channel. A plurality of first transfer electrodes arranged in the row direction between the light receiving portions, and arranged in the same layer as the first transfer electrodes on the transfer channel, each of which is arranged separately A first drive that connects the second transfer electrodes, the second transfer electrodes, the third transfer electrodes, and the second transfer electrodes that extend in the row direction on the first transfer electrodes through the light receiving portions and are adjacent to each other in the row direction. Wiring and a second drive wiring that extends in the row direction through the light receiving portions on the first drive wiring and connects the third transfer electrodes adjacent to each other in the row direction.

  In order to achieve the above object, a method of manufacturing a solid-state imaging device according to the present invention includes introducing a plurality of light receiving units arranged in a matrix on a substrate and introducing adjacent impurities to the substrate, respectively. Forming a plurality of arranged transfer channels, depositing a conductive layer on the substrate, processing the conductive layer, and a plurality of first transfers extending in a row direction between the light receiving portions. Forming a second transfer electrode and a third transfer electrode, which are separately disposed on the transfer channel, on the first transfer electrode in the row direction between the light receiving portions. Forming a first drive wiring extending and connecting the second transfer electrodes adjacent to each other in the row direction; and extending on the first drive wiring in the row direction through the light receiving portions and extending in the row direction. Second drive arrangement for connecting adjacent third transfer electrodes to each other And a step of forming a.

  In order to achieve the above object, a camera of the present invention includes a solid-state imaging device, an optical system that focuses light on the imaging surface of the solid-state imaging device, and a predetermined signal with respect to an output signal from the solid-state imaging device. A signal processing circuit that performs processing, wherein the solid-state imaging device includes a plurality of light receiving units arranged in a matrix, a plurality of transfer channels arranged adjacent to the columns of the light receiving units, and the transfer A plurality of first transfer electrodes arranged on the channel and extending in a row direction between the light receiving parts, and arranged on the same channel as the first transfer electrode on the transfer channel, and separated from each other. A first transfer electrode that connects the second transfer electrodes that are adjacent to each other in the row direction and that extend in the row direction on the first transfer electrode and between the light receiving portions on the second transfer electrode and the third transfer electrode that are arranged. Drive wiring and the first drive wiring The extending in the row direction through between the light receiving portion, and a second driving wiring for connecting the third transfer electrodes adjacent in the row direction in.

In the present invention described above, the first transfer electrode, the first drive wiring, and the second drive wiring are arranged so as to overlap each other between the light receiving portions adjacent in the column direction. For this reason, it is sufficient to secure the width between the light receiving portions adjacent in the column direction by the width of one wiring.
Further, the first drive wiring extending in the row direction can supply the same transfer pulse to the second transfer electrode in the same row, and the third transfer electrode in the same row can be supplied to the third transfer electrode in the same row by the second drive wire extending in the row direction. Transfer pulses can be supplied. Therefore, various transfer modes such as three-phase driving, six-phase driving, and nine-phase driving can be supported. In addition, various transfer modes such as all pixel readout, frame readout, and field readout can be supported.

  According to the present invention, it is possible to realize a solid-state imaging device and a camera that can cope with various transfer modes and can improve light sensitivity.

  Embodiments of the present invention will be described below with reference to the drawings. In each figure, the same components are denoted by the same reference numerals. In the present embodiment, an example in which the present invention is applied to an interline transfer type CCD (Charge Coupled Device) type solid-state imaging device will be described. However, there is no particular limitation on the transfer method.

  FIG. 1 is a schematic configuration diagram of a solid-state imaging apparatus according to the present embodiment. The solid-state imaging device 1 according to the present embodiment includes an imaging unit 2, a horizontal transfer unit 3, and an output unit 4.

  The imaging unit 2 includes a plurality of light receiving units 5 arranged in a matrix for each pixel, a plurality of vertical transfer units 7 arranged for each vertical column of the light receiving unit 5, and the light receiving units 5 and the vertical transfer units 7. And a read gate portion 6 disposed between the two.

  The light receiving unit 5 includes, for example, a photodiode, and photoelectrically converts image light (incident light) incident from a subject into signal charges having a charge amount corresponding to the light amount and accumulates the signal light. The read gate unit 6 reads the signal charges accumulated in the light receiving unit 5 to the vertical transfer unit 7.

  The vertical transfer unit 7 is driven by, for example, three-phase clock signals φV1, φV2, and φV3, and transfers the signal charges read from the light receiving unit 5 in the vertical direction (downward in the figure). The clock signal is not limited to three phases, and may be six phases or nine phases. The clock signals φV1 to φV3 are, for example, 0V or −7V.

  The horizontal transfer unit 3 is driven by the two-phase clock signals φH1 and φH2, and transfers the signal charges vertically transferred from the vertical transfer unit 7 in the horizontal direction (left direction in the figure).

  The vertical transfer unit 7 and the horizontal transfer unit 3 include a transfer channel formed in the transfer direction formed on the substrate, and a plurality of transfer electrodes formed side by side in the transfer direction with an insulating film interposed on the transfer channel. Have.

  The output unit 4 converts the signal charge horizontally transferred by the horizontal transfer unit 3 into an electric signal and outputs it. The output unit 4 is configured by, for example, a floating diffusion amplifier. The output unit 4 includes a transistor 4a including a floating diffusion FD, a reset gate RG, and a reset drain RD, an amplifier 4b, and an output terminal 4c.

  The voltage of the floating diffusion FD changes according to the amount of signal charges transferred horizontally by the horizontal transfer unit. The voltage of the floating diffusion FD is amplified by the amplifier 4b and taken out as an analog image signal by the output terminal 4c. Thereafter, a reset pulse is input to the reset gate RG, the transistor 4a is turned on, and the signal charge of the floating diffusion FD is swept away to the reset drain RD. A power supply voltage Vdd is applied to the reset drain RD.

  FIG. 2 is a plan view of the main part of the imaging unit 2. In FIG. 2, only the transfer electrode is illustrated.

  The light receiving unit 5 is arranged in the horizontal direction and the vertical direction. The horizontal direction (lateral direction) is the row direction, and the vertical direction (vertical direction) is the column direction. The transfer channel 14 extends in the vertical direction between the two light receiving units 5 arranged in the horizontal direction. Thus, the transfer channel 14 extends in the transfer direction adjacent to the row of the light receiving portions 5.

  On the transfer channel 14, the first transfer electrode 21, the third transfer electrode 23, and the second transfer electrode 22 are repeatedly arranged in the transfer direction with an insulating film interposed therebetween. When there is no need to distinguish the first transfer electrode 21, the second transfer electrode 22, and the third transfer electrode 23, they are simply referred to as the transfer electrode 20. The vertical transfer unit 7 is configured by the transfer channel 14 and the transfer electrode 20. The transfer electrode 20 has a single layer structure, and is formed of, for example, a single polysilicon layer. In this embodiment, three transfer electrodes are arranged corresponding to each light receiving unit 5.

  The first transfer electrode 21 is formed to extend in the horizontal direction through the light receiving portions 5 adjacent in the vertical direction. The first transfer electrode 21 is disposed so as to cross the transfer channel 14 and is formed on the transfer channel 14 so as to be wide in the vertical direction.

  The second transfer electrode 22 is disposed adjacent to the light receiving unit 5. The second transfer electrodes 22 adjacent in the horizontal direction have a separated shape.

  The third transfer electrode 23 is disposed adjacent to the light receiving unit 5. The third transfer electrodes 23 adjacent in the horizontal direction are separated from each other.

  A first drive wiring is formed on the transfer electrode 20 via an insulating film. FIG. 3 is a plan view showing the layout of the first drive wiring 41.

  On the first transfer electrode 21, a first drive wiring 41 extending in the horizontal direction via an insulating film is formed. The first drive wiring 41 is disposed so as to overlap the first transfer electrode 21 in the inter-pixel portion. The first drive wiring 41 extends in the vertical direction on the transfer channel 14 and is connected to the second transfer electrode 22 through the contact hole CH. In the inter-pixel portion in the vertical direction, the vertical width of the first drive wiring 41 is narrower than the vertical width of the first transfer electrode 21 in the inter-pixel portion. On the transfer channel 14, the horizontal width of the first drive wiring 41 is narrower than the horizontal width of the transfer electrode 20.

  In the present embodiment, a buffer layer 41a is formed on the third transfer electrode 23 via an insulating film. The buffer layer 41 a is made of the same layer as the first drive wiring 41. Note that the buffer layer 41 a may not be provided on the third transfer electrode 23.

  The first drive wiring 41 and the buffer layer 41a are formed of a metal material such as polysilicon or tungsten, or a silicide material. When a metal material is used as the first drive wiring 41, the same resistance value can be obtained even if the film thickness and width are reduced as compared with the case where polysilicon is used. There is an advantage that can be relaxed.

  A second drive wiring is formed above the first drive wiring 41. FIG. 4 is a plan view showing a layout of the second drive wiring 42.

  On the first drive wiring 41, a second drive wiring 42 extending in the horizontal direction through an insulating film is formed. The second drive wiring 42 is disposed so as to overlap the first drive wiring 41 in the inter-pixel portion. The second drive wiring 42 extends in the vertical direction on the transfer channel 14 and is connected to the third transfer electrode 23 through a contact hole. In the inter-pixel portion in the vertical direction, the vertical width of the second drive wiring 42 is set to be equal to or smaller than the width of the first drive wiring 41 and is narrower than the vertical width of the first transfer electrode 21 in the inter-pixel portion. . On the transfer channel 14, the horizontal width of the second drive wiring 42 is narrower than the horizontal width of the transfer electrode 20.

  The second drive wiring 42 is formed of a metal material such as polysilicon or tungsten, or a silicide material. When a metal material is used as the second drive wiring 42, an equivalent resistance value can be obtained even if the film thickness and width are reduced as compared with the case where polysilicon is used. There is an advantage that can be relaxed.

  In the present embodiment, the second drive wiring 42 and the third transfer electrode 23 are connected via the buffer layer 41a. Note that it is preferable to provide the buffer layer 41 a on the third transfer electrode 23 when a metal material such as tungsten is employed as the second drive wiring 42. This is to suppress the influence on the transfer caused by the diffusion of the metal material such as tungsten into the polysilicon. Further, providing the buffer layer 41a on the third transfer electrode 23 has an advantage that the aspect ratio of the contact hole is reduced.

  In the solid-state imaging device described above, since three transfer electrodes are provided for one light receiving unit 5, all pixel readout is possible. In the solid-state imaging device described above, three-phase driving, six-phase driving, and nine-phase driving are possible.

  For example, when three-phase driving is performed, a transfer pulse φV1 is applied to the first transfer electrode 21, φV2 is applied to the third transfer electrode 23, and φV3 is applied to the second transfer electrode 22. In this case, the read voltage is applied to both or one of the second transfer electrode 22 and the third transfer electrode 23.

  When performing 6-phase driving, φV1 to φV6 are sequentially applied to the first transfer electrode 21, the third transfer electrode 23, and the second transfer electrode 22 arranged in the vertical direction. In this case, the read voltage is applied to both or one of the second transfer electrode 22 and the third transfer electrode 23.

  In the present embodiment, all the second transfer electrodes 22 in the horizontal direction are connected by the first drive wiring 41, and all the third transfer electrodes 23 in the horizontal direction are connected by the second drive wiring 42.

  For this reason, field readout and frame readout are possible in addition to all-pixel readout. For example, it is possible to perform frame readout in which only signal charges of pixels (light receiving units) in odd-numbered rows are read in the first field and signal charges of pixels (light receiving units) in even-numbered rows are read in the second field. Also, field reading is possible.

  FIG. 5 is a cross-sectional view taken along the line A-A ′ of FIG. 4. 6 is a cross-sectional view taken along line B-B ′ of FIG. 4. FIG. 7 is a cross-sectional view taken along line C-C ′ of FIG. 4. For simplification of illustration, the upper layer of the light shielding film is illustrated only in FIG.

  For example, a p-type well 11 is formed on an n-type silicon substrate (hereinafter referred to as substrate 10). The p-type well 11 forms an overflow barrier.

The light receiving unit 5 includes an n-type signal charge storage region 12 formed in the p-type well 11 and a p ⁺ -type hole storage region 13 formed in the surface layer of the signal charge storage region 12. The hole accumulation region 13 is provided in order to suppress dark current that is generated near the surface of the signal charge accumulation region 12 and becomes a noise source.

  In the light receiving portion 5, an npn structure is formed by the signal charge accumulation region 12, the p-type well 11 and the substrate 10. This npn structure is a vertical overflow drain that discharges signal charges to the substrate 10 side when signal light generated excessively due to strong light incident on the light receiving section 5 exceeds an overflow barrier formed by the p-type well 11. Configure the structure.

  Further, the light receiving unit 5 has a function of an electronic shutter. That is, by setting the substrate potential supplied to the substrate 10 to a high level (for example, +12 V), the potential barrier of the p-type well 11 is lowered, and the charge accumulated in the signal charge accumulation region 12 overcomes the potential barrier, It is swept away in the vertical direction, that is, the substrate 10. Thereby, the exposure period can be adjusted.

  The vertical transfer unit 7 includes an n-type transfer channel 14 formed in the p-type well 11 at a predetermined interval from the signal charge storage region 12, and a gate insulating film 30 made of a silicon oxide film on the transfer channel 14. The transfer electrodes 21 to 23 are made of, for example, polysilicon. A relatively high concentration p-type region 15 is formed under the transfer channel 14. The p-type region 15 forms a potential barrier under the transfer channel 14. For this reason, the signal charge photoelectrically converted in the deep portion of the substrate 10 is prevented from entering the transfer channel 14, and the occurrence of smear is suppressed.

  The read gate unit 6 includes a p-type read gate region 16 between the signal charge storage region 12 and the transfer channel 14, and transfer electrodes 22 and 23 formed on the read gate region 16 via a gate insulating film 30. It is configured. The read gate region 16 forms a potential barrier between the n-type signal charge storage region 12 and the transfer channel 14. At the time of reading, a positive read voltage (for example, +12 to +15 V) is applied to the transfer electrodes 22 and 23, the potential barrier of the read gate region 16 is lowered, and the signal charge is transferred from the signal charge storage region 12 to the transfer channel 14. Moved.

  A p-type channel stop region 17 is formed on the side opposite to the reading side with respect to the signal charge storage region 12. A channel stop region 17 is formed below the first transfer electrode 21 in the inter-pixel portion (see FIG. 7). The channel stop region 17 forms a potential barrier against the signal charge and prevents the signal charge from flowing in and out.

  On the transfer electrodes 21 to 23, an insulating film 31 made of, for example, silicon oxide is formed. A buffer layer 41a is formed on the third transfer electrode 23 via an insulating film 31 (see FIG. 5). The third transfer electrode 23 and the buffer layer 41a are connected via a contact hole formed in the insulating film 31.

  A first drive wiring 41 is formed on the first transfer electrode 21 and the second transfer electrode 22 via an insulating film 31 (see FIGS. 6 and 7). The second transfer electrode 22 and the first drive wiring 41 are connected via a contact hole formed in the insulating film 31.

  An insulating film 32 made of, for example, silicon oxide is formed so as to cover the first drive wiring 41 and the buffer layer 41a. In the inter-pixel portion, the second drive wiring 42 is formed on the first drive wiring 41 via the insulating film 32 (see FIG. 7).

  A second drive wiring 42 is formed on the buffer layer 41a with an insulating film 32 interposed therebetween. The second drive wiring 42 is made of, for example, a metal material such as polysilicon or tungsten, or a silicide material. The buffer layer 41 a and the second drive wiring 42 are connected via a contact hole formed in the insulating film 32. As a result, the second drive wiring 42 and the third transfer electrode 23 are electrically connected. When a metal material such as tungsten is employed as the second drive wiring 42, a barrier metal may be interposed between the second drive wiring 42 and the buffer layer 41a. Ti or TiW is used as the barrier metal.

  An insulating film 33 made of, for example, silicon oxide is formed so as to cover the second drive wiring 42. A light shielding film 50 is formed so as to cover the transfer electrodes 21 to 23, the first drive wiring 41, and the second drive wiring 42. The light shielding film 50 is made of a refractory metal such as tungsten, for example. In the light shielding film 50, an opening 50a for allowing light to enter the light receiving portion 5 is formed.

  An interlayer insulating film 61 made of, for example, BPSG (Boro Phospho Silicate glass) is formed on the light shielding film 50 (see FIG. 5). A passivation film 62 made of, for example, silicon nitride is formed on the interlayer insulating film 61. The surface of the passivation film 62 is planarized.

  A color filter 70 is formed on the passivation film 62. The color filter 70 is, for example, a primary color type, and includes a green color filter 71, a blue color filter 72, and a red color filter 73. In the case of the complementary color type, the color filter 70 is formed of cyan, magenta, yellow, and green color filters.

  On the color filter 70, for example, a planarizing film 80 made of an acrylic thermosetting resin is formed. A microlens 90 is formed on the planarizing film 80.

  In the solid-state imaging device described above, incident light is collected by the microlens 90 and reaches each color filter 71, 72, 73. Only light in a predetermined wavelength region passes through each color filter and enters the light receiving unit 5. The light incident on the light receiving unit 5 is photoelectrically converted into a signal charge corresponding to the amount of incident light and accumulated in the signal charge accumulation region 12. Thereafter, the data is read out to the transfer channel 14 and transferred in the vertical direction by the vertical transfer unit 7.

  Next, a method for manufacturing the solid-state imaging device according to the present embodiment will be described with reference to FIGS.

  As shown in FIG. 8A, a p-type well 11 is formed on a substrate 10 made of n-type silicon by ion implantation. At this time, a p-type well of the transistor 4a of the output unit 4 is also formed. As the substrate 10, for example, a substrate in which an n-type epitaxial layer having a resistivity of about 20 to 40 Ωcm is formed on an n-type CZ substrate by about several μm to several tens of μm is used.

  Next, as shown in FIG. 8B, the n-type signal charge accumulation region 12, the p-type hole accumulation region 13, the n-type transfer channel 14 and the p-type region 15 are implanted into the substrate 10 by ion implantation. , A p-type read gate region 16 and a p-type channel stop region 17 are formed.

  Next, as shown in FIG. 8C, a gate insulating film 30 made of a silicon oxide film is formed on the substrate 10 by a thermal oxidation method. Note that a stacked film of a silicon oxide film, a silicon nitride film, and a silicon oxide film may be formed as the gate insulating film 30. The various regions 12 to 17 described above may be formed after the gate insulating film 30 is formed.

  Next, as shown in FIG. 9A, the transfer electrode 20 is formed on the substrate 10 via the gate insulating film 30. The transfer electrode 20 forms, for example, a single-layer transfer electrode 20 by depositing a polysilicon layer on the substrate 10 and processing the polysilicon layer by lithography and etching techniques. The polysilicon layer is an embodiment of the conductive layer of the present invention. The thickness of the polysilicon layer is 200 nm to 500 nm. Thereby, the transfer electrode 20 including the first transfer electrode 21, the second transfer electrode 22, and the third transfer electrode 23 is formed. The pattern of the transfer electrode 20 is as shown in FIG.

  Next, as shown in FIG. 9B, an insulating film 31 is formed so as to cover the transfer electrode 20. The insulating film 31 is formed by depositing a silicon oxide film by, for example, a CVD method. The film thickness of the insulating film 31 is set to around 100 nm so that it can withstand a drive voltage of several tens of volts.

  Next, as shown in FIG. 10A, a contact hole CH is formed in the insulating film 31 on the second transfer electrode 22 and the third transfer electrode 23 by lithography and etching techniques. When the buffer layer 41a is not required, the contact hole CH may be formed only in the insulating film 31 on the second transfer electrode 22.

  Next, as shown in FIG. 10B, a polysilicon layer is deposited on the entire surface, and the polysilicon layer is processed by a lithography technique and an etching technique, thereby forming a first drive wiring 41 and a buffer layer 41a. . The first drive wiring 41 is connected to the second transfer electrode 22 through the contact hole CH. The buffer layer 41a is connected to the third transfer electrode 23 through the contact hole CH. The thickness of the polysilicon layer is 200 to 500 nm.

  Next, as shown in FIG. 11A, an insulating film 32 that covers the first drive wiring 41 and the buffer layer 41a is formed. The insulating film 32 is formed by depositing a silicon oxide film by, for example, a CVD method. The film thickness of the insulating film 32 is set to around 100 nm so that it can withstand a drive voltage of several tens of volts.

  Next, as shown in FIG. 11B, a contact hole CH is formed in the insulating film 32 on the third transfer electrode 23 by lithography and etching techniques.

  Next, as shown in FIG. 12A, a polysilicon layer is deposited on the entire surface, and the second drive wiring 42 is formed by processing the polysilicon layer by lithography and etching techniques. The second drive wiring 42 is connected to the buffer layer 41a and the third transfer electrode 23 through the contact hole CH. When a polysilicon layer is used as the second drive wiring 42, the thickness of the polysilicon layer is 200 to 500 nm. In the case where a low-resistance metal material such as tungsten is used for the second drive wiring 42, the film thickness can be made thinner than in the case of the polysilicon layer.

  Although not shown, the reset gate RG of the transistor 4a of the output section 4 is formed by using the transfer electrode 20, the first drive wiring 41, or the second drive wiring 42. Further, ion implantation for forming the reset drain RD and the floating diffusion FD of the transistor 4a is performed.

  Next, as shown in FIG. 12B, an insulating film 33 that covers the second drive wiring 42 is formed. The insulating film 33 is formed by depositing a silicon oxide film by, for example, a CVD method. The film thickness of the insulating film 33 is set to around 100 nm so that it can withstand a drive voltage of several tens of volts.

  Next, as shown in FIG. 13A, a light shielding film 50 having an opening 50 a at the position of the light receiving portion 5 and covering the transfer electrode 20 and the drive wirings 41 and 42 is formed. The light shielding film 50 is formed, for example, by depositing a refractory metal film such as tungsten on the entire surface and processing the refractory metal film by dry etching using a resist mask.

  Next, as shown in FIG. 13B, for example, BPSG is deposited on the substrate 10, and an interlayer insulating film 61 is formed by performing a reflow process. Subsequently, contact holes for connecting to the floating diffusion FD and reset drain RD of the transistor 4a of the output unit 4 (not shown) are formed in the interlayer insulating film 61. Thereafter, a wiring is formed on the interlayer insulating film 61.

  Next, as shown in FIG. 14A, a silicon nitride film is deposited on the interlayer insulating film 61 by plasma CVD, and a passivation film 62 is formed by planarizing the surface of the silicon nitride film.

  Next, as shown in FIG. 14B, a color filter 70 is formed on the passivation film 62. The color filter 70 is formed using, for example, a color resist method. For example, after a green color resist is formed on the passivation film 62, the green color resist is exposed and developed to form a pattern of the green color filter 71. Similarly, a blue color filter 72 and a red color filter 73 are formed by performing color resist formation, exposure, and development. Note that the order of forming the color filter 70 is not limited.

  Next, for the purpose of flattening the surface unevenness of the color filter 70, a transparent flattening film 80 is formed on the color filter 70 (see FIG. 5). As the planarization film 80, for example, an acrylic thermosetting resin is used.

  Next, a microlens 90 is formed on the planarizing film 80 (see FIG. 5). For example, after a lens material is applied, a microlens 90 is formed by forming a lens-shaped resist mask and performing etching under conditions such that the etching selectivity between the resist mask and the lens material is 1.

  As described above, the solid-state imaging device according to this embodiment is manufactured. The solid-state imaging device is used for a camera such as a video camera, a digital still camera, or an electronic endoscope camera, for example.

  FIG. 15 is a schematic configuration diagram of a camera in which the above-described solid-state imaging device is used.

  The camera 100 includes the solid-state imaging device 1 described above, an optical system 102, a drive circuit 103, and a signal processing circuit 104.

  The optical system 102 forms image light (incident light) from the subject on the imaging surface of the solid-state imaging device 1. As a result, in each light receiving unit 5 of the solid-state imaging device 1, incident light is converted into a signal charge corresponding to the amount of incident light.

  The drive circuit 103 supplies various timing signals such as the above-described three-phase clock signals φV1, φV2, and φV3 and two-phase clock signals φH1 and φH2 to the solid-state imaging device 1. As a result, various types of driving such as signal charge readout, vertical transfer, and horizontal transfer of the solid-state imaging device 1 are performed. Further, by this driving, an analog image signal is output from the output unit 4 of the solid-state imaging device 1.

  The signal processing circuit 104 performs various signal processing such as noise removal and conversion into a digital signal on the analog image signal output from the solid-state imaging device 1. After the signal processing by the signal processing circuit 104 is performed, it is stored in a storage medium such as a memory.

  Next, the solid-state imaging device according to the present embodiment, the manufacturing method thereof, and the effects of the camera will be described.

  In the solid-state imaging device according to the present embodiment, the transfer electrode 20 on the transfer channel 14 is formed by the first transfer electrode 21, the second transfer electrode 22, and the third transfer electrode 23 having a single layer structure. The first transfer electrode 21 extends in the horizontal direction, and the second transfer electrode 22 and the third transfer electrode 23 are separately disposed. A first drive wiring 41 for supplying a transfer pulse to the second transfer electrode 22 in the same row is arranged so as to overlap the first transfer electrode 21 between the light receiving portions 5. A second drive wiring 42 for supplying a transfer pulse to the third transfer electrode 23 in the same row is disposed so as to overlap the first drive wiring 41 between the light receiving portions 5.

  In the present embodiment, the first transfer electrode 21, the first drive wiring 41, and the second drive wiring 42 are disposed so as to overlap each other between the light receiving portions 5 in the vertical direction (see FIG. 4). For this reason, it is sufficient to secure the width between the light receiving portions 5 in the vertical direction by the width of one wiring. As a result, the area of the light receiving unit 5 can be increased, and the amount of charge handled by the light receiving unit 5 can be increased. Therefore, it is possible to realize a solid-state imaging device with improved photosensitivity and a large dynamic range. Since the area of the light receiving portion 5 can be increased, the potential of the light receiving portion 5 can be formed relatively shallow, and the read voltage can be reduced.

  In this embodiment, the first drive wiring 41 extending in the horizontal direction can supply transfer pulses having the same phase to the second transfer electrodes 22 in the same row, and the second drive wiring 42 extending in the horizontal direction can supply the third pulse in the same row. Transfer pulses having the same phase can be supplied to the transfer electrode 23. Therefore, various transfer modes such as three-phase driving, six-phase driving, and nine-phase driving can be supported. In addition, various transfer modes such as all pixel readout, frame readout, and field readout can be supported.

  The read voltage is supplied to both or one of the first drive wiring 41 and the second drive wiring 42. Since the first transfer electrode 21 is formed below the first drive wiring 41 and the second drive wiring 42, the read voltage is applied to the channel stop region between the pixels due to the shielding effect of the first transfer electrode 21. The influence on the potential of 17 can be suppressed. For this reason, the flow of signal charges between the light receiving portions 5 in the vertical direction can be suppressed.

  On the transfer channel 14, the horizontal width of the first drive wiring 41 and the second drive wiring 42 is formed narrower than the horizontal width of the transfer electrode 20. For this reason, the level | step difference in the right and left of the light-receiving part 5 can be made small compared with the case where a multilayer transfer electrode is employ | adopted. Thereby, the fluctuation of incident light can be reduced and the amount of incident light to the light receiving unit 5 can be increased, which can contribute to the improvement of photosensitivity.

  In the vertical inter-pixel portion, the vertical width of the first drive wiring 41 and the second drive wiring 42 is formed to be narrower than the vertical width of the transfer electrode 20. For this reason, the level | step difference which generate | occur | produces in the peripheral part in the orthogonal | vertical direction of the light-receiving part 5 can be made small. Thereby, the fluctuation of incident light can be reduced and the amount of incident light to the light receiving unit 5 can be increased, which can contribute to the improvement of photosensitivity.

  By arranging the second transfer electrode 22 and the third transfer electrode 23 adjacent to the light receiving unit 5, that is, directly beside the light receiving unit 5, and applying a read voltage to the second transfer electrode 22 and the third transfer electrode 23 The width of the read gate can be increased. Thereby, even if the read voltage is lowered, the read efficiency can be maintained.

  As described above, according to the solid-state imaging device according to the present embodiment, it is possible to realize a solid-state imaging device that can cope with various transfer modes and can improve light sensitivity. By applying the solid-state imaging device to a camera, it is possible to realize a camera that can cope with various transfer modes and has improved light sensitivity.

  According to the method for manufacturing a solid-state imaging device according to the present embodiment, it is possible to manufacture a solid-state imaging device that can cope with various transfer modes and can improve light sensitivity.

The present invention is not limited to the description of the above embodiment.
The present invention can be applied to a solid-state imaging device of a frame transfer system or a frame interline transfer system in addition to the interline transfer system. In addition to polysilicon, a metal material such as tungsten or a silicide material can be used for the transfer electrode 20 and the first drive wiring 41.
In addition, various modifications can be made without departing from the scope of the present invention.

It is a schematic block diagram which shows an example of the solid-state imaging device concerning this embodiment. It is a top view which shows a transfer electrode. It is a top view which shows a transfer electrode and 1st drive wiring. It is a top view which shows a transfer electrode and the 1st-2nd drive wiring. It is sectional drawing in the A-A 'line | wire of FIG. It is sectional drawing in the B-B 'line of FIG. It is sectional drawing in the C-C 'line of FIG. It is process sectional drawing in manufacture of the solid-state imaging device which concerns on this embodiment. It is process sectional drawing in manufacture of the solid-state imaging device which concerns on this embodiment. It is process sectional drawing in manufacture of the solid-state imaging device which concerns on this embodiment. It is process sectional drawing in manufacture of the solid-state imaging device which concerns on this embodiment. It is process sectional drawing in manufacture of the solid-state imaging device which concerns on this embodiment. It is process sectional drawing in manufacture of the solid-state imaging device which concerns on this embodiment. It is process sectional drawing in manufacture of the solid-state imaging device which concerns on this embodiment. It is a block diagram which shows schematic structure of the camera with which the solid-state imaging device which concerns on this embodiment is applied.

Explanation of symbols

DESCRIPTION OF SYMBOLS 1 ... Solid-state imaging device, 2 ... Imaging part, 3 ... Horizontal transfer part, 4 ... Output part, 4a ... Transistor, 4b ... Amplifier, 4c ... Output terminal, 5 ... Light-receiving part, 6 ... Read-out gate part, 7 ... Vertical transfer , 10 ... substrate, 11 ... p-type well, 12 ... signal charge storage region, 13 ... hole storage region, 14 ... transfer channel, 15 ... p-type region, 16 ... read gate region, 17 ... channel stop region, 20 ... Transfer electrode, 21 ... First transfer electrode, 22 ... Second transfer electrode, 23 ... Third transfer electrode, 30 ... Gate insulating film, 31 ... Insulating film, 32 ... Insulating film, 33 ... Insulating film, 41 ... First Drive wiring, 41a ... buffer layer, 42 ... second drive wiring, 50 ... light shielding film, 50a ... opening, 61 ... interlayer insulating film, 62 ... passivation film, 70 ... color filter, 71 ... green color filter, 72 ... blue Karafu Luther, 73 ... Red color filter, 80 ... Flattened film, 90 ... Micro lens, 100 ... Camera, 102 ... Optical system, 103 ... Drive circuit, 104 ... Signal processing circuit, CH ... Contact hole, FD ... Floating diffusion, RG ... Reset gate, RD ... Reset drain

Claims (10)

A plurality of light receiving units arranged in a matrix;
A plurality of transfer channels respectively disposed adjacent to the rows of the light receiving portions;
A plurality of first transfer electrodes disposed on the transfer channel and extending in a row direction between the light receiving portions;
A second transfer electrode and a third transfer electrode, which are arranged in the same layer as the first transfer electrode on the transfer channel, and are arranged separately from each other;
A first drive wiring that extends in the row direction over the first transfer electrodes in the row direction and connects the second transfer electrodes adjacent to each other in the row direction;
A solid-state imaging device comprising: a second drive wiring that extends in the row direction through the light receiving portions on the first drive wiring and connects the third transfer electrodes adjacent to each other in the row direction. The solid-state imaging device according to claim 1, wherein the second transfer electrode and the third transfer electrode are disposed adjacent to the light receiving unit. The solid-state imaging device according to claim 1, further comprising a light-shielding film that shields a region other than the light-receiving portion on an upper layer of the second drive wiring. The solid-state imaging device according to claim 1, wherein the first drive wiring and the second drive wiring are narrower than a width of the first transfer electrode between the light receiving portions. The solid-state imaging device according to claim 1, wherein the second drive wiring and the third transfer electrode are directly connected on the transfer channel. A buffer layer formed on the same layer as the first drive wiring and connected to the third transfer electrode on the transfer channel;
The solid-state imaging device according to claim 1, wherein the second drive wiring is connected to the buffer layer on the transfer channel, and the second drive wiring and the third transfer electrode are connected via the buffer layer. . Forming a plurality of light receiving portions arranged in a matrix on the substrate by introducing impurities into the substrate, and a plurality of transfer channels respectively arranged adjacent to the columns of the light receiving portions;
Depositing a conductive layer on the substrate;
A plurality of first transfer electrodes that are processed in the conductive layer and extend in the row direction through the light receiving portions, and second transfer electrodes and third transfer electrodes that are separately disposed on the transfer channel. Forming the step,
Forming on the first transfer electrode a first drive wiring that extends in the row direction between the light receiving portions and connects the second transfer electrodes adjacent to each other in the row direction;
Forming a second drive wiring on the first drive wiring that extends in the row direction through the light receiving portions and connects the third transfer electrodes adjacent to each other in the row direction. Production method. The method for manufacturing a solid-state imaging device according to claim 7, further comprising a step of forming a light-shielding film that shields a region other than the light-receiving portion in an upper layer of the second drive wiring after the step of forming the second drive wiring. . The method for manufacturing a solid-state imaging device according to claim 7, further comprising a step of forming a buffer layer above the third transfer electrode simultaneously with the step of forming the first drive wiring. A solid-state imaging device;
An optical system for imaging light on the imaging surface of the solid-state imaging device;
A signal processing circuit that performs predetermined signal processing on an output signal from the solid-state imaging device;
The solid-state imaging device
A plurality of light receiving units arranged in a matrix;
A plurality of transfer channels respectively disposed adjacent to the rows of the light receiving portions;
A plurality of first transfer electrodes disposed on the transfer channel and extending in a row direction between the light receiving portions;
A second transfer electrode and a third transfer electrode, which are arranged in the same layer as the first transfer electrode on the transfer channel, and are arranged separately from each other;
A first drive wiring that extends in the row direction over the first transfer electrodes in the row direction and connects the second transfer electrodes adjacent to each other in the row direction;
And a second drive line that extends in the row direction through the light receiving portions on the first drive line and connects the third transfer electrodes adjacent to each other in the row direction.

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