JP2007012881A - Semiconductor device - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To achieve both the reduction of burden to a user for adjusting self characteristics of a semiconductor device and the miniaturization of a circuit scale in the semiconductor device provided with a function for adjusting the self characteristics. <P>SOLUTION: Mutually different four parameter values are given to a resistor 20 from an initial setting circuit 10 in turn. Consequently, a parameter value of "1010" is written into a storage region 31, parameter values of "00" and "11" are written into storage regions 41a, 41b, respectively, and parameter values of "00"-"11" are written into storage regions 51a-51d, respectively. An output side selector 43 selects data stored in the storage region 41b corresponding to a cut/non-cut state of a fuse 21a. An output side selector 53 selects data stored in the storage region 51b corresponding to the combination of the cut/non-cut states of fuses 21b, 21c. As a whole, an eight-bit parameter value "10101101" is outputted. <P>COPYRIGHT: (C)2007,JPO&INPIT

Description

  The present invention relates to a semiconductor device having a function of adjusting its own characteristics.

  In general, manufacturing variations occur in semiconductor devices that are mass-produced. For this reason, some semiconductor devices have a function of adjusting their own characteristics. In this case, the characteristics of each semiconductor device are detected, and the individual adjustment parameters are set according to the detection results. The individual adjustment parameter is, for example, binary voltage information (logic information) of several bits, and is set by the following method.

  As a first method, a fuse for designating the value of each bit of the individual adjustment parameter is provided in the semiconductor device, and a desired value is set depending on whether or not to cut each fuse. In this case, normally, a fuse cutting operation is performed before shipment of the semiconductor device.

  As a second method, a register of several bits for storing individual adjustment parameters is formed in the semiconductor device, and a desired value is set from software. In general, when the supply of power to the semiconductor device is stopped, data held in the register is lost. For this reason, when adjustment is performed by the second method, it is necessary to write a parameter value to the register at the start of power supply to the semiconductor device.

Patent Document 1 describes a semiconductor device having a built-in fuse. This semiconductor device has a function of selecting one from a plurality of macros by using a first fuse block, designating a defective block in the macro by using a second fuse block, and substituting with a redundant block.
JP-A-2004-39680 (FIG. 1, paragraphs 0017 to 0026 of the specification)

  In the first method, it is necessary to provide a fuse for each bit of the individual adjustment parameter. That is, for example, if the individual adjustment parameter is 8 bits, it is necessary to provide 8 fuses. This hinders downsizing of the semiconductor device.

  In the second method, a manufacturer of a semiconductor device determines a parameter value to be set for each semiconductor device, and the parameter value is determined by a user of the semiconductor device (for example, a manufacturer of an electronic device incorporating the semiconductor device). Notify Then, the user provides a function (including a register) for writing parameter values from the electronic device to the semiconductor device. Thereby, parameter values corresponding to individual semiconductor devices can be set in the registers. However, since the individual adjustment parameters are for compensating for manufacturing variations of semiconductor devices, the parameter values to be set for each semiconductor device are individually different. For this reason, the user of the semiconductor device needs to prepare software for setting different parameters depending on the individual semiconductor device. That is, it becomes inconvenient for the user.

  SUMMARY OF THE INVENTION An object of the present invention is to realize both a reduction of a user burden for the adjustment and a reduction in circuit scale in a semiconductor device having a function of adjusting its own characteristics.

  A semiconductor device according to the present invention includes a plurality of storage areas for storing individual adjustment parameters, and an input-side selector for guiding a plurality of different individual adjustment parameters to corresponding storage areas in the plurality of storage areas according to a selection signal. A fuse set in a cut or non-cut state to select one storage area from the plurality of storage areas, and an individual adjustment stored in a storage area selected according to the fuse state An output-side selector that selects and outputs a parameter;

  In the semiconductor device of the present invention, a plurality of individual adjustment parameters are set in common for each semiconductor device in order to compensate for manufacturing variations when mass-produced. At this time, it is not necessary to prepare different individual adjustment parameters for each semiconductor device. According to the characteristics of each semiconductor device, a parameter to be used is determined from among the plurality of individual adjustment parameters, and the fuse is in a blown state or a non-cut state so as to specify a storage area in which the determined parameter is stored. Set to. That is, the fuse is used for designating a storage area, and a fuse for designating the value of each bit of the individual adjustment parameter is not necessary. With the above configuration, each semiconductor device can use appropriate individual adjustment parameters.

  In the semiconductor device, the plurality of storage areas may each be composed of a plurality of bits, and the number of fuses may be smaller than the number of bits. According to this configuration, it is possible to reduce the size of the semiconductor device.

  In the semiconductor device, the plurality of storage areas may constitute a part of a register designated by one address. According to this configuration, it is possible to realize a configuration in which an appropriate parameter is selected from a plurality of individual adjustment parameters without increasing the register address.

  The semiconductor device may further include mode switching means for guiding the selection signal to the output side selector according to the mode switching signal. In this case, the output-side selector selects and outputs the individual adjustment parameters stored in the corresponding storage area among the plurality of storage areas in accordance with the selection signal. According to this configuration, since a desired individual adjustment parameter can be output using the selection signal, debugging work is facilitated.

  According to the present invention, in a semiconductor device having a function of adjusting its own characteristics, it is possible to reduce both a user burden for the adjustment and a reduction in circuit scale.

  FIG. 1 is a diagram illustrating an example of use of a semiconductor device according to an embodiment of the present invention. The semiconductor device 1 of the embodiment is an integrated circuit (IC), and is used by being mounted on the electronic device 100. The electronic device 100 is not particularly limited, but is a communication device, for example. Then, the semiconductor device 1 performs a predetermined process on the input signal and outputs a corresponding signal. Thereby, some of the functions provided by the electronic device 100 are realized.

  Generally, semiconductor devices have manufacturing variations when they are mass-produced. For this reason, the semiconductor device 1 according to the embodiment has a function for obtaining a certain characteristic by using the individual adjustment parameter. That is, the semiconductor device 1 includes a register 2 for storing individual adjustment parameters. The semiconductor device 1 operates using the individual adjustment parameters stored in the register 2.

  The initial setting circuit 10 holds parameters for individual adjustment to be given to the semiconductor device 1. This individual adjustment parameter is provided from the manufacturer of the semiconductor device 1, for example. The initial setting circuit 10 transmits the held individual adjustment parameters to the semiconductor device 1 when the electronic device 100 is turned on. As a result, the individual adjustment parameters are set in the register 2 of the semiconductor device 1.

  The individual adjustment parameters include a plurality of parameter values, and the plurality of parameter values are stored in the register 2 of the semiconductor device 1. Then, the semiconductor device 1 selects and uses one designated in advance from among the plurality of parameter values. Therefore, it is not necessary to prepare individual adjustment parameters corresponding to each semiconductor device, and one individual adjustment parameter including a plurality of parameter values common to all semiconductor devices mounted in a large number of electronic devices is prepared. By simply doing, it is possible to suppress variation in characteristics of each semiconductor device. The parameter value to be used is specified by the fuse 3. The fuse 3 is set in a cut / non-cut state in advance by the manufacturer of the semiconductor device 1 in order to designate a parameter value to be used.

  FIG. 2 is a diagram for explaining the concept of the present invention. In FIG. 2, the register 2 is built in the semiconductor device 1 and includes four storage areas (register surfaces) 2a to 2d. Each of the storage areas 2a to 2d is composed of 4 bits, and different parameter values are written therein. These parameter values are given from the initial setting circuit 10 shown in FIG.

  The fuses 3a and 3b are set to a cut state or a non-cut state in order to select one storage region from the storage regions 2a to 2d. For example, the state where both the fuses 3a and 3b are cut indicates that the storage area 2a is selected, and the state where only the fuse 3a is cut indicates that the storage area 2b is selected and only the fuse 3b is cut. The state where the storage area 2c is selected indicates that the storage area 2c is selected, and the state where both the fuses 3a and 3b are not disconnected indicates that the storage area 2d is selected. In the present embodiment, each storage area 2a to 2d has “4” bits, whereas a fuse (3a, 3b) for selecting a desired storage area (2a, 2b, 2c, or 2d). ) Is “2”. That is, the number of fuses is smaller than the number of bits in each storage area.

  The output selector 4 selects and outputs the parameter value stored in the storage area (one of the storage areas 2a to 2d) corresponding to the state of the fuses 3a and 3b. For example, if both the fuses 3a and 3b are cut in the above case, the parameter value stored in the storage area 2a is selected and output.

  In the above configuration, the state of the fuses 3a and 3b is set by the manufacturer of the semiconductor device 1, for example. That is, the manufacturer of the semiconductor device 1 determines four parameter values (“0000”, “1010”, “0011”, “1110” in the example shown in FIG. 2) in advance, and sets these parameter values in the semiconductor device 1. Provide it to users. The manufacturer of the semiconductor device 1 detects the characteristics of the semiconductor device 1 and determines a parameter value (one of the four parameter values in the example shown in FIG. 2) according to the detection result. Then, the fuses 3a and 3b are cut so that the determined parameter value is selected by the output-side selector 4 (none is cut depending on the parameter value to be selected). On the other hand, the user designs the initial setting circuit 100 so that the four parameter values provided by the manufacturer of the semiconductor device 1 are respectively written in the storage areas 2 a to 2 d when the electronic device 100 is powered on. By doing so, when the electronic device 100 is turned on, a plurality of parameter values are written in the storage areas 2a to 2d, and a parameter value determined by the manufacturer of the semiconductor device 1 is output from the plurality of parameters. become.

  According to the above configuration, a desired one can be selected from four different 4-bit data (parameter values) by appropriately setting the states of the two fuses. On the other hand, in the conventional technique for providing desired data only with a fuse without using a register, it is necessary to provide a fuse for each bit. A fuse is required. Therefore, the semiconductor device 1 of the embodiment reduces the number of necessary fuses and contributes to downsizing.

  In addition, according to the configuration of the embodiment, it is only necessary to provide individual adjustment parameters including a plurality of parameter values common to each semiconductor device 1. Therefore, the burden on the user of the semiconductor device 1 does not become heavy.

  Furthermore, although the register 2 is composed of a plurality of storage areas, it can be configured such that one address is allocated. In other words, any value among a plurality of parameter values can be used without increasing the register address.

  FIG. 3 is an example of a main part of the semiconductor device 1 according to the embodiment. Here, an 8-bit parameter value is used. In the parameter value, the seventh to fourth bits are “1010”, the third to second bits are “00” or “11”, and the first to zeroth bits are “00” and “01”. "10" or "11".

  The register 20 stores a storage area 31 for storing 7th to 4th bit data, storage areas 41a and 41b for storing 3rd to 2nd bit data, and 1st to 0th bit data. Storage areas 51a to 51d for storing are provided. Further, an input side selector 42 is provided at the input part of the storage areas 41a and 41b, and an output side selector 43 is provided at the output part thereof. Similarly, an input side selector 52 is provided at the input part of the storage areas 51a to 51d, and an output side selector 53 is provided at the output part thereof.

  In this embodiment, the initial setting circuit 10 holds four parameter values “10100000”, “10100001”, “10101110”, and “10101111”. These parameter values are sequentially output in the 8-bit parallel format in synchronization with the writing surface selection signal. The seventh to fourth bits are written in the storage area 31. The third to second bits of the parameter value are given to the input side selector 42, and the first to zeroth bits are given to the input side selector 52.

  The writing surface selection signal (selection signal) is given to the selector 60 and also to the input side selectors 42 and 52. Here, the writing surface selection signal can take four values from “00” to “11”. The input side selector 42 writes the input data to the storage area 41a if the writing surface selection signal is “00” or “01”, and inputs the input data if the writing surface selection signal is “10” or “11”. Write to the storage area 41b. On the other hand, the input side selector 52 writes the input data to the storage area 51a if the writing surface selection signal is “00”, and writes the input data to the storage area 51b if the writing surface selection signal is “01”. If the selection signal is “10”, the input data is written to the storage area 51c, and if the write surface selection signal is “11”, the input data is written to the storage area 51d.

  The fuses 21 a to 21 c are set in a cut state or a non-cut state in advance by the manufacturer of the semiconductor device 1 according to the characteristics of the semiconductor device 1. The states of the fuses 21a to 21c are notified to the register 20 through the fuse interface. Specifically, the state of the fuse 21 a is notified to the output side selector 43. Further, the state of the fuses 21b and 21c is notified to the output side selector 53. The output side selector 43 selects the storage area 41a if the state of the fuse 21a is “0: disconnected”, and selects the storage area 41b if the state is “1: not disconnected”. Similarly, the output side selector 53 selects one corresponding from the storage areas 51a to 51d according to the combination of the states of the fuses 21b and 21c (00, 01, 10, 11).

  The selector 60 (mode switching means) selects one of a signal indicating the state of the fuses 21a to 21c or a writing surface selection signal in accordance with the mode switching signal. The selector 60 is a mode for selecting a signal indicating the state of the fuses 21a to 21c in the normal mode, which is a mode when the user normally uses, and determining an individual adjustment parameter provided to the user by the manufacturer. In the debug mode, the writing surface selection signal is selected. Thereby, the debugging operation of the semiconductor device 1 or the electronic device 100 in which the semiconductor device 1 is mounted can be easily performed.

  The operation of the circuit having the above configuration will be described. Here, it is assumed that the semiconductor device 1 is mounted on the electronic device 100 shown in FIG. Further, it is assumed that the initial setting circuit 10 holds the four parameter values described above.

  When the electronic apparatus 100 is turned on, the initial setting circuit 10 first outputs the first parameter value “10100000” and also outputs the writing surface selection signal “00”. In this case, the data “1010” of the seventh to fourth bits of the parameter value is written in the storage area 31. The input side selector 42 selects the storage area 41a in accordance with the writing surface selection signal. Therefore, the data “00” of the third to second bits of the parameter value is written in the storage area 41a. Further, the input side selector 52 selects the storage area 51a in accordance with the writing surface selection signal. Therefore, the data “00” of the first to 0th bits of the parameter value is written in the storage area 51a.

  Subsequently, the initial setting circuit 10 outputs the second parameter value “10100001” and also outputs the writing surface selection signal “01”. In this case, the input-side selector 42 selects the storage area 41a again according to the writing surface selection signal. Therefore, the data “00” of the third to second bits of the parameter value is written in the storage area 41a. That is, the data stored in the storage area 41a remains “00”. On the other hand, the input side selector 52 selects the storage area 51b in accordance with the writing surface selection signal. Therefore, the data “01” of the first to 0th bits of the parameter value is written in the storage area 51b.

  Further, the initial setting circuit 10 outputs the third parameter value “10101110” and also outputs the writing surface selection signal “10”. In this case, the input-side selector 42 selects the storage area 41b according to the writing surface selection signal. Therefore, the data “11” of the third to second bits of the parameter value is written in the storage area 41b. Further, the input side selector 52 selects the storage area 51c according to the writing surface selection signal. Therefore, the data “10” of the first to 0th bits of the parameter value is written in the storage area 51c.

  Finally, the initial setting circuit 10 outputs the fourth parameter value “10101111” and also outputs the writing surface selection signal “11”. In this case, the input side selector 42 selects the storage area 41b again according to the writing surface selection signal. Therefore, the data “11” of the third to second bits of the parameter value is written in the storage area 41b. That is, the data stored in the storage area 41b remains “11”. On the other hand, the input side selector 52 selects the storage area 51d in accordance with the writing surface selection signal. Therefore, the data “11” of the first to 0th bits of the parameter value is written in the storage area 51d.

  The storage area 31 is updated every time the first to fourth parameter values are given. However, the seventh to fourth bits of the four parameter values are all the same data “1010”. Therefore, the storage area 31 is in a state of storing “1010” after the first to fourth parameter values are given in order.

  By the above procedure, “1010” is stored in the storage area 31, “00” and “11” are stored in the storage areas 41a and 41b, and “00” to “11” are stored in the storage areas 51a to 51d, respectively. Is done.

  The output side selector 43 selects data according to the state of the fuse 21a. Here, it is assumed that the fuse 21a is “1: uncut state” and “11” stored in the storage area 41b is selected. Similarly, the output side selector 53 selects data according to the combination of the state of the fuse 21b and the state of the fuse 21c. Here, it is assumed that the fuse 21b is “0: disconnected state” and the fuse 21c is “1: uncut state”. Then, the output side selector 53 selects “01” stored in the storage area 51b. As a result, the register 20 outputs “10101101” as shown in FIG.

  As described above, the semiconductor device 1 according to the embodiment introduces a function of switching a plurality of register surfaces according to the state of one or a plurality of fuses in a configuration in which individual adjustment parameters are obtained using a register. For this reason, in the semiconductor device 1 of the embodiment, the number of fuses is reduced as compared with the configuration in which the individual adjustment parameters are set only by the fuses. As a result, downsizing of the semiconductor device can be realized.

  In addition, it is not necessary to individually prepare individual adjustment parameters for a large number of semiconductor devices 1 that are mass-produced. The burden on the user of the device 1 is reduced.

It is a figure explaining the usage example of the semiconductor device of embodiment of this invention. It is a figure explaining the concept of this invention. 3 is an example of a main part of the semiconductor device of the embodiment.

Explanation of symbols

DESCRIPTION OF SYMBOLS 1 Semiconductor device 2 Register 2a-2d Storage area 3 (3a, 3b) Fuse 10 Initial setting circuit 20 Register 21a-21c Fuse 31, 41a, 41b, 51a-51d Storage area 42, 52 Input side selector 43, 53 Output side selector 60 selector 100 electronic equipment

Claims (4)

A plurality of storage areas for storing individual adjustment parameters;
An input-side selector for guiding a plurality of different parameters for individual adjustment to a corresponding storage area among the plurality of storage areas according to a selection signal;
A fuse set to a cut state or a non-cut state to select one storage region from the plurality of storage regions;
An output side selector for selecting and outputting the individual adjustment parameters stored in the storage area selected according to the fuse state;
A semiconductor device.   2. The semiconductor device according to claim 1, wherein each of the plurality of storage areas includes a plurality of bits, and the number of fuses is smaller than the number of bits. The semiconductor device according to claim 1, wherein the plurality of storage areas constitute a part of a register specified by one address. Further comprising mode switching means for guiding the selection signal to the output-side selector in accordance with a mode switching signal;
2. The semiconductor device according to claim 1, wherein the output-side selector selects and outputs an individual adjustment parameter stored in a corresponding storage area of the plurality of storage areas in accordance with the selection signal. .

Images