JP2006523902A - ラウンド・ロビン資源アービトレーション方法とそのための装置 - Google Patents

ラウンド・ロビン資源アービトレーション方法とそのための装置 Download PDF

Info

Publication number
JP2006523902A
JP2006523902A JP2006513106A JP2006513106A JP2006523902A JP 2006523902 A JP2006523902 A JP 2006523902A JP 2006513106 A JP2006513106 A JP 2006513106A JP 2006513106 A JP2006513106 A JP 2006513106A JP 2006523902 A JP2006523902 A JP 2006523902A
Authority
JP
Japan
Prior art keywords
token
arbiter
requester
subtree
indicating
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Withdrawn
Application number
JP2006513106A
Other languages
English (en)
Japanese (ja)
Other versions
JP2006523902A5 (enExample
Inventor
メイヤー，マイケル・ジェイ
ウィンガード，ドリュー
ウェバー，ウォルフ−ディートリッヒ
Original Assignee
ソニックス・インコーポレーテッド
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by ソニックス・インコーポレーテッド filed Critical ソニックス・インコーポレーテッド
Publication of JP2006523902A publication Critical patent/JP2006523902A/ja
Publication of JP2006523902A5 publication Critical patent/JP2006523902A5/ja
Withdrawn legal-status Critical Current

Links

Images

Classifications

    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/14—Handling requests for interconnection or transfer
    • G06F13/36—Handling requests for interconnection or transfer for access to common bus or bus system
    • G06F13/368—Handling requests for interconnection or transfer for access to common bus or bus system with decentralised access control
    • G06F13/37—Handling requests for interconnection or transfer for access to common bus or bus system with decentralised access control using a physical-position-dependent priority, e.g. daisy chain, round robin or token passing
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Bus Control (AREA)
JP2006513106A 2003-04-18 2004-04-16 ラウンド・ロビン資源アービトレーション方法とそのための装置 Withdrawn JP2006523902A (ja)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US10/418,624 US20040210696A1 (en) 2003-04-18 2003-04-18 Method and apparatus for round robin resource arbitration
PCT/US2004/011943 WO2004095296A2 (en) 2003-04-18 2004-04-16 A method and apparatus for round robin resource arbitration

Publications (2)

Publication Number Publication Date
JP2006523902A true JP2006523902A (ja) 2006-10-19
JP2006523902A5 JP2006523902A5 (enExample) 2007-06-07

Family

ID=33159154

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2006513106A Withdrawn JP2006523902A (ja) 2003-04-18 2004-04-16 ラウンド・ロビン資源アービトレーション方法とそのための装置

Country Status (4)

Country Link
US (1) US20040210696A1 (enExample)
JP (1) JP2006523902A (enExample)
KR (1) KR20060016753A (enExample)
WO (1) WO2004095296A2 (enExample)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2024514178A (ja) * 2021-04-16 2024-03-28 ブルックヘヴン サイエンス アソシエイツ リミテッド ライアビリティ カンパニー マルチチャネルデータソースのための非プライオリティアービトレーションを有するイベントドリブン読み出しシステム

Families Citing this family (25)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7266786B2 (en) 2002-11-05 2007-09-04 Sonics, Inc. Method and apparatus for configurable address mapping and protection architecture and hardware for on-chip systems
US7149829B2 (en) * 2003-04-18 2006-12-12 Sonics, Inc. Various methods and apparatuses for arbitration among blocks of functionality
US7296105B2 (en) * 2003-10-03 2007-11-13 Sonics, Inc. Method and apparatus for configuring an interconnect to implement arbitration
US7231479B2 (en) * 2003-12-17 2007-06-12 International Business Machines Corporation Round robin selection logic improves area efficiency and circuit speed
US7739436B2 (en) 2004-11-01 2010-06-15 Sonics, Inc. Method and apparatus for round robin resource arbitration with a fast request to grant response
US7681014B2 (en) * 2005-02-04 2010-03-16 Mips Technologies, Inc. Multithreading instruction scheduler employing thread group priorities
US9262356B2 (en) * 2006-12-15 2016-02-16 Lantiq Beteiligungs-GmbH & Co.KG Arbiter device and arbitration method
US7734856B2 (en) * 2007-08-22 2010-06-08 Lantiq Deutschland Gmbh Method for operating a plurality of arbiters and arbiter system
US8229723B2 (en) * 2007-12-07 2012-07-24 Sonics, Inc. Performance software instrumentation and analysis for electronic design automation
TWI337517B (en) * 2008-03-04 2011-02-11 Inventec Corp Trace carrier
US8073820B2 (en) 2008-04-07 2011-12-06 Sonics, Inc. Method and system for a database to monitor and analyze performance of an electronic design
US8032329B2 (en) * 2008-09-04 2011-10-04 Sonics, Inc. Method and system to monitor, debug, and analyze performance of an electronic design
EP2182638A1 (en) * 2008-10-29 2010-05-05 Panasonic Corporation Method and apparatus for safe power up of programmable interconnect
US8972995B2 (en) 2010-08-06 2015-03-03 Sonics, Inc. Apparatus and methods to concurrently perform per-thread as well as per-tag memory access scheduling within a thread and across two or more threads
US8521933B2 (en) * 2010-12-30 2013-08-27 Lsi Corporation Round robin arbiter with mask and reset mask
US20130019041A1 (en) * 2011-07-12 2013-01-17 Lsi Corporation Bit slice round robin arbiter
GB2542646B (en) 2016-03-18 2017-11-15 Imagination Tech Ltd Non-linear cache logic
US10579428B2 (en) * 2017-12-01 2020-03-03 International Business Machines Corporation Data token management in distributed arbitration systems
GB2593211B (en) 2020-03-20 2022-06-01 Imagination Tech Ltd Priority based arbitration
GB2593210B (en) 2020-03-20 2022-06-01 Imagination Tech Ltd Priority based arbitration
US12265850B2 (en) 2021-08-30 2025-04-01 International Business Machines Corporation Reservation mechanism for node with token constraints for preventing node starvation in a circular topology network
US11580058B1 (en) * 2021-08-30 2023-02-14 International Business Machines Corporation Hierarchical ring-based interconnection network for symmetric multiprocessors
US12405826B2 (en) 2021-08-30 2025-09-02 International Business Machines Corporation Reservation mechanism for nodes with phase constraints
CN116233633B (zh) * 2023-03-01 2026-02-06 西安电子科技大学 基于令牌环的尖峰扫描仲裁电路
CN121524129B (zh) * 2026-01-16 2026-05-12 沐曦集成电路(上海)股份有限公司 波前分配器、芯片及计算机设备

Family Cites Families (16)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS59165118A (ja) * 1983-03-11 1984-09-18 Hitachi Ltd 選択回路
US5301333A (en) * 1990-06-14 1994-04-05 Bell Communications Research, Inc. Tree structured variable priority arbitration implementing a round-robin scheduling policy
JPH0660018A (ja) * 1992-08-11 1994-03-04 Fujitsu Ltd バスアービトレーション方法、アービタ回路及びアービタ
US5630173A (en) * 1992-12-21 1997-05-13 Apple Computer, Inc. Methods and apparatus for bus access arbitration of nodes organized into acyclic directed graph by cyclic token passing and alternatively propagating request to root node and grant signal to the child node
US5519837A (en) * 1994-07-29 1996-05-21 International Business Machines Corporation Pseudo-round-robin arbitration for a shared resource system providing fairness and high throughput
US5784648A (en) * 1995-12-01 1998-07-21 Apple Computer, Inc. Token style arbitration on a serial bus by passing an unrequested bus grand signal and returning the token by a token refusal signal
US5948089A (en) * 1997-09-05 1999-09-07 Sonics, Inc. Fully-pipelined fixed-latency communications system with a real time dynamic bandwidth allocation
US6487213B1 (en) * 1998-01-05 2002-11-26 Polytechnic University Methods and apparatus for fairly arbitrating contention for an output port
US6038234A (en) * 1998-02-02 2000-03-14 Intel Corporation Early arbitration on a full duplex bus
US6411628B1 (en) * 1998-02-02 2002-06-25 Intel Corporation Distributed arbitration on a full duplex bus
US6182183B1 (en) * 1998-11-13 2001-01-30 Sonics, Inc. Communications system and method with multilevel connection identification
US6556571B1 (en) * 1999-05-25 2003-04-29 Nec Usa, Inc. Fast round robin priority port scheduler for high capacity ATM switches
US6636914B1 (en) * 1999-11-05 2003-10-21 Apple Computer, Inc. Method and apparatus for arbitration and fairness on a full-duplex bus using dual phases
US6330225B1 (en) * 2000-05-26 2001-12-11 Sonics, Inc. Communication system and method for different quality of service guarantees for different data flows
US6826643B2 (en) * 2001-03-19 2004-11-30 Sun Microsystems, Inc. Method of synchronizing arbiters within a hierarchical computer system
US6578117B2 (en) * 2001-10-12 2003-06-10 Sonics, Inc. Method and apparatus for scheduling requests using ordered stages of scheduling criteria

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2024514178A (ja) * 2021-04-16 2024-03-28 ブルックヘヴン サイエンス アソシエイツ リミテッド ライアビリティ カンパニー マルチチャネルデータソースのための非プライオリティアービトレーションを有するイベントドリブン読み出しシステム
JP7763264B2 (ja) 2021-04-16 2025-10-31 ブルックヘヴン サイエンス アソシエイツ リミテッド ライアビリティ カンパニー マルチチャネルデータソースのための非プライオリティアービトレーションを有するイベントドリブン読み出しシステム

Also Published As

Publication number Publication date
WO2004095296A2 (en) 2004-11-04
US20040210696A1 (en) 2004-10-21
KR20060016753A (ko) 2006-02-22
WO2004095296A3 (en) 2005-03-03

Similar Documents

Publication Publication Date Title
US20040210696A1 (en) Method and apparatus for round robin resource arbitration
Sewell et al. Swizzle-switch networks for many-core systems
US8407433B2 (en) Interconnect implementing internal controls
US7739436B2 (en) Method and apparatus for round robin resource arbitration with a fast request to grant response
JP2006523902A5 (enExample)
KR100477641B1 (ko) 버스 시스템 및 그 데이터 전송경로 결정방법
Peh Flow control and micro-architectural mechanisms for extending the performance of interconnection networks
US20090077289A1 (en) Bus interconnect with flow control
Khanam et al. Design a low latency Arbiter for on chip Communication Architecture
US7395360B1 (en) Programmable chip bus arbitration logic
Hu Design methodologies for application specific networks-on-chip
Zitouni et al. Communication architecture synthesis for multi-bus SoC
Shanthi et al. Performance analysis of on-chip communication architecture in MPSoC
Ma et al. Reducing code size in scheduling synchronous dataflow graphs on multicore systems
KR101051926B1 (ko) 버스 시스템의 버스 중재 장치 및 방법
Bamberg et al. Interconnect architectures for 3d technologies
KR101013769B1 (ko) 버스 중재방법 및 장치
Varna et al. Novel Design of Unified Re-Configurable Multi-Channel Memory Controller Architecture supporting Standard IO Interfaces for Multi-Memory Management
Balkan Mesh-of-trees interconnection network for an explicitly multi-threaded parallel computer architecture
Naeem et al. Scalability of relaxed consistency models in NoC based multicore architectures
Ziabari Improving the global memory efficiency in GPU-based systems
Golubcovs Multi-resource approach to asynchronous SoC: design and tool support
Zitouni et al. An arbiter synthesis approach based on arbitration scheme generation/selection for HW/SW co-design
Kumar Performance and energy optimizations for interconnection networks with system-level extensions
SINGH DESIGN AND IMPLEMENTATION OF ORDERED MESH NETWORK INTERCONNECT

Legal Events

Date Code Title Description
A521 Request for written amendment filed

Free format text: JAPANESE INTERMEDIATE CODE: A523

Effective date: 20070416

A621 Written request for application examination

Free format text: JAPANESE INTERMEDIATE CODE: A621

Effective date: 20070416

A761 Written withdrawal of application

Free format text: JAPANESE INTERMEDIATE CODE: A761

Effective date: 20080821