JP2006340097A - Amplifier circuit with gain control circuit and gain control function - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide an amplifier circuit having a gain control circuit and gain control function capable of reducing gain variations due to temperature change or manufacturing variations, and operating at low voltage. <P>SOLUTION: Voltage V<SB>GS</SB>between a gate and a source of a first MOS transistor Q1 is impressed to the gate and the source of second and third MOS transistors Q2 and Q3, respectively. Respective values of resistance R<SB>DS</SB>between a drain and the source of the second and third MOS transistors Q2 and Q3 are changed by changing a supply current from a current source I1 to the first MOS transistor Q1 in order to perform a control gain. <P>COPYRIGHT: (C)2007,JPO&INPIT

Description

  The present invention relates to a gain control circuit capable of controlling gain and an amplifier circuit having a gain control function.

  For example, a communication device that transmits or receives a signal uses a gain control circuit that can change the gain inside the device in accordance with the intensity of the input signal or the level of the signal to be transmitted. In particular, an AGC (Automatic Gain Control) amplifier is used to keep the output signal constant regardless of the strength of the received signal. Conventionally, such a gain control circuit generally uses a system using a Gilbert multiplier. In the case of forming a CMOS (Complementary Metal Oxide Semiconductor) transistor, a method of configuring a T-type or π-type resistance attenuator using a drain-source resistance as a gain control circuit is conceivable. In these circuits, the gain is generally controlled by a control voltage.

In Patent Document 1, an output of a variable gain device is detected and rectified by a rectifier to generate a control voltage, and automatic gain control is performed by a negative feedback loop configured to use the control voltage for gain control of the variable gain device. An invention relating to an amplifier is described. In this AGC amplifier, the gain is controlled by applying a control voltage directly to the transistor.
JP 9-36680 A

  However, in the conventional gain control circuit using the Gilbert multiplier, particularly when formed with CMOS transistors, it is difficult to freely perform gain correction by the current source amplifier of the Gilbert multiplier and the gain control unit of the Gilbert multiplier. Therefore, there is a drawback that the temperature characteristic of the gain is large. Further, when the method using the Gilbert multiplier is formed by CMOS, there is a drawback that gain variation is large due to differences in manufacturing conditions of Typical, Slow, and Fast. Here, “Typical”, “Slow”, “Fast” are circuit parameters indicating differences in manufacturing conditions, “Typical” indicates a center value of manufacturing variation, and “Slow” indicates that the circuit operation is shifted in a slow direction. The parameter “Fast” that gives a manufacturing variation indicates a parameter that gives a manufacturing variation that shifts the circuit operation in a fast direction. Further, as described in Patent Document 1, since the Gilbert multiplier has transistors stacked vertically, a low voltage operation at 2 V or less is impossible.

FIG. 10 shows an example of a circuit in which a resistance attenuator using a MOS transistor is configured using the drain-source resistance R _DS to perform gain control. This gain control circuit includes a MOS transistor Q10, a resistor R101 connected in series to the gate of the MOS transistor Q10, a resistor R102 connected in parallel to the drain of the MOS transistor Q10, and an output terminal 7. This gain control circuit, the gate of the MOS transistor Q10 by the control voltage Vcont - by varying the voltage V _GS between the source, drain - resistance R _DS between the source changes.

FIG. 11 shows the result of simulation of the temperature characteristic of resistance change between the drain and source in the gain control circuit of FIG. 10 by SPICE (Simulation Program with Integrated Circuit Emphasis). As temperature characteristics, characteristics at normal temperature (25 ° C.), low temperature (−40 ° C.), and high temperature (125 ° C.) were calculated. FIG. 12 shows the result of SPICE simulation of gain characteristics under the conditions of Typical, Fast, and Slow in the process state that occurs during manufacturing in the gain control circuit of FIG. The horizontal axis represents the control voltage Vcont, and the vertical axis represents the drain-source resistance R _DS . The resistance value of the resistor R101 was 10 kΩ, and the resistance value of the resistor R102 was 100 kΩ.

As can be seen from the results of FIG. 11, the resistance value of the drain-source resistance R _DS biased as shown in FIG. 10 varies greatly depending on the temperature. Therefore, when a circuit is configured using a resistance type attenuator having such characteristics, there is a drawback that the gain varies greatly with temperature. Also, as can be seen from the results of FIG. 12, the drain-source resistance R _DS obtained with the same voltage varies greatly depending on the manufacturing conditions. Therefore, when a circuit is configured using a resistance type attenuator having such characteristics, there is a drawback that the gain obtained varies greatly depending on the manufacturing conditions.
As described above, in the method of controlling the gain by controlling the voltage of the MOS transistor, the gain obtained varies due to temperature changes and manufacturing variations.

  SUMMARY OF THE INVENTION The present invention has been made in view of such problems, and an object of the present invention is to provide a gain control circuit and a gain control function that can reduce variations in gain due to temperature changes and manufacturing variations and can be operated at a low voltage. An amplifier circuit having the following is provided.

  A gain control circuit according to the present invention includes a first MOS transistor having a gate-drain interconnected source, a source connected to a first signal input terminal, and the same drain-source potential. A second MOS transistor that functions as a first MOS transistor, a third MOS transistor that has a source connected to the second signal input terminal, has the same drain-source potential, and functions as a resistance element, and a first MOS transistor Current supply means connected to the drain of the transistor for supplying a current to the first MOS transistor, wherein the gate-source voltage of the first MOS transistor is between the gate-source of each of the second and third MOS transistors. And by changing the supply current to the first MOS transistor by the current supply means Second and third MOS transistors each drain - to change the value of the source resistance, in which are configured such that the gain control is performed.

  An amplifier circuit having a gain control function according to the present invention includes a gain control circuit according to the present invention, a first capacitor having one end connected to the drain of the second MOS transistor, and one end connected to the drain of the third MOS transistor. And the amplifier circuit unit connected to the other ends of the first and second capacitors and having the gain control circuit cascaded through the first and second capacitors. .

  In the gain control circuit and the amplifier circuit having a gain control function according to the present invention, the gate-source voltage of the first MOS transistor is applied between the gate-source of each of the second and third MOS transistors. Further, the value of the drain-source resistance of each of the second and third MOS transistors is changed by changing the supply current to the first MOS transistor. As a result, the second and third MOS transistors operate as resistance attenuators by current control, so that variations in gain due to temperature changes and manufacturing variations are smaller than when gain control is performed by conventional voltage control. It is also possible to operate at a low voltage.

  The gain control circuit according to the present invention further includes first and second resistors connected in parallel to the second and third MOS transistors between the sources of the second and third MOS transistors. Also good.

  Moreover, you may make it further provide the 3rd and 4th resistor connected in parallel with respect to the 2nd and 3rd MOS transistor between the drains of the 2nd and 3rd MOS transistor.

A fourth MOS which is connected in parallel to the second and third MOS transistors between the sources of the second and third MOS transistors, has the same drain-source potential, and functions as a resistance element. A fifth MOS transistor configured such that a transistor and a gate-drain are interconnected and a gate-source voltage is applied between a gate and a source of a fourth MOS transistor; and a first MOS A current mirror circuit may be configured with the transistor, and a sixth MOS transistor having a drain connected to the gate of the fifth MOS transistor may be further provided.
With this configuration, characteristics excellent in input return loss can be obtained in the gain control range.

The current supply means includes a voltage / current conversion circuit whose output current value changes according to the input control voltage, and supplies the current supplied to the first MOS transistor by the voltage / current conversion circuit according to the control voltage. By changing, the value of the drain-source resistance of each of the second and third MOS transistors may be changed, and gain control may be performed.
In this configuration, gain control with the control voltage is converted into current control.

  According to the gain control circuit and the amplifier circuit having the gain control function of the present invention, the drain-source resistance values of the second and third MOS transistors are changed by changing the supply current to the first MOS transistor. Since the gain control is performed by changing the gain, it is possible to reduce the gain variation due to the temperature change and the manufacturing variation and to operate at a low voltage compared to the case where the gain control is performed by the conventional voltage control. Can do.

Hereinafter, embodiments of the present invention will be described in detail with reference to the drawings.
[First Embodiment]

  First, a gain control circuit and an amplifier circuit having a gain control function according to the first embodiment of the present invention will be described. FIG. 1 shows a configuration example of an amplifier circuit having a gain control function according to the present embodiment. The amplifier circuit includes a pair of first and second signal input terminals 1 and 2, an amplifier circuit unit 3, a pair of first and second signal output terminals 4 and 5, and first and second capacitors. And a gain control circuit cascaded to the amplifier circuit section 3 via C1 and C2. In this embodiment, an amplifier circuit using an N-channel MOS transistor as the MOS transistor will be described.

The gain control circuit includes a current source I1, a first MOS transistor Q1, second and third MOS transistors Q2 and Q3, first and second resistors R1 and R2, and third and fourth resistors. Resistors R3 and R4 are provided. Vdd is a power supply voltage.
The current source I1 corresponds to a specific example of “current supply means” in the present invention.

  One end of the first resistor R1 is connected to the source of the second MOS transistor Q2 between the second MOS transistor Q2 and the first signal input terminal 1. One end of the second resistor R2 is connected to the source of the third MOS transistor Q3 between the third MOS transistor Q3 and the second signal input terminal 2. The other ends of the first and second resistors R1 and R2 are grounded. Thus, the first and second resistors R1, R2 are connected in parallel to the second and third MOS transistors Q2, Q3 between the sources of the second and third MOS transistors Q2, Q3. Yes.

  One end of the third resistor R3 is connected to the drain of the second MOS transistor Q2 between the second MOS transistor Q2 and the first capacitor C1. One end of the fourth resistor R4 is connected to the drain of the third MOS transistor Q3 between the third MOS transistor Q3 and the second capacitor C2. The other ends of the third and fourth resistors R3 and R4 are grounded. Thus, the third and fourth resistors R3 and R4 are connected in parallel to the second and third MOS transistors Q2 and Q3 between the drains of the second and third MOS transistors Q2 and Q3. Yes.

  The sources of the second and third MOS transistors Q2 and Q3 are connected to the first and second signal input terminals 1 and 2, respectively. Second and third MOS transistors Q2, Q3 each operate as a resistance element. The ground voltage is applied to the sources of the second and third MOS transistors Q2 and Q3 by the first and second resistors R1 and R2, respectively. The drains of the second and third MOS transistors Q2 and Q3 are supplied with the ground voltage by the third and fourth resistors R3 and R4, respectively. Thereby, the MOS transistors Q2 and Q3 are configured to have the same drain-source potential.

In the first MOS transistor Q1, the gate and drain are interconnected. The current source I1 is connected to the drain of the first MOS transistor Q1, and supplies current to the first MOS transistor. The gate of the first MOS transistor Q1 is connected to the gates of the second and third MOS transistors Q2 and Q3, and the voltage V _GS generated between the gate and source of the first MOS transistor Q1 is the second and third The MOS transistors Q2 and Q3 are configured to be applied between the respective gates and sources. Further, the drain-source resistance R _DS of each of the second and third MOS transistors Q2 and Q3 is changed by changing the supply current from the current source I1 to the first MOS transistor Q1. Has been. The gate length L and the gate width W of the first MOS transistor Q1 and the second and third MOS transistors Q2, Q3 are set to have the same relationship as that of a normal current mirror.

  The amplifier circuit unit 3 includes a pair of MOS transistors Q11 and Q12 and a pair of MOS transistors Q13 and Q14 that constitute differential amplification, resistors R8, R9, R10, and R11 provided for bias, and MOS transistors Q11, Resistors R12, R13, R14, and R15 provided as load resistors are provided between the drains of Q12, Q13, and Q14 and the power supply voltage Vdd. The amplifier circuit unit 3 also includes a current source I2, a MOS transistor Q15, and capacitors C3, C4, C5, and C6. One end of the first capacitor C1 is connected to the drain of the second MOS transistor Q2, and the other end is connected to the gate of the MOS transistor Q12. One end of the second capacitor C2 is connected to the drain of the third MOS transistor Q3, and the other end is connected to the gate of the MOS transistor Q11.

  The MOS transistor Q15 and the MOS transistors Q11, Q12, Q13, and Q14 are configured to have a current mirror relationship. Capacitors C3, C4, C5 and C6 are provided for signal coupling. In this amplifier circuit section 3, since one circuit route between the power supply voltage Vdd and the ground is composed of only the MOS transistor Q11 and the resistor 12, it can be easily configured with a power supply voltage as low as 1.2V or less. Similarly, the MOS transistors Q12, Q13, Q14 are also driven at a low voltage. The current source I2 has a temperature dependency, and is configured so that the gain of the amplifier circuit unit 3 does not change with respect to the temperature.

  The characteristic of the amplifier circuit having the gain control function is in the gain control circuit portion, and the configuration of the amplifier circuit unit 3 is not limited to the configuration shown in the figure, and can be the same configuration as a general amplifier circuit. .

  Next, the operation of the amplifier circuit having the gain control function, particularly the operation of the gain control circuit will be described in detail.

  In this amplifier circuit, after the signals input to the first and second signal input terminals 1 and 2 pass through the second and third MOS transistors Q2 and Q3 in the gain control circuit, the first and second capacitors It is applied to the amplifier circuit unit 3 via C1 and C2. The signal amplified by the amplifier circuit unit 3 is taken out from the first and second signal output terminals 4 and 5.

This gain control circuit in the amplifier circuit, the gate of the first MOS transistor Q1 - source voltage V _GS is the second and third MOS transistors Q2, Q3 of the gates - are applied between the source. Further, by changing the supply current from the current source I1 to the first MOS transistor Q1, the value of the drain-source resistance R _DS of each of the second and third MOS transistors Q2, Q3 changes. Thus, the second and third MOS transistors Q2 and Q3 operate as resistance attenuators by current control, thereby realizing a gain control function.

  The gain control operation will be described with reference to FIG. 2, FIG. 3, and FIG. FIG. 2 shows a partial equivalent circuit of this gain control circuit. In FIG. 2, a MOS transistor Q8 and a current source I4 correspond to the first MOS transistor Q1 and the current source I1 in FIG. 1, respectively. The MOS transistor Q9 and the resistor R5 correspond to the second MOS transistor Q2 and the third resistor R3 in FIG. 1, or the third MOS transistor Q3 and the fourth resistor R4, respectively. The resistor R5 is for making the drain and source of the transistor Q9 have the same potential. The MOS transistor Q8 and the MOS transistor Q9 operate in the same manner as the current mirror relationship, and the current value to be controlled can be proportionally changed according to the size of these elements.

3, the impedance seen from the terminal 6 in the circuit of FIG. 2, i.e., the drain of the MOS transistor Q9 - shows the result of simulation by SPICE characteristics of temperature change in the impedance Z _DS between the source. As temperature characteristics, characteristics at normal temperature (25 ° C.), low temperature (−40 ° C.), and high temperature (125 ° C.) were calculated. The horizontal axis current of the current source I4, the vertical axis represents the drain - shows the impedance Z _DS between the source. Changing the current source I4, the drain of the MOS transistor Q9 - impedance Z _DS between the source changes. As can be seen from FIG. 3, the temperature dependency of the impedance Z _DS is very small as compared with the characteristic by the conventional voltage control shown in FIG. 11, and shows an excellent characteristic.

FIG. 4 shows the result of simulation by SPICE of the characteristics of the drain-source resistance R _{DS under} the conditions of Typical, Fast, and Slow in the process state that occurs at the time of manufacture in the circuit of FIG. The horizontal axis represents the current of the current source I4, and the vertical axis represents the drain-source resistance _RDS . As can be seen from the result of FIG. 4, the change in the value of the drain-source resistance R _DS is very small even if there is a difference in manufacturing conditions, compared with the characteristics by the conventional voltage control shown in FIG. It shows excellent properties.

  The calculation conditions of FIGS. 3 and 4 are as follows: in the circuit of FIG. 2, the gate length L of the MOS transistor Q8 is 0.11 μm, the gate width W = 2 μm, the multi M = 1, and the gate length L of the MOS transistor Q9 is 0.11 μm, gate width W = 2 μm, multi M = 16, and resistor R5 = 100 kΩ.

  By changing the equivalent resistance of the MOS transistor Q9 according to the current mirror relationship of the MOS transistors Q8 and Q9 in the circuit of FIG. 2, it is possible to realize excellent temperature characteristics and process characteristics with respect to process variations. The gain control characteristic in the present embodiment utilizes the characteristic of the circuit of FIG.

  FIG. 5 shows a simulation result of the gain characteristics with respect to temperature in the entire circuit of FIG. 1 by SPICE. As temperature characteristics, characteristics at normal temperature (25 ° C.), low temperature (−40 ° C.), and high temperature (125 ° C.) were calculated. Further, FIG. 6 shows the result of the SPICE simulation of the gain characteristics under the conditions of Typical, Fast, and Slow in the process state that occurs during manufacturing in the entire circuit of FIG. The horizontal axis represents the current of the current source I1, and the vertical axis represents the gain. As is apparent from FIGS. 5 and 6, the circuit of FIG. 1 has a small gain change with respect to a temperature change, and exhibits extremely excellent characteristics with respect to temperature characteristics and process variations.

As described above, according to the gain control circuit and the amplifier circuit having the gain control function according to the present embodiment, the second and third MOSs are changed by changing the supply current to the first MOS transistor Q1. Since the gain control is performed by changing the value of the drain-source resistance R _DS of each of the transistors Q2 and Q3, the gain due to temperature change and manufacturing variation is compared with the case where the gain control is performed by the conventional voltage control. Variation can be reduced. Further, the gain control circuit part is constituted by a resistance type attenuation circuit that operates at 0V, and the amplifier circuit unit 3 is cascade-connected after the resistance attenuation circuit, so that it is operated at a low voltage of 1 to 1.2V. be able to.
[Second Embodiment]

  Next, a gain control circuit and an amplifier circuit having a gain control function according to a second embodiment of the present invention will be described. FIG. 7 shows a configuration example of an amplifier circuit having a gain control function according to this embodiment. Note that components that are substantially the same as those of the amplifier circuit according to the first embodiment are given the same reference numerals, and descriptions thereof are omitted as appropriate. This amplifier circuit further includes a fourth MOS transistor Q4, fifth and sixth MOS transistors Q6 and Q5, and a current source I3 in the circuit configuration of the first embodiment (FIG. 1). Yes. The configuration of the amplifier circuit unit 3 is the same as that shown in FIG.

  The drain of the fourth MOS transistor Q4 is connected between one end of the first resistor R1 and the first signal input terminal 1. The source of the fourth MOS transistor Q4 is connected between one end of the second resistor R2 and the second signal input terminal 2. The fourth MOS transistor Q4 operates as a resistance element. The drain and source of the fourth MOS transistor Q4 are respectively supplied with the ground voltage by the first and second resistors R1 and R2. Thus, the fourth MOS transistor is connected in parallel to the second and third MOS transistors Q2 and Q3 between the sources of the second and third MOS transistors Q2 and Q3, and has a drain-source potential. Are the same.

In the fifth MOS transistor Q5, the gate and the drain are interconnected. The gate of the fifth MOS transistor Q5 is connected to the gate of the fourth MOS transistor Q4. The gate-source voltage V _{GS of} the fifth MOS transistor Q5 is applied between the gate and source of the fourth MOS transistor Q4. The sixth MOS transistor Q6 forms a current mirror circuit together with the first MOS transistor Q1. The drain of the sixth MOS transistor Q6 is connected to the gate of the fifth MOS transistor. The current source I3 is set to a fixed value.

In the gain control circuit in the circuit of FIG. 7, a value obtained by subtracting the current flowing from the fixed value current source I3 to the sixth MOS transistor Q6 of the current mirror flows to the fifth MOS transistor Q5. The gate-source voltage V _{GS of} the fifth MOS transistor Q5 is applied between the gate and source of the fourth MOS transistor Q4. Drain of the fourth MOS transistor Q4 - source resistance R _DS is the drain of the second and third MOS transistors Q2, Q3 - a value inversely proportional to the value of the source resistance R _DS.

In this gain control circuit, characteristics excellent in input return loss can be obtained in the gain control range. FIG. 8 is a Smith chart showing changes in input impedance when the control current (current source I1) is changed by 1 μA to 500 μA and the gain is changed by 20 dB or more in the circuit of FIG. The center of the Smith chart is the reference impedance (impedance on the signal source side), the left end is 0, and the right end is ∞. When the impedance is on the outer periphery, the reflection coefficient is 1, and the input return loss is small. In FIG. 8, the portion indicated by reference numeral 80 indicates a change in input impedance. As shown in FIG. 8, the input return loss is large and excellent characteristics are obtained.
[Third Embodiment]

  Next, a gain control circuit and an amplifier circuit having a gain control function according to a third embodiment of the present invention will be described. FIG. 9 shows a configuration example of an amplifier circuit having a gain control function according to the present embodiment. Note that components that are substantially the same as those of the amplifier circuit according to the first embodiment are given the same reference numerals, and descriptions thereof are omitted as appropriate. The circuit of FIG. 9 includes a voltage / current conversion circuit 10 as a current supply means instead of the current source I1 in the circuit of the first embodiment (FIG. 1). The configuration of the amplifier circuit unit 3 is the same as that shown in FIG.

The voltage / current conversion circuit 10 is configured such that the output current value changes according to the input control voltage Vcont. In the voltage / current conversion circuit 10, the output current increases, for example, in a natural logarithm with respect to the control voltage Vcont. By changing the supply current to the first MOS transistor Q1 by the voltage / current conversion circuit 10 in accordance with the control voltage Vcont, the drain-source resistance R _DS of each of the second and third MOS transistors Q2, Q3 is changed. The gain is controlled by changing the value.

  In this gain control circuit, gain control at the control voltage Vcont is converted into current control. Since gain control at the control voltage Vcont is converted into current control, gain variations due to temperature changes and manufacturing variations can be reduced as compared with the case where gain control is performed by conventional voltage control.

  In addition, this invention is not limited to each embodiment demonstrated above, Furthermore, various deformation | transformation implementation is possible. For example, in each of the above embodiments, the case where an N-channel MOS transistor is used as the MOS transistor has been described, but a P-channel MOS transistor may be used. In this case, only the reference voltage is changed to Vdd, and the gain control operation is the same as that of the N-channel MOS transistor circuit.

  Also, a configuration in which the circuit according to the second embodiment (FIG. 7) and the circuit according to the third embodiment (FIG. 9) are combined is possible. That is, instead of the current source I1 in the gain control circuit of FIG. 7, a configuration including the voltage / current conversion circuit 10 as current supply means may be used.

1 is a circuit diagram showing a configuration of an amplifier circuit having a gain control function according to a first embodiment of the present invention. FIG. 2 is a circuit diagram for explaining an operation of a gain control circuit portion in the amplifier circuit of FIG. 1. FIG. 3 is a characteristic diagram illustrating a temperature characteristic of a resistance change between a drain and a source in the gain control circuit illustrated in FIG. 2. FIG. 3 is a characteristic diagram showing characteristics due to variations in manufacturing conditions of resistance change between drain and source in the gain control circuit shown in FIG. 2. FIG. 2 is a characteristic diagram illustrating a gain characteristic due to a temperature change in the amplifier circuit illustrated in FIG. 1. FIG. 3 is a characteristic diagram illustrating a gain characteristic due to variations in manufacturing conditions in the amplifier circuit illustrated in FIG. 1. It is a circuit diagram which shows the structure of the amplifier circuit which has a gain control function based on the 2nd Embodiment of this invention. FIG. 8 is a characteristic diagram illustrating characteristics of input impedance in the amplifier circuit of FIG. 7. It is a circuit diagram which shows the structure of the gain control circuit which concerns on the 3rd Embodiment of this invention. FIG. 6 is a circuit diagram showing an example of a circuit in which a voltage-controlled resistance attenuator is configured by a MOS transistor and gain control is performed. It is a characteristic view which shows the temperature characteristic of the resistance change between drain-sources in the gain control circuit shown in FIG. FIG. 11 is a characteristic diagram illustrating characteristics due to variations in manufacturing conditions of resistance change between drain and source in the gain control circuit illustrated in FIG. 10.

Explanation of symbols

C1 ... first capacitor, C2 ... second capacitor, I1 ... current source, Q1 ... first MOS transistor, Q2 ... second MOS transistor, Q3 ... third MOS transistor, Q4 ... fourth MOS transistor , Q5 ... fifth MOS transistor, Q6 ... sixth MOS transistor, R1 ... first resistor, R2 ... second resistor, R3 ... third resistor, R4 ... fourth resistor, Vcont ... Control voltage, 1 ... First signal input terminal, 2 ... Second signal input terminal, 3 ... Amplifier circuit section, 4 ... First signal output terminal, 5 ... Second signal output terminal, 10 ... Current Voltage conversion circuit.

Claims (7)

A first MOS transistor having a gate-drain interconnected;
A second MOS transistor having a source connected to the first signal input terminal and having the same drain-source potential and functioning as a resistance element;
A third MOS transistor having a source connected to the second signal input terminal and having the same drain-source potential and functioning as a resistance element;
Current supply means connected to the drain of the first MOS transistor for supplying current to the first MOS transistor;
A gate-source voltage of the first MOS transistor is applied between the gate-source of each of the second and third MOS transistors;
By changing the current supplied to the first MOS transistor by the current supply means, the value of the drain-source resistance of each of the second and third MOS transistors is changed, and gain control is performed. A gain control circuit characterized by being configured. The first and second resistors connected in parallel to the second and third MOS transistors between the sources of the second and third MOS transistors are further provided. A gain control circuit according to 1. The third and fourth resistors connected in parallel to the second and third MOS transistors are further provided between the drains of the second and third MOS transistors. Or the gain control circuit of 2. A fourth MOS which is connected in parallel to the second and third MOS transistors between the sources of the second and third MOS transistors, has the same drain-source potential, and functions as a resistance element A transistor,
A fifth MOS transistor configured such that a gate-drain is interconnected and a gate-source voltage is applied between the gate-source of the fourth MOS transistor;
The current MOS circuit together with the first MOS transistor, and a sixth MOS transistor whose drain is connected to the gate of the fifth MOS transistor, further comprising: The gain control circuit according to any one of the above. The current supply means includes a voltage / current conversion circuit whose output current value changes according to the input control voltage,
By changing the supply current to the first MOS transistor by the voltage / current conversion circuit according to the control voltage, the value of the drain-source resistance of each of the second and third MOS transistors is changed. The gain control circuit according to any one of claims 1 to 4, wherein gain control is performed. A gain control circuit according to any one of claims 1 to 5,
A first capacitor having one end connected to the drain of the second MOS transistor;
A second capacitor having one end connected to the drain of the third MOS transistor;
An amplifier circuit unit connected to the other ends of the first and second capacitors, and the gain control circuit cascaded through the first and second capacitors. An amplifier circuit. The amplifier circuit unit includes a pair of MOS transistors constituting a differential amplifier,
The gain according to claim 6, wherein the gain control circuit is cascade-connected by connecting the other ends of the first and second capacitors to the gates of the pair of MOS transistors. An amplifier circuit with a control function.

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