JP2006339391A - Dry-etching apparatus - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a dry-etching apparatus which can improve even the etching uniformity of the edge of a wafer, and also, can prevent the etching of the end and rear surfaces of the wafer. <P>SOLUTION: The dry-etching apparatus has a lower electrode 3 whereon a wafer 7 is mounted and having an upper electrode 4 for generating a plasma between it and the lower electrode 3. The lower electrode 3 is so divided into an inside applying portion 3a, and an outside applying portion 3b as to insulate them electrically from each other. There are provided constitutionally an insulating ring 9 so disposed as to surround thereby at least the outer periphery of the lower electrode 3, a peripheral-portion electrode 13 disposed on the outer peripheral side of the insulating ring 9, a high-frequency power supply 11 for applying a high-frequency power to the upper electrode 4, high-frequency power supplies 10a, 10b for applying respectively high-frequency powers to the inside and outside applying portions 3a, 3b, and a high-frequency power supply 14 for applying a high-frequency power to the peripheral-portion electrode 13. <P>COPYRIGHT: (C)2007,JPO&INPIT

Description

  The present invention relates to a dry etching apparatus, and more particularly to a technique for ensuring in-plane uniformity of a wafer to be processed and preventing etching of an end surface and a back surface.

  A conventional dry etching apparatus used in a semiconductor manufacturing process is shown in FIG. The dry etching apparatus 1 is a parallel plate type apparatus having a lower electrode 3 and an upper electrode 4 in an airtight process chamber 2, and exhausts from an exhaust port 6 while introducing an etching gas from a gas introduction part 5. The semiconductor wafer 7 (hereinafter referred to as the wafer 7) placed on the lower electrode 3 is generated by applying a predetermined high frequency power to the upper electrode 4 to generate discharge plasma in a state controlled to a predetermined pressure. The target object is sputter etched.

  In order to improve the in-plane temperature distribution of the wafer 7 at that time and the uniformity of the etching rate depending on the temperature distribution, an electrostatic adsorption mechanism for adsorbing and holding the wafer 7 to the lower electrode 3 is adopted. The electrostatic adsorption mechanism is such that the lower electrode 3 is sandwiched between thin films made of polyimide, for example, and connected to a high-voltage DC power supply 8, and the wafer 7 is electrostatically chucked when high-voltage DC power is applied. . 9 is an insulating ring arranged so as to surround the periphery of the lower electrode 3, 10 and 11 are high-frequency power supplies, and 12 is an upper top plate.

As another technique for improving the uniformity of the etching rate, Patent Document 1 discloses that a plurality of power application units are formed by dividing a lower electrode to which a high frequency power source is connected along the plane direction and electrically insulating each other. Thus, there is disclosed a technique for improving the in-plane uniformity by dividing the high-frequency power applied to the lower electrode in the plane, adjusting the number of ions drawn to the wafer surface.
JP 7-169745 A

  In the conventional method of dividing the power application portion of the lower electrode, it is possible to divide the high-frequency power with respect to the wafer surface, and the uniformity within the wafer surface of the etching can be improved macroscopically, but the wafer edge portion, etc. It is impossible to improve the uniformity in the micro portion.

  In general, since the etching area of the wafer edge is smaller than that of the wafer center, the dielectric constant for plasma is different, and ions generated by gas dissociation due to concentration of the electric field concentrate on the wafer edge. Abnormal etching is likely to occur. This also raises the wafer surface temperature and promotes chemical reactions due to radicals. Since these phenomena are synergistic, it is extremely difficult to control the in-plane uniformity of etching.

  Further, the wafer end surface and back surface are also etched in the same manner, and there is a possibility that particles and the like may affect the processing and equipment in the next process, which tends to hinder the turn-around time and the equipment operation rate.

  SUMMARY OF THE INVENTION An object of the present invention is to provide a dry etching apparatus capable of improving the etching uniformity of the wafer edge and preventing the etching of the end face and the back face of the wafer.

  In order to solve the above problems, a dry etching apparatus of the present invention comprises a lower electrode on which a wafer is placed and an upper electrode for generating plasma between the lower electrode, The lower electrode is divided into an inner application portion and an outer application portion, and is electrically insulated from each other. At least an insulating ring disposed around the outer periphery of the lower electrode, and a periphery disposed on the outer peripheral side of the insulating ring A first high-frequency power source that applies high-frequency power to the upper electrode, second and third high-frequency power sources that respectively apply high-frequency power to the inner and outer application portions of the lower electrode, and the peripheral And a fourth high-frequency power source for applying high-frequency power to the partial electrodes.

  According to this, by controlling the voltages applied to the inner application portion, the outer application portion, and the peripheral electrode of the lower electrode, respectively, the in-plane uniformity of ions colliding with the wafer can be improved macroscopically. For microscopic parts such as the wafer edge, it is possible to prevent ions on the wafer periphery from colliding with the peripheral electrode, so that ions are incident on the edge and back surface of the wafer, and excessive etching of the edge is prevented. .

It is preferable to have a DC high-voltage power supply that applies DC high-voltage power for electrostatically adsorbing the wafer to the lower electrode.
A conductive ring is preferably disposed between the insulating ring and the peripheral electrode. According to this, radicals on the periphery of the wafer are collected in the conductive ring, and etching of the end surface and back surface of the wafer is suppressed. As a result, the controllability of radicals is improved, and the controllability of etching on the wafer edge is improved. Will improve.

  A low-frequency power source for applying low-frequency power to the peripheral electrode is provided in place of the fourth high-frequency power source or switchable to the fourth high-frequency power source. According to this, by applying the low frequency power to the peripheral electrode, ions are easily attracted to the peripheral electrode, and etching by ions is promoted at the edge of the wafer as compared with the central portion of the wafer. In general, radical etching tends to be promoted at the wafer center as compared to the wafer edge, so that the etching rate can be balanced.

  The dry etching apparatus of the present invention can accurately control the in-plane uniformity of the wafer with respect to the etching rate, and can also control the in-plane uniformity of the wafer edge. Precision processing is possible, and etching of the end surface and back surface of the wafer can also be prevented.

Hereinafter, embodiments of the present invention will be described with reference to the drawings.
FIG. 1 is a sectional view showing a schematic configuration of a dry etching apparatus according to Embodiment 1 of the present invention. Members having the same functions as those of the conventional dry etching apparatus described above with reference to FIG. 6 are denoted by the same reference numerals as in FIG.

  The dry etching apparatus 1 is a parallel plate type apparatus having a lower electrode 3 and an upper electrode 4 in an airtight process chamber 2. The processing chamber 2 has a gas introduction part 5 and an exhaust port 6 and is grounded, and an upper top plate 12 is arranged so as to cover the processing chamber 2. The lower electrode 3, which also serves as a mounting table for the wafer 7, is disposed so as to face the upper top plate 12, and the upper electrode 4 is disposed on the back side of the upper top plate 12 and connected to the high frequency power source 11.

  The lower electrode 3 is slightly smaller than the wafer 7, and is provided with an electrostatic adsorption mechanism for adsorbing and holding the wafer 7, that is, a thin film such as polyimide that sandwiches the lower electrode 3 and a high-voltage DC power supply 8. An insulating ring 9 made of an insulating material such as quartz is disposed so as to surround at least the periphery of the lower electrode 3.

  This dry etching apparatus is different from the conventional apparatus in that the lower electrode 3 is divided into two concentric members, an inner application section 3a and an outer application section 3b, along the plane direction, and is electrically insulated between them. In addition, high-frequency power supplies 10a and 10b for applying high-frequency power to the inner application unit 3a and the outer application unit 3b, respectively, are provided. The above-described high-voltage DC power supply 8 is also applied to both the inner application unit 3a and the outer application unit 3b.

  Further, a ring-shaped peripheral electrode 13 is disposed on the outer peripheral side of the lower electrode 3 via an insulating ring 9, and a high-frequency power source 14 for applying high-frequency power to the peripheral electrode 13 is provided.

The operation in the above configuration will be described.
The wafer 7 is placed on the lower electrode 3 by a transfer mechanism (not shown), the processing chamber 2 is evacuated through the exhaust port 6, and high-voltage DC power is applied to the lower electrode 3 from the high-voltage DC power source 8. Electrostatic chucking is performed on the lower electrode 3. After that, while introducing an etching gas such as a reactive etching gas or an inert gas from the gas introduction part 5, the inside of the processing chamber 2 is brought to a predetermined pressure by a pressure control valve (not shown) provided in the exhaust port 6. Adjust.

  When the pressure in the processing chamber 2 becomes constant, a high frequency power is applied to the upper electrode 4 from the high frequency power source 11 to dissociate the etching gas in the processing chamber 2 to generate plasma, and to the inside of the lower electrode 3. A high frequency power is applied to the unit 3a from the high frequency power source 10a, and a high frequency power source 10b is applied to the outer application unit 3b. As a result, etching particles such as ions and radicals in the plasma are attracted to the lower electrode 3 side, and the wafer 7 on the lower electrode 3 is etched.

FIG. 2 shows the behavior of ions above the wafer 7.
The ions 20 dissociated from the etching gas are attracted to the lower electrode 3, accelerated by the ion sheath, and collide with the wafer 7.

  At this time, by applying different high-frequency powers such as 13.56 MHz and 500 kHz to the inner application portion 3a and the outer application portion 3b of the lower electrode 3, the in-plane uniformity of the ions 20 that collide with the wafer 7 is improved macroscopically. Let For a microscopic portion such as a wafer edge, by applying a higher frequency power to the peripheral electrode 13 than for the lower electrode 3, the ions 20 on the wafer peripheral portion are accelerated by the ion sheath formed by the peripheral electrode 13. And collide with the peripheral electrode 13.

  That is, by connecting the inner application section 3a, the outer application section 3b, and the peripheral electrode 13 of the lower electrode 3 to separate high frequency power supplies 10a, 10b, and 14 and controlling the applied voltages, respectively, the end face of the wafer 7 and This prevents the ions 20 from being incident on the back surface, prevents excessive etching of the edge, and improves in-plane uniformity such as an etching rate.

In particular, in etching with strong sputtering properties using an element with a heavy molecular weight such as Cl ₂ or Ar, the lower the pressure, the fewer the number of collisions of the ions 20, and the straightness increases. Effective for improving in-plane uniformity.

FIG. 3 is a cross-sectional view showing a schematic configuration of a dry etching apparatus according to Embodiment 2 of the present invention.
This dry etching apparatus is different from that of the first embodiment in that it is more reactive with radicals than the material to be etched on the wafer 7 between the outside of the insulating ring 9 and the peripheral electrode 11, for example, from a carbon material. The conductive ring 15 is arranged. The conductive ring 15 is not grounded.

FIG. 4 shows the behavior of ions and radicals above the wafer.
As shown in FIG. 4A, in the same manner as in the first embodiment, the in-plane uniformity of the ions 20 that collide with the wafer 7 is improved macroscopically, and the ions 20 at the periphery of the wafer are produced by the peripheral electrode 13. It is accelerated by the ion sheath and collides with the peripheral electrode 13. The ions 20 hardly collide with the conductive ring 15 that is not grounded. On the other hand, as shown in FIG. 4B, the radicals 21 around the wafer gather on the conductive ring 15 that is not grounded.

  Since the ions 20 and radicals 21 in the peripheral portion of the wafer exhibit such behavior, etching of the end surface and the back surface of the wafer 7 is suppressed. As a result, not only ions but also radical controllability is improved, and etching of the wafer edge is performed. Controllability is improved.

In particular, when etching is performed to protect the end face by balancing the sputterability by ions and the reactivity by radicals, such as SF ₆ and CF ₄ , the controllability of ions and radicals is independently improved. This is effective for improving the uniformity of the inner etching rate and controlling the size of the shape.

FIG. 5 is a cross-sectional view showing a schematic configuration of a dry etching apparatus according to Embodiment 3 of the present invention.
This dry etching apparatus is different from that of the first embodiment in that a low frequency power supply 16 is connected to the peripheral electrode 13 instead of the high frequency power supply 14 of the first embodiment. During the dry etching process, high frequency power of, for example, 13.56 MHz is applied to the lower electrodes 3a, 3b from the high frequency power supplies 10a, 10b, and low frequency power of, for example, 500 kHz is applied to the peripheral electrode 13 from the low frequency power supply 16. Apply.

  By applying the low frequency power to the peripheral electrode 13 in this manner, ions are easily drawn into the peripheral electrode 13, and etching by ions is promoted at the edge of the wafer as compared with the central portion of the wafer. On the other hand, since etching by radicals tends to be promoted at the center of the wafer as compared to the edge of the wafer, the etching rate is easily balanced.

In particular, it is effective to improve the uniformity of the in-plane etching rate when etching using an element having a high molecular weight, such as Cl ₂ or Ar, in which the balance between sputtering by ions and reactivity by radicals is important. .

  Here, the example in which the low frequency power supply 16 is connected to the peripheral electrode 13 has been described, but the high frequency power supply 14 is also connected as shown by the phantom line, and applied to the peripheral electrode 13 depending on the purpose and purpose of etching. The power to be used may be switched. If a frequency variable type power supply is used, the apparatus cost can be reduced.

  The dry etching apparatus of the present invention can improve the in-plane uniformity of the wafer, and is useful for expanding the chip effective area of the wafer and improving the yield.

Sectional drawing which shows schematic structure of the dry etching apparatus of Embodiment 1 of this invention Schematic diagram showing the behavior of ions above the wafer Sectional drawing which shows schematic structure of the dry etching apparatus of Embodiment 2 of this invention Schematic diagram showing the behavior of ions and radicals above the wafer Sectional drawing which shows schematic structure of the dry etching apparatus of Embodiment 3 of this invention Sectional drawing which shows schematic structure of the conventional dry etching apparatus.

Explanation of symbols

DESCRIPTION OF SYMBOLS 1 Dry etching apparatus 2 Processing chamber 3 Lower electrode 4 Upper electrode 7 Wafer 8 High voltage DC power supply 9 Insulation ring
10a, 10b high frequency power supply
11 High frequency power supply
13 Peripheral electrode
14 High frequency power supply
15 Conductive ring
16 Low frequency power supply

Claims (4)

In a dry etching apparatus provided with a lower electrode on which a wafer is placed and an upper electrode for generating plasma between the lower electrode,
The lower electrode is divided into an inner application part and an outer application part to be electrically insulated from each other,
An insulating ring disposed at least around the outer periphery of the lower electrode;
A peripheral electrode disposed on the outer peripheral side of the insulating ring;
A first high frequency power supply for applying high frequency power to the upper electrode;
Second and third high frequency power supplies for applying high frequency power to the inner application portion and the outer application portion of the lower electrode, respectively;
A dry etching apparatus having a fourth high frequency power source for applying high frequency power to the peripheral electrode. 2. The dry etching apparatus according to claim 1, further comprising a direct current high voltage power source for applying direct current high voltage power for electrostatically adsorbing the wafer to the lower electrode. The dry etching apparatus according to claim 1, wherein a conductive ring is disposed between the insulating ring and the peripheral electrode. 2. The dry etching apparatus according to claim 1, wherein a low-frequency power source for applying low-frequency power to the peripheral electrode is provided in place of the fourth high-frequency power source or switchable to the fourth high-frequency power source.

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