JP2006304492A - Earth fault detecting method of series multiplexing pwm inverter - Google Patents

Earth fault detecting method of series multiplexing pwm inverter Download PDF

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JP2006304492A
JP2006304492A JP2005123089A JP2005123089A JP2006304492A JP 2006304492 A JP2006304492 A JP 2006304492A JP 2005123089 A JP2005123089 A JP 2005123089A JP 2005123089 A JP2005123089 A JP 2005123089A JP 2006304492 A JP2006304492 A JP 2006304492A
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ground fault
neutral point
voltage
harmonic
point voltage
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JP4760107B2 (en
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Kuniaki Hirao
邦朗 平尾
Kazuya Ogura
和也 小倉
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Meidensha Corp
Meidensha Electric Manufacturing Co Ltd
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Abstract

<P>PROBLEM TO BE SOLVED: To solve the problem that an earth fault can not be accurately detected since a tertiary harmonic component is included in a neutral point voltage in a series multiplexing PWM inverter for implementing a zero-phase modulation using an addition of the tertiary harmonic component. <P>SOLUTION: An erroneous detection is prevented by making an abnormality determining level value of the neutral point voltage variable. Alternatively, the detected neutral point voltage is introduced into a tertiary harmonic component removing section, and the erroneous detection is prevented by implementing an earth fault determining process after a subtraction of the tertiary harmonic component. Alternatively, a moving average of the detected neutral point voltage is found, and an earth fault state is detected without the erroneous detection by stopping the zero-phase modulation using the addition of the tertiary harmonic component in low/medium regions of an output voltage region. <P>COPYRIGHT: (C)2007,JPO&INPIT

Description

本発明は、直列多重PWMインバータの地絡検出方法に係り、特に3次高調波成分による影響を防止した地絡検出方法に関するものである。   The present invention relates to a ground fault detection method for a serial multiple PWM inverter, and more particularly to a ground fault detection method in which the influence of a third harmonic component is prevented.

3.3kV乃至6.6kVの高圧を直接受電して交流電動機を制御する場合、直列多重インバータが使用される。この直列多重インバータは一般的には図10のように構成される。同図においてU1〜U6、V1〜V6、及びW1〜W6はそれぞれ単相インバータで、各相毎に直列多重接続されている。直列多重インバータ1は中性点を接地抵抗R1,R2を介して高抵抗接地しており、直列多重インバータの出力が1線地絡した場合には接地抵抗R1,R2に地絡電流が流れるため、抵抗の両端電圧を監視することにより地絡状態を検出部3によって検出するようにしている。Trは入力トランス、2は交流電動機である。   When the AC motor is controlled by directly receiving a high voltage of 3.3 kV to 6.6 kV, a serial multiple inverter is used. This serial multiple inverter is generally configured as shown in FIG. In the figure, U1 to U6, V1 to V6, and W1 to W6 are single-phase inverters, and are connected in series and multiplexed for each phase. The series multiple inverter 1 has a high resistance ground at the neutral point via the ground resistors R1 and R2, and when the output of the series multiple inverter has a ground fault, a ground fault current flows through the ground resistors R1 and R2. The ground fault state is detected by the detection unit 3 by monitoring the voltage across the resistor. Tr is an input transformer, and 2 is an AC motor.

図11は地絡検出部の構成図を示したものである。接地抵抗R2の両端から検出した接地抵抗電圧は、フィルタFlを通って比較器Cpの一方の端子に入力される。比較器Cpの他方の端子には異常判定レベル信号が入力されて異常レベル比較処理が行われる。その結果は地絡判定処理部Gc出力され、この処理部Gcにおいて地絡の有無が判定され、判定レベルを超えた場合には地絡故障としてインバータのゲート遮断を行う。   FIG. 11 shows a configuration diagram of the ground fault detection unit. The ground resistance voltage detected from both ends of the ground resistance R2 is input to one terminal of the comparator Cp through the filter Fl. An abnormality determination level signal is input to the other terminal of the comparator Cp, and an abnormality level comparison process is performed. The result is output to the ground fault determination processing unit Gc. In this processing unit Gc, the presence / absence of a ground fault is determined. If the determination level is exceeded, the gate of the inverter is shut down as a ground fault.

図12は直列多重インバータ1のPWM制御部の構成図を示したものである。 4は3相変調波発生部で、電圧設定信号と位相設定信号を入力して図13で示す正弦波を発生する。5は3次高調波発生部で、3相変調波発生部1が発生した3相電圧に同相の3次高調波を発生して加算部6に出力する。   FIG. 12 shows a configuration diagram of the PWM control unit of the serial multiple inverter 1. Reference numeral 4 denotes a three-phase modulation wave generator, which inputs a voltage setting signal and a phase setting signal and generates a sine wave shown in FIG. Reference numeral 5 denotes a third-order harmonic generation unit that generates a third-order harmonic having the same phase as the three-phase voltage generated by the three-phase modulation wave generation unit 1 and outputs it to the addition unit 6.

一般に、直列多重インバータは正弦波比較PWM(パルス幅変調)制御を行っており、そのために3相変調波発生部1からの3相電圧に同相の3次高調波を加算部6にて加算することによって零相変調を行っている。このような手段を行うことにより、線間電圧を変えずに図13で示すように相電圧のピーク値を低減してインバータの出力電圧の最大値の増加を可能としている。7はキャリア変調部で、キャリア周波数設定信号により変調され、直列多重インバータの各ゲートに出力される。   In general, the serial multiple inverter performs sine wave comparison PWM (pulse width modulation) control, and for that purpose, the third-phase voltage from the three-phase modulation wave generator 1 adds the third-phase harmonics in phase to the adder 6. Therefore, zero phase modulation is performed. By performing such means, the peak value of the phase voltage is reduced and the maximum value of the output voltage of the inverter can be increased as shown in FIG. 13 without changing the line voltage. Reference numeral 7 denotes a carrier modulation unit which is modulated by a carrier frequency setting signal and is output to each gate of the serial multiple inverter.

電力変換装置における地絡検出方法としては、特許文献1のものが公知となっている。この特許文献1のものは、運転停止時に地絡検出の要望信号に応じて信号を発生し、ブリッジ構成されたインバータのスイッチング素子のZ相のみを導通状態として地絡発生の有無を検出することが開示されている。
特開平5−328739号公報
As a ground fault detection method in a power converter, the thing of patent documents 1 is publicly known. In this patent document 1, a signal is generated in response to a request signal for ground fault detection when operation is stopped, and only the Z phase of a switching element of a bridge-structured inverter is turned on to detect the occurrence of a ground fault. Is disclosed.
JP-A-5-328739

図12で示す3相電圧に同相の3次高調波を加算することは、直列多重インバータ1の中性点に積極的にバイアス電圧を加えることになる。また、出力電圧はキャリア変調されているため、正常時の中性点電圧には次の成分が含まれる。
(1)スイッチングによる高調波成分(キャリア成分)
(2)零相変調分(3次高調波成分)
3次高調波は出力相電圧ピーク値に対して約30%程度の振幅を持っている。すなわち、正常な状態でも中性点電圧は出力電圧の30%程度の電圧が発生することになる。
Adding a third harmonic of the same phase to the three-phase voltage shown in FIG. 12 positively applies a bias voltage to the neutral point of the series multiple inverter 1. Since the output voltage is carrier-modulated, the neutral point voltage at normal time includes the following components.
(1) Harmonic component by switching (carrier component)
(2) Zero phase modulation (third harmonic component)
The third harmonic has an amplitude of about 30% with respect to the output phase voltage peak value. That is, even in a normal state, the neutral point voltage is about 30% of the output voltage.

以上のことから、図11で示すような地絡検出方法を採用し、接地抵抗の両端の電圧を監視して一定の判定レベルを超えたときに地絡と判定する場合、次の問題が発生する。
a.地絡検出レヘル≦「3次高調波ピーク値」の場合、地絡を誤って検出する。
b.地絡検出レベル≧「3次高調波ピーク値」の場合、出力電力が低いと地絡検出ができない。
なお、特許文献1にはスイッチングによる高調波成分や、零相変調分に基づく誤検出に関する技術については開示されていない。
From the above, when the ground fault detection method as shown in FIG. 11 is adopted, and the voltage at both ends of the grounding resistance is monitored and a certain judgment level is exceeded, a ground fault is detected. To do.
a. When the ground fault detection level is ≦ “third harmonic peak value”, the ground fault is erroneously detected.
b. When the ground fault detection level ≧ “third harmonic peak value”, the ground fault cannot be detected if the output power is low.
Patent Document 1 does not disclose a technique related to erroneous detection based on harmonic components due to switching or zero-phase modulation.

したがって、本発明が目的とするところは、直列多重インバータの地絡を精度よく検出できる地絡検出方法を提供することにある。   Accordingly, an object of the present invention is to provide a ground fault detection method capable of accurately detecting a ground fault of a serial multiple inverter.

本発明の第1は、3次高調波加算による零相変調を行う直列多重PWMインバータであって、この直列多重インバータの中性点電圧に基づいて地絡を検出するものにおいて、
前記検出された中性点電圧の異常判定レベル値を可変とすることを特徴としたものである。
The first of the present invention is a serial multiple PWM inverter that performs zero-phase modulation by adding third harmonics, and detects a ground fault based on the neutral point voltage of this serial multiple inverter.
The abnormality determination level value of the detected neutral point voltage is made variable.

本発明の第2は、前記中性点電圧の異常判定レベル値は、前記零相変調を行うときの電圧設定値と異常判定レベル値との乗算によって生成することを特徴としたものである。   According to a second aspect of the present invention, the neutral determination voltage abnormality determination level value is generated by multiplying the voltage setting value and the abnormality determination level value when performing the zero-phase modulation.

本発明の第3は、前記中性点電圧の異常判定レベルは、出力相電圧の低い領域では判定レベル最小値で一定としたことを特徴としたものである。   A third aspect of the present invention is characterized in that the neutral determination voltage abnormality determination level is constant at a minimum determination level value in a region where the output phase voltage is low.

本発明の第4は、3次高調波加算による零相変調を行う直列多重PWMインバータであって、この直列多重インバータの中性点電圧に基づいて地絡を検出するものにおいて、
前記検出された中性点電圧は、3次高調波成分除去部に導入して3次成分減算後に地絡判定処理を行うことを特徴としたものである。
A fourth aspect of the present invention is a serial multiple PWM inverter that performs zero-phase modulation by adding third-order harmonics, and detects a ground fault based on the neutral point voltage of this serial multiple inverter.
The detected neutral point voltage is introduced into a third-order harmonic component removal unit, and a ground fault determination process is performed after subtraction of the third-order component.

本発明の第5は、前記3次高調波成分除去部による3次成分減算処理は、フィルタを介して入力される検出された中性点電圧に対する前記3次高調波の指令値の減算であることを特徴としたものである。   According to a fifth aspect of the present invention, the third-order component subtraction processing by the third-order harmonic component removal unit is subtraction of the command value of the third-order harmonic from the detected neutral point voltage input through the filter. It is characterized by that.

本発明の第6は、前記3次高調波成分除去部は、前記検出された中性点電圧を移動平均する移動平均部と、移動平均のためのサンプリング周期演算部による3次高調波成分除去であることを特徴としたものである。   According to a sixth aspect of the present invention, the third harmonic component removing unit includes a moving average unit that performs a moving average of the detected neutral point voltage, and a third harmonic component removed by a sampling period calculation unit for the moving average. It is characterized by being.

本発明の第7は、3次高調波加算による零相変調を行う直列多重PWMインバータであって、この直列多重インバータの中性点電圧に基づいて地絡を検出するものにおいて、
前記直列多重PWMインバータの出力電圧領域が、低・中領域で前記3次高調波加算による零相変調を停止することを特徴としたものである。
A seventh aspect of the present invention is a serial multiple PWM inverter that performs zero-phase modulation by adding third harmonics, and detects a ground fault based on the neutral point voltage of the serial multiple inverter.
The output voltage region of the serial multiple PWM inverter is characterized in that the zero-phase modulation by the third harmonic addition is stopped in the low / medium region.

本発明の第8は、前記3次高調波加算による零相変調を停止する手段は、前記直列多重PWMインバータのPWM制御部の電圧設定値を入力して低・中領域では出力信号をオフとする関数発生部を設け、この関数発生部の信号と前記3次高調波発生部からの3次高調波の乗算信号に基づくことを特徴としたものである。   According to an eighth aspect of the present invention, the means for stopping the zero-phase modulation by the addition of the third harmonic is configured to input the voltage set value of the PWM control unit of the serial multiple PWM inverter and turn off the output signal in the low / mid range. And a function generation unit that is based on a product of the function generation unit and a third harmonic generation signal from the third harmonic generation unit.

以上のとおり、本発明による判定レベルを可変したことにより、3次高調波成分による誤検出なく出力電圧全域で地絡状態の検出が可能となる。また、中性点電圧の検出値に含まれる3次高調波成分をキャンセルするようにしたことにより、3次高調波成分による誤検出なく出力電圧全域で地絡状態の検出が可能となる。
さらに、出力電圧限界を上げたい高出力帯域でのみ3次高調波成分による零相変調を行うことにより、出力電圧の低・中領域において3次高調波成分による誤検出なく出力電圧全域で地絡状態の検出が可能となる。また、同時に出力電圧の低・中領域の中性点電圧を安定化させたことにより、電動機の軸電流による絶縁劣化を防ぐことが可能となる。
As described above, by changing the determination level according to the present invention, it is possible to detect the ground fault state in the entire output voltage without erroneous detection due to the third harmonic component. In addition, by canceling the third harmonic component included in the detected value of the neutral point voltage, it is possible to detect the ground fault state in the entire output voltage without erroneous detection due to the third harmonic component.
Furthermore, by performing zero-phase modulation with the third harmonic component only in the high output band where the output voltage limit is to be raised, ground faults in the entire output voltage range can be obtained in the low and middle regions of the output voltage without false detection by the third harmonic component. The state can be detected. At the same time, by stabilizing the neutral point voltage of the low / middle region of the output voltage, it is possible to prevent insulation deterioration due to the shaft current of the motor.

実施例1,2は、全域3次高調波加算による零相変調を行う直列多重インバータにおいて、地絡判定レベルを可変するようにしたものである。実施例3,4は、検出値に含まれる3次高調波成分をキャンセルするものである。また、実施例5は、出力電圧の限界を上げたい高出力帯域でのみ3次高調波加算による零相変調を行うものである。   In the first and second embodiments, the ground fault determination level is varied in a serial multiple inverter that performs zero-phase modulation by adding the third-order harmonics in the entire area. In the third and fourth embodiments, the third harmonic component included in the detection value is canceled. In the fifth embodiment, zero-phase modulation by third harmonic addition is performed only in a high output band where it is desired to increase the limit of the output voltage.

図1は、本発明の実施例を示す地絡検出部(図10の地絡検出部3に相当)の構成図を示したものである。11はフィルタ、12は比較部で、図10で示す接地抵抗によって検出された接地抵抗電圧は、フィルタ11を通って比較部12の一方の端子に入力される。13は乗算部で、この乗算部13は異常判定レベル値と電圧指令値との乗算演算を実行し、その演算値は比較部12の他方の端子に入力される。14は地絡判定処理部である。   FIG. 1 shows a configuration diagram of a ground fault detection unit (corresponding to the ground fault detection unit 3 of FIG. 10) showing an embodiment of the present invention. Reference numeral 11 denotes a filter, and reference numeral 12 denotes a comparison unit. The ground resistance voltage detected by the ground resistance shown in FIG. 10 is input to one terminal of the comparison unit 12 through the filter 11. Reference numeral 13 denotes a multiplication unit. The multiplication unit 13 performs a multiplication operation of the abnormality determination level value and the voltage command value, and the calculated value is input to the other terminal of the comparison unit 12. Reference numeral 14 denotes a ground fault determination processing unit.

直列多重インバータでは、1線地絡発生時に中性点電圧が図2の点線で示すように出力相電圧ピーク値にまで上昇する。また、正常時での中性点電圧は一点鎖線で示すように3次高調波ピーク値にまで上昇する。乗算部13により印加する異常判定レベルは、実線で示すように常に3次高調波ピーク値と出力相電圧ピーク値との間に位置するため、全ての出力電圧領域で地絡状態の検出が可能となる効果が生じる。   In the series multiple inverter, the neutral point voltage rises to the output phase voltage peak value as shown by the dotted line in FIG. Further, the neutral point voltage at the normal time rises to the third harmonic peak value as shown by a one-dot chain line. The abnormality determination level applied by the multiplier 13 is always located between the third harmonic peak value and the output phase voltage peak value as shown by the solid line, so that the ground fault state can be detected in all output voltage regions. The effect becomes.

図3は、本発明の他の実施例を示す出力電圧−異常判定レベル特性図である。
実施例1の方式では、出力電圧が低い領域では異常判定レベルが低く、検出した中性点電圧にフィルタ11で除去できない3次高調波以外の高調波成分が混入した場合、誤検出の可能性がある。そこで、この実施例では図3で示すように、出力電圧が低い領域のV1まで判定レベルを一定とすることにより、3次以外の高調波成分による低出力域での地絡検出の誤動作を防止するようにしたものである。
FIG. 3 is an output voltage-abnormality determination level characteristic diagram showing another embodiment of the present invention.
In the method of the first embodiment, the abnormality determination level is low in the region where the output voltage is low, and the possibility of erroneous detection is detected when the detected neutral point voltage includes a harmonic component other than the third harmonic that cannot be removed by the filter 11. There is. Therefore, in this embodiment, as shown in FIG. 3, by making the determination level constant up to V1 in the region where the output voltage is low, malfunction of ground fault detection in the low output region due to harmonic components other than the third order is prevented. It is what you do.


図4は本発明の他の実施例を示したものである。この実施例が図1で示す実施例1と相違する部分は、3次高調波成分除去部15を設けたことである。3次高調波成分除去部15は、フィルタ11とその出力側に設けた加算部15aより構成され、この加算部15aでフィルタを通過した接地抵抗電圧から3次高調波指令とを減算して偏差信号を得る。この偏差信号を比較部12’に出力して異常判定レベルとの比較処理を実行する。なお、3次高調波指令は、図12におけるPWM処理で加算した値が用いられる。

FIG. 4 shows another embodiment of the present invention. This embodiment is different from the first embodiment shown in FIG. 1 in that a third harmonic component removing unit 15 is provided. The third harmonic component removing unit 15 includes a filter 11 and an adding unit 15a provided on the output side thereof. The third harmonic command is subtracted from the ground resistance voltage that has passed through the filter by the adding unit 15a. Get a signal. The deviation signal is output to the comparison unit 12 ′ to perform comparison processing with the abnormality determination level. As the third harmonic command, a value added in the PWM processing in FIG. 12 is used.

図5は検出値から3次高調波成分を減算する場合の説明図で、点線表示が中性点の電圧波形である。PWM処理で加算した値を用いることにより、正常時の中性点電圧の検出値は理論上ゼロとなり、また、時刻t1で示すように1線地絡発生時には出力相電圧の基本波成分が検出できるため、容易に地絡状態の判定が可能となる。   FIG. 5 is an explanatory diagram in the case of subtracting the third harmonic component from the detected value, and the dotted line display shows the voltage waveform at the neutral point. By using the value added in PWM processing, the detection value of the neutral point voltage at normal time becomes theoretically zero, and the fundamental wave component of the output phase voltage is detected when a one-wire ground fault occurs as shown at time t1. Therefore, it is possible to easily determine the ground fault state.

図6は本発明の他の実施例を示したもので、図4とは3次高調波成分除去部が異なり、移動平均部15bとサンプリング周期演算部15cによって3次高調波成分除去部15’が構成される。移動平均部15bにはフィルタ11を介して高調波成分の除去された中性点電圧が入力される。サンプリング周期演算部15cは、入力された周波数指令値からサンプリングの周期を演算し、出力電圧に同期させるべく移動平均部15bに出力する。移動平均部15bは、この周期演算信号に基づいて中性点電圧を順次移動平均する。   FIG. 6 shows another embodiment of the present invention. The third-order harmonic component removing unit is different from that in FIG. 4, and the third-order harmonic component removing unit 15 ′ is composed of a moving average unit 15b and a sampling period calculating unit 15c. Is configured. A neutral point voltage from which harmonic components are removed is input to the moving average unit 15b via the filter 11. The sampling period calculation unit 15c calculates a sampling period from the input frequency command value, and outputs it to the moving average unit 15b to synchronize with the output voltage. The moving average unit 15b sequentially averages the neutral point voltages based on the period calculation signal.

図7は移動平均による3次高調波の抑制状態の説明図で、移動平均により出力相電圧に加算した3次高調波成分が除去できる。これにより、正常時の中性点電圧の検出値は理論上ゼロとなり、また、時刻t1で示すように1線地絡発生時には出力相電圧の基本波成分が検出できるため、容易に地絡状態の判定が可能となる。   FIG. 7 is an explanatory diagram of the suppression state of the third harmonic by the moving average, and the third harmonic component added to the output phase voltage can be removed by the moving average. As a result, the detection value of the neutral point voltage at normal time is theoretically zero, and the fundamental wave component of the output phase voltage can be detected when a one-wire ground fault occurs as shown at time t1, so that the ground fault state can be easily detected. Can be determined.

図8は本発明の他の実施例を示したもので、直列多重インバータのPWM制御部に零相変調制御部16を設けたものである。前述のように、直列多重インバータは3次高調波発生部5を設け、3相変調波発生部4の3相電圧と同相の3次高調波を加算部6にて加算することによって零相変調を行ない、線間電圧を変えることなく相電圧のピーク値を低減してインバータの出力電圧の最大値の増加を可能としている。この反面、3次高調波を加算することによって出力電圧の低・中領域では3次高調波を加算することにより地絡の誤検出の要因となっている。   FIG. 8 shows another embodiment of the present invention, in which a zero-phase modulation control unit 16 is provided in the PWM control unit of a serial multiple inverter. As described above, the serial multiple inverter includes the third-order harmonic generation unit 5 and adds the third-order harmonics having the same phase as the three-phase voltage of the three-phase modulation wave generation unit 4 in the addition unit 6 so that the zero-phase modulation is performed. The peak value of the phase voltage is reduced without changing the line voltage, and the maximum value of the output voltage of the inverter can be increased. On the other hand, by adding the third harmonic, adding the third harmonic in the low / medium region of the output voltage causes a false detection of the ground fault.

また、直列多重インバータは出力電圧が高いため、3次成分のピークは出力6600Vの場合、6600*√2/√3*0.3=1616Vとなり、中性点電圧が正常時でも高電圧となって電動機の軸電流による絶縁劣化等の原因となる。   Moreover, since the output voltage of the serial multiple inverter is high, the peak of the third-order component is 6600 * √2 / √3 * 0.3 = 1616V when the output is 6600V, and the high voltage is obtained even when the neutral point voltage is normal. This may cause insulation deterioration due to the shaft current of the motor.

図8はこのような観点からなされたもので、零相変調制御部16は図9で示すような関数発生器16aと、この発生器からの信号と3次高調波成分とを乗算する乗算部16bより構成されている。関数発生器16aは、PWM信号用の電圧設定値を入力し、予め定められた電圧指令値以上となったときに乗算部16bに出力を発生して3次高調波と演算され、加算部6に出力される。   FIG. 8 is made from this point of view. The zero-phase modulation control unit 16 includes a function generator 16a as shown in FIG. 9, and a multiplication unit that multiplies the signal from the generator by the third harmonic component. 16b. The function generator 16a receives the voltage setting value for the PWM signal, generates an output to the multiplication unit 16b when the voltage command value is equal to or greater than a predetermined voltage command value, is calculated as the third harmonic, and the addition unit 6 Is output.

すなわち、出力電圧の低い領域では零相変調はオフ状態となっており、出力電圧の高い領域でのみ零相変調はオン状態としている。この際、3次高調波加算値は出力電圧に応じて段階的にレベルを上げて、出力電圧・中性点電圧の急峻な変化を防いでいる。   That is, zero phase modulation is in an off state in a region where the output voltage is low, and zero phase modulation is in an on state only in a region where the output voltage is high. At this time, the added value of the third harmonic is raised stepwise according to the output voltage to prevent a sudden change in the output voltage / neutral point voltage.

この実施例によれば、出力電圧限界を上げたい高出力帯域でのみ3次高調波加算による零相変調を行うことより、出力電圧の低・中領域において3次高調波成分による誤検出が防止でき、精度よく地絡状態の検出が可能となる。また、出力電圧の低・中領域での中性点電圧レベルが下げられ安定化することにより、電動機の軸電流による絶縁劣化が防げる効果が生じる。   According to this embodiment, zero-phase modulation by third-order harmonic addition is performed only in a high output band where the output voltage limit is desired to be raised, thereby preventing erroneous detection due to the third-order harmonic component in the low / mid range of the output voltage. It is possible to detect the ground fault with high accuracy. In addition, the neutral point voltage level in the low / mid range of the output voltage is lowered and stabilized, thereby producing an effect of preventing insulation deterioration due to the shaft current of the motor.

本発明の実施形態を示す地絡検出部の構成図(実施例1)。The block diagram of the ground fault detection part which shows embodiment of this invention (Example 1). 出力電圧−異常判定レベル特性図。Output voltage-abnormality determination level characteristic diagram. 本発明の他の実施形態による出力電圧−異常判定レベル特性図(実施例2)。The output voltage-abnormality determination level characteristic diagram (Example 2) by other embodiment of this invention. 本発明の他の実施形態を示す地絡検出部の構成図(実施例3)。The block diagram of the ground fault detection part which shows other embodiment of this invention (Example 3). 3次高調波の減算説明図。Explanatory drawing of the 3rd harmonic subtraction. 本発明の他の実施形態を示す地絡検出部の構成図(実施例4)。The block diagram of the ground fault detection part which shows other embodiment of this invention (Example 4). 移動平均による3次高調波の抑制説明図。Explanatory drawing of the suppression of the 3rd harmonic by a moving average. 本発明の他の実施形態を示す地絡検出部の構成図(実施例5)。The block diagram of the ground fault detection part which shows other embodiment of this invention (Example 5). 3次高調波の加算量説明図。Explanatory drawing of the addition amount of the 3rd harmonic. 直列多重インバータの構成図。The block diagram of a serial multiple inverter. 従来の地絡検出部の構成図。The block diagram of the conventional ground fault detection part. 直列多重インバータのPWM制御部の構成図。The block diagram of the PWM control part of a serial multiple inverter. 3次高調波を加算した相電圧波形図。The phase voltage waveform figure which added the 3rd harmonic.

符号の説明Explanation of symbols

1… 直列多重インバータ
2… 交流電動機
3… 地絡検出部
4… 三相変調波発生部
5… 3次高調波発生部
6… 加算部
7… キャリア変調部
11… フィルタ
12… 比較部
13… 乗算部
14… 地絡判定処理部
15… 3次高調波成分除去部
16… 関数発生部

DESCRIPTION OF SYMBOLS 1 ... Series multiple inverter 2 ... AC motor 3 ... Ground fault detection part 4 ... Three phase modulation wave generation part 5 ... Third harmonic generation part 6 ... Addition part 7 ... Carrier modulation part 11 ... Filter 12 ... Comparison part 13 ... Multiplication Unit 14 ... Ground fault determination processing unit 15 ... Third harmonic component removal unit 16 ... Function generation unit

Claims (8)

3次高調波加算による零相変調を行う直列多重PWMインバータであって、この直列多重インバータの中性点電圧に基づいて地絡を検出するものにおいて、
前記検出された中性点電圧の異常判定レベル値を可変とすることを特徴とした直列多重インバータの地絡検出方法。
In a series multiple PWM inverter that performs zero-phase modulation by adding third harmonics, and detects a ground fault based on the neutral point voltage of this series multiple inverter,
A ground fault detection method for a serial multiple inverter, characterized in that an abnormality determination level value of the detected neutral point voltage is variable.
前記中性点電圧の異常判定レベル値は、前記零相変調を行うときの電圧設定値と異常判定レベル値との乗算によって生成することを特徴とした請求項1記載の直列多重インバータの地絡検出方法。 The ground fault of the serial multiple inverter according to claim 1, wherein the abnormality determination level value of the neutral point voltage is generated by multiplication of a voltage setting value and an abnormality determination level value when performing the zero-phase modulation. Detection method. 前記中性点電圧の異常判定レベルは、出力相電圧の低い領域では判定レベル最小値で一定としたことを特徴とした請求項1又は2記載の直列多重インバータの地絡検出方法。 3. The method for detecting a ground fault in a serial multiple inverter according to claim 1, wherein the abnormality determination level of the neutral point voltage is constant at a minimum determination level in a region where the output phase voltage is low. 3次高調波加算による零相変調を行う直列多重PWMインバータであって、この直列多重インバータの中性点電圧に基づいて地絡を検出するものにおいて、
前記検出された中性点電圧は、3次高調波成分除去部に導入して3次成分減算後に地絡判定処理を行うことを特徴とした直列多重インバータの地絡検出方法。
In a series multiple PWM inverter that performs zero-phase modulation by adding third harmonics, and detects a ground fault based on the neutral point voltage of this series multiple inverter,
A ground fault detection method for a serial multiple inverter, wherein the detected neutral point voltage is introduced into a third harmonic component removal unit and a ground fault determination process is performed after subtraction of the third component.
前記3次高調波成分除去部による3次成分減算処理は、フィルタを介して入力される検出された中性点電圧に対する前記3次高調波の指令値の減算であることを特徴とした請求項4記載の直列多重インバータの地絡検出方法。 The third-order component subtraction processing by the third-order harmonic component removing unit is a subtraction of the command value of the third-order harmonic from a detected neutral point voltage input through a filter. 4. A ground fault detection method for a serial multiple inverter according to 4. 前記3次高調波成分除去部は、前記検出された中性点電圧を移動平均する移動平均部と、移動平均のためのサンプリング周期演算部による3次高調波成分除去であることを特徴とした請求項5記載の直列多重インバータの地絡検出方法。 The third harmonic component removal unit is a moving average unit that performs a moving average of the detected neutral point voltage and a third harmonic component removal by a sampling period calculation unit for the moving average. The method for detecting a ground fault in a serial multiple inverter according to claim 5. 3次高調波加算による零相変調を行う直列多重PWMインバータであって、この直列多重インバータの中性点電圧に基づいて地絡を検出するものにおいて、
前記直列多重PWMインバータの出力電圧領域が、低・中領域で前記3次高調波加算による零相変調を停止することを特徴とした直列多重インバータの地絡検出方法。
In a series multiple PWM inverter that performs zero-phase modulation by adding third harmonics, and detects a ground fault based on the neutral point voltage of this series multiple inverter,
A ground fault detection method for a serial multiple inverter, characterized in that the zero phase modulation by the third harmonic addition is stopped in an output voltage region of the serial multiple PWM inverter in a low / middle region.
前記3次高調波加算による零相変調を停止する手段は、前記直列多重PWMインバータのPWM制御部の電圧設定値を入力して低・中領域では出力信号をオフとする関数発生部を設け、この関数発生部の信号と前記3次高調波発生部からの3次高調波の乗算信号に基づくことを特徴とした請求項7記載の直列多重インバータの地絡検出方法。
The means for stopping the zero-phase modulation by the addition of the third harmonic is provided with a function generation unit that inputs a voltage setting value of the PWM control unit of the serial multiple PWM inverter and turns off the output signal in the low and middle regions, 8. The method for detecting a ground fault of a serial multiple inverter according to claim 7, wherein the function generator is based on a product of the third harmonic generated from the signal of the function generator and the third harmonic generator.
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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2014241681A (en) * 2013-06-11 2014-12-25 株式会社東芝 Vehicle controller

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH05137237A (en) * 1991-11-07 1993-06-01 Mitsubishi Electric Corp Digital protective controller
JPH06133558A (en) * 1992-10-15 1994-05-13 Fanuc Ltd Pwm control system
JP2003230284A (en) * 2002-01-31 2003-08-15 Toshiba Corp Inverter apparatus
JP2005045846A (en) * 2003-07-22 2005-02-17 Hitachi Ltd Power conversion apparatus

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH05137237A (en) * 1991-11-07 1993-06-01 Mitsubishi Electric Corp Digital protective controller
JPH06133558A (en) * 1992-10-15 1994-05-13 Fanuc Ltd Pwm control system
JP2003230284A (en) * 2002-01-31 2003-08-15 Toshiba Corp Inverter apparatus
JP2005045846A (en) * 2003-07-22 2005-02-17 Hitachi Ltd Power conversion apparatus

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2014241681A (en) * 2013-06-11 2014-12-25 株式会社東芝 Vehicle controller

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