JP2006294814A - Method of forming through-electrode on substrate, and manufacturing method of semiconductor device using the same - Google Patents

Method of forming through-electrode on substrate, and manufacturing method of semiconductor device using the same Download PDF

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JP2006294814A
JP2006294814A JP2005112539A JP2005112539A JP2006294814A JP 2006294814 A JP2006294814 A JP 2006294814A JP 2005112539 A JP2005112539 A JP 2005112539A JP 2005112539 A JP2005112539 A JP 2005112539A JP 2006294814 A JP2006294814 A JP 2006294814A
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conductive material
hole
filling
surface portion
filling operation
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Naoki Sakota
直樹 迫田
Rina Murayama
里奈 村山
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Sharp Corp
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Abstract

<P>PROBLEM TO BE SOLVED: To stably form a through-electrode with no variation in conductivity, and to provide a method for forming the through-electrode at a low cost. <P>SOLUTION: A conductive material of a volume smaller than that of a non-through hole is supplied to a surface on one side in the thickness direction of a substrate comprising the non-through hole, so that the opening of the non-through hole is closed. Thus, pressure in a space outside the non-through hole is higher than that in the non-through hole. Differential pressure between the inside and outside of the non-through hole allows the non-through hole to be packed with the conductive material. A packing operation is repeated until the non-through hole is filled with the conductive material. The other surface of the substrate is recessed until the conductive material is exposed to the outside to stably form the through-electrode with no variation in conductivity. <P>COPYRIGHT: (C)2007,JPO&INPIT

Description

本発明は、基板に貫通電極を形成する方法およびそれを用いる半導体装置の製造方法に関する。   The present invention relates to a method for forming a through electrode on a substrate and a method for manufacturing a semiconductor device using the same.

携帯電話などの電子機器の小型化に伴って、電子機器に積層型半導体モジュールが用いられる。積層型半導体モジュールは、半導体装置を積層して構成される。積層型半導体モジュールでは、積層される各半導体装置を電気的に接続する必要がある。各半導体装置を電気的に接続するために、たとえば各半導体装置を形成する半導体基板に、貫通電極を形成する。   With the miniaturization of electronic devices such as mobile phones, stacked semiconductor modules are used in electronic devices. A stacked semiconductor module is configured by stacking semiconductor devices. In the stacked semiconductor module, it is necessary to electrically connect the stacked semiconductor devices. In order to electrically connect each semiconductor device, a through electrode is formed on, for example, a semiconductor substrate on which each semiconductor device is formed.

図6は、貫通電極が形成された半導体基板61の断面図である。半導体基板61は、シリコンウェハから成り、半導体基板61の厚み方向に貫通する貫通孔が形成される。半導体基板61の表面部および貫通孔における内壁には、シリコン酸化膜から成る絶縁膜62が形成される。貫通電極63は、半導体基板61の厚み方向に貫通する貫通孔に導電材料を充填し、導電材料が硬化することによって形成される。導電材料は、導電性を有する金属と、反応性希釈剤とを含む。   FIG. 6 is a cross-sectional view of the semiconductor substrate 61 on which the through electrode is formed. The semiconductor substrate 61 is made of a silicon wafer, and a through-hole penetrating in the thickness direction of the semiconductor substrate 61 is formed. An insulating film 62 made of a silicon oxide film is formed on the surface portion of the semiconductor substrate 61 and the inner wall of the through hole. The through electrode 63 is formed by filling a through hole penetrating in the thickness direction of the semiconductor substrate 61 with a conductive material and curing the conductive material. The conductive material includes a metal having conductivity and a reactive diluent.

図7は、配線と貫通電極とが設けられた半導体基板61の断面図である。図6に示す貫通電極63が形成された半導体基板61の貫通電極63に、導電性を有するキャップ配線66を半導体基板61の表面部側から接するように設ける。このようなキャップ配線66と貫通電極63とが設けられた半導体基板61によって形成される半導体装置を積層して、積層型半導モジュールを構成することができる。   FIG. 7 is a cross-sectional view of the semiconductor substrate 61 provided with wirings and through electrodes. A conductive cap wiring 66 is provided in contact with the through electrode 63 of the semiconductor substrate 61 on which the through electrode 63 shown in FIG. A semiconductor device formed by the semiconductor substrate 61 provided with such a cap wiring 66 and the through electrode 63 can be stacked to form a stacked semiconductor module.

図8は、第1の従来の技術を用いて半導体基板61に貫通電極63を形成する方法を説明するための図である。第1の従来の技術では、半導体基板61の貫通電極63は次のような手順で形成される。まず、図8(a)に示すように、半導体基板61に厚み方向一方側の表面部で開口し、厚み方向他方側の表面部で塞がれる非貫通孔64を形成する。次に図8(b)に示すように、非貫通孔64における半導体基板61の内壁に絶縁膜62を形成した後、非貫通孔64に導電材料を充填し、導電材料を硬化させ埋め込み電極65を形成する。その後、半導体基板61の厚み方向他方側の表面部を機械研削することによって、図8(c)に示すように、埋め込み電極65を半導体基板61の厚み方向両方の表面部から半導体基板61の外方に露出させ、半導体基板61に貫通電極63を形成する。   FIG. 8 is a diagram for explaining a method of forming the through electrode 63 on the semiconductor substrate 61 using the first conventional technique. In the first conventional technique, the through electrode 63 of the semiconductor substrate 61 is formed by the following procedure. First, as shown in FIG. 8A, a non-through hole 64 is formed in the semiconductor substrate 61 so as to open at the surface portion on one side in the thickness direction and to be blocked by the surface portion on the other side in the thickness direction. Next, as shown in FIG. 8B, after the insulating film 62 is formed on the inner wall of the semiconductor substrate 61 in the non-through hole 64, the non-through hole 64 is filled with a conductive material, the conductive material is cured, and the embedded electrode 65 is filled. Form. Thereafter, the surface portion on the other side in the thickness direction of the semiconductor substrate 61 is mechanically ground, so that the embedded electrode 65 is removed from both surface portions in the thickness direction of the semiconductor substrate 61 as shown in FIG. A through electrode 63 is formed on the semiconductor substrate 61.

ここで、導電材料を非貫通孔64に充填するときに、第1の従来の技術では、真空雰囲気下で、半導体基板61の表面部に塗布した導電材料を、スキージによって非貫通孔64の開口部を塞ぐように、半導体基板61の表面部に印刷する。次に前記真空雰囲気を大気圧雰囲気に調整することによって、非貫通孔64内の圧力と非貫通孔64外方の圧力との間に差圧を生じさせ、非貫通孔64内外の差圧によって、導電材料を非貫通孔64に充填する(たとえば、特許文献1参照)。   Here, when filling the non-through hole 64 with the conductive material, in the first conventional technique, the conductive material applied to the surface portion of the semiconductor substrate 61 is opened in the non-through hole 64 by a squeegee in a vacuum atmosphere. Printing is performed on the surface portion of the semiconductor substrate 61 so as to close the portion. Next, by adjusting the vacuum atmosphere to an atmospheric pressure atmosphere, a differential pressure is generated between the pressure inside the non-through hole 64 and the pressure outside the non-through hole 64, and the differential pressure inside and outside the non-through hole 64 The non-through hole 64 is filled with a conductive material (see, for example, Patent Document 1).

また、第2の従来の技術として、第1の従来の技術と類似の技術を用いた貫通電極の形成方法がある。図9は、第2の従来の技術の導電材料の非貫通孔への充填操作を示すフローチャートである。ステップB1では、半導体基板の厚み方向の一方の表面部で開口し、厚み方向他方の面で塞がれる非貫通孔を形成する。ステップB2では、非貫通孔における半導体基板の内壁に絶縁膜を形成する。ステップB3では、半導体基板の表面部に、導電材料を塗布する。ステップB4では、半導体基板の表面部に塗布された導電材料を真空雰囲気下で半導体基板の表面部に印刷して、非貫通孔の開口部を導電材料によって塞ぐ。ステップB5では、前記真空雰囲気を大気圧雰囲気に戻すことによって、導電材料を非貫通孔内に充填する。ステップB6では、大気圧下でさらにスキージを用いて導電材料を表面部に印刷し、印刷のときに生じる印圧によって、非貫通孔に導電材料を充填する。ステップB7で充填を完了し、充填操作を終了する。非貫通孔に充填した導電材料を硬化させることによって、埋め込み電極を形成し、貫通電極を形成する(たとえば、特許文献2参照)。   As a second conventional technique, there is a through electrode forming method using a technique similar to the first conventional technique. FIG. 9 is a flowchart showing an operation of filling a non-through hole with a conductive material according to the second prior art. In step B1, a non-through hole is formed that opens at one surface portion in the thickness direction of the semiconductor substrate and is closed by the other surface in the thickness direction. In step B2, an insulating film is formed on the inner wall of the semiconductor substrate in the non-through hole. In step B3, a conductive material is applied to the surface portion of the semiconductor substrate. In step B4, the conductive material applied to the surface portion of the semiconductor substrate is printed on the surface portion of the semiconductor substrate in a vacuum atmosphere, and the openings of the non-through holes are closed with the conductive material. In Step B5, the conductive material is filled in the non-through holes by returning the vacuum atmosphere to an atmospheric pressure atmosphere. In step B6, the conductive material is further printed on the surface portion using a squeegee under atmospheric pressure, and the non-through hole is filled with the conductive material by the printing pressure generated during printing. In step B7, the filling is completed, and the filling operation is finished. By curing the conductive material filled in the non-through holes, the embedded electrode is formed and the through electrode is formed (for example, see Patent Document 2).

またさらに、第3の従来の技術として、第1および第2の従来の技術と同様に、差圧によって導電材料を非貫通孔内に充填した後に、さらに無電解めっき法によって液状の導電性物質を非貫通孔内に充填し、埋め込み電極を形成し、貫通電極を形成する方法がある(たとえば、特許文献3参照)。   Furthermore, as a third conventional technique, as in the first and second conventional techniques, after filling a non-through hole with a conductive material by differential pressure, a liquid conductive substance is further formed by electroless plating. There is a method of filling a non-through hole, forming a buried electrode, and forming a through electrode (for example, see Patent Document 3).

特開2001−127087号公報Japanese Patent Laid-Open No. 2001-127087 特開2003−257891号公報JP 2003-257891 A 特許第3397689号公報Japanese Patent No. 339789

第1および第2の従来の技術では、一度に非貫通孔の容積と同量またはそれ以上の量の導電材料を非貫通孔に充填する。したがって、非貫通孔内の底部まで導電材料が充填されないことがある。導電材料が非貫通孔の底部まで充填されずに、導電材料が硬化して、貫通電極が形成されると、貫通電極内に空隙が形成される。内部に空隙が形成された貫通電極は、均一に導電材料が充填されて形成された貫通電極と比較すると抵抗値が高くなる。このように導電性にばらつきがある貫通電極を用いて、半導体装置を電気的に接続して積層型半導体装置を形成すると、積層型半導体装置の歩留まりが低下するという問題がある。   In the first and second conventional techniques, the non-through hole is filled with an amount of the conductive material equal to or larger than the volume of the non-through hole at a time. Therefore, the conductive material may not be filled up to the bottom in the non-through hole. When the conductive material is not filled up to the bottom of the non-through hole and the conductive material is cured and the through electrode is formed, a void is formed in the through electrode. A through electrode having a void formed therein has a higher resistance value than a through electrode formed by uniformly filling a conductive material. When the stacked semiconductor device is formed by electrically connecting the semiconductor devices using the through electrodes having variations in conductivity as described above, there is a problem that the yield of the stacked semiconductor device is lowered.

さらに、第1および第2の従来の技術において、非貫通孔の容積と同量またはそれ以上の量の導電材料を、非貫通孔の底部まで充填するために、非貫通孔内外の差圧を大きくして、非貫通孔に充填するので、導電材料が半導体基板61の非貫通孔開口部周囲の表面部に広がり易くなる。半導体基板の表面部に導電材料が広がると、半導体基板61の表面部に導電材料に含まれる反応性希釈剤の滲みが生じる。反応性希釈剤の滲みが表面部に生じた半導体基板を用いて、半導体チップを積層すると半導体装置の歩留まりが低下するという問題がある。   Further, in the first and second conventional techniques, in order to fill the bottom of the non-through hole with the same amount of conductive material as the volume of the non-through hole, the differential pressure inside and outside the non-through hole is reduced. By enlarging and filling the non-through hole, the conductive material tends to spread on the surface of the semiconductor substrate 61 around the non-through hole opening. When the conductive material spreads on the surface portion of the semiconductor substrate, bleeding of the reactive diluent contained in the conductive material occurs on the surface portion of the semiconductor substrate 61. When semiconductor chips are stacked using a semiconductor substrate in which bleeding of the reactive diluent occurs on the surface portion, there is a problem that the yield of the semiconductor device is reduced.

また、特許文献3に記載の方法は、液状の導電性物質を無電解めっき法によって、貫通電極内に形成された空隙に液状の導電性物質を充填する方法であるが、新たな導電性を有する物質の使用を必要とするとともに、工程数の増加となり、コストが増加するという問題がある。   The method described in Patent Document 3 is a method in which a liquid conductive material is filled in a void formed in the through electrode by an electroless plating method. There is a problem that it is necessary to use a substance, and the number of steps increases, resulting in an increase in cost.

本発明の目的は、非貫通孔に空隙を形成することなく導電材料を充填し、導電材料の基板表面部での広がりを防止して、導電性にばらつきのない貫通電極を安定して形成するとともに、低コストで貫通電極を形成する方法を提供することである。   An object of the present invention is to fill a conductive material without forming a void in a non-through hole, prevent the conductive material from spreading on the surface of the substrate, and stably form a through electrode without variation in conductivity. At the same time, it is to provide a method for forming a through electrode at a low cost.

本発明は、基板に、厚み方向一方側の表面部で開口し、厚み方向他方側の表面部で塞がれる非貫通孔を形成する非貫通孔形成工程と、
非貫通孔における基板の内壁に絶縁膜を形成する絶縁膜形成工程と、
導電性を有し、非貫通孔の容積よりも小量の体積の導電材料を、基板の厚み方向一方側の表面部に供給して、非貫通孔の開口部を塞ぎ、非貫通孔外の空間の圧力を非貫通孔の圧力よりも高くし、非貫通孔内外の差圧によって、導電材料を非貫通孔に充填する充填操作を、非貫通孔が導電材料で満たされるまで繰返す導電材料充填工程と、
基板の他方の面を、導電材料が外方に露出するまで後退させる貫通孔形成工程とを含む貫通電極の形成方法である。
The present invention provides a non-through hole forming step for forming a non-through hole in the substrate, which is opened at the surface portion on one side in the thickness direction and closed at the surface portion on the other side in the thickness direction;
An insulating film forming step of forming an insulating film on the inner wall of the substrate in the non-through hole;
A conductive material having a volume smaller than the volume of the non-through hole is supplied to the surface portion on one side in the thickness direction of the substrate to close the opening of the non-through hole, Filling the conductive material by repeating the filling operation of filling the non-through hole with the conductive material by making the pressure in the space higher than the pressure of the non-through hole and filling the non-through hole with the differential pressure inside and outside the non-through hole. Process,
And a through hole forming step of retracting the other surface of the substrate until the conductive material is exposed to the outside.

本発明に従えば、基板に、厚み方向一方側の表面部で開口し、厚み方向他方側の表面部で塞がれる非貫通孔を形成し、非貫通孔における基板の内壁に絶縁膜を形成する。その後、導電性を有し、非貫通孔の容積よりも小量の体積の導電材料を、基板の厚み方向一方側の表面部に供給して、非貫通孔の開口部を塞ぎ、非貫通孔外の空間の圧力を非貫通孔の圧力よりも高くし、非貫通孔内外の差圧によって、導電材料を非貫通孔に充填する。このような充填操作を、非貫通孔が導電材料で満たされるまで繰返す。非貫通孔に導電材料が満たされると、基板の他方の面を、導電材料が外方に露出するまで後退させ貫通孔を形成して、基板に貫通電極を形成することができる。   According to the present invention, the substrate is formed with a non-through hole that opens at the surface portion on one side in the thickness direction and is blocked by the surface portion on the other side in the thickness direction, and an insulating film is formed on the inner wall of the substrate in the non-through hole To do. Thereafter, a conductive material having a volume smaller than the volume of the non-through hole is supplied to the surface portion on one side in the thickness direction of the substrate to close the opening of the non-through hole. The pressure in the outer space is made higher than the pressure in the non-through hole, and the non-through hole is filled with the conductive material by the differential pressure inside and outside the non-through hole. Such a filling operation is repeated until the non-through hole is filled with the conductive material. When the non-through hole is filled with the conductive material, the other surface of the substrate is retracted until the conductive material is exposed to the outside, and the through hole is formed to form the through electrode on the substrate.

このように、一度の充填操作で非貫通孔に充填する導電材料の体積は、非貫通孔の容積よりも小量なので、非貫通孔の底部まで、または前回の充填操作までに非貫通孔に充填した導電材料における非貫通孔の開口部側の表面部まで、確実に導電材料を充填することができる。したがって、導電材料が既に充填された非貫通孔において空隙が形成されることを防ぐことができるので、導電材料が硬化して形成される貫通電極に空隙が形成されることを防ぐことができる。また、導電材料の充填操作は複数回繰り返されるので、前回までの充填操作において、導電材料が既に充填された非貫通孔において、万一空隙が形成されていた場合であっても、前回よりも後の充填操作の非貫通孔内外の差圧によって、前回までに形成された前記空隙を縮小または消滅させることができる。したがって、均一な密度で非貫通孔に導電材料を充填することができるので、導電性にばらつきのない貫通電極を安定して形成することができる。   In this way, the volume of the conductive material that fills the non-through hole in one filling operation is smaller than the volume of the non-through hole, so the non-through hole reaches the bottom of the non-through hole or until the previous filling operation. The conductive material can be reliably filled up to the surface portion on the opening side of the non-through hole in the filled conductive material. Therefore, since it is possible to prevent a void from being formed in the non-through hole already filled with the conductive material, it is possible to prevent a void from being formed in the through electrode formed by curing the conductive material. In addition, since the filling operation of the conductive material is repeated a plurality of times, even if a gap is formed in the non-through hole filled with the conductive material in the previous filling operation, The gap formed so far can be reduced or eliminated by the differential pressure inside and outside the non-through hole in the subsequent filling operation. Therefore, since the non-through holes can be filled with a conductive material with a uniform density, it is possible to stably form through electrodes that have no variation in conductivity.

また本発明は、導電材料充填工程では、各充填操作における非貫通孔内外の差圧は、導電材料充填工程全体を通してみたとき、後の充填操作になるにつれて小さくなるように設定されることを特徴とする。   Further, according to the present invention, in the conductive material filling step, the differential pressure inside and outside the non-through hole in each filling operation is set so as to become smaller as the subsequent filling operation is performed as viewed throughout the conductive material filling step. And

本発明に従えば、導電材料充填工程全体を通してみたとき、後の充填操作になるにつれて、非貫通孔内外の差圧が小さくなるように設定されている。したがって、最初の充填操作における非貫通孔内外の差圧と同一の差圧または、その差圧より大きな差圧を各充填操作において調整する場合と比較して、差圧の調整時間を短縮することができ、また充填操作における作業が容易になる。   According to the present invention, the differential pressure inside and outside the non-through hole is set to be smaller as the subsequent filling operation is performed as viewed throughout the conductive material filling process. Therefore, the differential pressure adjustment time can be shortened compared to the case where the differential pressure equal to or greater than the differential pressure inside or outside the non-through hole in the first filling operation is adjusted in each filling operation. And the work in the filling operation becomes easy.

また本発明は、導電材料充填工程で実行される各充填操作のうち少なくとも1回の充填操作における非貫通孔内外の差圧は、前回の充填操作における非貫通孔内外の差圧よりも大きくなるように設定されることを特徴とする。   Further, according to the present invention, the differential pressure inside and outside the non-through hole in at least one filling operation among the filling operations executed in the conductive material filling step is larger than the differential pressure inside and outside the non-through hole in the previous filling operation. It is set as follows.

本発明に従えば、少なくとも1回は、充填操作における非貫通孔内外の差圧が、前回充填操作における非貫通孔内外の差圧よりも大きくなるように設定されている。このように前回の差圧よりも、大きな差圧によって新たに導電材料を充填する。したがって、前回の充填操作までに、導電材料が既に充填された非貫通孔内に、万一空隙が形成された場合であっても、形成された空隙を確実に消滅または縮小することができるので、非貫通孔に均一な密度で導電材料を充填することができ、導電性にばらつきのない貫通電極を安定して形成することができる。   According to the present invention, at least once, the differential pressure inside and outside the non-through hole in the filling operation is set to be larger than the differential pressure inside and outside the non-through hole in the previous filling operation. In this way, the conductive material is newly filled with a differential pressure larger than the previous differential pressure. Therefore, even if a void is formed in the non-through hole that is already filled with the conductive material by the previous filling operation, the formed void can be surely eliminated or reduced. The non-through holes can be filled with a conductive material with a uniform density, and a through electrode without variation in conductivity can be stably formed.

また本発明は、導電材料充填工程では、大気圧よりも小さい気圧に調整される雰囲気下で、基板の厚み方向一方側の表面部に導電材料を供給して非貫通孔の開口部を塞ぎ、非貫通孔外の気圧を大気圧に戻すことによって、導電材料を非貫通孔に充填することを特徴とする。   Further, in the conductive material filling step, the conductive material is supplied to the surface portion on one side in the thickness direction of the substrate in an atmosphere adjusted to a pressure lower than the atmospheric pressure in the conductive material filling step, and the opening of the non-through hole is blocked. The conductive material is filled in the non-through hole by returning the atmospheric pressure outside the non-through hole to atmospheric pressure.

本発明に従えば、非貫通孔外の気圧を大気圧に戻すことによって、導電材料を非貫通孔内に充填するので、充填操作において基板の表面部に導電材料を供給するときに、基板の周囲雰囲気の圧力を下げ、導電材料を非貫通孔に充填するときは基板の周囲雰囲気を大気圧に開放するだけでよい。したがって、基板表面部への導電材料の供給時および非貫通孔への充填時に基板の周囲雰囲気の圧力を調整する場合と比較して、導電材料を非貫通孔に充填する作業が容易になる。   According to the present invention, the conductive material is filled into the non-through hole by returning the atmospheric pressure outside the non-through hole to the atmospheric pressure, so when supplying the conductive material to the surface portion of the substrate in the filling operation, When lowering the pressure of the ambient atmosphere and filling the non-through holes with the conductive material, it is only necessary to open the ambient atmosphere of the substrate to atmospheric pressure. Therefore, the work of filling the non-through holes with the conductive material is facilitated as compared with the case where the pressure of the ambient atmosphere around the substrate is adjusted when the conductive material is supplied to the surface portion of the substrate and when the non-through holes are filled.

また本発明は、最初の充填操作では、2kPa以下の気圧に調整される雰囲気下で、基板の厚み方向一方側の表面部に導電材料を供給し、最後の充填操作では、7kPa以上の気圧に調整される雰囲気下で、基板の厚み方向一方側の表面部に導電材料を供給することを特徴とする。   In the first filling operation, the conductive material is supplied to the surface portion on one side in the thickness direction of the substrate in an atmosphere adjusted to a pressure of 2 kPa or less in the first filling operation, and the pressure is increased to 7 kPa or more in the last filling operation. A conductive material is supplied to a surface portion on one side in the thickness direction of the substrate in an adjusted atmosphere.

本発明に従えば、導電材料充填工程における最初の充填操作では、非貫通孔内の圧力は2kPa以下であって、非貫通孔外の空間の圧力は大気圧であるので、大気圧と非貫通孔内の圧力との差圧によって導電材料を非貫通孔の底部まで確実に充填することができる。したがって、非貫通孔の底部まで均一な密度で導電材料が充填されるので、導電性にばらつきのない貫通電極を安定して形成することができる。非貫通孔内の圧力が2kPaよりも大きい場合は、導電材料が充填された非貫通孔に空隙が形成される。   According to the present invention, in the first filling operation in the conductive material filling process, the pressure in the non-through hole is 2 kPa or less and the pressure in the space outside the non-through hole is atmospheric pressure. The conductive material can be reliably filled up to the bottom of the non-through hole by the pressure difference from the pressure in the hole. Therefore, since the conductive material is filled with a uniform density up to the bottom of the non-through hole, it is possible to stably form a through electrode without variation in conductivity. When the pressure in the non-through hole is larger than 2 kPa, a void is formed in the non-through hole filled with the conductive material.

また、最終回の充填操作では、非貫通孔内の圧力は7kPa以上であって、非貫通孔外の圧力が大気圧なので、導電材料を非貫通孔に充填するときに、基板の表面部付近に広がることを防ぐことができる。非貫通孔内の圧力が7kPaより小さい場合は、導電材料を非貫通孔に充填するときに、導電材料が半導体基板1の表面部に広がる。   In the final filling operation, the pressure inside the non-through hole is 7 kPa or more, and the pressure outside the non-through hole is atmospheric pressure, so when filling the non-through hole with the conductive material, Can be prevented from spreading. When the pressure in the non-through hole is smaller than 7 kPa, the conductive material spreads on the surface portion of the semiconductor substrate 1 when the non-through hole is filled with the conductive material.

また本発明は、導電材料充填工程では、各充填操作における基板の厚み方向一方側の表面部への導電材料量の供給量が、導電材料充填工程全体を通してみたとき、前の充填操作になるにつれて小さくなるように設定されることを特徴とする。   Further, according to the present invention, in the conductive material filling process, as the supply amount of the conductive material to the surface portion on one side in the thickness direction of the substrate in each filling operation becomes the previous filling operation when viewed through the entire conductive material filling process. It is set so that it may become small.

導電材料充填工程では、各充填操作における基板の厚み方向一方側の表面部への導電材料量の供給量が、導電材料充填工程全体を通してみたとき、前の充填操作になるにつれて小さくなるように設定される。   In the conductive material filling process, the supply amount of the conductive material to the surface portion on one side in the thickness direction of the substrate in each filling operation is set so as to become smaller as it becomes the previous filling operation when viewed through the entire conductive material filling process. Is done.

本発明に従えば、導電材料未充填の非貫通孔内の容積が導電材料充填工程全体のうち最も大きい最初の充填操作のときに、基板の表面部の導電材料の供給量を最も小さくして、非貫通孔に導電材料を充填する。したがって、確実に非貫通孔の底部まで導電材料を充填することができるので、均一な密度で導電材料を非貫通孔に充填することができる。したがって、導電性にばらつきのない貫通電極を安定して形成することができる。   According to the present invention, during the first filling operation in which the volume in the non-through holes not filled with the conductive material is the largest in the entire conductive material filling process, the supply amount of the conductive material on the surface portion of the substrate is minimized. The non-through hole is filled with a conductive material. Therefore, since the conductive material can be reliably filled to the bottom of the non-through hole, the conductive material can be filled into the non-through hole with a uniform density. Therefore, the through electrode having no variation in conductivity can be stably formed.

また本発明は、導電材料充填工程では、孔板印刷を用いて基板の厚み方向一方側の表面部に導電材料を供給することを特徴とする。   In the conductive material filling step, the conductive material is supplied to the surface portion on one side in the thickness direction of the substrate using hole plate printing.

本発明に従えば、孔板印刷法を用いて導電材料を供給するので、低コストで導電材料を基板の表面部に供給することができる。したがって、貫通電極を基板に形成するためのコストを削減することができる。   According to the present invention, since the conductive material is supplied using the hole plate printing method, the conductive material can be supplied to the surface portion of the substrate at a low cost. Therefore, the cost for forming the through electrode on the substrate can be reduced.

また本発明は、前記貫通電極の形成方法を用いる半導体装置の製造方法である。
本発明に従えば、非貫通孔に均一な密度で導電材料も充填することによって、半導体基板1に貫通電極を形成し、その半導体基板1を用いて半導体装置を製造するので、製造された半導体装置の歩留まりを向上させることができる。
Moreover, this invention is a manufacturing method of the semiconductor device using the formation method of the said penetration electrode.
According to the present invention, since the through electrode is formed in the semiconductor substrate 1 by filling the non-through holes with a conductive material at a uniform density, and the semiconductor device is manufactured using the semiconductor substrate 1, the manufactured semiconductor The yield of the apparatus can be improved.

本発明によれば、均一な密度で非貫通孔に導電材料を充填することができるので、導電性にばらつきのない貫通電極を安定して形成することができる。   According to the present invention, since a non-through hole can be filled with a conductive material with a uniform density, it is possible to stably form a through electrode without variation in conductivity.

また本発明によれば、電極材料充填工程に要する時間を短縮することができ、また作業が容易になる。   Moreover, according to this invention, the time which an electrode material filling process requires can be shortened, and operation | work becomes easy.

また本発明によれば、導電材料内の空隙を消滅または縮小することができるので、非貫通孔に均一な密度で導電材料を充填することができ、導電性にばらつきのない貫通電極を安定して形成することができる。   Further, according to the present invention, voids in the conductive material can be eliminated or reduced, so that the non-through holes can be filled with the conductive material at a uniform density, and the through electrode without variation in conductivity can be stabilized. Can be formed.

また本発明によれば、基板表面部への導電材料の供給時および非貫通孔への充填時に基板の周囲雰囲気の圧力を調整する場合と比較して、導電材料を非貫通孔内に充填する作業が容易になる。   Further, according to the present invention, the conductive material is filled in the non-through hole as compared with the case where the pressure of the ambient atmosphere of the substrate is adjusted when the conductive material is supplied to the surface portion of the substrate and when the non-through hole is filled. Work becomes easy.

また本発明によれば、導電性にばらつきのない貫通電極を安定して形成することができる。また、導電材料が非貫通孔内に充填するときに、基板の表面部付近に広がることを防ぐことができる。   Further, according to the present invention, it is possible to stably form a through electrode having no variation in conductivity. Further, when the conductive material fills the non-through hole, it can be prevented from spreading near the surface portion of the substrate.

また本発明によれば、非貫通孔に均一な密度で導電材料を充填することができるので、導電性にばらつきのない貫通電極を安定して形成することができる。   In addition, according to the present invention, since the non-through holes can be filled with the conductive material with a uniform density, it is possible to stably form the through electrodes without variation in conductivity.

また本発明によれば、低コストで導電材料を基板の表面部に供給することができる。したがって、貫通電極を基板に形成するためのコストを削減することができる。   Moreover, according to this invention, a conductive material can be supplied to the surface part of a board | substrate at low cost. Therefore, the cost for forming the through electrode on the substrate can be reduced.

また本発明によれば、非貫通孔に均一な密度で導電材料を充填することによって、半導体基板1に貫通電極を形成し、その半導体基板1を用いて半導体装置を製造するので、製造された半導体装置の歩留まりを向上させることができる。   Further, according to the present invention, the through electrode is formed in the semiconductor substrate 1 by filling the non-through hole with the conductive material with a uniform density, and the semiconductor device is manufactured using the semiconductor substrate 1. The yield of semiconductor devices can be improved.

図1は、本発明の実施の一形態である貫通電極の形成方法を示すフローチャートである。図2は、本発明の実施の一形態である貫通電極の形成方法における充填工程の概要を示す図である。図3は、本発明の実施の一形態である貫通電極の形成方法における充填工程を詳細に示す図である。図4は、本発明の実施の一形態である貫通電極の形成方法における充填工程のチャンバ内の雰囲気の圧力の推移を示すグラフである。図2においては、図面が煩雑になるのを防ぐため、レジストマスクおよび表面電極は省略する。   FIG. 1 is a flowchart showing a through electrode forming method according to an embodiment of the present invention. FIG. 2 is a diagram showing an outline of a filling step in the through electrode forming method according to the embodiment of the present invention. FIG. 3 is a diagram showing in detail a filling step in the through electrode forming method according to the embodiment of the present invention. FIG. 4 is a graph showing the transition of the pressure of the atmosphere in the chamber in the filling step in the through electrode forming method according to the embodiment of the present invention. In FIG. 2, the resist mask and the surface electrode are omitted in order to prevent the drawing from becoming complicated.

半導体装置は、半導体基板1と、半導体基板1の厚み方向一方側の表面部(以下「主面部」という場合がある。)に形成される回路層とを含む。半導体基板1は、たとえばシリコン(Si)から成る直径8インチのウェハを用いて形成される。回路層は、たとえば素子と、表面電極12とを含んで形成される。半導体装置を積層して積層型半導体装置を形成する場合、たとえば積層される各半導体装置を電気的に接続する貫通電極が使用される。貫通電極は、銀、金、銅、錫などを含んで形成される電極であって、半導体基板1の厚み方向に貫通するように、半導体装置に設けられる。以下に本実施の形態における貫通電極の形成方法を説明する。   The semiconductor device includes a semiconductor substrate 1 and a circuit layer formed on a surface portion on one side in the thickness direction of the semiconductor substrate 1 (hereinafter sometimes referred to as “main surface portion”). The semiconductor substrate 1 is formed using, for example, a wafer having a diameter of 8 inches made of silicon (Si). The circuit layer is formed including, for example, an element and the surface electrode 12. When a semiconductor device is stacked to form a stacked semiconductor device, for example, a through electrode that electrically connects the stacked semiconductor devices is used. The through electrode is an electrode formed including silver, gold, copper, tin, and the like, and is provided in the semiconductor device so as to penetrate in the thickness direction of the semiconductor substrate 1. Hereinafter, a method for forming the through electrode according to the present embodiment will be described.

本実施の形態における、貫通電極の形成方法は、非貫通孔形成工程と、絶縁膜形成工程と、導電材料充填工程と、貫通孔形成工程とを含む。非貫通孔形成は、たとえば非貫通孔形成作業を行う。絶縁膜形成工程は、たとえば絶縁膜形成作業を行う。導電材料充填工程は、たとえば充填作業を行う。貫通孔形成工程は、たとえば貫通孔形成作業を行う。本実施の形態では、導電材料充填工程における非貫通孔2への導電材料6の充填は、たとえば厚み方向に貫通する孔10が形成された印刷マスク4とスキージ5とを有する印刷機を用いる孔版印刷法によって行う。   The through electrode forming method in the present embodiment includes a non-through hole forming step, an insulating film forming step, a conductive material filling step, and a through hole forming step. In the non-through hole formation, for example, a non-through hole forming operation is performed. In the insulating film forming step, for example, an insulating film forming operation is performed. In the conductive material filling step, for example, a filling operation is performed. In the through hole forming step, for example, a through hole forming operation is performed. In the present embodiment, the conductive material 6 is filled into the non-through holes 2 in the conductive material filling step, for example, a stencil using a printing machine having a printing mask 4 and a squeegee 5 in which holes 10 penetrating in the thickness direction are formed. Perform by printing method.

本実施の形態では、まず半導体基板1に図示しない回路層を形成し、貫通電極を形成するための準備が完了すると、ステップA1に進み貫通電極の形成を開始する。   In the present embodiment, a circuit layer (not shown) is first formed on the semiconductor substrate 1, and when preparation for forming the through electrode is completed, the process proceeds to step A1 and the formation of the through electrode is started.

ステップA1では、半導体基板1に非貫通孔2を形成する非貫通孔形成作業を行う。ステップA1では、半導体基板1の主面部7で開口し、主面部7とは反対側の表面部である裏面部8で塞がれる非貫通孔2を形成する。非貫通孔2は、たとえばDRIE(Deep-
Reactive Ion Etching)法によって形成される。非貫通孔2は、たとえばレジストマスク11の開口位置である半導体基板1の主面部7の表面電極12の内方面で開口するように形成される。本実施の形態で、形成される非貫通孔2の寸法は、たとえば孔径Dが75μmであって、主面部7から非貫通孔2の底面部13までの深さLは、150μmである。非貫通孔2の形状は、たとえば略円柱状である。本発明において略円柱状は、円柱形状を含む。半導体基板1にこのような非貫通孔2を形成するとステップA2に進む。
In step A1, a non-through hole forming operation for forming the non-through hole 2 in the semiconductor substrate 1 is performed. In step A <b> 1, a non-through hole 2 is formed that opens at the main surface portion 7 of the semiconductor substrate 1 and is blocked by the back surface portion 8 that is the surface portion opposite to the main surface portion 7. The non-through hole 2 is, for example, DRIE (Deep-
Reactive Ion Etching) method. The non-through hole 2 is formed, for example, so as to open on the inner surface of the surface electrode 12 of the main surface portion 7 of the semiconductor substrate 1 which is the opening position of the resist mask 11. In the present embodiment, the non-through hole 2 to be formed has, for example, a hole diameter D of 75 μm, and a depth L from the main surface portion 7 to the bottom surface portion 13 of the non-through hole 2 is 150 μm. The shape of the non-through hole 2 is, for example, a substantially cylindrical shape. In the present invention, the substantially cylindrical shape includes a cylindrical shape. When such a non-through hole 2 is formed in the semiconductor substrate 1, the process proceeds to step A2.

ステップA2では、非貫通孔2における半導体基板1の内壁部を覆うように絶縁膜3を形成する、絶縁膜形成作業を行う。ステップA2では、絶縁膜3の形成は、たとえばCVD(Chemical Vapor Deposition)法、孔版印刷法またはスプレー法などによって、シリコン酸化膜またはシリコン窒化膜などの絶縁膜3を非貫通孔2における半導体基板1の内壁部の全面にわたって形成する。絶縁膜3を形成するとステップA3に進む。   In step A2, an insulating film forming operation is performed to form the insulating film 3 so as to cover the inner wall portion of the semiconductor substrate 1 in the non-through hole 2. In step A2, the insulating film 3 is formed by, for example, CVD (Chemical Vapor Deposition) method, stencil printing method, spray method or the like, and insulating film 3 such as silicon oxide film or silicon nitride film is formed in semiconductor substrate 1 in non-through hole 2. It is formed over the entire inner wall portion. When the insulating film 3 is formed, the process proceeds to Step A3.

ステップA3では、導電材料6を印刷マスク4の表面に塗布する導電材料塗布作業を行う。ステップA3では、圧力調整可能なチャンバ内の、印刷機のステージに、半導体基板1を裏面部8がステージに臨むように載置して、ステージに吸引固定する。さらに非貫通孔2の開口部9の中心と、印刷マスク4の孔10の中心とが略一致するように位置合わせする。本実施の形態では、たとえば印刷マスク4として、0.05mmの厚さを有するSUS版に0.01mmの厚さでニッケルめっきを施した孔版を用いる。印刷マスク4の半導体基板1の主面部7に臨む面とは反対側の表面に導電材料6を塗布する。本実施の形態では、導電材料6は、たとえば反応性希釈剤と銀とを含む、粘度100pa・secの導電ペーストを用いる。導電材料6を印刷マスク4の表面で脱泡すると、ステップA4に進む。   In step A3, a conductive material application operation for applying the conductive material 6 to the surface of the print mask 4 is performed. In step A3, the semiconductor substrate 1 is placed on the stage of the printing machine in the pressure-adjustable chamber so that the back surface portion 8 faces the stage, and is sucked and fixed to the stage. Further, alignment is performed so that the center of the opening 9 of the non-through hole 2 and the center of the hole 10 of the printing mask 4 substantially coincide. In the present embodiment, for example, a stencil obtained by applying nickel plating to a SUS plate having a thickness of 0.05 mm to a thickness of 0.01 mm is used as the printing mask 4. A conductive material 6 is applied to the surface of the printing mask 4 opposite to the surface facing the main surface portion 7 of the semiconductor substrate 1. In the present embodiment, the conductive material 6 is a conductive paste having a viscosity of 100 pa · sec containing, for example, a reactive diluent and silver. When the conductive material 6 is defoamed on the surface of the printing mask 4, the process proceeds to step A4.

ステップA4では、チャンバ内の雰囲気を予め定める第1作業圧力に調整する第1作業圧力調整作業を行う。チャンバ内の雰囲気を第1作業圧力に調整すると、ステップA5に進む。   In step A4, a first working pressure adjustment operation is performed to adjust the atmosphere in the chamber to a predetermined first working pressure. When the atmosphere in the chamber is adjusted to the first working pressure, the process proceeds to step A5.

ステップA5では、導電材料6を半導体基板1の主面部7に孔版印刷法によって供給する印刷作業を行う。ステップA5では、第1作業圧力に調整されたチャンバ内で孔版印刷法によって、非貫通孔2の容積よりも小さい体積の導電材料6を半導体基板1の主面部7に供給する。本実施の形態では、スキージ5を印刷マスク4の表面で、摺接移動させることによって、図2(a)に示すように、導電材料6を印刷マスク4の孔10に移動させ導電材料6を半導体基板1の主面部7に供給する。このとき、印刷マスク4の孔10の中心と非貫通孔2の開口部9の中心は、位置合わせされているので、図3(a)に示すように、開口部9の周縁に設けられている表面電極12とレジストマスク11に接触するように、半導体基板1の主面部7に供給される。また半導体基板1の主面部7に供給された導電材料6は、表面張力によって、非貫通孔2の開口部9を塞ぐ。印刷作業が終了するとステップA6に進む。   In step A5, a printing operation for supplying the conductive material 6 to the main surface portion 7 of the semiconductor substrate 1 by a stencil printing method is performed. In step A5, the conductive material 6 having a volume smaller than the volume of the non-through holes 2 is supplied to the main surface portion 7 of the semiconductor substrate 1 by stencil printing in a chamber adjusted to the first working pressure. In the present embodiment, the squeegee 5 is slidably moved on the surface of the print mask 4 to move the conductive material 6 to the hole 10 of the print mask 4 as shown in FIG. Supply to the main surface portion 7 of the semiconductor substrate 1. At this time, since the center of the hole 10 of the printing mask 4 and the center of the opening 9 of the non-through hole 2 are aligned, as shown in FIG. The main surface portion 7 of the semiconductor substrate 1 is supplied so as to be in contact with the surface electrode 12 and the resist mask 11. Further, the conductive material 6 supplied to the main surface portion 7 of the semiconductor substrate 1 closes the opening 9 of the non-through hole 2 by surface tension. When the printing operation is completed, the process proceeds to step A6.

ステップA6では、チャンバ内の雰囲気を前記ステップA4で調整した第1作業圧力よりも大きい圧力である第2作業圧力に調整する第2作業圧力調整作業を行う。ステップA6で、チャンバ内の雰囲気を第1作業圧力よりも大きい圧力である第2作業圧力に調整すると、非貫通孔2は開口部9が導電材料6で塞がれているので、非貫通孔2内外に差圧が生じる。非貫通孔2内は、第2作業圧力よりも小さい圧力なので、図2(b)に示すように導電材料6が非貫通孔2内外の差圧によって、非貫通孔2に充填される。ステップA6で、チャンバ内の雰囲気を第2作業圧力に調整し、非貫通孔2内にステップA5で半導体基板1の主面部7に供給した導電材料6を非貫通孔2に充填するとステップA7に進む。   In step A6, a second working pressure adjustment operation is performed in which the atmosphere in the chamber is adjusted to a second working pressure that is higher than the first working pressure adjusted in step A4. In step A6, when the atmosphere in the chamber is adjusted to a second working pressure that is higher than the first working pressure, the non-through hole 2 is closed by the conductive material 6, so that the non-through hole 2 Differential pressure occurs inside and outside. Since the pressure inside the non-through hole 2 is lower than the second working pressure, the conductive material 6 is filled into the non-through hole 2 by the differential pressure inside and outside the non-through hole 2 as shown in FIG. In step A6, the atmosphere in the chamber is adjusted to the second working pressure, and when the conductive material 6 supplied to the main surface portion 7 of the semiconductor substrate 1 in step A5 is filled in the non-through hole 2 in step A5, the process proceeds to step A7. move on.

ステップA7では、ステップA4〜A6までの作業である充填操作が予め定める回数、たとえばn(nは2以上の整数)回繰り返されたか否かを判断する。図2(c)で示すように、n回目のステップA5によって、半導体基板1の主面部7に導電材料6が供給され、n回目の充填操作が完了して図2(d)に示すように、非貫通孔2が導電材料6で満たされている場合は、ステップA8に進む。また、充填操作がn回未満である場合は、充填操作を繰り返す。複数回充填を行って非貫通孔2に導電材料を満たすまでの作業を、充填作業と称する場合がある。   In step A7, it is determined whether or not the filling operation, which is the operation from steps A4 to A6, has been repeated a predetermined number of times, for example, n (n is an integer of 2 or more). As shown in FIG. 2C, the conductive material 6 is supplied to the main surface portion 7 of the semiconductor substrate 1 by the n-th step A5, and the n-th filling operation is completed, as shown in FIG. If the non-through hole 2 is filled with the conductive material 6, the process proceeds to step A8. If the filling operation is less than n times, the filling operation is repeated. An operation from filling a plurality of times to filling the non-through hole 2 with a conductive material may be referred to as a filling operation.

充填作業における各充填操作の第1作業圧力と第2作業圧力とは、最初に充填操作を開始してから、予め定める回数充填操作を行って、非貫通孔2内に導電材料6を満たすまでの充填作業を通してみたとき、後の充填操作になるにつれて、第1作業圧力と、第2作業圧力との圧力差を小さくなるように調整する。たとえば、図4(a)に示すように、充填操作の繰り返しの回数をn(nは2以上の整数)回としたとき、2回目の充填操作と最後の充填操作であるn回目の充填操作との間のi回目の充填操作における第2作業圧力Pi[2]と第1作業圧力Pi[1]との圧力差ΔPiと、i回目より後の充填操作であって、n回目以前の充填操作であるj回目の充填操作における第2作業圧力Pj[2]と第1作業圧力Pj[1]との圧力差ΔPjと比較したとき、ΔPjがΔPiよりも小さくなるように調整する。また、2回目の充填操作と最後の充填操作であるn回目の充填操作との間の任意のs回目の充填操作における第2作業圧力Ps[2]と第1作業圧力Ps[1]との圧力差ΔPsと、s−1回目の第2作業圧力P(s−1)[2]と第1の作業圧力P(s−1)[1]との圧力差ΔP(s−1)と比較したとき、ΔPsがΔP(s−1)以下となるように調整する。   The first working pressure and the second working pressure of each filling operation in the filling work are from the start of the filling operation until the conductive material 6 is filled in the non-through hole 2 by performing a predetermined number of filling operations. When the filling operation is performed, the pressure difference between the first working pressure and the second working pressure is adjusted to be smaller as the subsequent filling operation is started. For example, as shown in FIG. 4A, when the number of repetitions of the filling operation is n (n is an integer of 2 or more), the second filling operation and the nth filling operation which is the last filling operation. The pressure difference ΔPi between the second working pressure Pi [2] and the first working pressure Pi [1] in the i-th filling operation between and the filling operation after the i-th and before the n-th filling operation When compared with the pressure difference ΔPj between the second working pressure Pj [2] and the first working pressure Pj [1] in the j-th filling operation, which is the operation, ΔPj is adjusted to be smaller than ΔPi. Further, the second working pressure Ps [2] and the first working pressure Ps [1] in an arbitrary s-th filling operation between the second filling operation and the n-th filling operation which is the last filling operation. The pressure difference ΔPs is compared with the pressure difference ΔP (s−1) between the second working pressure P (s−1) [2] and the first working pressure P (s−1) [1] of the s−1th time. In this case, ΔPs is adjusted to be equal to or less than ΔP (s−1).

また、最初の充填操作におけるステップA5での印刷作業によって、半導体基板1の表面部8に供給される導電材料6の体積V1は、充填作業全体を通して半導体基板1に供給される導電材料の全体積Vmを充填作業の回数nで除した体積Vm/nよりも小さくなるように調整する。半導体基板1の主面部7に供給される導電材料の供給量の調整は、たとえば印刷マスク4の表面で摺接移動するスキージ5の移動速度によって調整される。導電材料6は粘性を有しているので、スキージ5の移動速度が大きいと、スキージ5の移動速度が小さい場合と比較して、印刷マスク4の孔10に移動する導電材料の体積を小さくすることができ、半導体基板1の表面部に供給される導電材料6の体積が小さくなる。また、スキージ5の移動速度が小さい場合は、スキージ5の移動速度が大きい場合と比較して、半導体基板1の主面部7に供給される導電材料6の体積が大きくなる。   Further, the volume V1 of the conductive material 6 supplied to the surface portion 8 of the semiconductor substrate 1 by the printing operation in step A5 in the first filling operation is the total volume of the conductive material supplied to the semiconductor substrate 1 throughout the filling operation. The volume is adjusted to be smaller than the volume Vm / n obtained by dividing Vm by the number of filling operations n. The supply amount of the conductive material supplied to the main surface portion 7 of the semiconductor substrate 1 is adjusted, for example, by the moving speed of the squeegee 5 that slides on the surface of the print mask 4. Since the conductive material 6 has viscosity, when the moving speed of the squeegee 5 is high, the volume of the conductive material that moves to the hole 10 of the printing mask 4 is reduced as compared with the case where the moving speed of the squeegee 5 is low. The volume of the conductive material 6 supplied to the surface portion of the semiconductor substrate 1 can be reduced. Further, when the moving speed of the squeegee 5 is low, the volume of the conductive material 6 supplied to the main surface portion 7 of the semiconductor substrate 1 is larger than when the moving speed of the squeegee 5 is high.

本実施の形態では、充填操作の繰り返しの回数を3回とする。各充填操作における第1作業圧力は、たとえば最初の充填操作の第1作業圧力を2kPa以下に調整する。また、たとえば2回目充填操作の第1作業圧力を2kPaよりも大きく10kPa未満に調整する。また、たとえば最後の充填操作の第1作業圧力を7kPa以上10kPa未満に調整する。本実施の形態では、図4(b)に示すように、各充填操作における第1作業圧力は、最初の充填操作では、0.5kPaに調整し、2回目の充填操作では5kPaに調整し、最後の充填操作では7kPaに調整する。また、第2作業圧力は、チャンバ内の雰囲気を大気圧に調整する。すなわち、本実施の形態では、充填作業におけるステップA6での第2作業圧力調整作業は、第1作業圧力を大気圧に開放する。   In the present embodiment, the filling operation is repeated three times. For example, the first working pressure in each filling operation is adjusted to 2 kPa or less. Further, for example, the first working pressure of the second filling operation is adjusted to be larger than 2 kPa and smaller than 10 kPa. For example, the first working pressure of the last filling operation is adjusted to 7 kPa or more and less than 10 kPa. In the present embodiment, as shown in FIG. 4B, the first working pressure in each filling operation is adjusted to 0.5 kPa in the first filling operation, 5 kPa in the second filling operation, In the last filling operation, the pressure is adjusted to 7 kPa. The second working pressure adjusts the atmosphere in the chamber to atmospheric pressure. That is, in the present embodiment, in the second work pressure adjustment work in step A6 in the filling work, the first work pressure is released to the atmospheric pressure.

また、本実施の形態では、ステップA5における印刷作業でのスキージ5の移動速度をたとえば、20mm/secと、30mm/secとに設定する。スキージ5の移動速度を30mm/secに設定すると、非貫通孔2に充填される導電材料6の体積は、印刷マスク4の孔10の容積の半分の体積となる。本実施の形態では、スキージ5の移動速度を、最初の充填操作では30mm/secに設定し、導電材料6を半導体基板1の主面部7に供給する。次にステップA6における非貫通孔2内外の差圧によって図3(b)に示すように導電材料6を非貫通孔2に充填する。2回目の充填操作では、ステップA5におけるスキージ5の移動速度を20mm/secに設定し、図3(c)に示すように最初の充填操作で供給される導電材料6よりも大きい体積の導電材料6を半導体基板1の主面部7に供給する。次にステップA6における非貫通孔2内外の差圧によって図3(d)に示すように導電材料6を非貫通孔2に充填する。最後の充填操作である3回目の充填操作では、ステップA5におけるスキージ5の移動速度を30mm/secに設定し、最初の充填操作で供給される導電材料6と同じ体積の導電材料6を半導体基板1の主面部7に供給する。次にステップA6における非貫通孔2内外の差圧によって図3(e)に示すように、導電材料6を非貫通孔2に充填する。   In the present embodiment, the moving speed of the squeegee 5 in the printing operation in step A5 is set to 20 mm / sec and 30 mm / sec, for example. When the moving speed of the squeegee 5 is set to 30 mm / sec, the volume of the conductive material 6 filled in the non-through holes 2 is half the volume of the holes 10 of the printing mask 4. In the present embodiment, the moving speed of the squeegee 5 is set to 30 mm / sec in the first filling operation, and the conductive material 6 is supplied to the main surface portion 7 of the semiconductor substrate 1. Next, the conductive material 6 is filled into the non-through hole 2 as shown in FIG. 3B by the pressure difference inside and outside the non-through hole 2 at step A6. In the second filling operation, the moving speed of the squeegee 5 in step A5 is set to 20 mm / sec, and the conductive material having a volume larger than that of the conductive material 6 supplied in the first filling operation as shown in FIG. 6 is supplied to the main surface portion 7 of the semiconductor substrate 1. Next, the conductive material 6 is filled in the non-through hole 2 as shown in FIG. 3 (d) by the differential pressure inside and outside the non-through hole 2 in step A6. In the third filling operation, which is the last filling operation, the moving speed of the squeegee 5 in step A5 is set to 30 mm / sec, and the conductive material 6 having the same volume as the conductive material 6 supplied in the first filling operation is used as the semiconductor substrate. 1 to the main surface portion 7. Next, as shown in FIG. 3E, the conductive material 6 is filled into the non-through hole 2 by the differential pressure inside and outside the non-through hole 2 in step A6.

ステップA8では、導電材料6で非貫通孔2が満たされて、非貫通孔2への導電材料6の充填作業が完了する。充填作業が完了し、導電材料6を硬化させるとステップA9に進む。   In step A8, the non-through hole 2 is filled with the conductive material 6, and the filling operation of the conductive material 6 into the non-through hole 2 is completed. When the filling operation is completed and the conductive material 6 is cured, the process proceeds to Step A9.

ステップA9では、キャップ金属を形成するキャップ金属形成作業を行う。ステップA9では、半導体基板1の主面部7に形成されているレジストマスク11を剥離し、開口部9側の導電材料6の露出面に金属を付着させ、図示しないキャップ金属層を形成する。キャップ金属層の形成は、たとえばスパッタ法によってアルミなどの金属を付着させることによって行う。さらにレジストを形成しウェットエッチング法によって必要箇所以外の金属層を除去し、キャップ金属層を形成する。キャップ金属層が形成されるとステップA10に進む。   In step A9, a cap metal forming operation for forming a cap metal is performed. In step A9, the resist mask 11 formed on the main surface portion 7 of the semiconductor substrate 1 is peeled off, and a metal is attached to the exposed surface of the conductive material 6 on the opening 9 side to form a cap metal layer (not shown). The cap metal layer is formed by depositing a metal such as aluminum by sputtering, for example. Further, a resist is formed, and metal layers other than the necessary portions are removed by wet etching to form a cap metal layer. When the cap metal layer is formed, the process proceeds to Step A10.

ステップA10では、半導体基板1の裏面部8を研削し、導電材料6を半導体基板1の裏面部8から露出させる貫通孔形成作業を行う。ステップA10では、たとえば機械研削などによって、半導体基板1の裏面部8を主面部7側に後退させ導電材料6を裏面部8側から半導体基板1の外方に露出させる。本実施の形態では、非貫通孔2の深さDが150μmなので、たとえば半導体基板1の厚みが100μmになるように研削する。研削が終了するとステップA11に進む。   In step A <b> 10, a through hole forming operation for grinding the back surface portion 8 of the semiconductor substrate 1 and exposing the conductive material 6 from the back surface portion 8 of the semiconductor substrate 1 is performed. In step A10, the back surface portion 8 of the semiconductor substrate 1 is retracted to the main surface portion 7 side by, for example, mechanical grinding, and the conductive material 6 is exposed to the outside of the semiconductor substrate 1 from the back surface portion 8 side. In the present embodiment, since the depth D of the non-through hole 2 is 150 μm, the semiconductor substrate 1 is ground so as to have a thickness of 100 μm, for example. When the grinding is completed, the process proceeds to Step A11.

ステップA11では、裏面部8を加工する裏面部加工作業を行う。ステップA11では、導電材料6が主面部7および裏面部8側から露出した半導体基板1の裏面部8に裏面絶縁膜を形成し、裏面配線、裏面バンプを形成する裏面加工作業を施す。ステップA11が終了すると貫通電極が半導体基板1に形成された半導体装置を形成することができる。   In step A11, a back surface processing operation for processing the back surface portion 8 is performed. In Step A11, a back surface processing operation is performed to form a back surface insulating film on the back surface portion 8 of the semiconductor substrate 1 where the conductive material 6 is exposed from the main surface portion 7 and the back surface portion 8 side, and to form back surface wiring and back surface bumps. When step A11 is completed, a semiconductor device in which the through electrode is formed on the semiconductor substrate 1 can be formed.

表1は、本件発明者が本実施の形態の貫通電極の形成方法における最初の充填操作について、ステップA4におけるチャンバ内の第1作業圧力を変化させて、ステップA6で導電材料6充填後に非貫通孔2における導電材料6の充填部分の空隙(以下「ボイド」という場合がある)の形成の有無を観察した結果である。なお、前述したようにステップA5におけるスキージ5の移動速度は、30mm/secに設定し、ステップA6ではチャンバ内の雰囲気を大気圧に開放した。   Table 1 shows that the inventor changed the first working pressure in the chamber in step A4 for the first filling operation in the method for forming the through electrode of the present embodiment, and did not penetrate after filling the conductive material 6 in step A6. This is a result of observing the presence or absence of the formation of voids (hereinafter sometimes referred to as “voids”) in the filled portions of the conductive material 6 in the holes 2. As described above, the moving speed of the squeegee 5 in step A5 was set to 30 mm / sec. In step A6, the atmosphere in the chamber was released to atmospheric pressure.

Figure 2006294814
Figure 2006294814

表1に示すように、チャンバ内の雰囲気が2kPaより大きい場合は、非貫通孔2にボイドが発生することがある。本実施の形態の最初の充填操作では、ステップA4におけるチャンバ内の雰囲気が0.5kPaに調整されるので、確実にボイドの形成を防ぐことができる。   As shown in Table 1, when the atmosphere in the chamber is higher than 2 kPa, voids may occur in the non-through holes 2. In the first filling operation of the present embodiment, since the atmosphere in the chamber in step A4 is adjusted to 0.5 kPa, formation of voids can be reliably prevented.

表2は、本件発明者が本実施の形態の貫通電極の形成方法における2回目の充填操作について、ステップA4におけるチャンバ内の第1作業圧力を変化させて、ステップA6での非貫通孔2におけるボイドの形成と、およびレジストマスク11への導電材料6の希釈剤の広がりによる滲みの形成の有無を観察した結果である。なお、前述したようにステップA5におけるスキージ5の移動速度は、20mm/secに設定し、ステップA6ではチャンバ内の雰囲気を大気圧に開放した。   Table 2 shows that the first working pressure in the chamber in Step A4 is changed in the non-through hole 2 in Step A6 by changing the first working pressure in the chamber in Step A4 for the second filling operation in the method for forming the through electrode of the present embodiment by the inventor. It is the result of observing the presence or absence of the formation of voids due to the formation of voids and the spread of the diluent of the conductive material 6 on the resist mask 11. As described above, the moving speed of the squeegee 5 in step A5 was set to 20 mm / sec, and in step A6, the atmosphere in the chamber was released to atmospheric pressure.

Figure 2006294814
Figure 2006294814

表2に示すように、ステップA4におけるチャンバ内の雰囲気は、5kPa前後であると非貫通孔2にボイドが形成されることなくまた、レジストマスクに反応性希釈剤の滲みが形成されることなく、導電材料6を非貫通孔2に充填することができる。10kPa以上であると導電材料6の充填時に非貫通孔2にボイドが形成され、2kPa以下であるとレジストマスク11に、導電材料6に含まれる反応性希釈剤の滲みが形成される。本実施の形態の2回目の充填操作では、5kPaであるので確実にボイドの形成を防ぐことができ、滲みを防ぐことができる。   As shown in Table 2, when the atmosphere in the chamber in step A4 is around 5 kPa, voids are not formed in the non-through holes 2 and bleeding of the reactive diluent is not formed in the resist mask. The non-through hole 2 can be filled with the conductive material 6. When it is 10 kPa or more, a void is formed in the non-through hole 2 when the conductive material 6 is filled, and when it is 2 kPa or less, a bleeding of the reactive diluent contained in the conductive material 6 is formed in the resist mask 11. In the second filling operation of the present embodiment, since it is 5 kPa, formation of voids can be surely prevented and bleeding can be prevented.

表3は、本件発明者が本実施の形態の貫通電極の形成方法における最後の充填操作である3回目の充填操作について、ステップA4におけるチャンバ内の第1作業圧力を変化させて、ステップA6での非貫通孔2のボイドの形成およびレジストマスク11への導電材料6の滲みの有無を観察した結果である。なお、前述したようにステップA5におけるスキージ5の移動速度は、30mm/secに設定し、ステップA6ではチャンバ内の雰囲気を大気圧に開放した。   Table 3 shows that the inventor changed the first working pressure in the chamber in step A4 for the third filling operation, which is the last filling operation in the method for forming the through electrode according to the present embodiment. This is a result of observing the formation of voids in the non-through holes 2 and the presence or absence of bleeding of the conductive material 6 on the resist mask 11. As described above, the moving speed of the squeegee 5 in step A5 was set to 30 mm / sec. In step A6, the atmosphere in the chamber was released to atmospheric pressure.

Figure 2006294814
Figure 2006294814

表3に示すように、ステップA4におけるチャンバ内の雰囲気が、10kPa未満であると非貫通孔2にボイドが形成されることなく、レジストマスク11に反応性希釈剤の滲みが形成されることがない。チャンバ内の雰囲気の圧力が、10kPa以上であると導電材料6の充填時に非貫通孔2にボイドが形成され、2kPa以下であるとレジストマスクに、導電材料に含まれる反応性希釈剤の滲みが形成される。本実施の形態の最後の充填操作では、チャンバ内の圧力は、7kPaであるので、確実にボイドの形成を防ぐことができ、希釈剤のレジストマスク11への滲みを防ぐことができる。   As shown in Table 3, when the atmosphere in the chamber in step A4 is less than 10 kPa, voids are not formed in the non-through holes 2, and bleeding of the reactive diluent is formed in the resist mask 11. Absent. When the pressure of the atmosphere in the chamber is 10 kPa or more, voids are formed in the non-through holes 2 when the conductive material 6 is filled. When the pressure is 2 kPa or less, the resist mask has bleeding of the reactive diluent contained in the conductive material. It is formed. In the final filling operation of the present embodiment, the pressure in the chamber is 7 kPa, so that formation of voids can be surely prevented, and bleeding of the diluent into the resist mask 11 can be prevented.

図5は、最初の充填操作で半導体基板1の表面部に供給された導電材料の体積の違いによる非貫通孔における導電材料の充填状態の差異を説明するための図である。図5において、図2および図3と同一の構成には、同一の参照符号を付し説明を省略する。   FIG. 5 is a diagram for explaining the difference in the filling state of the conductive material in the non-through holes due to the difference in the volume of the conductive material supplied to the surface portion of the semiconductor substrate 1 in the first filling operation. 5, the same components as those in FIGS. 2 and 3 are denoted by the same reference numerals, and the description thereof is omitted.

図5(a)に示すように、非貫通孔2の開口部9を塞ぐ導電材料6の体積が大きい場合は、ステップA6で非貫通孔2の内外に生じる差圧によって導電材料6が充填されるときの、非貫通孔2に導電材料6が進入する速度が小さくなる。したがって、図5(b)に示すように、非貫通孔2の底面部13まで導電材料6が充填されないので、非貫通孔2の底面部13と、導電材料6の非貫通孔2の底面部13に臨む面との間にボイド14が形成される。また、図5(c)に示すように、非貫通孔2の開口部9を塞ぐ導電材料6の体積が小さい場合は、ステップA6で非貫通孔2の内外に生じる差圧によって導電材料6が充填されるときの、非貫通孔2に導電材料6が進入する速度が大きくなる。したがって、図5(d)に示すように、非貫通孔2の底面部13まで導電材料6が充填され、非貫通孔2の底面部13と、導電材料6の非貫通孔2の底面部13に臨む面との間のボイド14の形成を防ぐことができる。   As shown in FIG. 5A, when the volume of the conductive material 6 that closes the opening 9 of the non-through hole 2 is large, the conductive material 6 is filled by the differential pressure generated inside and outside the non-through hole 2 in step A6. The speed at which the conductive material 6 enters the non-through hole 2 is reduced. Therefore, as shown in FIG. 5B, the conductive material 6 is not filled up to the bottom surface portion 13 of the non-through hole 2, and therefore the bottom surface portion 13 of the non-through hole 2 and the bottom surface portion of the non-through hole 2 of the conductive material 6. A void 14 is formed between the surface facing 13. Further, as shown in FIG. 5C, when the volume of the conductive material 6 that closes the opening 9 of the non-through hole 2 is small, the conductive material 6 is caused by the differential pressure generated inside and outside the non-through hole 2 in step A6. The rate at which the conductive material 6 enters the non-through hole 2 when filling is increased. Therefore, as shown in FIG. 5D, the conductive material 6 is filled up to the bottom surface portion 13 of the non-through hole 2, and the bottom surface portion 13 of the non-through hole 2 and the bottom surface portion 13 of the non-through hole 2 of the conductive material 6. It is possible to prevent the formation of the void 14 between the surface facing the surface.

表4は、本件発明者が本実施の形態の最初の充填操作について、ステップA4での第1作業圧力を2kPaに調整し、ステップA5でのスキージ5の移動速度を変化させて、ステップA6での第2作業圧力を大気圧に調整した場合における、導電材料6が充填された非貫通孔2におけるボイドの形成の有無を観察した結果である。   Table 4 shows that the inventor adjusts the first working pressure in step A4 to 2 kPa for the first filling operation of the present embodiment, changes the moving speed of the squeegee 5 in step A5, and in step A6. It is the result of having observed the presence or absence of the formation of the void in the non-through-hole 2 with which the electrically-conductive material 6 was filled when adjusting the 2nd working pressure of this to atmospheric pressure.

Figure 2006294814
Figure 2006294814

本件発明者は、最初の充填操作で非貫通孔2の開口部9を塞ぐように供給される導電材料6の体積が大きいと、導電材料6の体積が小さい場合と比較して、導電材料6の非貫通孔2へ進入する速度が小さくなることを見出した。導電材料6が進入する速度が小さくなると、導電材料6は粘性を有するので、非貫通孔2の底面部13と、導電材料6の非貫通孔2の底面部13に臨む面との間の雰囲気気体の体積を収縮することができず、ボイド14が形成される。表4に示すように、ステップA5での印刷作業時のスキージ5の速度が30mm/sec以上の速さであれば、非貫通孔2の底面部13まで導電材料6が進入し、非貫通孔2の底面部13と、導電材料6の非貫通孔2の底面部13に臨む面との間のボイドの形成を防ぐことができる。本実施の形態では、最初の充填操作におけるステップA4での第1作業圧力が0.5kPaに調整され、ステップA5でのスキージの移動速度は、30mm/secに設定され、ステップA6での第1作業圧力を大気圧に開放している。したがって、非貫通孔2の底面部13までボイドが形成されることなく導電材料6が充填される。   When the volume of the conductive material 6 supplied so as to close the opening 9 of the non-through hole 2 is large in the first filling operation, the present inventor compares the conductive material 6 with the small volume of the conductive material 6. It has been found that the speed of entering the non-through hole 2 becomes small. When the speed at which the conductive material 6 enters decreases, the conductive material 6 becomes viscous, so that the atmosphere between the bottom surface portion 13 of the non-through hole 2 and the surface of the conductive material 6 that faces the bottom surface portion 13 of the non-through hole 2. The gas volume cannot be shrunk and voids 14 are formed. As shown in Table 4, when the speed of the squeegee 5 during the printing operation in step A5 is 30 mm / sec or more, the conductive material 6 enters the bottom surface portion 13 of the non-through hole 2, and the non-through hole The formation of voids between the bottom surface portion 13 of the conductive material 6 and the surface facing the bottom surface portion 13 of the non-through hole 2 of the conductive material 6 can be prevented. In the present embodiment, the first working pressure in step A4 in the first filling operation is adjusted to 0.5 kPa, the moving speed of the squeegee in step A5 is set to 30 mm / sec, and the first working pressure in step A6 is set. The working pressure is released to atmospheric pressure. Therefore, the conductive material 6 is filled without forming voids up to the bottom surface portion 13 of the non-through hole 2.

本実施の形態の貫通電極の形成方法によれば、一度の充填操作で非貫通孔2に充填する導電材料6の体積は、非貫通孔2の容積よりも小さいので、非貫通孔2の底面部13まで、または前回の充填操作までに非貫通孔2に充填した導電材料6における非貫通孔2の開口部9側の表面まで、確実に導電材料6を充填することができる。したがって、非貫通孔2にボイドが形成されることを防ぐことができるので、導電材料6が硬化して形成される貫通電極内に空隙が形成されることを防ぐことができる。   According to the through electrode forming method of the present embodiment, the volume of the conductive material 6 that fills the non-through hole 2 in a single filling operation is smaller than the volume of the non-through hole 2. The conductive material 6 can be reliably filled up to the surface of the opening 9 side of the non-through hole 2 in the conductive material 6 filled in the non-through hole 2 up to the portion 13 or before the previous filling operation. Therefore, voids can be prevented from being formed in the non-through holes 2, and voids can be prevented from being formed in the through electrodes formed by curing the conductive material 6.

また、導電材料6の充填操作は複数回繰り返されるので、前回までの充填操作において、万一非貫通孔2にボイドが形成されていた場合であっても、前回よりも後の充填操作の非貫通孔2内外の差圧によって、前回までに形成された前記空隙を縮小または消滅させることができる。したがって、均一な密度で非貫通孔2に導電材料6を充填することができるので、導電性にばらつきのない貫通電極を安定して形成することができる。   Further, since the filling operation of the conductive material 6 is repeated a plurality of times, even if a void is formed in the non-through hole 2 in the previous filling operation, the filling operation after the previous operation is not performed. Due to the differential pressure inside and outside the through hole 2, the gap formed so far can be reduced or eliminated. Therefore, since the non-through holes 2 can be filled with the conductive material 6 with a uniform density, it is possible to stably form through electrodes that have no variation in conductivity.

本実施の形態の貫通電極の形成方法によれば、導電材料充填工程全体を通してみたとき、第1作業圧力と第2作業圧力との圧力差が、後の充填操作になるにつれて、小さくなるように設定されている。したがって、最初の充填操作における第1作業圧力と第2作業圧力との圧力差と同一の圧力差または、その圧力差より大きな圧力差を各充填操作において調整する場合と比較して、チャンバ内の雰囲気の圧力調整時間を短縮することができ、また充填操作における作業が容易になる。   According to the through electrode forming method of the present embodiment, when viewed through the entire conductive material filling process, the pressure difference between the first working pressure and the second working pressure is reduced as the subsequent filling operation is performed. Is set. Therefore, compared with the case where a pressure difference equal to or greater than the pressure difference between the first working pressure and the second working pressure in the first filling operation is adjusted in each filling operation, The pressure adjustment time of the atmosphere can be shortened, and the work in the filling operation becomes easy.

本実施の形態の貫通電極の形成方法によれば、第2圧力調整作業において、チャンバ内の雰囲気を大気圧に開放するだけでよい、したがって、第2作業圧力調整作業において圧力を調整する場合と比較して、第2作業圧力調整作業にかかる時間を短縮することができる。   According to the through electrode forming method of the present embodiment, in the second pressure adjustment operation, it is only necessary to open the atmosphere in the chamber to atmospheric pressure. Therefore, in the second pressure adjustment operation, the pressure is adjusted. In comparison, the time required for the second working pressure adjustment work can be shortened.

本実施の形態の貫通電極の形成方法によれば、導電材料充填工程における最初の充填操作では、非貫通孔2内の圧力は2kPa以下であって、非貫通孔2外の圧力は大気圧であるので、大気圧と非貫通孔2内の圧力との差圧によって導電材料6を非貫通孔2の底面部13まで確実に充填することができる。底面部まで均一な密度で導電材料6を充填することによって貫通電極を形成するので、導電性にばらつきのない貫通電極を安定して形成することができる。非貫通孔2内の圧力が2kPaよりも大きい場合は、導電材料6が充填された非貫通孔内2に空隙が形成される。   According to the through electrode forming method of the present embodiment, in the first filling operation in the conductive material filling step, the pressure inside the non-through hole 2 is 2 kPa or less, and the pressure outside the non-through hole 2 is atmospheric pressure. Therefore, the conductive material 6 can be reliably filled up to the bottom surface portion 13 of the non-through hole 2 by the differential pressure between the atmospheric pressure and the pressure in the non-through hole 2. Since the through electrode is formed by filling the conductive material 6 with a uniform density up to the bottom surface, it is possible to stably form the through electrode without variation in conductivity. When the pressure in the non-through hole 2 is larger than 2 kPa, a void is formed in the non-through hole 2 filled with the conductive material 6.

また、最終回の充填操作では、非貫通孔内の圧力は7kPa以上10kPa未満であって、非貫通孔外の圧力が大気圧なので、導電材料6を非貫通孔2に充填するときに、半導体基板1の主面部7に形成されるレジストマスク11に広がることを防ぐことができる。非貫通孔2内の圧力が7kPaより小さい場合は、導電材料6を非貫通孔2内に充填するときに、導電材料6が半導体基板1の主面部7に形成されるレジストマスク11に広がり、滲みが形成される。10kPa以上であれば非貫通孔2にボイド14が形成される。   In the final filling operation, the pressure in the non-through hole is 7 kPa or more and less than 10 kPa, and the pressure outside the non-through hole is atmospheric pressure, so when filling the non-through hole 2 with the conductive material 6, the semiconductor Spreading over the resist mask 11 formed on the main surface portion 7 of the substrate 1 can be prevented. When the pressure in the non-through hole 2 is smaller than 7 kPa, when the conductive material 6 is filled in the non-through hole 2, the conductive material 6 spreads over the resist mask 11 formed in the main surface portion 7 of the semiconductor substrate 1, Bleeding is formed. If it is 10 kPa or more, the void 14 is formed in the non-through hole 2.

本実施の形態によれば、導電材料未充填の非貫通孔2の容積が導電材料充填工程全体のうち最も大きい最初の充填操作のときに、導電材料6の供給量を最も小さくして、非貫通孔2に導電材料6を充填する。したがって、確実に非貫通孔2の底面部13まで導電材料6を充填することができるので、均一な密度で導電材料6を非貫通孔2に充填することができる。したがって、導電性にばらつきのない貫通電極を安定して形成することができる。   According to the present embodiment, in the first filling operation in which the volume of the non-through holes 2 not filled with the conductive material is the largest in the entire conductive material filling process, the supply amount of the conductive material 6 is made the smallest, The through hole 2 is filled with a conductive material 6. Therefore, since the conductive material 6 can be reliably filled up to the bottom surface portion 13 of the non-through hole 2, the non-through hole 2 can be filled with the conductive material 6 with a uniform density. Therefore, the through electrode having no variation in conductivity can be stably formed.

本実施の形態によれば、孔板印刷法を用いて導電材料6を供給するので、低コストで導電材料6を半導体基板1の主面部7に供給することができる。したがって、貫通電極を半導体基板に形成するためのコストを削減することができる。   According to the present embodiment, since the conductive material 6 is supplied using the hole plate printing method, the conductive material 6 can be supplied to the main surface portion 7 of the semiconductor substrate 1 at a low cost. Therefore, the cost for forming the through electrode on the semiconductor substrate can be reduced.

本実施の形態によれば、非貫通孔2に均一な密度で導電材料が充填し、半導体基板1に貫通電極を形成し、その半導体基板1によって形成される半導体装置を製造するので、製造された半導体装置の歩留まりを向上させることができる。   According to the present embodiment, the non-through holes 2 are filled with a conductive material with a uniform density, the through electrodes are formed on the semiconductor substrate 1, and the semiconductor device formed by the semiconductor substrate 1 is manufactured. In addition, the yield of the semiconductor device can be improved.

本実施の形態の貫通電極の形成方法によって貫通電極が設けられた半導体装置は、厚さ100μmの半導体基板1によって形成されているので、この半導体装置を積層し、積層型半導体装置を形成すると積層型半導体装置を小型化することができる。したがって、積層型半導体装置を搭載した電子機器を小型化することができる。   The semiconductor device provided with the through electrode by the through electrode forming method of the present embodiment is formed by the semiconductor substrate 1 having a thickness of 100 μm. Therefore, when this semiconductor device is stacked and a stacked semiconductor device is formed, the stacked semiconductor device is stacked. The type semiconductor device can be reduced in size. Accordingly, it is possible to reduce the size of an electronic device equipped with a stacked semiconductor device.

本発明の実施の他の形態として、たとえば、導電材料充填工程における各充填操作の第1作業圧力と第2作業圧力との圧力差を、導電材料充填工程全体を通してみたとき、後の充填操作になるにつれて小さくなるように設定してもよい。   As another embodiment of the present invention, for example, when the pressure difference between the first working pressure and the second working pressure of each filling operation in the conductive material filling process is viewed throughout the conductive material filling process, You may set so that it may become small as it becomes.

最初の充填操作における第1作業圧力と第2作業圧力との圧力差と同一の圧力差または、その圧力差より大きな圧力差を各充填操作において調整する場合と比較して、第1作業圧力と第2作業圧力との調整時間を短縮することができ、また充填操作における作業が容易になる。   Compared with the case where a pressure difference equal to or greater than the pressure difference between the first working pressure and the second working pressure in the first filling operation is adjusted in each filling operation, the first working pressure and Adjustment time with the second working pressure can be shortened, and work in the filling operation is facilitated.

本発明の実施のさらに他の形態として、導電材料充填工程で複数回繰返される各充填操作のうち少なくとも1回の充填操作における第1作業圧力と第2作業圧力との圧力差を、前回の充填操作における第1作業圧力と第2作業圧力との圧力差よりも大きくなるように調整してもよい。   As still another embodiment of the present invention, the pressure difference between the first working pressure and the second working pressure in at least one filling operation among the filling operations repeated a plurality of times in the conductive material filling step is calculated as the previous filling. You may adjust so that it may become larger than the pressure difference of the 1st working pressure in operation, and the 2nd working pressure.

このように導電材料充填工程における第1作業圧力と第2作業圧力との圧力差を調整することによって、前回の充填操作までに、万一非貫通孔2にボイドが形成された場合であっても、形成された空隙を確実に消滅または縮小することができるので、非貫通孔2に均一な密度で導電材料6を充填することができ、導電性にばらつきのない貫通電極を安定して形成することができる。   In this way, by adjusting the pressure difference between the first working pressure and the second working pressure in the conductive material filling step, a void should be formed in the non-through hole 2 by the previous filling operation. However, since the formed void can be surely eliminated or reduced, the non-through holes 2 can be filled with the conductive material 6 with a uniform density, and the through electrodes without variations in conductivity can be stably formed. can do.

本発明の実施のさらに他の形態として、各充填操作における半導体基板1の主面部7への導電材料量の供給量が、導電材料充填工程全体を通してみたとき、前の充填操作になるにつれて小さくなるように設定してもよい。   As still another embodiment of the present invention, the supply amount of the conductive material to the main surface portion 7 of the semiconductor substrate 1 in each filling operation becomes smaller as it becomes the previous filling operation when viewed through the entire conductive material filling process. You may set as follows.

このように導電材料の供給量を設定することによって、導電材料未充填の非貫通孔2内の容積が導電材料充填工程全体のうち最も大きい最初の充填操作のときに、半導体基板1の主面部7への導電材料6の供給量を最も小さくして、非貫通孔2に導電材料6を充填する。したがって、確実に非貫通孔2の底部13まで導電材料6を充填することができるので、均一な密度で導電材料6を非貫通孔2に充填することができる。したがって、導電性にばらつきのない貫通電極を安定して形成することができる。   By setting the supply amount of the conductive material in this manner, the main surface portion of the semiconductor substrate 1 is the first filling operation in which the volume in the non-through hole 2 not filled with the conductive material is the largest in the entire conductive material filling process. The supply amount of the conductive material 6 to 7 is made the smallest, and the non-through hole 2 is filled with the conductive material 6. Therefore, since the conductive material 6 can be reliably filled up to the bottom 13 of the non-through hole 2, the conductive material 6 can be filled into the non-through hole 2 with a uniform density. Therefore, the through electrode having no variation in conductivity can be stably formed.

本発明の実施のさらに他の形態として、孔板印刷法の代わりにディスペンス法を用いることができる。   As still another embodiment of the present invention, a dispensing method can be used instead of the hole plate printing method.

本発明の実施の一形態である貫通電極の形成方法を示すフローチャートである。It is a flowchart which shows the formation method of the penetration electrode which is one Embodiment of this invention. 本発明の実施の一形態である貫通電極の形成方法における充填工程の概要を示す図である。It is a figure which shows the outline | summary of the filling process in the formation method of the penetration electrode which is one Embodiment of this invention. 本発明の実施の一形態である貫通電極の形成方法における充填工程を詳細に示す図である。It is a figure which shows the filling process in the formation method of the penetration electrode which is one Embodiment of this invention in detail. 本発明の実施の一形態である貫通電極の形成方法における充填工程のチャンバ内の雰囲気の圧力の推移を示すグラフである。It is a graph which shows transition of the pressure of the atmosphere in the chamber of the filling process in the formation method of the penetration electrode which is one embodiment of the present invention. 最初の充填操作で半導体基板の表面部に供給された導電材料の体積の違いによる非貫通孔における導電材料の充填状態の差異を説明するための図である。It is a figure for demonstrating the difference in the filling state of the electrically-conductive material in a non-through-hole by the difference in the volume of the electrically-conductive material supplied to the surface part of the semiconductor substrate by the first filling operation. 貫通電極が形成された半導体基板の断面図である。It is sectional drawing of the semiconductor substrate in which the penetration electrode was formed. 配線と貫通電極とが設けられた半導体基板の断面図である。It is sectional drawing of the semiconductor substrate in which wiring and the penetration electrode were provided. 第1の従来の技術を用いて半導体基板に貫通電極を形成する方法を説明するための図である。It is a figure for demonstrating the method of forming a penetration electrode in a semiconductor substrate using the 1st conventional technique. 第2の従来の技術の導電材料の非貫通孔への充填操作を示すフローチャートである。It is a flowchart which shows filling operation to the non-through-hole of the electrically conductive material of the 2nd prior art.

符号の説明Explanation of symbols

1 半導体基板
2 非貫通孔
3 絶縁膜
4 印刷マスク
5 スキージ
6 導電材料
7 主面部
8 裏面部
DESCRIPTION OF SYMBOLS 1 Semiconductor substrate 2 Non-through-hole 3 Insulating film 4 Print mask 5 Squeegee 6 Conductive material 7 Main surface part 8 Back surface part

Claims (8)

基板に、厚み方向一方側の表面部で開口し、厚み方向他方側の表面部で塞がれる非貫通孔を形成する非貫通孔形成工程と、
非貫通孔における基板の内壁に絶縁膜を形成する絶縁膜形成工程と、
導電性を有し、非貫通孔の容積よりも小量の体積の導電材料を、基板の厚み方向一方側の表面部に供給して、非貫通孔の開口部を塞ぎ、非貫通孔外の空間の圧力を非貫通孔の圧力よりも高くし、非貫通孔内外の差圧によって、導電材料を非貫通孔に充填する充填操作を、非貫通孔が導電材料で満たされるまで繰返す導電材料充填工程と、
基板の他方の面を、導電材料が外方に露出するまで後退させる貫通孔形成工程とを含む貫通電極の形成方法。
A non-through hole forming step for forming a non-through hole in the substrate that is open at the surface portion on one side in the thickness direction and is closed at the surface portion on the other side in the thickness direction;
An insulating film forming step of forming an insulating film on the inner wall of the substrate in the non-through hole;
A conductive material having a volume smaller than the volume of the non-through hole is supplied to the surface portion on one side in the thickness direction of the substrate to close the opening of the non-through hole, Filling the conductive material by repeating the filling operation of filling the non-through hole with the conductive material by making the pressure in the space higher than the pressure of the non-through hole and filling the non-through hole with the differential pressure inside and outside the non-through hole. Process,
A through hole forming step of retracting the other surface of the substrate until the conductive material is exposed to the outside.
導電材料充填工程では、各充填操作における非貫通孔内外の差圧は、導電材料充填工程全体を通してみたとき、後の充填操作になるにつれて小さくなるように設定されることを特徴とする請求項1記載の貫通電極の形成方法。   2. The conductive material filling step, wherein the differential pressure inside and outside the non-through hole in each filling operation is set so as to become smaller as the subsequent filling operation is viewed through the whole conductive material filling step. The formation method of the penetration electrode of description. 導電材料充填工程で実行される各充填操作のうち少なくとも1回の充填操作における非貫通孔内外の差圧は、前回の充填操作における非貫通孔内外の差圧よりも大きくなるように設定されることを特徴とする請求項1または2記載の貫通電極の形成方法。   The differential pressure inside and outside the non-through hole in at least one filling operation among the filling operations executed in the conductive material filling step is set to be larger than the differential pressure inside and outside the non-through hole in the previous filling operation. The method for forming a through electrode according to claim 1 or 2. 導電材料充填工程では、大気圧よりも小さい気圧に調整される雰囲気下で、基板の厚み方向一方側の表面部に導電材料を供給して非貫通孔の開口部を塞ぎ、非貫通孔外の気圧を大気圧に戻すことによって、導電材料を非貫通孔に充填することを特徴とする請求項1〜3のいずれか1つに記載の貫通電極の形成方法。   In the conductive material filling step, the conductive material is supplied to the surface portion on one side in the thickness direction of the substrate in an atmosphere adjusted to a pressure lower than the atmospheric pressure to close the opening of the non-through hole, The method for forming a through electrode according to claim 1, wherein the non-through hole is filled with a conductive material by returning the atmospheric pressure to atmospheric pressure. 最初の充填操作では、2kPa以下の気圧に調整される雰囲気下で、基板の厚み方向一方側の表面部に導電材料を供給し、最後の充填操作では、7kPa以上の気圧に調整される雰囲気下で、基板の厚み方向一方側の表面部に導電材料を供給することを特徴とする請求項4記載の貫通電極の形成方法。   In the first filling operation, a conductive material is supplied to the surface portion on one side in the thickness direction of the substrate in an atmosphere adjusted to a pressure of 2 kPa or less. In the last filling operation, the atmosphere is adjusted to a pressure of 7 kPa or more. The method for forming a through electrode according to claim 4, wherein a conductive material is supplied to the surface portion on one side in the thickness direction of the substrate. 導電材料充填工程では、各充填操作における基板の厚み方向一方側の表面部への導電材料量の供給量が、導電材料充填工程全体を通してみたとき、前の充填操作になるにつれて小さくなるように設定されることを特徴とする請求項1〜5のいずれか1つに記載の貫通電極の形成方法。   In the conductive material filling process, the supply amount of the conductive material to the surface portion on one side in the thickness direction of the substrate in each filling operation is set so as to become smaller as it becomes the previous filling operation when viewed through the entire conductive material filling process. The method for forming a through electrode according to claim 1, wherein the through electrode is formed. 導電材料充填工程では、孔板印刷を用いて基板の厚み方向一方側の表面部に導電材料を供給することを特徴とする請求項1〜6のうちいずれか1つに記載の貫通電極の形成方法。   The formation of the through electrode according to any one of claims 1 to 6, wherein in the conductive material filling step, the conductive material is supplied to the surface portion on one side in the thickness direction of the substrate using hole plate printing. Method. 請求項1〜7のうちいずれか1つに記載の貫通電極の形成方法を用いる半導体装置の製造方法。   The manufacturing method of the semiconductor device using the formation method of the penetration electrode as described in any one of Claims 1-7.
JP2005112539A 2005-04-08 2005-04-08 Method of forming through-electrode on substrate, and manufacturing method of semiconductor device using the same Pending JP2006294814A (en)

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Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101740425B (en) * 2008-11-26 2012-12-12 纳普拉有限公司 Method for filling metal into fine space
WO2023145366A1 (en) * 2022-01-31 2023-08-03 株式会社フジ機工 Vacuum pressure-reducing device, and underfill charging method and defoamed charging method using same

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101740425B (en) * 2008-11-26 2012-12-12 纳普拉有限公司 Method for filling metal into fine space
WO2023145366A1 (en) * 2022-01-31 2023-08-03 株式会社フジ機工 Vacuum pressure-reducing device, and underfill charging method and defoamed charging method using same

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