JP2006291242A - Gold plating liquid, gold plating method, method for fabricating semiconductor device, and semiconductor device - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To prevent a level difference part of a surface protective film from appearing on the surface of a bump formed thereon. <P>SOLUTION: The concentration of thallium in a sulfurous acid based gold plating liquid for forming a bump is set to the high one of about 30 mg/l, thus the grains of the crystals of the gold plating are made larger than the conventional ones, and a bump 7 is formed by the large gold plating crystals. For example, by performing the gold plating under the conditions that gold plating liquid temperature is 60 to 65 degrees and gold plating current density is 0.4 to 0.8 A/dm<SP>2</SP>, the formation of the bump having a surface condition free from a level difference is made possible regardless of the level difference in a polyimide film as a substrate. <P>COPYRIGHT: (C)2007,JPO&INPIT

Description

  The present invention relates to a gold plating solution, a gold plating method, a semiconductor device manufacturing method, and a semiconductor device.

  A conventional technique in a semiconductor device, in particular, a bump shape and a formation method used in bump formation will be described.

  5A to 5F show a conventional bump formation method. The contents of the bump forming method will be described below.

  As shown in FIG. 5A, first, in the diffusion step, an internal circuit of the semiconductor device is formed in the semiconductor chip before the bumps 7 are formed. At that time, the semiconductor electrode 1 is formed of aluminum or the like for the portion connected to the external output. Further, a portion other than the semiconductor electrode 1 is covered with a polyimide film 2 as a surface protective film. The point is to form the polyimide film 2 as thin as possible (about 3 μm).

  Next, as shown in FIG. 5B, the barrier metal 3 is deposited on the entire semiconductor chip by sputtering or the like. This barrier metal 3 is used as an electrode when bumps are formed by a gold plating method. The barrier metal 3 is usually deposited in two layers, and the first layer is made of a material close to the semiconductor electrode 1 and the second layer is made of a material close to the bump 7.

  Next, as shown in FIG. 5C, a bump resist 6 on the barrier metal 3 is applied. Usually, the bump resist 6 is formed to be about 5 μm higher than the bump height to be formed. Since the bump 7 is generally about 15 to 20 μm in height, the film thickness of the bump resist 6 is generally about 20 to 25 μm. Thereafter, the bump mask 4 is used in the dark room process, and only the portion where the bump 7 is formed is exposed to UV5. In this conventional example, a positive type is used for the bump resist 6, but if a negative type is used, the portion to which UV is applied is reversed.

  As shown in FIG. 5D, after that, development is performed in a development process, and only the bump resist 6 in the portion where the bump 7 is formed is removed.

  As shown in FIG. 5E, thereafter, bumps 7 are formed in a gold plating process. Electrolytic plating is used as the gold plating method. The gold plating solution includes cyan type and sulfite type. Here, a sulfite type gold plating solution is used.

  As shown in FIG. 5F, thereafter, the bump resist 6 is removed.

Thereafter, as shown in FIG. 5G, the barrier metal 3 is etched in an etching process. Etching is performed in two steps depending on the material of the barrier metal 3 when the barrier metal 3 is formed in two layers. Finally, annealing is performed to complete.
Japanese Patent Laid-Open No. 10-251887

  However, in the case of the bump formed by the bump forming method shown in FIG. 5, since the polyimide film 2 is used for the surface protective film as shown in FIG. It will come out. The reason is that the polyimide film is a very difficult material to be formed thin, and when formed normally, the film thickness becomes about 3 μm. That is, the bump surface step 8 of the bump 7 may be about 3 μm. If this is the case, the bump surface step 8 may cause an assembly process (typical example: TCP: tape carrier package, COF: chip on film, COG: chip on glass, etc.) that is a subsequent process of the bump process. This is because an assembly error may occur.

  In addition, as shown in FIG. 6B, there is a method in which the surface protective film is formed of a thin film protective film 9 such as SiN, and the polyimide film 2 is formed on the part removed from the bump 7 to the outside. There are a demerit that requires a separate process for forming the bump 7 and a demerit that it becomes impossible to protect all parts other than the portion where the bump 7 is formed with the polyimide film 2.

  Further, as shown in FIG. 6C, since the bump resist 6 is very thick (about 20 to 25 μm), it takes a long exposure time for opening the resist. If the exposure time is shortened, the bump resist opening 10 is formed. May become smaller than originally planned, and the bumps 7 may become smaller accordingly.

  Therefore, in view of the above-described problems, the object of the present invention is to prevent the assembly abnormality from occurring due to the stepped portion of the surface protective film coming out on the bump surface formed thereon, and also the bump itself. It is an object to provide a gold plating solution and a gold plating method that do not become small, a method for manufacturing a semiconductor device, and a semiconductor device.

  In order to achieve the above object, the gold plating solution according to claim 1 of the present invention has a thallium concentration of 25 to 35 mg / l as a component in the sulfite-based gold plating solution.

The method of gold plating according to claim 2, wherein uses gold plating solution according to claim 1, the gold plating solution temperature 60 to 65 degrees, the gold plating current density under conditions of 0.4~0.8A / dm ² Gold plating is performed.

4. The method of manufacturing a semiconductor device according to claim 3, wherein the entire surface of the semiconductor substrate on which the semiconductor electrode is formed is covered with a surface protective film, and the opening of the surface protective film is formed on the semiconductor electrode. And forming a bump on the barrier metal corresponding to the opening of the surface protective film, and when forming the bump, the sulfite system having a thallium concentration of 25 to 35 mg / l Using a gold plating solution, forming a bump by performing gold plating using the barrier metal as an electrode under the conditions of a gold plating solution temperature of 60 to 65 degrees and a gold plating current density of 0.4 to 0.8 A / dm ^2. To do.

  5. The semiconductor device according to claim 4, wherein a semiconductor electrode formed on the semiconductor substrate, a surface protective film covering the entire surface of the semiconductor substrate and having an opening formed on the semiconductor electrode, and an opening of the surface protective film are sequentially formed. The surface protection film was formed of a polyimide film, and the bump was formed using a sulfite-based gold plating solution having a thallium concentration of 25 to 35 mg / l.

  According to the gold plating solution of the first aspect of the present invention, the thallium concentration, which is a component in the sulfite-based gold plating solution, is set to 25 to 35 mg / l. Moreover, it can suppress that a level | step-difference part comes out on the surface of gold plating. That is, when the thallium concentration in the sulfite-based gold plating solution is set to a high concentration of about 30 mg / l, and gold plating is performed using this gold plating solution, the gold plating crystal particles are larger than the conventional one. Large particles. Since it is formed of this large gold-plated crystal, it is possible to form a gold-plated shape having no surface step regardless of the surface state regardless of the step of the base.

According to the gold plating method of claim 2 of the present invention, the gold plating solution of claim 1 is used, the gold plating solution temperature is 60 to 65 degrees, and the gold plating current density is 0.4 to 0.8 A / Since gold plating is performed under the condition of dm ² , it is preferable as a condition for performing gold plating using the gold plating solution according to claim 1.

According to the method for manufacturing a semiconductor device according to claim 3 of the present invention, when the bump is formed, a sulfite-based gold plating solution having a thallium concentration of 25 to 35 mg / l is used, and the gold plating solution temperature is set to 60 to 65. The bumps are formed by performing gold plating using the barrier metal as an electrode under the condition that the gold plating current density is 0.4 to 0.8 A / dm ^2. It is possible to suppress the occurrence of an abnormal assembly due to the bump surface step in the assembly process which is a subsequent process of the bump process. That is, when the thallium concentration is set to a high concentration of about 30 mg / l in the sulfite-based gold plating solution, and the gold plating is performed using this gold plating solution, the gold plating crystal particles are larger than the conventional one. Large particles. Since bumps are formed with this large gold-plated crystal, it is possible to form bumps having no surface step regardless of the bump surface state due to the step due to the opening of the surface protective film.

  Also, since the bump resist when forming the bump is very thick (about 20 to 25 μm), it takes a long exposure time for opening the resist, and if the exposure time is shortened, the bump resist opening is longer than originally planned. Although there is a risk that the bump becomes smaller and the bump becomes smaller, the use of the above means makes it possible to increase the size of the gold-plated crystal particles, and the bump itself is not formed along the bump resist. That is, the bump resist is spread by the large particles of the gold plating crystal, and a bump can be formed larger than the bump resist opening. Therefore, even when the exposure time for opening the resist is shortened and the bump resist opening becomes small, it is possible to form a bump larger than the bump resist opening.

  According to the semiconductor device of claim 4 of the present invention, the surface protective film is made of a polyimide film, and the bump is formed using a sulfite-based gold plating solution having a thallium concentration of 25 to 35 mg / l. The crystal grains become larger than the conventional grains. Since the bumps are formed with this large gold-plated crystal, it is possible to form bumps having no surface step regardless of the bump surface state of the underlying polyimide film. That is, the polyimide film is a material that is difficult to form thinly. Conventionally, the step portion of the polyimide film inevitably appears on the surface of the bump, and the bump surface step 8 may be about 3 μm. Although there is a possibility that an assembly abnormality may occur due to the bump surface step in the assembly process which is a subsequent process of the bump process, this countermeasure can be taken.

  An embodiment of the present invention will be described with reference to FIGS.

  FIG. 1 shows a bump forming method as a method for manufacturing a semiconductor device according to an embodiment of the present invention. The contents of this bump forming method will be described below.

  As shown in FIG. 1A, first, an internal circuit of a semiconductor device is formed on a semiconductor substrate in a diffusion process, and a semiconductor electrode 1 as an external electrode pad is formed. Usually, the material of the semiconductor electrode 1 is made of Al. Moreover, Cu, Si, etc. may be mixed as a countermeasure against migration. Thereafter, a polyimide film 2 is used as a surface protective film, and the polyimide film 2 covers the semiconductor electrode 1 and the entire semiconductor device. The purpose of this is to protect the internal circuits and semiconductor electrodes of the semiconductor device from mechanical damage. The meaning of using polyimide is that it is softer and more resilient than SiN, which is another surface protective film, and is resistant to mechanical shock. Polyimide is also better in terms of coverage of steps such as wiring of semiconductor devices. The polyimide film 2 is generally a photosensitive film. Thereafter, an opening portion of the polyimide film 2 is formed on the semiconductor electrode 1 by a photolithography process or the like. Hereinafter, as shown in FIGS. 1B to 1E, the barrier metal 3 is formed on the entire surface of the semiconductor substrate, and the bump 7 is formed on the barrier metal 3 corresponding to the opening of the surface protective film 2.

  That is, as shown in FIG. 1B, the barrier metal 3 is formed on the entire surface of the semiconductor chip and the entire surface of the semiconductor electrode 1 by sputtering or the like. The barrier metal 3 is usually formed of two layers. In the present embodiment, Ti, TiW, or the like, which is a metal close to Al, which is the material of the semiconductor electrode 1, is used as the first barrier metal layer. Further, as the second barrier metal layer, the material of the bump 7 is gold, so Pd, Cu, or Au, which is a metal close to gold, is used. The reason for this is that if Pd, Cu, or Au is directly formed on Al of the semiconductor electrode 1, the strength of Al and the barrier metal 3 becomes very weak, and the bump 7 is formed on Ti or TiW. This is because the strength of the barrier metal 3 and the bump 7 becomes very weak.

  Thereafter, as shown in FIG. 1C, a bump resist 6 on the barrier metal 3 is applied. Usually, the bump resist 6 is formed to be about 5 μm higher than the height of the bump to be formed. Since the bump 7 is generally about 15 to 20 μm in height, the film thickness of the bump resist 6 is generally about 20 to 25 μm. Thereafter, the bump mask 4 is used in the dark room process, and only the portion where the bump 7 is formed is exposed to UV5. In the present embodiment, a positive type is used for the bump resist 6, but if a negative type is used, the portion to which UV is applied is reversed. Further, the positive / negative of the bump resist 6 is generally selected according to the gold plating solution used in the subsequent gold plating step.

  As shown in FIG. 1D, after that, development is performed in a development process, and only the bump resist 6 in the portion where the bump 7 is formed is removed to form the opening 10.

  As shown in FIG. 1E, bumps 7 are then formed in a gold plating process. The gold plating of this embodiment uses an electrolytic gold plating method. At this time, as a first point, a gold sulfite gold plating solution that is a non-cyanide gold plating solution is used as the gold plating solution. The second point is to increase the concentration of thallium, which is the content component of the gold plating solution. In particular, in the present embodiment, it is desirable to set the thallium concentration to 30 mg / l.

  As shown in FIG. 1F, the unnecessary portion of the bump resist 5 is then removed.

  As shown in FIG. 1G, thereafter, the barrier metal 4 is removed in an etching process. When the barrier metal 4 is formed in two layers, the etching is performed in two steps depending on the material of the barrier metal 4. Finally, annealing is performed to complete.

  Here, the effect of thallium will be described in detail in the step of FIG. That is, gold, sodium, sulfurous acid, sulfuric acid, thallium and the like are ionized and dissolved in the gold sulfite plating solution. Among them, the role that thallium plays in the gold plating solution is to stabilize the gold plating solution, that is, to prevent the electroless deposition of gold, and secondly to change the crystal state of the bump. Hereinafter, it will be described in detail that thallium changes the crystal state of the bump with reference to FIGS. 2 (a) to 2 (c) and FIGS. 3 (a) to 3 (c).

  FIGS. 2A to 2C are diagrams showing gold plating and a crystal state at that time when a gold plating solution containing a small amount of thallium (10 mg / l) is used as a comparative example of the present invention.

  As shown in FIG. 2A, the gold-plated crystal particles that are originally formed by performing gold plating are stacked on the electrode in a certain size to form bumps 7. However, when a small amount of thallium is added to the gold plating solution, the tendency for the gold plating crystal 11 particles to be formed in a small state increases.

  As shown in FIG. 2B, therefore, the bump 7 is formed by the gold-plated crystal 11 of such small particles, so that the step of the polyimide film 2 becomes the bump surface step as it is.

  FIG. 2C is a view of the bump 7 in the state of FIG. 2B as viewed from above, and the bump itself is formed along the bump resist 6.

  FIGS. 3A to 3C are diagrams showing gold plating and a crystal state at that time when a gold plating solution containing a large amount of thallium (30 mg / l) is used as an embodiment of the present invention.

  As shown in FIG. 3 (a), when a small amount of thallium is added to the gold plating solution, the tendency for the particles of the gold plating crystal 11 to increase becomes strong, contrary to the case where the amount is small.

  As shown in FIG. 3B, since the bumps 7 are formed with this large gold-plated crystal 11, the bumps 7 having no step are formed regardless of the step of the polyimide film 3 whose surface is the base.

  FIG. 3C is a view of the bump 7 in the state of FIG. 3B as viewed from above, but the bump 7 itself is not formed along the bump resist 6 because the particles of the gold plating crystal 11 are large. That is, the bump resist 6 is expanded by the particles of the gold plating crystal 11, and a bump larger than the bump resist opening 10 can be formed. Therefore, even when the exposure time for the resist opening is shortened and the bump resist opening 10 becomes small, a bump having a size larger than that of the bump resist opening 10 can be formed.

  The effect of thallium concentration will be described with reference to FIGS. 4 (a) and 4 (b).

As shown in FIG. 4A, this shows the thallium concentration in the gold plating solution and the gold plating step filling amount when the bump 7 is formed using the gold plating solution. As the gold plating conditions at this time, a liquid temperature of 60 degrees, a current density of 0.8 A / dm ² , and a gold plating apparatus is used. It can be seen from the graph that when the thallium concentration is low (5 to 15 mg / l), almost no step can be embedded, but when the thallium concentration is high (25 to 35 mg / l), the amount of embedding increases rapidly. . In particular, since the thickness of the polyimide film 2 is about 3 μm this time, it can be seen from this graph that the thallium concentration is preferably about 30 mg / l.

As shown in FIG. 4B, this shows the thallium concentration in the gold plating solution and the amount of gold plating bump swelling (one side) when the bump 7 is formed using the gold plating solution. As the gold plating conditions at this time, a liquid temperature of 60 degrees, a current density of 0.8 A / dm ² , and a gold plating apparatus is used. From the graph, the bump 7 hardly swells when the thallium concentration is low (5 to 15 mg / l), but the bump bulge amount increases rapidly when the thallium concentration is high (25 to 35 mg / l). I understand.

  The gold plating solution, the gold plating method, the semiconductor device manufacturing method, and the semiconductor device according to the present invention are useful as a bump forming method using the gold plating method and a bumped semiconductor device using the bump forming method.

FIG. 3 is a process diagram showing an outline of a method used in a semiconductor device manufacturing process, in particular, bump formation, as an embodiment of the present invention. It is a schematic explanatory drawing about how thallium in a sulfurous acid system gold plating solution changes the crystal state of a bump as a comparative example of the present invention. It is a schematic explanatory drawing about how thallium in a sulfurous acid system gold plating solution changes the crystal state of a bump as an embodiment of the present invention. It is a schematic explanatory drawing (graph) about the effect by thallium concentration as an embodiment of the present invention. It is process drawing which shows the outline of the manufacturing process of the conventional semiconductor device, especially the method used in bump formation. It is a schematic explanatory drawing of the problem which generate | occur | produces in the manufacturing process of the conventional semiconductor device, especially bump formation.

Explanation of symbols

DESCRIPTION OF SYMBOLS 1 Semiconductor electrode 2 Surface protective film 3 Barrier metal 4 Bump mask 5 UV
6 Bump resist 7 Bump 8 Bump surface step 9 Thin film protective film 10 Bump resist opening 11 Gold-plated crystal

Claims (4)

  A gold plating solution characterized in that a thallium concentration, which is a component in a sulfite-based gold plating solution, is 25 to 35 mg / l. Gold claim 1 using a gold plating solution according, gold plating solution temperature 60 to 65 degrees, and performing gold plating gold plating current density under conditions of 0.4~0.8A / dm ² Plating method. A step of covering the entire surface of the semiconductor substrate on which the semiconductor electrode is formed with a surface protective film and forming an opening of the surface protective film on the semiconductor electrode; forming a barrier metal on the entire surface of the semiconductor substrate; Forming a bump on the barrier metal corresponding to the opening, and using the sulfite-based gold plating solution having a thallium concentration of 25 to 35 mg / l when forming the bump, A bump is formed by performing gold plating using the barrier metal as an electrode under conditions of 60 to 65 degrees and a gold plating current density of 0.4 to 0.8 A / dm ² .   A semiconductor electrode formed on the semiconductor substrate; a surface protective film covering the entire surface of the semiconductor substrate; and an opening formed on the semiconductor electrode; a barrier metal film and a bump formed in order on the opening of the surface protective film; A semiconductor device, wherein the surface protection film is made of a polyimide film, and the bumps are formed using a sulfite-based gold plating solution having a thallium concentration of 25 to 35 mg / l.

Images