JP2006278523A - Wafer and its manufacturing method, and semiconductor substrate and its manufacturing method - Google Patents

Wafer and its manufacturing method, and semiconductor substrate and its manufacturing method Download PDF

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JP2006278523A
JP2006278523A JP2005092637A JP2005092637A JP2006278523A JP 2006278523 A JP2006278523 A JP 2006278523A JP 2005092637 A JP2005092637 A JP 2005092637A JP 2005092637 A JP2005092637 A JP 2005092637A JP 2006278523 A JP2006278523 A JP 2006278523A
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wafer
manufacturing
film
convex portion
semiconductor substrate
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Kazuyuki Umetsu
一之 梅津
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Dowa Holdings Co Ltd
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Dowa Mining Co Ltd
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  • Recrystallisation Techniques (AREA)
  • Semiconductor Lasers (AREA)
  • Led Devices (AREA)
  • Crystals, And After-Treatments Of Crystals (AREA)
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  • Mechanical Treatment Of Semiconductor (AREA)

Abstract

<P>PROBLEM TO BE SOLVED: To provide a method for manufacturing a wafer by which the characteristic of an epitaxial film formed on the surface of the wafer can be made uniform and appropriate. <P>SOLUTION: The method is used to manufacture a wafer 10 so that an epitaxial film is formed on its surface 11A. It includes a preparation step to prepare a wafer 15 whose front surface 15A and rear surface 15B are made flat; a convex-part formation step wherein a central convex 19 with a projecting central area is formed on the surface of the wafer prepared in the preparation step, and a peripheral convex 20 with a projecting peripheral area is formed on the rear surface thereof; and a grinding step wherein a pressure F is given to the front surface 18A and the rear surface 18B of the wafer 18 processed in the convex formation step, so as to cause any distortion in the wafer 18 and the front and rear surfaces are ground flat. The side of the front surface 11A has a convex bending shape, and when the wafer 10 is heated to form an epitaxial film on the front surface 11A, it is deformed and becomes flat. <P>COPYRIGHT: (C)2007,JPO&INPIT

Description

本発明は、表面に膜を形成して半導体基板を製造するためのウェハ及びその製造方法、並びに半導体基板及びその製造方法に関する。   The present invention relates to a wafer for manufacturing a semiconductor substrate by forming a film on the surface, a manufacturing method thereof, and a semiconductor substrate and a manufacturing method thereof.

LEDを(発光ダイオード)始めとする半導体素子は半導体基板を加工して製造され、当該半導体基板は、ウェハの表面に膜を形成して製造される。例えば、GaAsウェハの表面に窒化ガリウムをエピタキシャル成長させてエピタキシャル膜を形成して半導体基板を製造し、当該半導体基板を加工してLD(レーザーダイオード)やLEDなどの発光素子を始めとする、多様な半導体素子が製造される(特許文献1)。   Semiconductor elements such as LEDs (light emitting diodes) are manufactured by processing a semiconductor substrate, and the semiconductor substrate is manufactured by forming a film on the surface of a wafer. For example, a semiconductor substrate is manufactured by epitaxially growing gallium nitride on the surface of a GaAs wafer to form an epitaxial film, and the semiconductor substrate is processed to produce various light emitting elements such as LD (laser diode) and LED. A semiconductor element is manufactured (Patent Document 1).

上記エピタキシャル成長を実施する場合、まず、ウェハの表面及び裏面を研削し、これらの表面及び裏面の研削痕を除去して、平坦形状で表面が鏡面加工されたウェハを準備する。次に、このウェハ1(図6の破線表示)を加熱装置のサセプター2に載置し、当該加熱装置のコイル3を用いてウェハ1を裏面1B側から加熱し、ウェハ1を所定温度にした状態で、このウェハ1の表面1Aにエピタキシャル膜を形成する。
特開2004‐356609号公報
When the epitaxial growth is performed, first, the front and back surfaces of the wafer are ground, and grinding marks on the front and back surfaces are removed to prepare a wafer having a flat shape and a mirror-finished surface. Next, the wafer 1 (shown by a broken line in FIG. 6) is placed on the susceptor 2 of the heating device, and the wafer 1 is heated from the back surface 1B side using the coil 3 of the heating device to bring the wafer 1 to a predetermined temperature. In this state, an epitaxial film is formed on the surface 1A of the wafer 1.
JP 2004-356609 A

ところが、上述の加熱処理時には、ウェハ1は、裏面1B側が先に加熱されるため、裏面1Bの熱膨張が表面1Aより大きいため、図6の実線に示すように、表面1A側に凹の湾曲形状に反ってしまう。このため、ウェハ1の表面1Aの温度が周辺部において低くなって不均一となり、エピタキシャル成長にばらつきが生じて、表面1Aに形成されるエピタキシャル膜の特性が不均一になってしまう。   However, during the above heat treatment, the wafer 1 is heated on the back surface 1B side first, so that the thermal expansion of the back surface 1B is larger than that of the front surface 1A. Therefore, as shown by the solid line in FIG. It will warp in shape. For this reason, the temperature of the surface 1A of the wafer 1 becomes lower at the peripheral portion and becomes non-uniform, variation in epitaxial growth occurs, and the characteristics of the epitaxial film formed on the surface 1A become non-uniform.

例えば、ウェハ1の表面1AにMOCVD技術を用いてエピタキシャル成長を実施し、LD構造のエピタキシャル膜を形成して半導体基板を製造した場合、この半導体基板の表面における外周に曇りが発生してエピタキシャル膜の特性が低下し、また、レーザー発振波長も半導体基板の表面において同心円形状の分布を示し、面内において不均一となってしまう。   For example, when a semiconductor substrate is manufactured by performing epitaxial growth on the surface 1A of the wafer 1 using MOCVD technology and forming an epitaxial film having an LD structure, fogging occurs on the outer periphery of the surface of the semiconductor substrate, and the epitaxial film is formed. The characteristics are deteriorated, and the laser oscillation wavelength also shows a concentric distribution on the surface of the semiconductor substrate and becomes non-uniform in the plane.

本発明の目的は、上述の事情を考慮してなされたものであり、表面に形成される膜の特性を均一で良好にできるウェハ及びその製造方法を提供することにある。
本発明の他の目的は、ウェハの表面に形成された膜の特性が均一で良好な半導体基板及びその製造方法を提供することにある。
SUMMARY OF THE INVENTION An object of the present invention is to provide a wafer and a method for manufacturing the same that can improve the characteristics of a film formed on the surface in a uniform and favorable manner.
Another object of the present invention is to provide a semiconductor substrate having uniform and good characteristics of a film formed on the surface of a wafer and a method for manufacturing the same.

上述の課題を解決するための第1の構成は、膜が形成される表面を備えたウェハにおいて、上記表面に上記膜を形成するための加熱処理時に反る形状と反対の上記表面側が、凸の湾曲形状に形成されていることを特徴とするウェハである。   In a first configuration for solving the above-described problem, in a wafer having a surface on which a film is formed, the surface side opposite to the shape warped during the heat treatment for forming the film on the surface is convex. The wafer is characterized by being formed into a curved shape.

第2の構成は、第1の構成に記載のウェハであって、上記表面に形成される膜が、エピタキシャル成長により形成される膜であることを特徴とするウェハである。   A second configuration is the wafer according to the first configuration, wherein the film formed on the surface is a film formed by epitaxial growth.

第3の構成は、表面に膜を形成するためのウェハを製造するウェハの製造方法であって、上記表面及び裏面が平坦面に形成されたウェハを準備する準備工程と、この準備工程にて準備されたウェハの上記表面に中央領域が突出する中央凸部を形成し、上記裏面に周辺領域が突出する周辺凸部を形成する凸部形成工程と、この凸部形成工程を経たウェハの上記表面及び上記裏面に圧力を作用して当該ウェハに歪を生じさせ、この状態で上記表面及び上記裏面を平面研削する研削工程とを有し、上記表面側に凸の湾曲形状を有するウェハを製造することを特徴とするウェハの製造方法である。   The third configuration is a wafer manufacturing method for manufacturing a wafer for forming a film on the front surface, and a preparation step for preparing a wafer having the front surface and the back surface formed on a flat surface, and the preparation step A convex portion forming step of forming a central convex portion protruding from the central region on the front surface of the prepared wafer and forming a peripheral convex portion protruding from the peripheral region on the back surface, and the above of the wafer having undergone the convex portion forming step, are described above. A wafer having a convex curved shape on the front surface side, wherein pressure is applied to the front surface and the back surface to cause distortion in the wafer, and in this state, the front surface and the back surface are ground. A method for manufacturing a wafer.

第4の構成は、第3の構成に記載のウェハの製造方法であって、上記研削工程の後に、ウェハの表面及び裏面の研削痕を除去する除去工程を実施することを特徴とするウェハの製造方法である。   A fourth configuration is a method for manufacturing a wafer according to the third configuration, wherein after the grinding step, a removal step of removing grinding traces on the front and back surfaces of the wafer is performed. It is a manufacturing method.

第5の構成は、第3または第4の構成に記載のウェハの製造方法であって、上記表面の中央凸部の突出量と裏面の周辺凸部の突出量との和が、形成するウェハの湾曲形状の反り量にほぼ等しく設定されることを特徴とするウェハの製造方法である。   A fifth configuration is the method for manufacturing a wafer according to the third or fourth configuration, wherein the sum of the protruding amount of the central convex portion on the front surface and the protruding amount of the peripheral convex portion on the back surface is formed. The method of manufacturing a wafer is characterized in that it is set to be approximately equal to the amount of warping of the curved shape.

第6の構成は、第3乃至第5の構成のいずれかに記載のウェハの製造方法であって、上記表面の中央凸部の外径が、裏面の周辺凸部の内径よりも小さいかまたは等しく設定されることを特徴とするウェハの製造方法である。   A sixth configuration is the method for manufacturing a wafer according to any one of the third to fifth configurations, wherein an outer diameter of the central convex portion on the front surface is smaller than an inner diameter of a peripheral convex portion on the rear surface, or The wafer manufacturing method is characterized by being set equal.

第7の構成は、第3乃至第6の構成のいずれかに記載のウェハの製造方法であって、上記中央凸部及び周辺凸部をエッチング処理にて形成することを特徴とするウェハの製造方法である。   A seventh configuration is a method for manufacturing a wafer according to any one of the third to sixth configurations, wherein the central convex portion and the peripheral convex portion are formed by an etching process. Is the method.

第8の構成は、第1または第2の構成に記載のウェハの表面に、膜が形成されて構成されたことを特徴とする半導体基板である。   The eighth configuration is a semiconductor substrate characterized in that a film is formed on the surface of the wafer described in the first or second configuration.

第9の構成は、第8の構成に記載の半導体基板であって、上記膜がエピタキシャル成長により形成された膜であることを特徴とする半導体基板である。   A ninth configuration is the semiconductor substrate according to the eighth configuration, wherein the film is a film formed by epitaxial growth.

第10の構成は、第3乃至第7の構成のいずれかに記載のウェハの製造方法によって得られたウェハの表面に膜を形成して、半導体基板を製造することを特徴とする半導体基板の製造方法である。   According to a tenth configuration, a semiconductor substrate is manufactured by forming a film on a surface of a wafer obtained by the wafer manufacturing method according to any one of the third to seventh configurations. It is a manufacturing method.

第11の構成は、第10の構成に記載の半導体基板の製造方法であって、上記ウェハの表面に形成する膜が、エピタキシャル成長により形成される膜であることを特徴とする半導体基板の製造方法である。   An eleventh configuration is the method for manufacturing a semiconductor substrate according to the tenth configuration, wherein the film formed on the surface of the wafer is a film formed by epitaxial growth. It is.

第1または第2の構成に記載の発明によれば、表面に膜を形成するための加熱処理時に反る形状と反対の、上記表面側に凸の湾曲形状にウェハが構成されたことから、このウェハの表面に膜を形成するための加熱処理時に当該ウェハを平坦化できる。この結果、上記加熱処理時にウェハの表面が均一な温度になるので、この表面に形成される膜の特性を当該表面において均一で良好にできる。   According to the invention described in the first or second configuration, the wafer is configured in a curved shape convex to the surface side opposite to the shape warped during the heat treatment for forming a film on the surface, The wafer can be flattened during heat treatment for forming a film on the surface of the wafer. As a result, since the surface of the wafer becomes a uniform temperature during the heat treatment, the characteristics of the film formed on this surface can be made uniform and favorable on the surface.

第3乃至第7の構成のいずれかに記載の発明によれば、ウェハの表面に中央凸部を、裏面に周辺凸部をそれぞれ形成し、このウェハに表面及び裏面から圧力を作用して歪を生じさせた状態で、表面及び裏面を平面研削することから、表面側に凸の湾曲形状のウェハを良好に製造することができる。   According to the invention described in any one of the third to seventh configurations, the central convex portion is formed on the front surface of the wafer and the peripheral convex portion is formed on the rear surface, and the wafer is distorted by applying pressure from the front surface and the rear surface. Since the surface and the back surface are subjected to surface grinding in the state where the above is generated, a curved wafer having a convex shape on the front surface side can be manufactured satisfactorily.

第8または第9の構成に記載の発明によれば、膜を形成するための加熱処理時にウェハが平坦になり、このウェハの表面の温度が均一になるので、この表面に形成される膜の特性が均一となり、全面に亘り均一な品質の半導体基板を製造することができる。   According to the invention described in the eighth or ninth configuration, the wafer becomes flat during the heat treatment for forming the film, and the temperature of the surface of the wafer becomes uniform. The characteristics are uniform, and a semiconductor substrate with uniform quality can be manufactured over the entire surface.

第10または第11の構成に記載の発明によれば、膜を形成するための加熱処理時にウェハが平坦になるので、このウェハの表面の温度が均一になって、この表面に形成される膜の特性を均一で良好にでき、この結果、全面に亘り品質が均一な半導体基板を製造することができる。   According to the invention described in the tenth or eleventh configuration, since the wafer becomes flat during the heat treatment for forming the film, the temperature of the surface of the wafer becomes uniform, and the film formed on the surface These characteristics can be made uniform and satisfactory, and as a result, a semiconductor substrate having uniform quality over the entire surface can be manufactured.

以下、本発明を実施するための最良の形態を、図面に基づき説明する。
図1は、本発明に係るウェハの一実施の形態を示す側面図である。図2は、図1のウェハを示し、(A)が表面図、(B)が裏面図である。尚、図2(A)(B)に記載された線はウェハの湾曲構造を示す等高線である。
The best mode for carrying out the present invention will be described below with reference to the drawings.
FIG. 1 is a side view showing an embodiment of a wafer according to the present invention. FIG. 2 shows the wafer of FIG. 1, where (A) is a front view and (B) is a back view. 2A and 2B are contour lines indicating the curved structure of the wafer.

図示しない半導体基板を製造するためのウェハ10は、図1及び図2に示すように、表面11Aが鏡面加工され、裏面11Bが粗面に加工されている。このウェハ10の表面11Aに膜が形成され、例えばエピタキシャル成長によるエピタキシャル膜が形成されて、半導体基板が製造される。   As shown in FIGS. 1 and 2, a wafer 10 for manufacturing a semiconductor substrate (not shown) has a front surface 11A mirror-finished and a back surface 11B processed rough. A film is formed on the surface 11A of the wafer 10, for example, an epitaxial film is formed by epitaxial growth, and a semiconductor substrate is manufactured.

更に、上記ウェハ10は、表面11Aにエピタキシャル膜を形成するために加熱処理されるが、この加熱処理時に反る形状と反対の形状、つまり、表面11A側に凸の湾曲形状で、図2にも示すように、表面11Aが凸曲面に、裏面11Bが凹曲面にそれぞれ形成されて構成される。このウェハ10の反り量Hは、平坦なウェハが上記加熱処理されたときに反る反り量H0(図6)に対応して設定され、例えば、この反り量H0とほぼ等しく設定されて、上記加熱処理時にウェハ10が平坦になるように構成される。ここで、ウェハ10の反り量Hは、凸曲面形状の表面11Aの頂点Pと、凹曲面形状の裏面11Bにおける底面Nとの距離である。この反り量Hは、例えば5〜20μmの値に設定される。当該反り量Hは、後述する成膜工程において、ウェハの加熱により生じるウェハのそりをキャンセルできる量を適宜選択すれば良い。   Further, the wafer 10 is subjected to heat treatment to form an epitaxial film on the surface 11A. The wafer 10 has a shape opposite to the shape warped during the heat treatment, that is, a curved shape convex to the surface 11A side, as shown in FIG. As shown, the front surface 11A is formed as a convex curved surface, and the back surface 11B is formed as a concave curved surface. The warpage amount H of the wafer 10 is set corresponding to the warpage amount H0 (FIG. 6) when the flat wafer is subjected to the heat treatment. For example, the warpage amount H is set substantially equal to the warpage amount H0. The wafer 10 is configured to be flat during the heat treatment. Here, the warpage amount H of the wafer 10 is a distance between the apex P of the convex curved surface 11A and the bottom surface N of the concave curved back surface 11B. The warp amount H is set to a value of 5 to 20 μm, for example. The warpage amount H may be selected as appropriate so as to cancel the warpage of the wafer caused by the heating of the wafer in the film forming process described later.

従って、このウェハ10の表面11Aにエピタキシャル膜を形成すべく、当該ウェハ10を図3に示す加熱装置12のサセプター13に載置し、コイル14により上記ウェハ10を裏面11B側から加熱したとき、このウェハ10は、図3の破線に示す湾曲形状から実線に示す平坦形状に変形し、ウェハ10の表面11Aにおける全面が均一な温度に加熱される。このため、上記加熱状態下において、例えば、MOCVD技術を用いてウェハ10の表面11Aにエピタキシャル膜を形成して、LD構造をもつ半導体基板を製造したとき、このエピタキシャル膜の特性は、表面11Aの全面に亘り均一となる。即ち、半導体基板におけるエピタキシャル膜の外周に曇りが発生せず、且つレーザー発振波長も半導体基板の全面に亘り均一で良好なものとなる。   Therefore, when the wafer 10 is placed on the susceptor 13 of the heating device 12 shown in FIG. 3 to form an epitaxial film on the front surface 11A of the wafer 10, and the wafer 10 is heated from the back surface 11B side by the coil 14, The wafer 10 is deformed from the curved shape shown by the broken line in FIG. 3 to the flat shape shown by the solid line, and the entire surface of the surface 11A of the wafer 10 is heated to a uniform temperature. Therefore, when a semiconductor substrate having an LD structure is manufactured by forming an epitaxial film on the surface 11A of the wafer 10 using, for example, the MOCVD technique under the above heating condition, the characteristics of the epitaxial film are as follows. It becomes uniform over the entire surface. That is, no fogging occurs on the outer periphery of the epitaxial film in the semiconductor substrate, and the laser oscillation wavelength is uniform and good over the entire surface of the semiconductor substrate.

次に、ウェハ10を上述の如く表面11A側に凸の湾曲形状に構成する製造手順を、図4を用いて説明する。この製造手順は、図4(A)に示す準備工程と、図4(B)〜(D)に示す凸部形成工程と、図4(E)に示す研削工程と、図4(F)及び(G)に示す除去工程とを有してなる。表面11A側に凸の湾曲形状を有するウェハは、この後、ポリッシュ(または研磨)工程を経て、成膜工程において所定の膜が形成される。   Next, a manufacturing procedure for forming the wafer 10 in a curved shape convex toward the surface 11A as described above will be described with reference to FIG. This manufacturing procedure includes a preparation step shown in FIG. 4 (A), a protrusion forming step shown in FIGS. 4 (B) to 4 (D), a grinding step shown in FIG. 4 (E), and FIGS. (G) and the removal process. A wafer having a convex curved shape on the surface 11A side is then subjected to a polishing (or polishing) process, and a predetermined film is formed in the film forming process.

まず、準備工程では、図4(A)に示すように、インゴットからスライスされた厚肉のウェハ原板において、表面15A及び裏面15Bを平坦面に形成してウェハ15を準備する。   First, in the preparation step, as shown in FIG. 4A, a wafer 15 is prepared by forming a front surface 15A and a back surface 15B on a flat surface of a thick wafer original plate sliced from an ingot.

次に、凸部形成工程では、まず、図4(B)及び図5に示すように、ウェハ15における表面15Aの中央領域に円形状のレジスト膜16を施し、裏面15Bの周辺領域にリング形状のレジスト膜17を施す。ここで、ウェハ15が2インチ以上であれば本発明を適用可能であるが、例えば、ウェハ15が3インチウェハの場合は、外径D0がD0=76mmとなるので、上記レジスト膜16の外径d1を、例えば40mm、上記レジスト膜17の内径d2を、例えば50mmにそれぞれ設定する。そして、このレジスト膜16及び17をマスクにしてウェハ15をエッチング処理し(図4(C))、その後、上記レジスト膜16及び17を除去して、表面18Aに中央凸部19が形成され、裏面18Bに周辺凸部20が形成されたウェハ18を形成する(図4(D))。尚、上記マスクは、レジスト膜に限られるものではなく、マスキングテープを用いることもできる。   Next, in the convex portion forming step, first, as shown in FIGS. 4B and 5, a circular resist film 16 is applied to the central region of the front surface 15A of the wafer 15, and a ring shape is formed in the peripheral region of the back surface 15B. The resist film 17 is applied. Here, the present invention can be applied if the wafer 15 is 2 inches or more. For example, if the wafer 15 is a 3-inch wafer, the outer diameter D0 is D0 = 76 mm. The diameter d1 is set to 40 mm, for example, and the inner diameter d2 of the resist film 17 is set to 50 mm, for example. Then, the wafer 15 is etched using the resist films 16 and 17 as a mask (FIG. 4C), and then the resist films 16 and 17 are removed to form a central convex portion 19 on the surface 18A. The wafer 18 having the peripheral protrusion 20 formed on the back surface 18B is formed (FIG. 4D). The mask is not limited to a resist film, and a masking tape can also be used.

上記ウェハ18において、中央凸部19は円形状であり、その外径D1は前記レジスト膜16の外径d1と同一径である。また、周辺凸部20はリング形状であり、その内径D2は、前記レジスト膜17の内径d2と同一径である。このとき、中央凸部19の外径D1は、周辺凸部20の内径D2によりも小さいかまたは等しく設定される。これは、後述の研削工程でウェハ18に表面18A及び裏面18Bから押圧力Fが作用した際に、このウェハ18を変形させ易くするためである。   In the wafer 18, the central protrusion 19 has a circular shape, and the outer diameter D <b> 1 is the same as the outer diameter d <b> 1 of the resist film 16. The peripheral convex portion 20 has a ring shape, and its inner diameter D2 is the same as the inner diameter d2 of the resist film 17. At this time, the outer diameter D1 of the central protrusion 19 is set to be smaller or equal to the inner diameter D2 of the peripheral protrusion 20. This is because the wafer 18 is easily deformed when a pressing force F acts on the wafer 18 from the front surface 18A and the back surface 18B in a grinding process described later.

更に、中央凸部19の突出量H1と周辺凸部20の突出量H2との和は、形成されるウェハ10の表面11A側に凸の湾曲形状の反り量H(図1)とほぼ等しく設定される。従って、上記突出量H1とH2との和は5〜20μmに設定される。このように、ウェハ18の表面18A、裏面18Bは、中央凸部19、周辺凸部20がそれぞれ形成されて共に段差形状に構成される。   Further, the sum of the protrusion amount H1 of the central protrusion 19 and the protrusion amount H2 of the peripheral protrusion 20 is set to be approximately equal to the curvature amount H (FIG. 1) of the convex curve on the surface 11A side of the wafer 10 to be formed. Is done. Therefore, the sum of the protrusion amounts H1 and H2 is set to 5 to 20 μm. As described above, the front surface 18A and the back surface 18B of the wafer 18 are formed in a stepped shape by forming the central convex portion 19 and the peripheral convex portion 20, respectively.

次に、研削工程では、凸部形成工程を経て中央凸部19及び周辺凸部20が形成されたウェハ18を研削装置の上下定盤間で挟持し、これらの定盤によりウェハ18の表面18A及び裏面18Bに、互いに接近する方向の押圧力Fを作用する。ウェハ18は、表面18A及び裏面18Bが段差形状に構成されているため、上記押圧力Fの作用によって変形し歪が生ずる。この研削工程では、このようにウェハ18に歪を生じさせた状態で、注入される研削液により表面18A及び裏面18Bが平面になるように、当該ウェハ18を平面研削する。この研削工程により、ウェハ18の表面18A及び裏面18Bが合計で40μm以上研削されて、薄肉で平坦形状のウェハ21が形成され、表面21A、裏面21Bがそれぞれ粗面加工される。これは、片面で20μm研削すれば、上述した準備工程におけるスライスで生じた厚さムラと、スライスダメージ層とを除去できるからである、   Next, in the grinding step, the wafer 18 on which the central convex portion 19 and the peripheral convex portion 20 are formed through the convex portion forming step is sandwiched between the upper and lower surface plates of the grinding apparatus, and the surface 18A of the wafer 18 is formed by these surface plates. And the pressing force F in the direction approaching each other acts on the back surface 18B. Since the front surface 18A and the back surface 18B of the wafer 18 are formed in a stepped shape, the wafer 18 is deformed and distorted by the action of the pressing force F. In this grinding step, the wafer 18 is subjected to surface grinding so that the front surface 18A and the back surface 18B become flat with the injected grinding liquid in a state in which the wafer 18 is distorted as described above. By this grinding process, the front surface 18A and the back surface 18B of the wafer 18 are ground for a total of 40 μm or more to form a thin and flat wafer 21 and the front surface 21A and the back surface 21B are roughened. This is because, if 20 μm is ground on one side, the thickness unevenness caused by slicing in the above-described preparation step and the slice damage layer can be removed.

但し、この研削量は、形成すべきウェハ10の種類に応じて適宜変更して設定される。また、研削工程における表面18A、裏面18Bの研削は、研削装置により表面18A、裏面18Bを同時に研削する。尚、図4(E)中の一点鎖線は、ウェハ18が平面研削されるときの研削面の一例を示す。   However, this grinding amount is appropriately changed and set according to the type of the wafer 10 to be formed. Further, in the grinding process, the front surface 18A and the back surface 18B are ground simultaneously by the grinding device. Note that a one-dot chain line in FIG. 4E shows an example of a grinding surface when the wafer 18 is surface ground.

上記研削工程の後に除去工程を実施して、ウェハ21の表面21A及び裏面21Bの研削痕を、例えばエッチング処理によって除去する。この除去工程の実施により、平坦形状の上記ウェハ21は、研削工程での歪が解消されて、表面11A側に凸の湾曲形状に変形されてウェハ10になる。   After the grinding step, a removal step is performed to remove grinding marks on the front surface 21A and the back surface 21B of the wafer 21 by, for example, an etching process. By carrying out this removal step, the flat wafer 21 is freed from distortion in the grinding step and transformed into a convex curved shape on the surface 11A side to become the wafer 10.

除去工程が完了したウェハ10は、ポリッシュ(または研磨)工程にて、表面11A側をメカノケミカル研磨等により鏡面研磨した後、有機溶剤、アルカリ系水溶液、純水、等で洗浄し、更にエッチング液で極微量のエッチング等を行った後、純水でリンスして仕上げる。当該仕上げ工程では、上述の湾曲構造はそのまま維持される。   After the removal process is completed, the surface 11A side is mirror-polished by mechanochemical polishing or the like in a polishing (or polishing) process, and then washed with an organic solvent, an alkaline aqueous solution, pure water, or the like, and further an etching solution After a very small amount of etching, etc., rinse with pure water and finish. In the finishing step, the above-described curved structure is maintained as it is.

仕上げられたウェハ10は、成膜工程において、加熱装置に搬入されて加熱され、ウェハ10の表面11Aに、所定の物質のエピタキシャル成長が実施されて膜(エピタキシャル膜)は形成され、半導体基板となる。   In the film formation process, the finished wafer 10 is carried into a heating device and heated, and a predetermined material is epitaxially grown on the surface 11A of the wafer 10 to form a film (epitaxial film), which becomes a semiconductor substrate. .

以上のように構成されたことから、上記実施の形態によれば、次の効果(1)及び(2)を奏する。
(1)ウェハ10が、表面11Aにエピタキシャル膜を形成するための加熱処理時に反る形状と反対の、上記表面11A側に凸の湾曲形状に構成されたことから、このウェハ10の表面11Aにエピタキシャル膜を形成するための加熱処理時に当該ウェハ10を平坦化できる。この結果、上記加熱処理時に平坦形状のウェハ10の表面が均一な温度となるので、この表面11Aに形成されるエピタキシャル膜の特性を、当該表面11Aにおいて均一で良好にできる。従って、表面の全面に亘りに均一な品質の半導体基板を製造することができる。
With the above configuration, the following effects (1) and (2) are achieved according to the above embodiment.
(1) Since the wafer 10 is formed in a curved shape that is convex to the surface 11A side, opposite to the shape that warps during heat treatment for forming an epitaxial film on the surface 11A, the surface 10A of the wafer 10 The wafer 10 can be planarized during the heat treatment for forming the epitaxial film. As a result, since the surface of the flat wafer 10 has a uniform temperature during the heat treatment, the characteristics of the epitaxial film formed on the surface 11A can be uniform and favorable on the surface 11A. Therefore, a semiconductor substrate with uniform quality can be manufactured over the entire surface.

(2)ウェハ18の表面18Aに中央凸部19を、裏面18Bに周辺凸部20をそれぞれ形成し、このウェハ18に表面18A及び裏面18Bから押圧力Fを作用して歪を生じさせた状態で、これらの表面18A及び裏面18Bを平面研削してウェハ21を形成し、このウェハ21の表面21A及び裏面21Bの研削痕を除去してウェハ10を製造することから、表面11A側に凸の湾曲形状のウェハ10を良好に製造することができる。   (2) A state in which the central convex portion 19 is formed on the front surface 18A of the wafer 18 and the peripheral convex portion 20 is formed on the back surface 18B, and the wafer 18 is distorted by applying the pressing force F from the front surface 18A and the back surface 18B. Thus, the front surface 18A and the back surface 18B are surface ground to form the wafer 21, and the wafer 10 is manufactured by removing the grinding marks on the front surface 21A and the back surface 21B of the wafer 21. The curved wafer 10 can be manufactured satisfactorily.

以上、本発明を上記実施の形態に基づいて説明したが、本発明はこれに限定されるものではない。例えば、本実施の形態では、ウェハ10の表面11Aにエピタキシャル膜を形成するものを述べたが、他の膜を形成する場合であっても、本発明を適用できる。   As mentioned above, although this invention was demonstrated based on the said embodiment, this invention is not limited to this. For example, in the present embodiment, the case where the epitaxial film is formed on the surface 11A of the wafer 10 has been described. However, the present invention can be applied even when another film is formed.

(実施例1)
(準備工程)
外径約80mmのGaAsインゴットから、ワイヤーソーを用いてスライス板とし、当該スライス板を炭化水素系の有機溶剤で洗浄して、厚さ約0.6mmの粗GaAsウェハを得た。当該粗GaAsウェハの表(おもて)面の中心に径40mm、裏面の径50mmの外側にそれぞれレジスト膜を設けた。尚、レジスト膜には東京応化(株)製のフォトレジストを用い、ホットプレート上での1分間加熱により硬化させた。
Example 1
(Preparation process)
A GaAs ingot having an outer diameter of about 80 mm was used as a slice plate using a wire saw, and the slice plate was washed with a hydrocarbon-based organic solvent to obtain a crude GaAs wafer having a thickness of about 0.6 mm. A resist film was provided on the outside of the front surface of the rough GaAs wafer with a diameter of 40 mm and a back surface of 50 mm. Note that a photoresist made by Tokyo Ohka Co., Ltd. was used as the resist film, and was cured by heating on a hot plate for 1 minute.

(凸部形成工程)
当該レジスト膜が設けられた粗GaAsウェハを、エッチング液中に浸積し表裏両面のエッチングを行った。エッチング液として、25℃のアンモニア+過酸化水素+純水(1:2:4)を用い約1分間のエッチングにより、表裏両面を合わせて8μmのエッチングを行った。エッチング完了後、アセトンを満たした超音波洗浄槽内で5分間の洗浄を行い、表面に突出量4μmの中央凸部を、裏面に突出量4μmの周辺凸部を有するGaAsウェハを得た。
(Projection forming process)
The rough GaAs wafer provided with the resist film was immersed in an etching solution to etch both the front and back surfaces. Etching of 8 μm was performed for both the front and back surfaces by etching for about 1 minute using 25 ° C. ammonia + hydrogen peroxide + pure water (1: 2: 4) as an etchant. After completion of the etching, cleaning was performed for 5 minutes in an ultrasonic cleaning tank filled with acetone to obtain a GaAs wafer having a central convex portion with a protrusion amount of 4 μm on the front surface and a peripheral convex portion with a protrusion amount of 4 μm on the back surface.

(研削工程)
当該中央凸部と周辺凸部とを有するGaAsウェハへ、外周端面研削機によるベベル研削を行い、外周76.0mmのGaAsウェハを得た。当該GaAsウェハを両面研削加工機のガラス定盤へ設置し、アルミナ砥石と純水とを供給しながら上定盤圧力2.0kg/cmを掛け、表裏両面のラップ加工を行った。研削量は表裏両面で40μmとした。
(Grinding process)
The GaAs wafer having the central convex portion and the peripheral convex portion was subjected to bevel grinding with an outer peripheral end surface grinder to obtain a GaAs wafer having an outer peripheral length of 76.0 mm. The GaAs wafer was placed on a glass surface plate of a double-side grinding machine, and an upper surface plate pressure of 2.0 kg / cm 2 was applied while supplying an alumina grindstone and pure water to perform lapping on both sides. The grinding amount was 40 μm on both the front and back sides.

(除去工程)
研削後のGaAsウェハを、再びエッチング液中に浸積し表裏両面のエッチングを行った。エッチング液として、17℃のアンモニア+過酸化水素+純水(1:8:11)を用い約2分間のエッチングにより、表裏両面を合わせて約10μmのエッチングを行って、ラップ工程での研削痕の除去を行った。
(Removal process)
The ground GaAs wafer was again immersed in the etching solution, and both the front and back surfaces were etched. Etching of about 10 μm is performed on both the front and back surfaces by etching for about 2 minutes using 17 ° C. ammonia + hydrogen peroxide + pure water (1: 8: 11) as an etching solution. Was removed.

(ポリッシュ(または研磨)工程)
再エッチング後のGaAsウェハの裏面に接着剤(液状ワックス)を設け、表面を平坦に研削加工したアルミナセラミック板に添付した後、片側研磨機を用い、次亜塩素酸系水溶液と多孔質研磨布とによるメカノケミカル研磨を行った後、純水で1分間洗浄し窒素ブロー乾燥を行った。この乾燥の後、GaAsウェハをアルミナセラミック板から剥ぎ取った。剥ぎ取られたGaAsウェハを、まず有機溶剤洗浄によりワックスを溶解除去し、アルカリ系水溶液にて洗浄後、純水にてリンスし、IPA蒸気により乾燥させた。
当該乾燥後のGaAsウェハを、20℃のアンモニア+過酸化水素+純水(1:1:20)を用いて極微量のエッチングを行い、純水にてリンスし、スピン乾燥を行ってGaAsウェハを得た。
当該得られたGaAsウェハのそり形状写真及びその模式図を図7(A).(B)に示す。
図7(A).(B)から、実施例1に係るGaAsウェハは、表面側に凸の湾曲構造を有するウェハであることが確認された。尚、GaAsウェハのそり形状模式図である図7(B)において、O.F.とはオリエンテーションフラットのことであり、I.F.とはインデックスフラットのことであり、記載された線は2μm毎の等高線である。
(Polish (or polishing) process)
Adhesive (liquid wax) is provided on the backside of the GaAs wafer after re-etching, attached to an alumina ceramic plate with a flat ground surface, and then a hypochlorous acid aqueous solution and a porous polishing cloth are used with a single-side polishing machine After performing mechanochemical polishing with the above, it was washed with pure water for 1 minute and then blown with nitrogen. After this drying, the GaAs wafer was peeled off from the alumina ceramic plate. The peeled GaAs wafer was first dissolved and removed by washing with an organic solvent, washed with an alkaline aqueous solution, rinsed with pure water, and dried with IPA vapor.
The dried GaAs wafer is etched using a trace amount of ammonia + hydrogen peroxide + pure water (1: 1: 20) at 20 ° C., rinsed with pure water, spin-dried, and GaAs wafer. Got.
FIG. 7 (A) shows a photograph of the warped shape of the obtained GaAs wafer and a schematic diagram thereof. Shown in (B).
FIG. 7 (A). From (B), it was confirmed that the GaAs wafer according to Example 1 was a wafer having a convex curved structure on the surface side. In FIG. 7B, which is a schematic diagram of a warp shape of a GaAs wafer, OF. Is an orientation flat, IF is an index flat, and the described lines are contour lines every 2 μm.

(成膜工程)
当該得られたGaAsの表面にエピタキシャル膜を形成すべく、当該ウェハを加熱装置のサセプターに載置し、裏面側から加熱したとき、このウェハは、湾曲形状から平坦形状に変形し、ウェハの表面における全面が均一な温度に加熱される。このため、上記加熱状態下において、MOCVD技術を用いてエピタキシャル膜を形成し、LD構造をもつ半導体基板を製造したとき、このエピタキシャル膜の特性は、表面の全面に亘り均一となった。そして、半導体基板におけるエピタキシャル膜の外周に曇りが発生せず、且つレーザー発振波長も半導体基板の全面に亘り均一で良好なものであった。
(Film formation process)
When the wafer is placed on a susceptor of a heating device and heated from the back side in order to form an epitaxial film on the surface of the obtained GaAs, the wafer is deformed from a curved shape to a flat shape, and the wafer surface Is heated to a uniform temperature. For this reason, when an epitaxial film was formed using the MOCVD technique under the above heating condition and a semiconductor substrate having an LD structure was manufactured, the characteristics of the epitaxial film became uniform over the entire surface. Further, no fogging occurred on the outer periphery of the epitaxial film in the semiconductor substrate, and the laser oscillation wavelength was uniform and good over the entire surface of the semiconductor substrate.

(実施例2)
実施例1にて説明した、「凸部形成工程」において、2分間のエッチングにより、表裏両面を合わせて14μmのエッチングを行った以外は、実施例1と同様の処理を行って、実施例2に係るGaAsウェハを得た。当該得られたGaAsウェハのそり形状写真及びその模式図を図8(A).(B)に示す。図8(A).(B)から、実施例2に係るGaAsウェハは、表面側に凸の湾曲構造を有するウェハであることが確認された。尚、GaAsウェハのそり形状模式図である図8(B)において、O.F.、I.F.、記載された等高線は実施例1と同様である。
(Example 2)
In the “projection forming step” described in Example 1, the same process as in Example 1 was performed, except that etching was performed for 2 minutes, and both the front and back surfaces were etched to 14 μm. A GaAs wafer was obtained. A warp shape photograph and a schematic diagram of the obtained GaAs wafer are shown in FIG. Shown in (B). FIG. From (B), it was confirmed that the GaAs wafer according to Example 2 was a wafer having a convex curved structure on the surface side. In FIG. 8B, which is a schematic view of the warp shape of a GaAs wafer, OF. , IF, and the indicated contour lines are the same as in Example 1.

(比較例1)
実施例1にて説明した、「凸部形成工程」である、マスキング、そり形状修正エッチング、マスキング除去を行わない以外は、実施例1と同様の処理を行って、従来の技術に係るGaAsウェハを得た。当該得られたGaAsウェハのそり形状写真及びその模式図を図9(A).(B)に示す。図9(A).(B)から、比較例1に係るGaAsウェハは、鞍型の湾曲構造を有するウェハであることが確認された。尚、GaAsウェハのそり形状模式図である図9(B)おいて、O.F.、I.F.、記載された等高線は実施例1と同様である。
(Comparative Example 1)
A GaAs wafer according to the related art is performed by performing the same process as in Example 1 except that masking, warp shape correction etching, and masking removal, which are the “convex part forming step” described in Example 1, are not performed. Got. A warp shape photograph and a schematic diagram of the obtained GaAs wafer are shown in FIG. Shown in (B). FIG. 9 (A). From (B), it was confirmed that the GaAs wafer which concerns on the comparative example 1 is a wafer which has a bowl-shaped curved structure. In FIG. 9B, which is a schematic diagram of a warp shape of a GaAs wafer, OF. , IF, and the indicated contour lines are the same as in Example 1.

「成膜工程」において、当該得られたGaAsの表面にエピタキシャル膜を形成すべく、当該ウェハを加熱装置のサセプターに載置し、裏面側から加熱したとき、このウェハは鞍型の湾曲構造であったため、外周が中央よりもせり上がった表面側に凹の湾曲形状に変形し、ウェハの表面が不均一な温度に加熱された。このため、上記加熱状態下において、MOCVD技術を用いてエピタキシャル膜を形成し、LD構造をもつ半導体基板を製造したとき、このエピタキシャル膜の特性は表面の全面に亘って均一とはならず、半導体基板におけるエピタキシャル膜の外周に曇りが発生し、且つレーザー発振波長も半導体基板の中央部と周辺部とでは異なるものであった。   In the “film formation process”, when the wafer is placed on the susceptor of the heating device and heated from the back side to form an epitaxial film on the surface of the obtained GaAs, the wafer has a bowl-shaped curved structure. As a result, the outer periphery was deformed into a concave curved shape on the surface side rising from the center, and the surface of the wafer was heated to a non-uniform temperature. For this reason, when an epitaxial film is formed using the MOCVD technique under the above heating condition and a semiconductor substrate having an LD structure is manufactured, the characteristics of the epitaxial film are not uniform over the entire surface. Clouding occurred on the outer periphery of the epitaxial film on the substrate, and the laser oscillation wavelength was also different between the central portion and the peripheral portion of the semiconductor substrate.

本発明に係るウェハの一実施の形態を示す側面図である。1 is a side view showing an embodiment of a wafer according to the present invention. 図1のウェハを示し、(A)が表面図、(B)が裏面図である。The wafer of FIG. 1 is shown, (A) is a front view, (B) is a back view. 図1のウェハにエピタキシャル膜を形成するために加熱処理したときの状況を示す側面図である。It is a side view which shows the condition when heat-processing in order to form an epitaxial film in the wafer of FIG. 図1のウェハを製造する製造工程を示す動作図である。It is an operation | movement diagram which shows the manufacturing process which manufactures the wafer of FIG. 図4(B)のレジスト膜の塗布状況を示し、(A)が表面図、(B)が裏面図である。FIG. 4B shows a coating state of the resist film, where FIG. 4A is a front view and FIG. 4B is a back view. 従来のウェハにエピタキシャル膜を形成するために加熱処理したときの状況を示す側面図である。It is a side view which shows the condition when heat-processing in order to form an epitaxial film in the conventional wafer. 実施例1に係るウェハのそり形状写真(A)とその模式図(B)である。It is the curvature shape photograph (A) of the wafer which concerns on Example 1, and its schematic diagram (B). 実施例2に係るウェハのそり形状写真(A)とその模式図(B)である。It is the curvature shape photograph (A) of the wafer which concerns on Example 2, and its schematic diagram (B). 比較例1に係るウェハのそり形状写真(A)とその模式図(B)である。It is the curvature shape photograph (A) of the wafer which concerns on the comparative example 1, and its schematic diagram (B).

符号の説明Explanation of symbols

10 ウェハ
11A 表面
11B 裏面
12 加熱装置
19 中央凸部
20 周辺凸部
H、H0 反り量
H1、H2 突出量
D1 外径
D2 内径
DESCRIPTION OF SYMBOLS 10 Wafer 11A Front surface 11B Back surface 12 Heating device 19 Center convex part 20 Peripheral convex part H, H0 Warpage amount H1, H2 Protrusion amount D1 Outer diameter D2 Inner diameter

Claims (11)

膜が形成される表面を備えたウェハにおいて、
上記表面に上記膜を形成するための加熱処理時に反る形状と反対の上記表面側が、凸の湾曲形状に形成されていることを特徴とするウェハ。
In a wafer with a surface on which a film is formed,
A wafer characterized in that the surface side opposite to the shape warped during the heat treatment for forming the film on the surface is formed in a convex curved shape.
上記表面に形成される膜が、エピタキシャル成長により形成される膜であることを特徴とする請求項1に記載のウェハ。   The wafer according to claim 1, wherein the film formed on the surface is a film formed by epitaxial growth. 表面に膜を形成するためのウェハを製造するウェハの製造方法であって、
上記表面及び裏面が平坦面に形成されたウェハを準備する準備工程と、
この準備工程にて準備されたウェハの上記表面に中央領域が突出する中央凸部を形成し、上記裏面に周辺領域が突出する周辺凸部を形成する凸部形成工程と、
この凸部形成工程を経たウェハの上記表面及び上記裏面に圧力を作用して当該ウェハに歪を生じさせ、この状態で上記表面及び上記裏面を平面研削する研削工程とを有し、
上記表面側に凸の湾曲形状を有するウェハを製造することを特徴とするウェハの製造方法。
A wafer manufacturing method for manufacturing a wafer for forming a film on a surface,
A preparatory step of preparing a wafer in which the front and back surfaces are formed on a flat surface;
A convex portion forming step of forming a central convex portion protruding from the central region on the front surface of the wafer prepared in this preparation step, and forming a peripheral convex portion protruding from the peripheral region on the back surface;
A pressure step is applied to the front surface and the back surface of the wafer that has undergone the convex portion forming step to cause distortion in the wafer, and in this state, the surface and the back surface are ground to have a grinding step,
A method for producing a wafer, comprising producing a wafer having a convex curved shape on the surface side.
上記研削工程の後に、ウェハの表面及び裏面の研削痕を除去する除去工程を実施することを特徴とする請求項3に記載のウェハの製造方法。   4. The method for manufacturing a wafer according to claim 3, wherein after the grinding step, a removing step for removing grinding marks on the front surface and the back surface of the wafer is performed. 上記表面の中央凸部の突出量と裏面の周辺凸部の突出量との和が、形成するウェハの湾曲形状の反り量にほぼ等しく設定されることを特徴とする請求項3または4に記載のウェハの製造方法。   The sum of the protruding amount of the central convex portion on the front surface and the protruding amount of the peripheral convex portion on the back surface is set to be approximately equal to the warped amount of the curved shape of the wafer to be formed. Wafer manufacturing method. 上記表面の中央凸部の外径が、裏面の周辺凸部の内径よりも小さいかまたは等しく設定されることを特徴とする請求項3乃至5のいずれかに記載のウェハの製造方法。   6. The wafer manufacturing method according to claim 3, wherein an outer diameter of the central convex portion on the front surface is set smaller than or equal to an inner diameter of a peripheral convex portion on the rear surface. 上記中央凸部及び周辺凸部をエッチング処理にて形成することを特徴とする請求項3乃至6のいずれかに記載のウェハの製造方法。   7. The wafer manufacturing method according to claim 3, wherein the central convex portion and the peripheral convex portion are formed by an etching process. 請求項1または2に記載のウェハの表面に、膜が形成されて構成されたことを特徴とする半導体基板。   A semiconductor substrate comprising a film formed on the surface of the wafer according to claim 1. 上記膜が、エピタキシャル成長により形成された膜であることを特徴とする請求項8に記載の半導体基板。   The semiconductor substrate according to claim 8, wherein the film is a film formed by epitaxial growth. 請求項3乃至7のいずれかに記載のウェハの製造方法によって得られたウェハの表面に膜を形成して、半導体基板を製造することを特徴とする半導体基板の製造方法。   A method for manufacturing a semiconductor substrate, comprising: forming a film on a surface of a wafer obtained by the method for manufacturing a wafer according to claim 3 to manufacture a semiconductor substrate. 上記ウェハの表面に形成する膜が、エピタキシャル成長により形成される膜であることを特徴とする請求項10に記載の半導体基板の製造方法。   The method of manufacturing a semiconductor substrate according to claim 10, wherein the film formed on the surface of the wafer is a film formed by epitaxial growth.
JP2005092637A 2005-03-28 2005-03-28 Wafer and its manufacturing method, and semiconductor substrate and its manufacturing method Pending JP2006278523A (en)

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JP2008147364A (en) * 2006-12-08 2008-06-26 Toyota Motor Corp Apparatus and method for cleaning semiconductor wafer
JP2009152548A (en) * 2007-12-24 2009-07-09 Samsung Electro-Mechanics Co Ltd Wafer for chemical vapor deposition and method for manufacturing the same
JP2010192485A (en) * 2009-02-16 2010-09-02 Nichia Corp Method of working nitride semiconductor substrate

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JPH07249573A (en) * 1994-03-14 1995-09-26 Nippon Steel Corp Manufacture of semiconductor substrate
JP2002025923A (en) * 2000-07-11 2002-01-25 Hitachi Cable Ltd Method for manufacturing compound semiconductor substrate for movpe and compound semiconductor wafer using the same
JP2004356609A (en) * 2003-05-06 2004-12-16 Sumitomo Electric Ind Ltd Processing method for nitride semiconductor substrate

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JPH07249573A (en) * 1994-03-14 1995-09-26 Nippon Steel Corp Manufacture of semiconductor substrate
JP2002025923A (en) * 2000-07-11 2002-01-25 Hitachi Cable Ltd Method for manufacturing compound semiconductor substrate for movpe and compound semiconductor wafer using the same
JP2004356609A (en) * 2003-05-06 2004-12-16 Sumitomo Electric Ind Ltd Processing method for nitride semiconductor substrate

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2008147364A (en) * 2006-12-08 2008-06-26 Toyota Motor Corp Apparatus and method for cleaning semiconductor wafer
JP2009152548A (en) * 2007-12-24 2009-07-09 Samsung Electro-Mechanics Co Ltd Wafer for chemical vapor deposition and method for manufacturing the same
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