JP2006269858A - Ceramic circuit board, its manufacturing method, and power control component using the method - Google Patents
Ceramic circuit board, its manufacturing method, and power control component using the method Download PDFInfo
- Publication number
- JP2006269858A JP2006269858A JP2005087616A JP2005087616A JP2006269858A JP 2006269858 A JP2006269858 A JP 2006269858A JP 2005087616 A JP2005087616 A JP 2005087616A JP 2005087616 A JP2005087616 A JP 2005087616A JP 2006269858 A JP2006269858 A JP 2006269858A
- Authority
- JP
- Japan
- Prior art keywords
- circuit board
- ceramic
- etching resist
- manufacturing
- circuit pattern
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 239000000919 ceramic Substances 0.000 title claims abstract description 61
- 238000000034 method Methods 0.000 title claims abstract description 29
- 238000004519 manufacturing process Methods 0.000 title claims abstract description 18
- 238000005530 etching Methods 0.000 claims abstract description 61
- 229910052751 metal Inorganic materials 0.000 claims abstract description 49
- 239000002184 metal Substances 0.000 claims abstract description 49
- 239000000758 substrate Substances 0.000 claims abstract description 29
- 230000002093 peripheral effect Effects 0.000 claims description 13
- 239000004065 semiconductor Substances 0.000 claims description 4
- 230000007261 regionalization Effects 0.000 claims 1
- 238000009413 insulation Methods 0.000 abstract description 7
- 238000007747 plating Methods 0.000 description 17
- 239000000463 material Substances 0.000 description 13
- 238000000576 coating method Methods 0.000 description 11
- 229910052782 aluminium Inorganic materials 0.000 description 10
- 229910000679 solder Inorganic materials 0.000 description 10
- 238000005219 brazing Methods 0.000 description 8
- 239000000243 solution Substances 0.000 description 8
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 description 7
- PXHVJJICTQNCMI-UHFFFAOYSA-N Nickel Chemical compound [Ni] PXHVJJICTQNCMI-UHFFFAOYSA-N 0.000 description 6
- 238000002474 experimental method Methods 0.000 description 6
- 238000007650 screen-printing Methods 0.000 description 6
- 239000011248 coating agent Substances 0.000 description 5
- PMHQVHHXPFUNSP-UHFFFAOYSA-M copper(1+);methylsulfanylmethane;bromide Chemical compound Br[Cu].CSC PMHQVHHXPFUNSP-UHFFFAOYSA-M 0.000 description 5
- LFQSCWFLJHTTHZ-UHFFFAOYSA-N Ethanol Chemical compound CCO LFQSCWFLJHTTHZ-UHFFFAOYSA-N 0.000 description 4
- QAOWNCQODCNURD-UHFFFAOYSA-N Sulfuric acid Chemical compound OS(O)(=O)=O QAOWNCQODCNURD-UHFFFAOYSA-N 0.000 description 4
- 229910052802 copper Inorganic materials 0.000 description 4
- 239000010949 copper Substances 0.000 description 4
- 239000011888 foil Substances 0.000 description 4
- YXFVVABEGXRONW-UHFFFAOYSA-N Toluene Chemical compound CC1=CC=CC=C1 YXFVVABEGXRONW-UHFFFAOYSA-N 0.000 description 3
- 229910045601 alloy Inorganic materials 0.000 description 3
- 239000000956 alloy Substances 0.000 description 3
- 239000007864 aqueous solution Substances 0.000 description 3
- 229910052759 nickel Inorganic materials 0.000 description 3
- LTPBRCUWZOMYOC-UHFFFAOYSA-N Beryllium oxide Chemical compound O=[Be] LTPBRCUWZOMYOC-UHFFFAOYSA-N 0.000 description 2
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 description 2
- MHAJPDPJQMAIIY-UHFFFAOYSA-N Hydrogen peroxide Chemical compound OO MHAJPDPJQMAIIY-UHFFFAOYSA-N 0.000 description 2
- 229910052581 Si3N4 Inorganic materials 0.000 description 2
- 230000002411 adverse Effects 0.000 description 2
- 230000015556 catabolic process Effects 0.000 description 2
- ORTQZVOHEJQUHG-UHFFFAOYSA-L copper(II) chloride Chemical compound Cl[Cu]Cl ORTQZVOHEJQUHG-UHFFFAOYSA-L 0.000 description 2
- 229910052749 magnesium Inorganic materials 0.000 description 2
- 239000011347 resin Substances 0.000 description 2
- 229920005989 resin Polymers 0.000 description 2
- 229910052710 silicon Inorganic materials 0.000 description 2
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 description 2
- PIGFYZPCRLYGLF-UHFFFAOYSA-N Aluminum nitride Chemical compound [Al]#N PIGFYZPCRLYGLF-UHFFFAOYSA-N 0.000 description 1
- -1 Ammonium halide Chemical class 0.000 description 1
- OKTJSMMVPCPJKN-UHFFFAOYSA-N Carbon Chemical compound [C] OKTJSMMVPCPJKN-UHFFFAOYSA-N 0.000 description 1
- 229910021578 Iron(III) chloride Inorganic materials 0.000 description 1
- 229910000861 Mg alloy Inorganic materials 0.000 description 1
- GRYLNZFGIOXLOG-UHFFFAOYSA-N Nitric acid Chemical compound O[N+]([O-])=O GRYLNZFGIOXLOG-UHFFFAOYSA-N 0.000 description 1
- 235000004522 Pentaglottis sempervirens Nutrition 0.000 description 1
- 240000004050 Pentaglottis sempervirens Species 0.000 description 1
- ATJFFYVFTNAWJD-UHFFFAOYSA-N Tin Chemical compound [Sn] ATJFFYVFTNAWJD-UHFFFAOYSA-N 0.000 description 1
- 230000002159 abnormal effect Effects 0.000 description 1
- PNEYBMLMFCGWSK-UHFFFAOYSA-N aluminium oxide Inorganic materials [O-2].[O-2].[O-2].[Al+3].[Al+3] PNEYBMLMFCGWSK-UHFFFAOYSA-N 0.000 description 1
- 229910052797 bismuth Inorganic materials 0.000 description 1
- JCXGWMGPZLAOME-UHFFFAOYSA-N bismuth atom Chemical compound [Bi] JCXGWMGPZLAOME-UHFFFAOYSA-N 0.000 description 1
- 229910052799 carbon Inorganic materials 0.000 description 1
- 239000002131 composite material Substances 0.000 description 1
- 238000007796 conventional method Methods 0.000 description 1
- 229960003280 cupric chloride Drugs 0.000 description 1
- 230000006866 deterioration Effects 0.000 description 1
- 238000001035 drying Methods 0.000 description 1
- 230000005496 eutectics Effects 0.000 description 1
- 238000011156 evaluation Methods 0.000 description 1
- 239000000945 filler Substances 0.000 description 1
- MSNOMDLPLDYDME-UHFFFAOYSA-N gold nickel Chemical compound [Ni].[Au] MSNOMDLPLDYDME-UHFFFAOYSA-N 0.000 description 1
- 238000007654 immersion Methods 0.000 description 1
- 239000011810 insulating material Substances 0.000 description 1
- FBAFATDZDUQKNH-UHFFFAOYSA-M iron chloride Chemical compound [Cl-].[Fe] FBAFATDZDUQKNH-UHFFFAOYSA-M 0.000 description 1
- RBTARNINKXHZNM-UHFFFAOYSA-K iron trichloride Chemical compound Cl[Fe](Cl)Cl RBTARNINKXHZNM-UHFFFAOYSA-K 0.000 description 1
- 238000005304 joining Methods 0.000 description 1
- 239000000155 melt Substances 0.000 description 1
- 229910001092 metal group alloy Inorganic materials 0.000 description 1
- 150000007522 mineralic acids Chemical class 0.000 description 1
- 229910017604 nitric acid Inorganic materials 0.000 description 1
- 150000004767 nitrides Chemical class 0.000 description 1
- 239000003921 oil Substances 0.000 description 1
- 239000003960 organic solvent Substances 0.000 description 1
- RVZRBWKZFJCCIB-UHFFFAOYSA-N perfluorotributylamine Chemical compound FC(F)(F)C(F)(F)C(F)(F)C(F)(F)N(C(F)(F)C(F)(F)C(F)(F)C(F)(F)F)C(F)(F)C(F)(F)C(F)(F)C(F)(F)F RVZRBWKZFJCCIB-UHFFFAOYSA-N 0.000 description 1
- 230000002250 progressing effect Effects 0.000 description 1
- 229910052709 silver Inorganic materials 0.000 description 1
- 239000004332 silver Substances 0.000 description 1
- 238000005476 soldering Methods 0.000 description 1
- 239000002904 solvent Substances 0.000 description 1
- 230000008961 swelling Effects 0.000 description 1
- 230000008646 thermal stress Effects 0.000 description 1
- 229920001187 thermosetting polymer Polymers 0.000 description 1
- 229910052719 titanium Inorganic materials 0.000 description 1
- 229910052726 zirconium Inorganic materials 0.000 description 1
Abstract
Description
本発明は、高い信頼性を有するセラミックス回路基板、その製造方法およびそれを用いた電力制御部品に関する。 The present invention relates to a ceramic circuit board having high reliability, a manufacturing method thereof, and a power control component using the same.
パワーモジュール等に利用される回路用基板として、熱伝導率やコスト、安全性等の点から、アルミナ、ベリリア、窒化ケイ素、窒化アルミニウム等のセラミックス基板が利用されている。これらのセラミックス基板は、CuやAl等の金属回路や放熱板を接合して回路基板として用いられる。これらは、樹脂基板や樹脂層を絶縁材とする金属基板に対し、高い絶縁性が安定して得られるという特長がある。 Ceramic substrates such as alumina, beryllia, silicon nitride, and aluminum nitride are used as circuit substrates used for power modules and the like from the viewpoint of thermal conductivity, cost, safety, and the like. These ceramic substrates are used as a circuit board by joining a metal circuit such as Cu or Al or a heat sink. These have the feature that high insulation can be stably obtained with respect to a metal substrate using a resin substrate or a resin layer as an insulating material.
近年、パワーモジュールは、従来のエレベーター,無停電電源装置,産業機械等の分野に加えて、より高い信頼性が求められる電気鉄道用途やハイブリッドカー等に使用されるようになった。特に、電気鉄道用途の場合、従来の使用電圧である(1〜3kV)に対して、(6〜9kV)というように高電圧化が進んでおり、本用途に使用されるセラミックス回路基板に関して、高耐久性が要求されている。 In recent years, power modules have come to be used in electric railway applications, hybrid cars, and the like that require higher reliability in addition to the fields of conventional elevators, uninterruptible power supplies, industrial machinery, and the like. In particular, in the case of electric railway applications, the increase in voltage is progressing as (6-9 kV) with respect to the conventional working voltage (1-3 kV). Regarding the ceramic circuit board used in this application, High durability is required.
高電圧に対するセラミックス回路基板の絶縁性については、セラミックス基板の厚みを厚くすることや、金属回路形状を工夫することによって対応可能であるが、高電圧を印可することによって生じる部分放電電荷量の増加や金属回路表面部分からの放電については、有効な対策が見出されていない。部分放電電荷量が増大すると、その部分で局所的な材料劣化が起こり、最終的には絶縁破壊に至る場合があるため、その解決が急務となっている。沿面距離を長く取れば解決できるが、回路基板のサイズが大きくなるという課題がある。そこで、セラミック回路基板の金属回路とセラミック基板の材質、金属回路の形状等が鋭意検討されているが、十分な解決策のないのが現状である。 The insulation of ceramic circuit boards against high voltages can be dealt with by increasing the thickness of the ceramic board or devising the shape of the metal circuit, but the increase in the amount of partial discharge generated by applying a high voltage No effective measures have been found for the discharge from the surface of the metal circuit. When the partial discharge charge amount increases, local material deterioration occurs in that portion, and eventually dielectric breakdown may occur, so that the solution is urgently needed. This can be solved by increasing the creepage distance, but there is a problem that the size of the circuit board increases. Then, although the metal circuit of a ceramic circuit board, the material of a ceramic substrate, the shape of a metal circuit, etc. are examined earnestly, the present condition is that there is no sufficient solution.
一方、パワーモジュール用回路基板の耐ヒートサイクル性を向上させるため、接合層のはみ出し部分を比較的長くする提案がある(特許文献1)。しかしながら、接合層のはみ出し部分を長くすると、耐ヒートサイクル性は向上するものの、部分放電特性は低下するという課題がある。
本発明の目的は、上記課題に鑑み、絶縁性および耐ヒートサイクル性に優れ、かつ、耐部分放電特性にも優れた高い信頼性を有するセラミックス回路基板およびその製造方法を提供することである。 In view of the above problems, an object of the present invention is to provide a highly reliable ceramic circuit board excellent in insulation and heat cycle resistance and excellent in partial discharge resistance, and a method for manufacturing the same.
即ち、本発明は、セラミックス回路基板の回路パターン形成工程において、セラミックス基板に接合した金属板上に回路パターン形状にエッチングレジストを塗布し、さらにその外周に一定の距離を空けて、一定の幅のエッチングレジストを塗布することを特徴とするセラミックス回路基板の製造方法であり、回路パターン形状に塗布したエッチングレジストの外周に、0.1〜0.5mmの距離を空けて0.1〜0.3mmの幅のエッチングレジストを塗布することを特徴とするセラミックス回路基板の製造方法であり、回路パターン形状に塗布したエッチングレジストの外周に、セラミックス基板に接合した金属板の厚みより短い距離を空けてエッチングレジストを塗布することを特徴とするセラミックス回路基板の製造方法であり、回路パターン形状に塗布したエッチングレジストの外周に、エッチングレジストを2回以上塗布することを特徴とするセラミックス回路基板の製造方法である。 That is, according to the present invention, in the circuit pattern forming process of the ceramic circuit board, an etching resist is applied in a circuit pattern shape on a metal plate bonded to the ceramic board, and a certain distance is provided on the outer periphery of the circuit board to form a fixed width. A method of manufacturing a ceramic circuit board characterized by applying an etching resist, wherein an etching resist having a width of 0.1 to 0.3 mm is provided on the outer periphery of the etching resist applied in a circuit pattern shape with a distance of 0.1 to 0.5 mm. A method of manufacturing a ceramic circuit board characterized in that the etching resist is applied to the outer periphery of the etching resist applied in a circuit pattern shape with a distance shorter than the thickness of the metal plate bonded to the ceramic substrate. A ceramic circuit board manufacturing method characterized by applying to a circuit pattern shape. A method for manufacturing a ceramic circuit board is characterized in that the etching resist is applied twice or more around the outer periphery of the etching resist.
さらに、前記セラミックス回路基板の製造方法により得られる、金属回路パターンの外周部の厚さがその中央部の厚さよりも薄いことを特徴とするセラミックス回路基板であり、セラミックス基板の裏面に、放熱板に接合するための金属層を有し、前記基板の表面の金属回路パターン上に、半導体チップ等の回路部品が搭載される電力制御部品において、前記セラミックス回路基板を使用してなる電力制御部品である。 Further, the ceramic circuit board obtained by the method for manufacturing a ceramic circuit board is characterized in that the thickness of the outer peripheral portion of the metal circuit pattern is thinner than the thickness of the central portion thereof, and the heat sink is disposed on the back surface of the ceramic substrate. In a power control component having a metal layer for bonding to a circuit board and mounting a circuit component such as a semiconductor chip on a metal circuit pattern on the surface of the substrate, a power control component using the ceramic circuit board is there.
本発明によれば、絶縁性および耐ヒートサイクル性に優れ、かつ、および耐部分放電特性にも優れた高い信頼性を有するセラミックス回路基板およびその製造方法が提供される。 ADVANTAGE OF THE INVENTION According to this invention, the ceramic circuit board which has the high reliability which was excellent in insulation and heat cycle resistance, and was excellent also in the partial discharge characteristic, and its manufacturing method are provided.
本発明者は、セラミックス回路基板について鋭意検討を行った結果、セラミックス基板に接合した金属板にエッチングを施して回路パターンを形成する工程において、前記金属板上に回路パターン形状にエッチングレジストを塗布し、さらにその外周に一定の距離を空けて一定の幅のエッチングレジストを塗布することにより、金属回路パターンの外周部の厚さをその中央部の厚さよりも薄くすると、ベース板とセラミックス基板との熱膨張率の差に起因する熱応力が緩和され、その結果、金属回路がセラミックス基板より剥離したり、セラミック基板に亀裂が入ったり、はんだ層に亀裂が入ることを大幅に低減でき、絶縁性、耐ヒートサイクル性および耐部分放電特性に優れた高信頼性のセラミックス回路基板が従来に比べ生産性良く製造できることを見出した。 As a result of intensive studies on the ceramic circuit board, the present inventor applied an etching resist in the shape of the circuit pattern on the metal plate in the process of forming a circuit pattern by etching the metal plate bonded to the ceramic substrate. Further, by applying an etching resist having a certain width at a certain distance to the outer periphery, the thickness of the outer peripheral portion of the metal circuit pattern is made smaller than the thickness of the central portion. Thermal stress due to the difference in thermal expansion coefficient is relieved, and as a result, it is possible to greatly reduce the occurrence of metal circuit peeling from the ceramic substrate, cracks in the ceramic substrate, cracks in the solder layer, and insulation. Highly reliable ceramic circuit board with excellent heat cycle resistance and partial discharge resistance is manufactured with higher productivity than before It was found that the kill.
本発明に係るセラミックス回路基板の製造方法は特に限定されるものではなく、例えば、次の方法で作製することができる。 The method for producing a ceramic circuit board according to the present invention is not particularly limited, and for example, it can be produced by the following method.
セラミックス基板は特に限定されず、熱伝導性、強度等の観点より、窒化アルミニウム基板、または窒化珪素基板の使用が好ましい。また、その厚みは特に限定されないが、0.3〜3.0mm程度のものが一般的である。 The ceramic substrate is not particularly limited, and an aluminum nitride substrate or a silicon nitride substrate is preferably used from the viewpoint of thermal conductivity, strength, and the like. Moreover, although the thickness is not specifically limited, the thing of about 0.3-3.0 mm is common.
金属板の厚みは特に限定されず、流れる電流に応じて適宜決められる。一般に、0.1〜0.5mmのものが用いられることが多い。金属板の純度は、90%以上であることが好ましい。純度が90%より低いと、セラミックス基板と金属板を接合する際、金属板とろう材の反応が不十分となったり、金属板が硬くなりセラミック回路基板の信頼性が低下する場合がある。 The thickness of a metal plate is not specifically limited, It determines suitably according to the electric current which flows. In general, a thickness of 0.1 to 0.5 mm is often used. The purity of the metal plate is preferably 90% or more. When the purity is lower than 90%, when the ceramic substrate and the metal plate are joined, the reaction between the metal plate and the brazing material may be insufficient, or the metal plate may become hard and the reliability of the ceramic circuit substrate may be reduced.
セラミックス基板と金属板の接合には、一般に、接合材を用いない溶湯法、活性金属ろう付け法のいずれも採用することができるが、生産性が良く、しかも比較的低温で接合ができる活性金属ろう付け法が好ましい。
Si、Mg、Cu、Al、Ge、Ag、Ti、Mg、Zrなどの金属合金がろう材として好適である。ろう材は、ペースト又は箔として用いられる。ろう材は、セラミックス基板、または、金属板のどちらに塗布、或いは配置してもよく、合金箔を用いる場合は、予め金属板と合金箔をクラッド化しておくこともできる。
In general, either a molten metal method that does not use a bonding material or an active metal brazing method can be used for bonding a ceramic substrate and a metal plate, but the active metal has good productivity and can be bonded at a relatively low temperature. The brazing method is preferred.
Metal alloys such as Si, Mg, Cu, Al, Ge, Ag, Ti, Mg, and Zr are suitable as the brazing material. The brazing material is used as a paste or foil. The brazing material may be applied to or placed on either the ceramic substrate or the metal plate. When an alloy foil is used, the metal plate and the alloy foil may be clad in advance.
ろう材の塗布量は、乾燥基準で5〜20mg/cm2 が好ましい。塗布量が5mg/cm2 未満では未反応の部分が生じる場合があり、一方、20mg/cm2を超えると、接合層を除去する時間が長くなり生産性が低下する場合がある。塗布方法は特に限定されず、スクリーン印刷法、ロールコーター法等の公知の塗布方法を採用できる。 The coating amount of the brazing material is preferably 5 to 20 mg / cm 2 on a dry basis. If the coating amount is less than 5 mg / cm 2 , an unreacted portion may be generated. On the other hand, if it exceeds 20 mg / cm 2 , the time for removing the bonding layer may become long and productivity may be lowered. The coating method is not particularly limited, and a known coating method such as a screen printing method or a roll coater method can be employed.
セラミックス回路基板に回路パターンを形成するため、金属板にエッチングレジストを塗布してエッチングを行う。本発明においては、金属板上に回路パターン形状にエッチングレジストを塗布し、さらにその外周に一定の距離を空けて、一定の幅のエッチングレジストを塗布する。この操作により、エッチング液が金属板上の回路パターン外周とさらに外周にあるエッチングレジストの間に存在し、その部分が局所的にエッチングされていく結果、図1および図3に示すように、一度のエッチング処理で、金属回路パターンの外周部の厚さが中央部の厚さよりも薄い構造を有するセラミックス回路基板が製造できる。 In order to form a circuit pattern on the ceramic circuit board, an etching resist is applied to the metal plate and etched. In the present invention, an etching resist is applied in the shape of a circuit pattern on a metal plate, and an etching resist having a constant width is applied to the outer periphery of the etching resist. As a result of this operation, an etching solution exists between the outer periphery of the circuit pattern on the metal plate and the etching resist on the outer periphery, and the portion is locally etched. As a result, as shown in FIG. 1 and FIG. With this etching process, a ceramic circuit board having a structure in which the thickness of the outer peripheral portion of the metal circuit pattern is thinner than the thickness of the central portion can be manufactured.
本発明では、金属板上に回路パターン形状にエッチングレジストを塗布し、さらにその外周に一定の距離を空けて、一定の幅のエッチングレジストを塗布するが、その距離は0.1〜0.5mmが好ましく、接合した金属板の厚みよりも短くすることがより好ましい。距離が0.1mm未満では、金属回路パターンの外周部と中央部の厚さに差がなくなり、高信頼性のセラミックス回路基板が得られない場合がある。一方、0.5mmより大きくなると、エッチング時間が長時間となり、生産性が低下する場合がある。 In the present invention, an etching resist is applied in a circuit pattern shape on a metal plate, and a certain distance is applied to the outer periphery thereof, and an etching resist having a certain width is applied, but the distance is preferably 0.1 to 0.5 mm, It is more preferable to make it shorter than the thickness of the joined metal plate. When the distance is less than 0.1 mm, there is no difference in the thickness between the outer peripheral portion and the central portion of the metal circuit pattern, and a highly reliable ceramic circuit board may not be obtained. On the other hand, if it is larger than 0.5 mm, the etching time becomes long, and the productivity may decrease.
外周のエッチングレジストの幅は、0.1〜0.3mmであることが好ましい。外周のエッチングレジストの幅が0.1mm未満では、金属回路パターンの外周部と中央部の厚さに差がなくなり、高信頼性のセラミックス回路基板が得られない場合がある。また、エッチングレジストの幅が0.3mmを超えると、外周部の一部がエッチング後にも残留して、凹型となってしまうため、高信頼性のセラミックス回路基板が得られない場合がある。 The width of the outer peripheral etching resist is preferably 0.1 to 0.3 mm. If the width of the outer peripheral etching resist is less than 0.1 mm, there is no difference in the thickness between the outer peripheral portion and the central portion of the metal circuit pattern, and a highly reliable ceramic circuit board may not be obtained. In addition, if the width of the etching resist exceeds 0.3 mm, a part of the outer peripheral portion remains after etching and becomes a concave shape, so that a highly reliable ceramic circuit board may not be obtained.
本発明においては、回路パターン形状に塗布したエッチングレジストの外周に、セラミックス基板に接合した金属板の厚みより短い距離を空けてエッチングレジストを塗布することが好ましい。金属板の厚みと同等以上の距離を空けてエッチングレジストを塗布した場合、エッチング時間が長時間となり、生産性が低下する場合や、深くエッチングされ過ぎて所望の形にエッチングできず、高信頼性のセラミックス回路基板が得られない場合がある。 In the present invention, it is preferable to apply the etching resist to the outer periphery of the etching resist applied in a circuit pattern shape with a distance shorter than the thickness of the metal plate bonded to the ceramic substrate. If the etching resist is applied at a distance equal to or greater than the thickness of the metal plate, the etching time will be long, resulting in reduced productivity, or too deep etching that cannot be etched into the desired shape, resulting in high reliability. Ceramic circuit boards may not be obtained.
外周部分のエッチングレジストはエッチング時に剥離し易いため、外周部のエッチングレジストの塗布回数は、金属板の厚みやエッチングレジスト間の幅等によっても異なるが、2回以上塗布することが好ましい。外周部のエッチングレジストを複数回塗布することにより、外周部のエッチングレジストの剥離が防止され、金属部のエッチングパターンの凹凸が無くなり、耐部分放電等の電気特性が向上する。 Since the outer peripheral portion of the etching resist is easily peeled off during etching, the number of times of applying the outer peripheral etching resist varies depending on the thickness of the metal plate, the width between the etching resists, and the like, but it is preferable to apply the etching resist twice or more. By applying the outer peripheral etching resist a plurality of times, peeling of the outer peripheral etching resist is prevented, the unevenness of the etching pattern of the metal portion is eliminated, and electrical characteristics such as partial discharge resistance are improved.
エッチングレジストに関して特に制限はなく、例えば、一般に使用されている紫外線硬化型や熱硬化型のものが使用できる。エッチングレジストの塗布方法に関しても特に制限はなく、例えばスクリーン印刷法等の公知の塗布方法が採用できる。また、エッチング液に関しても特に制限はなく、例えば、塩化第2鉄溶液、塩化第2銅溶液、硫酸、過酸化水素水等が使用できるが、好ましいものとして、塩化第2鉄溶液、或いは塩化第2銅溶液が挙げられる。 There is no restriction | limiting in particular regarding an etching resist, For example, the ultraviolet curing type and thermosetting type generally used can be used. There is no particular limitation on the etching resist coating method, and a known coating method such as a screen printing method can be employed. The etching solution is not particularly limited, and for example, a ferric chloride solution, a cupric chloride solution, sulfuric acid, a hydrogen peroxide solution, etc. can be used. 2 copper solution.
エッチングによって不要な金属部分を除去したセラミックス回路基板には、塗布したろう材、その合金層、窒化物層等が残っており、ハロゲン化アンモニウム水溶液、硫酸、硝酸等の無機酸、過酸化水素水を含む溶液を用いて、それらを除去するのが一般的である。 The ceramic circuit board from which unnecessary metal parts have been removed by etching has the applied brazing filler metal, its alloy layer, nitride layer, etc. remaining. Ammonium halide aqueous solution, inorganic acid such as sulfuric acid and nitric acid, hydrogen peroxide solution It is common to remove them using a solution containing.
本発明に係るめっきレジストに関して特に制限はなく、溶剤乾燥タイプインク、UV硬化タイプインク等が使用できる。塗布方法は特に限定されず、スクリーン印刷法、ロールコーター法等の公知の塗布方法を採用できる。塗布厚は、乾燥後で0.005〜0.07mmの厚みとなるように塗布することが望ましい。厚みが0.005mmより薄いと、部分的に金属が表出してしまう場合があり、一方、0.07mmより厚いと、めっきレジストの除去に時間がかかり、生産性が低下する場合がある。 There is no restriction | limiting in particular regarding the plating resist which concerns on this invention, A solvent dry type ink, UV hardening type ink, etc. can be used. The coating method is not particularly limited, and a known coating method such as a screen printing method or a roll coater method can be employed. It is desirable that the coating thickness is 0.005 to 0.07 mm after drying. If the thickness is less than 0.005 mm, the metal may be partially exposed. On the other hand, if the thickness is more than 0.07 mm, it takes time to remove the plating resist, and the productivity may decrease.
めっき処理に関して特に制限はなく、作業性、コスト等の面から、無電解ニッケルめっき、無電解ニッケル金めっき、はんだめっきが好ましいものとして挙げられる。なお、めっき層の厚みは特に限定されないが、2〜8μmが望ましい。めっき厚が、2μm未満であると、はんだ濡れ性、ワイヤーボンディング特性等の実装特性に悪影響を与える場合がある。一方、めっき厚みが8μmを超えると、めっき被膜の剥がれ等により基板特性に悪影響を及ぼす場合がある。 There is no restriction | limiting in particular regarding plating process, From surfaces, such as workability | operativity and cost, electroless nickel plating, electroless nickel gold plating, and solder plating are mentioned as a preferable thing. The thickness of the plating layer is not particularly limited, but is preferably 2 to 8 μm. If the plating thickness is less than 2 μm, it may adversely affect mounting characteristics such as solder wettability and wire bonding characteristics. On the other hand, if the plating thickness exceeds 8 μm, the substrate characteristics may be adversely affected due to peeling of the plating film or the like.
めっきレジストの除去方法に関して特に制限はなく、例えば、エタノールやトルエンのような有機溶剤を用いて除去する方法や、アルカリ水溶液に浸浸させる方法が挙げられる。 There is no particular limitation on the method for removing the plating resist, and examples thereof include a method of removing using an organic solvent such as ethanol and toluene, and a method of immersion in an alkaline aqueous solution.
このようにして作製されたセラミックス回路基板は、はんだによりベース板や半導体素子等の電子部品と接合される。はんだの種類は特に限定されないが、通常、錫、鉛、銀、ビスマス等が一般に使用される。はんだ付け方法は特に限定されないが、例えば、はんだペーストをスクリーン印刷法等で所定の部分に塗布し、部品等を搭載後、はんだが溶融する温度の炉内にいれる方法が挙げられる。はんだ層は、金属回路側面に接触しない方が、セラミックス回路基板の信頼性の点で好ましい。 The ceramic circuit board thus manufactured is joined to an electronic component such as a base plate or a semiconductor element by solder. The type of solder is not particularly limited, but usually tin, lead, silver, bismuth and the like are generally used. The soldering method is not particularly limited. For example, there is a method in which a solder paste is applied to a predetermined portion by a screen printing method or the like, and a component or the like is mounted and then placed in a furnace at a temperature at which the solder melts. The solder layer is preferably not in contact with the side surface of the metal circuit from the viewpoint of the reliability of the ceramic circuit board.
〈実験No.1〉
厚み0.635mm窒化アルミニウム基板の両主面に厚さ0.02mmの接合材を介して厚さ0.4mmのアルミニウム板を重ね、クッション材としてカーボンコンポジット板(厚さ2mm)に挟んで、ホットプレス装置により、窒化アルミニウム基板に垂直方向に均等に2.5MPaで加圧しながら、N2中で550〜620℃に加熱、接合した。次に、アルミニウム板上に、めっきレジストをスクリーン印刷法でめっき保護箇所に塗布し、めっき厚みが5μmとなるように無電解ニッケルめっきを行った後、めっきレジストをエタノールで洗浄、除去した。
次に、回路面側の主面に、所定の回路パターン、並びに、回路パターン外周部より0.1mmの距離を取って、幅が0.1mmとなるようにエッチングレジストパターンをスクリーン印刷法にて印刷して、塩化鉄水溶液を用いてエッチングを行い、アルミニウム回路を形成した。得られたアルミニウム回路上に半導体素子、反対側の主面のアルミニウム板にベース板をはんだ付けし、絶縁性、耐ヒートサイクル性、部分放電性の評価を行った。結果を表1に示す。
<Experiment No. 1>
A 0.635 mm thick aluminum nitride substrate is overlapped with a 0.42 mm thick aluminum plate via a 0.02 mm thick bonding material on both main surfaces, and sandwiched between carbon composite plates (thickness 2 mm) as a cushioning material. A press apparatus was heated and bonded to 550 to 620 ° C. in N 2 while being uniformly pressurized at 2.5 MPa in the vertical direction to the aluminum nitride substrate. Next, on the aluminum plate, a plating resist was applied to a plating protection portion by a screen printing method, and after electroless nickel plating was performed so that the plating thickness became 5 μm, the plating resist was washed and removed with ethanol.
Next, an etching resist pattern is printed on the main surface on the circuit surface side by a screen printing method so that a predetermined circuit pattern and a distance of 0.1 mm from the outer periphery of the circuit pattern are 0.1 mm wide. Then, etching was performed using an iron chloride aqueous solution to form an aluminum circuit. A base plate was soldered to a semiconductor element and an aluminum plate on the opposite main surface on the obtained aluminum circuit, and insulation, heat cycle resistance, and partial discharge were evaluated. The results are shown in Table 1.
〈使用材料〉
窒化アルミニウム基板:電気化学工業社製 商品名「デンカANプレート」
接合材:Al9.5質量%、Si/1質量%を含むMg合金箔。
アルミニウム板:JIS A1085材。
めっきレジスト:太陽インキ製造社製 商品名「MA−830」
ベース板:厚み5mmの銅板(JIS C1020)の表面にニッケルめっきを施したもの。
エッチングレジスト:互応化学工業株式会社製、商品名「PER−27B−6」
はんだ:千住金属社製 共晶はんだ(OZ63-221CM5-42-10)
<Materials used>
Aluminum nitride substrate: Denka AN plate, manufactured by Denki Kagaku Kogyo Co., Ltd.
Bonding material: Mg alloy foil containing 9.5% by mass of Al and Si / 1% by mass.
Aluminum plate: JIS A1085 material.
Plating resist: Product name “MA-830” manufactured by Taiyo Ink Manufacturing Co., Ltd.
Base plate: A surface of a 5 mm thick copper plate (JIS C1020) plated with nickel.
Etching resist: Product name “PER-27B-6”, manufactured by Kyoyo Chemical Co., Ltd.
Solder: Eutectic solder manufactured by Senju Metal Co., Ltd. (OZ63-221CM5-42-10)
〈評価方法〉
耐電圧:回路側と放熱板側に、電圧を印可し絶縁破壊電圧を調べた。
耐ヒートサイクル性:(−40℃、30分→室温、10分→125℃、30分)を1サイクルとし、5000サイクルまでの熱履歴を供試体に負荷して、膨れ、剥がれ等の外観異常、及び/又はセラミック板のクラック発生が、何サイクル目から生じるかを調べた。
部分放電特性:絶縁油(住友3M社製「フロリナートFC−77」)にセラミックス回路基板を浸漬し、電圧を印可したときの部分放電電荷量が10pCを超えたときの電圧値を、部分放電開始電圧とした。
<Evaluation methods>
Dielectric strength: Voltage was applied to the circuit side and the heat sink side to examine the dielectric breakdown voltage.
Heat cycle resistance: (−40 ° C., 30 minutes → room temperature, 10 minutes → 125 ° C., 30 minutes) is assumed to be 1 cycle, and a thermal history up to 5000 cycles is loaded on the specimen, causing abnormal appearance such as swelling and peeling. And / or how many cycles the occurrence of cracks in the ceramic plate occurred.
Partial discharge characteristics: A ceramic circuit board is immersed in insulating oil ("Fluorinert FC-77" manufactured by Sumitomo 3M Co., Ltd.), and the partial discharge charge when the voltage is applied exceeds 10 pC. Voltage was used.
〈実験No.2〜7〉
エッチングレジストの外周からの距離とエッチングレジストの幅、並びに、アルミニウム板の厚みを変えたこと以外は、実施例1と同様に行った。結果を表1に示す。
<Experiment No. 2-7>
The same procedure as in Example 1 was performed except that the distance from the outer periphery of the etching resist, the width of the etching resist, and the thickness of the aluminum plate were changed. The results are shown in Table 1.
〈実験No.8,9〉
回路パターン外周のエッチングレジストを2回塗布したこと以外は、実験No.1および実験No.2と同様に行った。結果を表1に示す。
〈実験No.10〉
実施例1において、回路パターン外周にエッチングレジストを塗布しないこと以外は、実施例1と同様に行った。結果を表1に示す。
<Experiment No. 8,9>
Except that the etching resist on the outer periphery of the circuit pattern was applied twice, Experiment No. 1 and experiment no. Same as 2. The results are shown in Table 1.
<Experiment No. 10>
In Example 1, it carried out similarly to Example 1 except not apply | coating an etching resist to a circuit pattern outer periphery. The results are shown in Table 1.
1 金属板
2 セラミックス基板
3 エッチングレジスト
4 エッチングレジスト塗布部
1 Metal plate 2 Ceramic substrate 3 Etching resist 4 Etching resist coating part
Claims (6)
6. The power control component according to claim 5, wherein a metal layer for bonding to a heat sink is provided on the back surface of the ceramic substrate, and a circuit component such as a semiconductor chip is mounted on the metal circuit pattern on the surface of the substrate. A power control component that uses a ceramic circuit board.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2005087616A JP4282627B2 (en) | 2005-03-25 | 2005-03-25 | Ceramic circuit board, manufacturing method thereof, and power control component using the same. |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2005087616A JP4282627B2 (en) | 2005-03-25 | 2005-03-25 | Ceramic circuit board, manufacturing method thereof, and power control component using the same. |
Publications (2)
Publication Number | Publication Date |
---|---|
JP2006269858A true JP2006269858A (en) | 2006-10-05 |
JP4282627B2 JP4282627B2 (en) | 2009-06-24 |
Family
ID=37205480
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP2005087616A Active JP4282627B2 (en) | 2005-03-25 | 2005-03-25 | Ceramic circuit board, manufacturing method thereof, and power control component using the same. |
Country Status (1)
Country | Link |
---|---|
JP (1) | JP4282627B2 (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2017183314A (en) * | 2016-03-28 | 2017-10-05 | 京セラ株式会社 | Heat radiating member and module using the same |
-
2005
- 2005-03-25 JP JP2005087616A patent/JP4282627B2/en active Active
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2017183314A (en) * | 2016-03-28 | 2017-10-05 | 京セラ株式会社 | Heat radiating member and module using the same |
Also Published As
Publication number | Publication date |
---|---|
JP4282627B2 (en) | 2009-06-24 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
CN108541149B (en) | Method for manufacturing metal/ceramic circuit board | |
JP2006240955A (en) | Ceramic substrate, ceramic circuit board, and power control component using the same | |
JP4037425B2 (en) | Ceramic circuit board and power control component using the same. | |
JP6742073B2 (en) | Ceramics circuit board | |
JP4846455B2 (en) | A method for manufacturing a nitride ceramic circuit board. | |
JP3795038B2 (en) | Circuit board and manufacturing method thereof | |
JP4703377B2 (en) | Stepped circuit board, manufacturing method thereof, and power control component using the same. | |
JP3449458B2 (en) | Circuit board | |
JP2012234857A (en) | Ceramic circuit boad and module using the same | |
JP2006351988A (en) | Ceramic substrate, ceramic circuit board and power control component using same | |
JP6904094B2 (en) | Manufacturing method of insulated circuit board | |
JP5069485B2 (en) | Metal base circuit board | |
JP2004172182A (en) | Circuit board and its manufacturing method | |
WO2016013651A1 (en) | Brazing filler metal, and ceramic substrate employing same | |
JP4282627B2 (en) | Ceramic circuit board, manufacturing method thereof, and power control component using the same. | |
JPH10247763A (en) | Circuit board and manufacture thereof | |
JP3871680B2 (en) | Ceramic substrate, ceramic circuit substrate, and power control component using the same. | |
JP4172893B2 (en) | Method for manufacturing metal-based circuit board | |
JP2007109995A (en) | Method of mounting circuit board | |
JP3933287B2 (en) | Circuit board with heat sink | |
JP3353990B2 (en) | Circuit board manufacturing method | |
JP6621353B2 (en) | Heat resistant ceramic circuit board | |
JPH10200219A (en) | Circuit board | |
JP3260224B2 (en) | Circuit board manufacturing method | |
JPH10167804A (en) | Ceramic substrate, circuit board using same and its production |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
A977 | Report on retrieval |
Free format text: JAPANESE INTERMEDIATE CODE: A971007 Effective date: 20070221 |
|
A131 | Notification of reasons for refusal |
Free format text: JAPANESE INTERMEDIATE CODE: A131 Effective date: 20070227 |
|
A521 | Request for written amendment filed |
Free format text: JAPANESE INTERMEDIATE CODE: A523 Effective date: 20070301 |
|
A02 | Decision of refusal |
Free format text: JAPANESE INTERMEDIATE CODE: A02 Effective date: 20070327 |
|
A521 | Request for written amendment filed |
Free format text: JAPANESE INTERMEDIATE CODE: A523 Effective date: 20070416 |
|
A911 | Transfer to examiner for re-examination before appeal (zenchi) |
Free format text: JAPANESE INTERMEDIATE CODE: A911 Effective date: 20070604 |
|
A912 | Re-examination (zenchi) completed and case transferred to appeal board |
Free format text: JAPANESE INTERMEDIATE CODE: A912 Effective date: 20071012 |
|
A521 | Request for written amendment filed |
Free format text: JAPANESE INTERMEDIATE CODE: A523 Effective date: 20090123 |
|
A01 | Written decision to grant a patent or to grant a registration (utility model) |
Free format text: JAPANESE INTERMEDIATE CODE: A01 |
|
A61 | First payment of annual fees (during grant procedure) |
Free format text: JAPANESE INTERMEDIATE CODE: A61 Effective date: 20090317 |
|
R150 | Certificate of patent or registration of utility model |
Free format text: JAPANESE INTERMEDIATE CODE: R150 Ref document number: 4282627 Country of ref document: JP Free format text: JAPANESE INTERMEDIATE CODE: R150 |
|
FPAY | Renewal fee payment (event date is renewal date of database) |
Free format text: PAYMENT UNTIL: 20120327 Year of fee payment: 3 |
|
FPAY | Renewal fee payment (event date is renewal date of database) |
Free format text: PAYMENT UNTIL: 20130327 Year of fee payment: 4 |
|
FPAY | Renewal fee payment (event date is renewal date of database) |
Free format text: PAYMENT UNTIL: 20130327 Year of fee payment: 4 |
|
FPAY | Renewal fee payment (event date is renewal date of database) |
Free format text: PAYMENT UNTIL: 20140327 Year of fee payment: 5 |
|
R250 | Receipt of annual fees |
Free format text: JAPANESE INTERMEDIATE CODE: R250 |
|
R250 | Receipt of annual fees |
Free format text: JAPANESE INTERMEDIATE CODE: R250 |
|
R250 | Receipt of annual fees |
Free format text: JAPANESE INTERMEDIATE CODE: R250 |
|
R250 | Receipt of annual fees |
Free format text: JAPANESE INTERMEDIATE CODE: R250 |