JP2006269772A - Semiconductor package, wiring board, and semiconductor device - Google Patents

Semiconductor package, wiring board, and semiconductor device Download PDF

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JP2006269772A
JP2006269772A JP2005086036A JP2005086036A JP2006269772A JP 2006269772 A JP2006269772 A JP 2006269772A JP 2005086036 A JP2005086036 A JP 2005086036A JP 2005086036 A JP2005086036 A JP 2005086036A JP 2006269772 A JP2006269772 A JP 2006269772A
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semiconductor package
resin
groove
bga semiconductor
wiring board
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Atsuo Urata
敦夫 浦田
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NEC Saitama Ltd
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • H01L2224/161—Disposition
    • H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/16225—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/27—Manufacturing methods
    • H01L2224/27011—Involving a permanent auxiliary member, i.e. a member which is left at least partly in the finished device, e.g. coating, dummy feature
    • H01L2224/27013—Involving a permanent auxiliary member, i.e. a member which is left at least partly in the finished device, e.g. coating, dummy feature for holding or confining the layer connector, e.g. solder flow barrier
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/321—Disposition
    • H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/32225—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732—Location after the connecting process
    • H01L2224/73201—Location after the connecting process on the same surface
    • H01L2224/73203—Bump and layer connectors
    • H01L2224/73204—Bump and layer connectors the bump connector being embedded into the layer connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/91—Methods for connecting semiconductor or solid state bodies including different methods provided for in two or more of groups H01L2224/80 - H01L2224/90
    • H01L2224/92—Specific sequence of method steps
    • H01L2224/921—Connecting a surface with connectors of different types
    • H01L2224/9212—Sequential connecting processes
    • H01L2224/92122—Sequential connecting processes the first connecting process involving a bump connector
    • H01L2224/92125—Sequential connecting processes the first connecting process involving a bump connector the second connecting process involving a layer connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10—Details of semiconductor or other solid state devices to be connected
    • H01L2924/1015—Shape
    • H01L2924/10155—Shape being other than a cuboid

Abstract

<P>PROBLEM TO BE SOLVED: To provide a semiconductor package for which a resin can be selectively injected to a partial region of the bottom surface of the semiconductor package at the time of injecting the resin between the semiconductor package and a wiring board. <P>SOLUTION: A BGA semiconductor package 10 includes a plurality of ball terminals 12 disposed in an array shape and resin circulation grooves (14) formed mutually between the two adjacent ball terminals 12 on the bottom surface 11. The resin circulation grooves (14) are formed in the partial region of the bottom surface 11. <P>COPYRIGHT: (C)2007,JPO&INPIT

Description

本発明は、半導体パッケージ、配線基板、及び、半導体装置に関し、更に詳細には、半導体パッケージと配線基板との間に樹脂を注入する技術に関する。   The present invention relates to a semiconductor package, a wiring board, and a semiconductor device, and more particularly to a technique for injecting a resin between a semiconductor package and a wiring board.

ＢＧＡ（Ball Grid Array）半導体パッケージは、底面に外部入出力端子をアレイ状に配列した半導体パッケージである。外部入出力端子は、半球状のはんだから成るボール端子で構成され、リフローによって、プリント基板のパッド端子に接続される。ＢＧＡ半導体パッケージを搭載するプリント基板では、ＢＧＡ半導体パッケージとプリント基板との接続部分が、衝撃や熱応力に耐え得る高い機械的強度を有する必要があり、ＢＧＡ半導体パッケージとプリント基板との間に樹脂を注入することによって、接続の機械的強度を高めている。   A BGA (Ball Grid Array) semiconductor package is a semiconductor package in which external input / output terminals are arranged in an array on the bottom surface. The external input / output terminal is constituted by a ball terminal made of hemispherical solder, and is connected to the pad terminal of the printed circuit board by reflow. In a printed circuit board on which a BGA semiconductor package is mounted, a connection portion between the BGA semiconductor package and the printed circuit board needs to have a high mechanical strength that can withstand impact and thermal stress, and a resin is provided between the BGA semiconductor package and the printed circuit board. By injecting, the mechanical strength of the connection is increased.

従来、ＢＧＡ半導体パッケージとプリント基板との間に樹脂を注入する際に、樹脂の流動性不足により、必要量の樹脂の充填に多くの時間を要する問題があった。この問題に対して特許文献１は、ＢＧＡ半導体パッケージの底面に格子状の溝を形成し、毛細管現象を利用して、樹脂を溝に沿って誘導することを提案している。
特開平１０−２７０８３９号公報（図１） Conventionally, when a resin is injected between a BGA semiconductor package and a printed circuit board, there is a problem that it takes a long time to fill a required amount of the resin due to insufficient fluidity of the resin. In order to solve this problem, Patent Document 1 proposes that a lattice-like groove is formed on the bottom surface of the BGA semiconductor package and the resin is guided along the groove by utilizing a capillary phenomenon.
Japanese Patent Laid-Open No. 10-270839 (FIG. 1)

ところで、ＢＧＡ半導体パッケージとプリント基板との間への樹脂の注入に際して、ＢＧＡ半導体パッケージの全面に注入しなくても、ＢＧＡ半導体パッケージの周辺部に注入することによっても、接続の機械的強度を維持できる。しかし、従来のＢＧＡ半導体パッケージでは、ＢＧＡ半導体パッケージの周辺部に選択的に注入することが難しく、注入むらが生じることによって、良好な機械的強度が得られない問題があった。   By the way, when the resin is injected between the BGA semiconductor package and the printed circuit board, the mechanical strength of the connection is maintained even if it is injected into the peripheral portion of the BGA semiconductor package without being injected over the entire surface of the BGA semiconductor package. it can. However, in the conventional BGA semiconductor package, it is difficult to selectively inject into the peripheral portion of the BGA semiconductor package, and there is a problem that good mechanical strength cannot be obtained due to uneven injection.

本発明は、上記に鑑み、半導体パッケージと配線基板との間への樹脂の注入に際して、半導体パッケージの周辺部等の一部領域に、樹脂を選択的に注入できる半導体パッケージ、配線基板、及び半導体装置を提供することを目的とする。   In view of the above, the present invention provides a semiconductor package, a wiring board, and a semiconductor capable of selectively injecting resin into a partial region such as a peripheral portion of the semiconductor package when the resin is injected between the semiconductor package and the wiring board. An object is to provide an apparatus.

上記目的を達成するために、本発明に係る半導体パッケージは、アレイ状に配設された複数の端子と、隣接する２つの端子の相互間に形成される樹脂流通溝とを底面に有する半導体パッケージにおいて、
前記樹脂流通溝が前記底面の一部領域に形成されていることを特徴とする。 In order to achieve the above object, a semiconductor package according to the present invention has a plurality of terminals arranged in an array and a resin flow groove formed between two adjacent terminals on the bottom surface. In
The resin flow groove is formed in a partial region of the bottom surface.

本発明に係る配線基板は、半導体パッケージの底面に配設された端子に対応してアレイ状に配設された複数のパッド端子を備える配線基板において、
前記樹脂流通溝が、前記半導体パッケージの底面に対向する対向領域の一部に形成されていることを特徴とする。 A wiring board according to the present invention includes a plurality of pad terminals arranged in an array corresponding to the terminals arranged on the bottom surface of the semiconductor package.
The resin flow groove is formed in a part of a facing region facing the bottom surface of the semiconductor package.

本発明に係る半導体装置は、上記半導体パッケージと、該半導体パッケージを搭載する配線基板とを備える半導体装置であって、
前記配線基板には、前記半導体パッケージの樹脂流通溝に対向して樹脂流通溝が形成されていることを特徴とする。 A semiconductor device according to the present invention is a semiconductor device comprising the semiconductor package and a wiring board on which the semiconductor package is mounted,
The wiring board is formed with a resin flow groove facing the resin flow groove of the semiconductor package.

本発明の半導体パッケージ、配線基板、及び半導体装置によれば、半導体パッケージと配線基板との間に樹脂を注入する際に、樹脂が樹脂流通溝に沿って流通することによって、樹脂を樹脂流通溝が形成された領域に選択的に導入することが出来る。これによって、樹脂注入むらが発生することを抑制し、良好な機械的強度を得ることが出来る。   According to the semiconductor package, the wiring board, and the semiconductor device of the present invention, when the resin is injected between the semiconductor package and the wiring board, the resin flows along the resin flow groove, so that the resin flows through the resin flow groove. Can be selectively introduced into the region where the film is formed. As a result, it is possible to suppress the occurrence of uneven resin injection and obtain good mechanical strength.

本発明で、半導体パッケージには、例えばＢＧＡ半導体パッケージや、ＬＧＡ（Land Grid Array）半導体パッケージが含まれる。   In the present invention, the semiconductor package includes, for example, a BGA semiconductor package and an LGA (Land Grid Array) semiconductor package.

本発明の半導体パッケージ、配線基板、及び半導体装置の好適な実施態様では、前記樹脂流通溝が、前記底面又は対向領域の４隅に隣接して形成されている。対称的な補強構造によって、良好な機械的強度を得ることが出来る。この場合、好ましくは、前記樹脂流通溝が形成された４隅を相互に連結する連結樹脂流通溝が更に形成されてもよく、連結樹脂流通溝を樹脂が流通することによって、４隅の樹脂流通溝に樹脂を均等に導入することが出来る。   In a preferred embodiment of the semiconductor package, the wiring board, and the semiconductor device of the present invention, the resin flow groove is formed adjacent to the bottom corner or the four corners of the opposing region. Good mechanical strength can be obtained by the symmetrical reinforcing structure. In this case, preferably, a connecting resin circulation groove that connects the four corners in which the resin circulation grooves are formed may be further formed, and the resin circulation in the four corners is caused by the resin flowing through the connection resin circulation grooves. Resin can be uniformly introduced into the groove.

好ましくは、樹脂を導入する少なくとも１つの開口部が、前記連結樹脂流通溝から延長して前記底面又は対向領域の側縁に開口している。この場合、開口部の近傍に樹脂を滴下することによって、連結樹脂流通溝を介して４隅の樹脂流通溝に樹脂を導入することが出来る。半導体パッケージの側縁に沿った注入を行う必要が無いので、樹脂の注入に必要な時間を短縮し、生産性を向上させることが出来る。開口部の近傍に滴下することによって樹脂の注入を行う場合には、高い流動性を有する樹脂を用いることが望ましい。   Preferably, at least one opening for introducing the resin extends from the connecting resin circulation groove and opens at a side edge of the bottom surface or the opposed region. In this case, the resin can be introduced into the resin circulation grooves at the four corners via the connecting resin circulation grooves by dropping the resin in the vicinity of the opening. Since it is not necessary to perform injection along the side edge of the semiconductor package, the time required for resin injection can be shortened and productivity can be improved. When the resin is injected by dropping in the vicinity of the opening, it is desirable to use a resin having high fluidity.

上記開口部を備える場合には、更に好ましくは、前記４隅に形成された樹脂流通溝には、底面又は対向領域の側縁に開口する開口部が形成されない。開口部の近傍に滴下することによって樹脂の注入を行う場合に、樹脂が、樹脂流通溝に形成された開口部を介して半導体パッケージの外側に漏れ出ることを防止し、樹脂を溝の全体に効率的に導入することが出来る。   In the case where the openings are provided, it is more preferable that the resin flow grooves formed at the four corners are not formed with openings that open to the bottom surface or the side edges of the facing region. When injecting resin by dripping in the vicinity of the opening, the resin is prevented from leaking to the outside of the semiconductor package through the opening formed in the resin flow groove, and the resin is spread over the entire groove. It can be introduced efficiently.

樹脂流通溝が、底面又は対向領域の４隅に隣接して形成されている場合には、樹脂を導入する少なくとも１つの開口部が、前記４隅に隣接して形成された樹脂流通溝から延長して前記底面又は対向領域の側縁に開口していることも好ましい。半導体パッケージの底面の側縁に沿って樹脂を流すことにより、樹脂流通溝に樹脂を素早く導入することが出来る。   When the resin flow grooves are formed adjacent to the four corners of the bottom surface or the opposed region, at least one opening for introducing the resin extends from the resin flow grooves formed adjacent to the four corners. And it is also preferable that it opens in the side edge of the said bottom face or an opposing area | region. By flowing the resin along the side edge of the bottom surface of the semiconductor package, the resin can be quickly introduced into the resin flow groove.

本発明の半導体パッケージ、配線基板、及び半導体装置の好適な実施態様では、前記樹脂流通溝が、前記底面又は対向領域の側縁に隣接し該側縁に沿って形成されている。或いは、前記樹脂流通溝が、前記底面又は対向領域の一対の側縁に隣接し該一対の側縁に沿って形成されている。対称的な補強構造によって、良好な機械的強度を得ることが出来る。これら２実施態様では、好ましくは、樹脂を導入する少なくとも１つの開口部が、前記樹脂流通溝から延長して前記底面又は対向領域の側縁に開口している。   In a preferred embodiment of the semiconductor package, the wiring board, and the semiconductor device of the present invention, the resin flow groove is formed adjacent to the side edge of the bottom surface or the facing region and along the side edge. Alternatively, the resin flow groove is formed along the pair of side edges adjacent to the pair of side edges of the bottom surface or the opposed region. Good mechanical strength can be obtained by the symmetrical reinforcing structure. In these two embodiments, preferably, at least one opening for introducing the resin extends from the resin flow groove and opens at a side edge of the bottom surface or the opposed region.

上記２実施形態では、半導体パッケージの底面又は配線基板の対向領域の側縁で、相互に対向する位置に一対の開口部が開口していることが好ましく、開口部の近傍に樹脂を滴下することによって、これらの開口部を介して樹脂を効率的に導入することが出来る。相互に対向する各位置には、１つの開口部が開口していてもよく、複数の開口部が相互に近接して開口していてもよい。また、これらの位置以外には開口部が開口していないことによって、樹脂が半導体パッケージの外側に漏れ出ることを抑制することが出来る。   In the above two embodiments, it is preferable that a pair of openings are opened at positions facing each other on the bottom surface of the semiconductor package or the side edge of the facing region of the wiring board, and the resin is dropped in the vicinity of the opening. Thus, the resin can be efficiently introduced through these openings. One opening may be opened at each position facing each other, and a plurality of openings may be opened close to each other. Further, since the opening is not open except for these positions, the resin can be prevented from leaking outside the semiconductor package.

以下に、実施形態を挙げ、添付図面を参照して、本発明の実施の形態を具体的且つ詳細に説明する。図１に本発明の第１実施形態に係るＢＧＡ半導体パッケージの底面の構成を示す。ＢＧＡ半導体パッケージ１０は、チップサイズの半導体パッケージとして構成したＣＳＰ（Chip Size Package）であって、その底面１１に、アレイ状に配列されたボール端子１２を備える。   Hereinafter, embodiments of the present invention will be described specifically and in detail with reference to the accompanying drawings. FIG. 1 shows the configuration of the bottom surface of the BGA semiconductor package according to the first embodiment of the present invention. The BGA semiconductor package 10 is a CSP (Chip Size Package) configured as a chip-sized semiconductor package, and includes ball terminals 12 arranged in an array on the bottom surface 11 thereof.

ＢＧＡ半導体パッケージの底面１１には、その４隅に樹脂をスムーズに導入するための樹脂流通溝が形成され、ＢＧＡ半導体パッケージ１０とプリント基板とを樹脂で固定するための補強部１４を構成している。各樹脂流通溝は、最も隅にあるボール端子１２と、このボール端子１２に行方向、列方向及び対角線方向に隣接する３つのボール端子１２とから成る４つのボール端子１２を囲む溝１３、及び、これらのボール端子１２の間に形成された溝１３を含む溝構造として構成される。各溝１３の底面１１の側縁に隣接する端部は、当該側縁に向かって延長して開口となり、開口部１６を構成している。補強部１４と開口部１６とをつなぐ溝１３は、導入部１７を構成している。   On the bottom surface 11 of the BGA semiconductor package, resin circulation grooves for smoothly introducing resin are formed at the four corners thereof, and a reinforcing portion 14 for fixing the BGA semiconductor package 10 and the printed board with the resin is formed. Yes. Each resin flow groove includes a groove 13 surrounding four ball terminals 12 including a ball terminal 12 at the most corner and three ball terminals 12 adjacent to the ball terminal 12 in a row direction, a column direction, and a diagonal direction, and The groove structure includes a groove 13 formed between the ball terminals 12. An end portion adjacent to the side edge of the bottom surface 11 of each groove 13 extends toward the side edge to form an opening, thereby forming an opening portion 16. The groove 13 connecting the reinforcement portion 14 and the opening portion 16 constitutes an introduction portion 17.

図２は、図１のII−II方向に沿って見た断面を、当該ＢＧＡ半導体パッケージがプリント基板に接続された状態で示している。ＢＧＡ半導体パッケージ１０のプリント基板３０への搭載に際しては、先ず、ボール端子１２をプリント基板の表面３１に配設されたパッド端子３２に接触させた状態で、ボール端子１２のリフローを行い、ＢＧＡ半導体パッケージ１０をプリント基板３０に対して固定する。次いで、注射器５０を用いて、開口部１６の近傍で、ＢＧＡ半導体パッケージの底面１１の側縁に沿って樹脂１８を押し出す。押し出された樹脂１８は、毛細管現象によって、溝１３に沿って流れ、補強部１４及びその近傍に導入される。   FIG. 2 shows a cross section viewed along the II-II direction of FIG. 1 in a state where the BGA semiconductor package is connected to a printed circuit board. When mounting the BGA semiconductor package 10 on the printed circuit board 30, first, the ball terminal 12 is reflowed in a state where the ball terminal 12 is in contact with the pad terminal 32 disposed on the surface 31 of the printed circuit board. The package 10 is fixed to the printed circuit board 30. Next, using the syringe 50, the resin 18 is pushed out along the side edge of the bottom surface 11 of the BGA semiconductor package in the vicinity of the opening 16. The extruded resin 18 flows along the groove 13 by capillary action and is introduced into the reinforcing portion 14 and the vicinity thereof.

適量の樹脂１８を押し出すことによって、補強部１４及びその近傍に選択的に樹脂１８を導入することが出来る。この場合、補強部１４及びその近傍を除くＢＧＡ半導体パッケージ１０の中央部には、樹脂１８が注入されないので、ＢＧＡ半導体パッケージ１０とプリント基板３０との間に注入される樹脂１８の量を減らし、ＢＧＡ半導体パッケージ１０を搭載したプリント基板３０を軽量化することが出来る。また、ＢＧＡ半導体パッケージの底面１１の４隅が樹脂１８で補強されることによって、ＢＧＡ半導体パッケージ１０とプリント基板３０との接続の機械的強度を維持することが出来る。   By extruding an appropriate amount of the resin 18, the resin 18 can be selectively introduced into the reinforcing portion 14 and the vicinity thereof. In this case, since the resin 18 is not injected into the central portion of the BGA semiconductor package 10 excluding the reinforcing portion 14 and the vicinity thereof, the amount of the resin 18 injected between the BGA semiconductor package 10 and the printed circuit board 30 is reduced, The printed circuit board 30 on which the BGA semiconductor package 10 is mounted can be reduced in weight. Further, the four corners of the bottom surface 11 of the BGA semiconductor package are reinforced with the resin 18, whereby the mechanical strength of the connection between the BGA semiconductor package 10 and the printed circuit board 30 can be maintained.

図３は、第１実施形態の変形例に係るＢＧＡ半導体パッケージの構成を示す平面図である。ＢＧＡ半導体パッケージ２１では、溝の補強部１４が、ＢＧＡ半導体パッケージの底面１１の側縁に沿って配設されている。補強部１４は、ＢＧＡ半導体パッケージの底面１１の側縁から１列目のボール端子１２を囲む溝１３、及び、これらのボール端子１２の間に形成された溝１３を含む。本変形例のＢＧＡ半導体パッケージ２１では、ＢＧＡ半導体パッケージ２１とプリント基板との間が、ＢＧＡ半導体パッケージの底面１１の側縁に沿って樹脂１８で補強されることによって、接続の機械的強度を維持することが出来る。   FIG. 3 is a plan view showing a configuration of a BGA semiconductor package according to a modification of the first embodiment. In the BGA semiconductor package 21, the groove reinforcing portion 14 is disposed along the side edge of the bottom surface 11 of the BGA semiconductor package. The reinforcing portion 14 includes a groove 13 surrounding the ball terminals 12 in the first row from the side edge of the bottom surface 11 of the BGA semiconductor package, and a groove 13 formed between these ball terminals 12. In the BGA semiconductor package 21 of this modification, the mechanical strength of the connection is maintained by reinforcing the space between the BGA semiconductor package 21 and the printed circuit board with the resin 18 along the side edge of the bottom surface 11 of the BGA semiconductor package. I can do it.

図４は、本発明の第２実施形態に係るＢＧＡ半導体パッケージの構成を示す平面図である。ＢＧＡ半導体パッケージ２２では、溝の補強部１４は、ＢＧＡ半導体パッケージの底面１１の４隅に配設され、開口部１６は、ＢＧＡ半導体パッケージ２２の相互に対向する２つの辺１５で、各辺１５の中央に配設されている。溝１３は、上記開口部１６以外には開口部１６を有さない。導入部（連結樹脂流通溝）１７は、開口部１６と各開口部１６に近接する２つの補強部１４をつないで形成され、ＢＧＡ半導体パッケージの底面１１の側縁から１列目のボール端子１２と、２列目のボール端子１２との間を通って配設されている。   FIG. 4 is a plan view showing the configuration of the BGA semiconductor package according to the second embodiment of the present invention. In the BGA semiconductor package 22, the groove reinforcing portions 14 are disposed at the four corners of the bottom surface 11 of the BGA semiconductor package, and the openings 16 are two sides 15 of the BGA semiconductor package 22 facing each other. It is arranged at the center of. The groove 13 does not have the opening 16 other than the opening 16. The introduction portion (connecting resin flow groove) 17 is formed by connecting the opening 16 and the two reinforcing portions 14 adjacent to each opening 16, and the ball terminals 12 in the first row from the side edge of the bottom surface 11 of the BGA semiconductor package. And the ball terminals 12 in the second row.

本実施形態では、ＢＧＡ半導体パッケージ２２とプリント基板との間への樹脂の注入に際して、対向する一対の各開口部１６の近傍にそれぞれ液状の樹脂１８を滴下する。適量の樹脂１８を滴下することによって、溝１３の全体と溝１３の近傍とに樹脂１８を導入し、補強部１４及びその近傍のＢＧＡ半導体パッケージ２２とプリント基板３０との間に樹脂１８を導入することが出来る。図５に、樹脂１８が補強部１４及びその近傍に導入された状態を、図４のＶ−Ｖ方向に沿って見た断面で示す。なお、樹脂１８を溝１３に沿って効率的に流し込むためには、高い流動性を有する樹脂を用いることが望ましい。   In the present embodiment, when the resin is injected between the BGA semiconductor package 22 and the printed circuit board, the liquid resin 18 is dropped in the vicinity of each of the pair of opposed openings 16. By dripping an appropriate amount of the resin 18, the resin 18 is introduced into the entire groove 13 and in the vicinity of the groove 13, and the resin 18 is introduced between the reinforcing portion 14 and the BGA semiconductor package 22 in the vicinity thereof and the printed board 30. I can do it. FIG. 5 shows a state in which the resin 18 is introduced into the reinforcing portion 14 and the vicinity thereof, as a cross section viewed along the VV direction in FIG. 4. In order to efficiently flow the resin 18 along the groove 13, it is desirable to use a resin having high fluidity.

本実施形態のＢＧＡ半導体パッケージ２２によれば、開口部１６が、ＢＧＡ半導体パッケージ２２の対向する２つの辺１５で、各辺１５の中央に形成されることによって、樹脂１８の注入を２点で行うことができ、注射器を底面１１の側縁に沿って移動させる必要が無いので、樹脂１８の注入に必要な時間を短縮することが出来る。溝１３が、開口部１６以外に底面１１の側縁に開口部１６を持たず、閉じられていることによって、樹脂１８が他の開口部からＢＧＡ半導体パッケージ２２の外側に漏れ出ることを防止し、樹脂１８を溝１３の全体に効率的に導入することが出来る。   According to the BGA semiconductor package 22 of the present embodiment, the opening 16 is formed at the center of each side 15 on the two opposite sides 15 of the BGA semiconductor package 22, so that the resin 18 can be injected at two points. This can be done, and since it is not necessary to move the syringe along the side edge of the bottom surface 11, the time required for the injection of the resin 18 can be shortened. Since the groove 13 does not have the opening 16 on the side edge of the bottom surface 11 other than the opening 16 and is closed, the resin 18 is prevented from leaking out of the BGA semiconductor package 22 from the other opening. The resin 18 can be efficiently introduced into the entire groove 13.

図６は、第２実施形態の第１変形例に係るＢＧＡ半導体パッケージの構成を示す平面図である。ＢＧＡ半導体パッケージ２３では、図４に示したＢＧＡ半導体パッケージ２２において、導入部１７が、ＢＧＡ半導体パッケージの底面１１の側縁と、側縁から１列目のボール端子１２との間を通って配設されている。また、辺１５の中央部に相互に近接して３つの開口部１６が形成されている。本変形例のＢＧＡ半導体パッケージ２３によれば、導入部１７が、ＢＧＡ半導体パッケージの底面１１の側縁により近く配設されることによって、導入部１７の長さを短縮し、開口部１６から注入された樹脂１８を補強部１４に素早く導入することが出来る。また、相互に近接して３つの開口部１６が形成されることによって、樹脂１８を溝１３に効率的に導入することが出来る。   FIG. 6 is a plan view showing a configuration of a BGA semiconductor package according to a first modification of the second embodiment. In the BGA semiconductor package 23, in the BGA semiconductor package 22 shown in FIG. 4, the introduction portion 17 is arranged between the side edge of the bottom surface 11 of the BGA semiconductor package and the ball terminals 12 in the first row from the side edge. It is installed. Further, three openings 16 are formed close to each other at the center of the side 15. According to the BGA semiconductor package 23 of this modification, the introduction portion 17 is disposed closer to the side edge of the bottom surface 11 of the BGA semiconductor package, thereby reducing the length of the introduction portion 17 and injecting from the opening 16. The resin 18 thus made can be quickly introduced into the reinforcing portion 14. In addition, the resin 18 can be efficiently introduced into the groove 13 by forming the three openings 16 close to each other.

図７は、第２実施形態の第２変形例に係るＢＧＡ半導体パッケージの構成を示す平面図である。ＢＧＡ半導体パッケージ２４では、図６に示したＢＧＡ半導体パッケージ２３において、補強部１４が、ＢＧＡ半導体パッケージ２４の相互に対向する２つの辺１５で、ＢＧＡ半導体パッケージの底面１１の側縁に沿って連続して配設されている。ＢＧＡ半導体パッケージ２４とプリント基板との間が、ＢＧＡ半導体パッケージ２４の相互に対向する２つの辺１５で、底面１１の側縁に沿って樹脂１８で補強されることによって、接続の機械的強度を維持することが出来る。   FIG. 7 is a plan view showing a configuration of a BGA semiconductor package according to a second modification of the second embodiment. In the BGA semiconductor package 24, in the BGA semiconductor package 23 shown in FIG. 6, the reinforcing portion 14 is continuous along the side edge of the bottom surface 11 of the BGA semiconductor package at two opposite sides 15 of the BGA semiconductor package 24. Arranged. The BGA semiconductor package 24 and the printed circuit board are reinforced with the resin 18 along the side edges of the bottom surface 11 at the two sides 15 opposite to each other of the BGA semiconductor package 24, thereby increasing the mechanical strength of the connection. Can be maintained.

図８は、第３実施形態に係るＢＧＡ半導体パッケージについて、当該ＢＧＡ半導体パッケージがプリント基板に接続された状態で示す断面図である。ＢＧＡ半導体パッケージ２５では、その底面１１に、シルク印刷によって、絶縁膜１９が形成されている。絶縁膜１９は、ストライプ状に形成され、その延在方向に直交方向の中央が印刷されず、溝２０を構成している。溝２０は、図１に示したＢＧＡ半導体パッケージ１０の溝１３と同様の面形状で配設されている。   FIG. 8 is a cross-sectional view showing a BGA semiconductor package according to the third embodiment in a state where the BGA semiconductor package is connected to a printed circuit board. In the BGA semiconductor package 25, an insulating film 19 is formed on the bottom surface 11 by silk printing. The insulating film 19 is formed in a stripe shape, and the center in the direction perpendicular to the extending direction is not printed, and constitutes the groove 20. The grooves 20 are arranged in the same surface shape as the grooves 13 of the BGA semiconductor package 10 shown in FIG.

本変形例のＢＧＡ半導体パッケージ２５によれば、ＢＧＡ半導体パッケージの底面１１にシルク印刷によって溝２０が形成されることによって、第１実施形態のＢＧＡ半導体パッケージ１０と同様の効果を得ることが出来る。なお、溝２０は、図３、４、６、７に示したＢＧＡ半導体パッケージの溝１３と同様の面形状で配設されてもよい。   According to the BGA semiconductor package 25 of the present modification, the groove 20 is formed by silk printing on the bottom surface 11 of the BGA semiconductor package, so that the same effect as the BGA semiconductor package 10 of the first embodiment can be obtained. The groove 20 may be arranged in the same surface shape as the groove 13 of the BGA semiconductor package shown in FIGS.

図９は、本発明の第４実施形態に係る配線基板について、ＢＧＡ半導体パッケージが配線基板に接続された状態で示す断面図である。配線基板３６は、プリント基板であって、表面３１に、ＢＧＡ半導体パッケージのボール端子１２に対応してアレイ状に配設されたパッド端子３２を備える。表面３１には、また、バッド端子３２とバッド端子３２との間に、溝３３が形成されている。溝３３は、図１に示したＢＧＡ半導体パッケージ１０の底面１１に形成された溝１３と同様の面形状で配設されている。   FIG. 9 is a cross-sectional view showing a wiring board according to the fourth embodiment of the present invention in a state where a BGA semiconductor package is connected to the wiring board. The wiring board 36 is a printed circuit board, and includes pad terminals 32 arranged on the front surface 31 in an array corresponding to the ball terminals 12 of the BGA semiconductor package. In the surface 31, a groove 33 is formed between the bad terminal 32 and the bad terminal 32. The grooves 33 are arranged in the same surface shape as the grooves 13 formed on the bottom surface 11 of the BGA semiconductor package 10 shown in FIG.

本実施形態の配線基板３６によれば、配線基板の表面３１に上記溝１３が形成されていることによって、図１に示したＢＧＡ半導体パッケージ１０と同様の効果を得ることが出来る。なお、第４実施形態の変形例として、図１０に示すように、絶縁膜３４等のシルク印刷によって溝３５を形成することも出来る。   According to the wiring board 36 of the present embodiment, since the groove 13 is formed on the surface 31 of the wiring board, the same effect as that of the BGA semiconductor package 10 shown in FIG. 1 can be obtained. As a modification of the fourth embodiment, as shown in FIG. 10, the groove 35 can be formed by silk printing of the insulating film 34 or the like.

図１１は、本発明の第５実施形態に係るＢＧＡ半導体装置の構成を示す断面図である。ＢＧＡ半導体装置４０は、プリント基板として構成される配線基板４１と、配線基板４１上に搭載されたＢＧＡ半導体パッケージ４２を備える。配線基板４１は、図９に示した配線基板３６と同様の構成を有し、ＢＧＡ半導体パッケージ４２は、図１に示したＢＧＡ半導体パッケージ１０と同様の構成を有する。本実施形態のＢＧＡ半導体装置４０によれば、ＢＧＡ半導体パッケージの底面１１、及び配線基板の表面３１に、相互に対応する溝１３，３３がそれぞれ形成されることによって、第１実施形態のＢＧＡ半導体パッケージ及び第４実施形態の配線基板に比して、樹脂を溝１３，３３に沿ってより確実に導くことが出来る。   FIG. 11 is a cross-sectional view showing the configuration of the BGA semiconductor device according to the fifth embodiment of the present invention. The BGA semiconductor device 40 includes a wiring board 41 configured as a printed board and a BGA semiconductor package 42 mounted on the wiring board 41. The wiring board 41 has the same configuration as the wiring board 36 shown in FIG. 9, and the BGA semiconductor package 42 has the same configuration as the BGA semiconductor package 10 shown in FIG. According to the BGA semiconductor device 40 of the present embodiment, the mutually corresponding grooves 13 and 33 are formed on the bottom surface 11 of the BGA semiconductor package and the surface 31 of the wiring board, respectively, so that the BGA semiconductor of the first embodiment is formed. As compared with the package and the wiring substrate of the fourth embodiment, the resin can be guided more reliably along the grooves 13 and 33.

なお、第５実施形態の変形例として、図１２に示すように、絶縁膜１９，３４等のシルク印刷によって、ＢＧＡ半導体パッケージの底面１１、及び配線基板の表面３１に溝２０，３５を形成することも出来る。ＢＧＡ半導体パッケージ及び配線基板のうちの一方の溝を、シルク印刷で形成することも出来る。なお、溝２０，３５は、図３、４、６、７に示したＢＧＡ半導体パッケージの溝１３と同様の面形状で配設されてもよい。   As a modification of the fifth embodiment, as shown in FIG. 12, grooves 20 and 35 are formed on the bottom surface 11 of the BGA semiconductor package and the surface 31 of the wiring board by silk printing of the insulating films 19 and 34 and the like. You can also One groove of the BGA semiconductor package and the wiring board can be formed by silk printing. The grooves 20 and 35 may be arranged in the same surface shape as the groove 13 of the BGA semiconductor package shown in FIGS.

なお、上記第１〜第５実施形態では、ＢＧＡ半導体パッケージについて説明したが、本発明は、同様に配線基板のパッド端子との間で、はんだを用いて接続されるＬＧＡ半導体パッケージなどにも適用できる。ＬＧＡ半導体パッケージは、半導体パッケージの底面に、印刷によって形成されたはんだマスクが端子として露出する構造を有している。   In the first to fifth embodiments, the BGA semiconductor package has been described. However, the present invention is similarly applied to an LGA semiconductor package that is connected to a pad terminal of a wiring board using solder. it can. The LGA semiconductor package has a structure in which a solder mask formed by printing is exposed as a terminal on the bottom surface of the semiconductor package.

以上、本発明をその好適な実施形態に基づいて説明したが、本発明に係る半導体パッケージ、配線基板、及び半導体装置は、上記実施形態の構成にのみ限定されるものではなく、上記実施形態の構成から種々の修正及び変更を施した半導体パッケージ、配線基板、及び半導体装置も、本発明の範囲に含まれる。   As described above, the present invention has been described based on the preferred embodiments. However, the semiconductor package, the wiring board, and the semiconductor device according to the present invention are not limited to the configurations of the above-described embodiments. Semiconductor packages, wiring boards, and semiconductor devices having various modifications and changes in configuration are also included in the scope of the present invention.

第１実施形態に係るＢＧＡ半導体パッケージの構成を示す平面図である。It is a top view which shows the structure of the BGA semiconductor package which concerns on 1st Embodiment. 図１のII−II方向に沿って見た断面を、ＢＧＡ半導体パッケージがプリント基板に接続された状態で示す断面図である。It is sectional drawing which shows the cross section seen along the II-II direction of FIG. 1 in the state in which the BGA semiconductor package was connected to the printed circuit board. 第１実施形態の変形例に係るＢＧＡ半導体パッケージの構成を示す平面図である。It is a top view which shows the structure of the BGA semiconductor package which concerns on the modification of 1st Embodiment. 本発明の第２実施形態に係るＢＧＡ半導体パッケージの構成を示す平面図である。It is a top view which shows the structure of the BGA semiconductor package which concerns on 2nd Embodiment of this invention. 樹脂が補強部及びその近傍に導入された状態を、図４のＶ−Ｖ方向に沿って見た断面で示す断面図である。It is sectional drawing which shows the state in which resin was introduce | transduced into the reinforcement part and its vicinity with the cross section seen along the VV direction of FIG. 第２実施形態の第１変形例に係るＢＧＡ半導体パッケージの構成を示す平面図である。It is a top view which shows the structure of the BGA semiconductor package which concerns on the 1st modification of 2nd Embodiment. 第２実施形態の第２変形例に係るＢＧＡ半導体パッケージの構成を示す平面図である。It is a top view which shows the structure of the BGA semiconductor package which concerns on the 2nd modification of 2nd Embodiment. 本発明の第３実施形態に係るＢＧＡ半導体パッケージについて、ＢＧＡ半導体パッケージがプリント基板に接続された状態で示す断面図である。It is sectional drawing which shows the BGA semiconductor package which concerns on 3rd Embodiment of this invention in the state in which the BGA semiconductor package was connected to the printed circuit board. 本発明の第４実施形態に係る配線基板について、ＢＧＡ半導体パッケージが配線基板に接続された状態で示す断面図である。It is sectional drawing shown in the state with which the BGA semiconductor package was connected to the wiring board about the wiring board which concerns on 4th Embodiment of this invention. 第４実施形態の変形例に係る配線基板について、ＢＧＡ半導体パッケージがプリント基板に接続された状態で示す断面図である。It is sectional drawing shown in the state with which the BGA semiconductor package was connected to the printed circuit board about the wiring board which concerns on the modification of 4th Embodiment. 本発明の第５実施形態に係るＢＧＡ半導体装置の構成を示す断面図である。It is sectional drawing which shows the structure of the BGA semiconductor device which concerns on 5th Embodiment of this invention. 第５実施形態の変形例に係るＢＧＡ半導体装置の構成を示す断面図である。It is sectional drawing which shows the structure of the BGA semiconductor device which concerns on the modification of 5th Embodiment.

符号の説明Explanation of symbols

１０，２１，２２，２３，２４，２５，２６，４２：ＢＧＡ半導体パッケージ
１１：（ＢＧＡ半導体パッケージの）底面
１２：ボール端子
１３：溝
１４：補強部
１５：（ＢＧＡ半導体パッケージの）辺
１６：開口部
１７：導入部
１８：樹脂
１９：絶縁膜
２０：溝
３０，３６，３７，４１：配線基板（プリント基板）
３１：表面
３２：パッド端子
３３：溝
３４：絶縁膜
３５：溝
４０，４３：ＢＧＡ半導体装置
５０：注射器 10, 21, 22, 23, 24, 25, 26, 42: BGA semiconductor package 11: bottom surface (of BGA semiconductor package) 12: ball terminal 13: groove 14: reinforcing portion 15: side 16 (of BGA semiconductor package): Opening portion 17: Introduction portion 18: Resin 19: Insulating film 20: Grooves 30, 36, 37, 41: Wiring board (printed board)
31: surface 32: pad terminal 33: groove 34: insulating film 35: groove 40, 43: BGA semiconductor device 50: syringe

Claims (11)

アレイ状に配設された複数の端子と、隣接する２つの端子の相互間に形成される樹脂流通溝とを底面に有する半導体パッケージにおいて、
前記樹脂流通溝が前記底面の一部領域に形成されていることを特徴とする半導体パッケージ。 In a semiconductor package having a plurality of terminals arranged in an array and a resin flow groove formed between two adjacent terminals on the bottom surface,
The semiconductor package, wherein the resin flow groove is formed in a partial region of the bottom surface. 前記樹脂流通溝が、前記底面の４隅に隣接して形成されている、請求項１に記載の半導体パッケージ。   The semiconductor package according to claim 1, wherein the resin flow groove is formed adjacent to four corners of the bottom surface. 前記樹脂流通溝が形成された４隅を相互に連結する連結樹脂流通溝が更に形成されている、請求項２に記載の半導体パッケージ。   The semiconductor package according to claim 2, further comprising a connecting resin flow groove that connects the four corners where the resin flow grooves are formed. 樹脂を導入する少なくとも１つの開口部が、前記連結樹脂流通溝から延長して前記底面の側縁に開口している、請求項３に記載の半導体パッケージ。   4. The semiconductor package according to claim 3, wherein at least one opening for introducing the resin extends from the connecting resin flow groove and opens at a side edge of the bottom surface. 前記４隅に形成された樹脂流通溝には、底面の側縁に開口する開口部が形成されない、請求項４に記載の半導体パッケージ。   The semiconductor package according to claim 4, wherein the resin circulation grooves formed at the four corners are not formed with openings that open to the side edges of the bottom surface. 樹脂を導入する少なくとも１つの開口部が、前記４隅に形成された樹脂流通溝から延長して前記底面の側縁に開口している、請求項２又は３に記載の半導体パッケージ。   4. The semiconductor package according to claim 2, wherein at least one opening for introducing resin extends from a resin circulation groove formed at the four corners and opens at a side edge of the bottom surface. 5. 前記樹脂流通溝が、前記底面の側縁に隣接し該側縁に沿って形成されている、請求項１に記載の半導体パッケージ。   The semiconductor package according to claim 1, wherein the resin flow groove is formed adjacent to a side edge of the bottom surface and along the side edge. 前記樹脂流通溝が、前記底面の一対の側縁に隣接し該一対の側縁に沿って形成されている、請求項１に記載の半導体パッケージ。   The semiconductor package according to claim 1, wherein the resin circulation groove is formed along the pair of side edges adjacent to the pair of side edges of the bottom surface. 請求項１〜８の何れか一に記載の半導体パッケージと、該半導体パッケージを搭載する配線基板とを備える半導体装置であって、
前記配線基板には、前記半導体パッケージの樹脂流通溝に対向して樹脂流通溝が形成されていることを特徴とする半導体装置。 A semiconductor device comprising the semiconductor package according to any one of claims 1 to 8 and a wiring board on which the semiconductor package is mounted,
The semiconductor device according to claim 1, wherein a resin circulation groove is formed on the wiring board so as to face the resin circulation groove of the semiconductor package. 半導体パッケージの底面に配設された端子に対応してアレイ状に配設された複数のパッド端子を備える配線基板において、
前記樹脂流通溝が、前記半導体パッケージの底面に対向する対向領域の一部に形成されていることを特徴とする配線基板。 In a wiring board comprising a plurality of pad terminals arranged in an array corresponding to the terminals arranged on the bottom surface of the semiconductor package,
The wiring substrate, wherein the resin flow groove is formed in a part of a facing region facing the bottom surface of the semiconductor package. 前記樹脂流通溝が、前記半導体パッケージの底面の４隅に対向する位置に隣接した位置に形成されている、請求項１０に記載の配線基板。   The wiring board according to claim 10, wherein the resin flow groove is formed at a position adjacent to positions facing the four corners of the bottom surface of the semiconductor package.
JP2005086036A 2005-03-24 2005-03-24 Semiconductor package, wiring board, and semiconductor device Withdrawn JP2006269772A (en)

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Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7675172B2 (en) 2007-06-29 2010-03-09 Kabushiki Kaisha Toshiba Printed circuit board, mounting method of electronic component, and electronic apparatus
CN101431867B (en) * 2007-11-05 2011-03-09 松下电器产业株式会社 Mounting structure
WO2011148615A1 (en) * 2010-05-26 2011-12-01 株式会社村田製作所 Substrate with built-in component
CN102281715A (en) * 2010-06-10 2011-12-14 富士通株式会社 Board reinforcing structure, board assembly, and electronic device
US10847476B2 (en) 2018-11-23 2020-11-24 Samsung Electronics Co., Ltd. Semiconductor package

Cited By (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7675172B2 (en) 2007-06-29 2010-03-09 Kabushiki Kaisha Toshiba Printed circuit board, mounting method of electronic component, and electronic apparatus
CN101431867B (en) * 2007-11-05 2011-03-09 松下电器产业株式会社 Mounting structure
WO2011148615A1 (en) * 2010-05-26 2011-12-01 株式会社村田製作所 Substrate with built-in component
JP5278608B2 (en) * 2010-05-26 2013-09-04 株式会社村田製作所 Component built-in board
KR101383137B1 (en) 2010-05-26 2014-04-09 가부시키가이샤 무라타 세이사쿠쇼 Substrate with built-in component
CN102281715A (en) * 2010-06-10 2011-12-14 富士通株式会社 Board reinforcing structure, board assembly, and electronic device
US10847476B2 (en) 2018-11-23 2020-11-24 Samsung Electronics Co., Ltd. Semiconductor package

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